1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_PCMU_PBM_H 27 #define _SYS_PCMU_PBM_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #include <sys/types.h> 32 #include <sys/dditypes.h> 33 #include <sys/ontrap.h> 34 #include <sys/callb.h> 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 /* 41 * The following structure represents the pci configuration header 42 * for CMU-CH PBM. 43 */ 44 typedef struct config_header { 45 volatile uint16_t ch_vendor_id; 46 volatile uint16_t ch_device_id; 47 volatile uint16_t ch_command_reg; 48 volatile uint16_t ch_status_reg; 49 volatile uint8_t ch_revision_id_reg; 50 volatile uint8_t ch_programming_if_code_reg; 51 volatile uint8_t ch_sub_class_reg; 52 volatile uint8_t ch_base_class_reg; 53 volatile uint8_t ch_cache_line_size_reg; 54 volatile uint8_t ch_latency_timer_reg; 55 volatile uint8_t ch_header_type_reg; 56 } config_header_t; 57 58 #define PBM_NAMESTR_BUFLEN 64 59 60 /* 61 * CMU-CH pbm block soft state structure: 62 */ 63 struct pcmu_pbm { 64 pcmu_t *pcbm_pcmu_p; /* link back to the soft state */ 65 66 volatile uint64_t *pcbm_ctrl_reg; /* PBM control reg */ 67 volatile uint64_t *pcbm_async_flt_status_reg; /* PBM AFSR reg */ 68 volatile uint64_t *pcbm_async_flt_addr_reg; /* PBM AFAR reg */ 69 volatile uint64_t *pcbm_diag_reg; /* PBM diag reg */ 70 71 config_header_t *pcbm_config_header; /* PBM config header */ 72 uint64_t pcbm_imr_save; /* intr map save area */ 73 ddi_iblock_cookie_t pcbm_iblock_cookie; /* PBM error intr priority */ 74 75 on_trap_data_t *pcbm_ontrap_data; /* ddi_poke support */ 76 kmutex_t pcbm_pokeflt_mutex; /* poke mutex */ 77 ddi_acc_handle_t pcbm_excl_handle; /* cautious IO access handle */ 78 char pcbm_nameinst_str[PBM_NAMESTR_BUFLEN]; /* driver name & inst */ 79 char *pcbm_nameaddr_str; /* node name & address */ 80 }; 81 82 /* 83 * Prototypes 84 */ 85 extern void pcmu_pbm_create(pcmu_t *pcmu_p); 86 extern void pcmu_pbm_destroy(pcmu_t *pcmu_p); 87 extern void pcmu_pbm_configure(pcmu_pbm_t *pcbm_p); 88 extern void pcmu_pbm_suspend(pcmu_pbm_t *pcbm_p); 89 extern void pcmu_pbm_resume(pcmu_pbm_t *pcbm_p); 90 extern void pcmu_pbm_intr_dist(void *arg); 91 extern int pcmu_pbm_register_intr(pcmu_pbm_t *pcbm_p); 92 extern int pcmu_pbm_afsr_report(dev_info_t *dip, uint64_t fme_ena, 93 pcmu_pbm_errstate_t *pbm_err_p); 94 95 #ifdef __cplusplus 96 } 97 #endif 98 99 #endif /* _SYS_PCMU_PBM_H */ 100