1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_PCMU_CB_H 27 #define _SYS_PCMU_CB_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 enum pcmu_cb_nintr_index { 36 CBNINTR_PBM = 0, /* not shared */ 37 CBNINTR_UE = 1, /* shared */ 38 CBNINTR_CE = 2, /* shared */ 39 CBNINTR_POWER_FAIL = 3, /* shared */ 40 CBNINTR_THERMAL = 4, /* shared */ 41 CBNINTR_MAX /* max */ 42 }; 43 44 /* 45 * control block soft state structure: 46 */ 47 struct pcmu_cb { 48 pcmu_t *pcb_pcmu_p; 49 pcmu_ign_t pcb_ign; /* interrupt grp# */ 50 kmutex_t pcb_intr_lock; /* guards add/rem intr and intr dist */ 51 uint32_t pcb_no_of_inos; /* # of actual inos, including PBM */ 52 uint32_t pcb_inos[CBNINTR_MAX]; /* subset of pcmu_p->pcmu_inos array */ 53 uint64_t pcb_base_pa; /* PA of CSR bank, 2nd "reg" */ 54 uint64_t pcb_map_pa; /* map reg base PA */ 55 uint64_t pcb_clr_pa; /* clr reg base PA */ 56 uint64_t pcb_obsta_pa; /* sta reg base PA */ 57 uint64_t *pcb_imr_save; 58 caddr_t pcb_ittrans_cookie; /* intr tgt translation */ 59 }; 60 61 #define PCMU_CB_INO_TO_MONDO(pcb_p, ino) \ 62 ((pcb_p)->pcb_ign << PCMU_INO_BITS | (ino)) 63 64 /* 65 * Prototypes. 66 */ 67 extern void pcmu_cb_create(pcmu_t *pcmu_p); 68 extern void pcmu_cb_destroy(pcmu_t *pcmu_p); 69 extern void pcmu_cb_suspend(pcmu_cb_t *cb_p); 70 extern void pcmu_cb_resume(pcmu_cb_t *cb_p); 71 extern void pcmu_cb_enable_nintr(pcmu_t *pcmu_p, pcmu_cb_nintr_index_t idx); 72 extern void pcmu_cb_disable_nintr(pcmu_cb_t *cb_p, 73 pcmu_cb_nintr_index_t idx, int wait); 74 extern void pcmu_cb_clear_nintr(pcmu_cb_t *cb_p, pcmu_cb_nintr_index_t idx); 75 extern void pcmu_cb_intr_dist(void *arg); 76 77 #ifdef __cplusplus 78 } 79 #endif 80 81 #endif /* _SYS_PCMU_CB_H */ 82