1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. 24 */ 25 26 #include <fm/topo_mod.h> 27 28 #include "pcibus.h" 29 #include "pcibus_labels.h" 30 #include <string.h> 31 #include <strings.h> 32 33 /* 34 * Including the following file gives us definitions of the three 35 * global arrays used to adjust labels, Slot_Rewrites, Physlot_Names, 36 * and Missing_Names. With those defined we can use the common labeling 37 * routines for pci. 38 */ 39 #include "pci_i86pc.h" 40 41 int 42 platform_pci_label(topo_mod_t *mod, tnode_t *node, nvlist_t *in, 43 nvlist_t **out) 44 { 45 return (pci_label_cmn(mod, node, in, out)); 46 } 47 /*ARGSUSED*/ 48 int 49 platform_pci_fru(topo_mod_t *mod, tnode_t *node, nvlist_t *in, 50 nvlist_t **out) 51 { 52 return (pci_fru_cmn(mod, node, in, out)); 53 } 54 55 /* 56 * return true if pciexbus node whose parent is a pciexrc node 57 */ 58 /*ARGSUSED*/ 59 int 60 parent_is_rc(topo_mod_t *mod, did_t *dp) 61 { 62 return (strcmp(topo_node_name(did_gettnode(dp)), PCIEX_ROOT) == 0); 63 } 64 65 /* 66 * Look for down-stream switch "2" on riser card. First find this node's parent. 67 * If it is a pciexfn node and it has dev=2 and node 6 levels further up 68 * from it has a physlot then return true. 69 */ 70 int 71 ba_is_2(topo_mod_t *mod, did_t *dp) 72 { 73 tnode_t *ptp; 74 did_t *pdp; 75 int i, d; 76 77 ptp = did_gettnode(dp); 78 if (strcmp(topo_node_name(ptp), PCIEX_FUNCTION) != 0) 79 return (0); 80 pdp = did_find(mod, topo_node_getspecific(ptp)); 81 if (!pdp) 82 return (0); 83 did_BDF(pdp, NULL, &d, NULL); 84 if (d != 2) 85 return (0); 86 87 for (i = 0; i < 6; i++) 88 if ((ptp = topo_node_parent(ptp)) == NULL) 89 return (0); 90 pdp = did_find(mod, topo_node_getspecific(ptp)); 91 return (pdp && did_physlot_exists(pdp)); 92 } 93 94 /* 95 * Look for down-stream switch "4" on riser card. First find this node's parent. 96 * If it is a pciexfn node and it has dev=4 and node 6 levels further up 97 * from it has a physlot then return true. 98 */ 99 int 100 ba_is_4(topo_mod_t *mod, did_t *dp) 101 { 102 tnode_t *ptp; 103 did_t *pdp; 104 int i, d; 105 106 ptp = did_gettnode(dp); 107 if (strcmp(topo_node_name(ptp), PCIEX_FUNCTION) != 0) 108 return (0); 109 pdp = did_find(mod, topo_node_getspecific(ptp)); 110 if (!pdp) 111 return (0); 112 did_BDF(pdp, NULL, &d, NULL); 113 if (d != 4) 114 return (0); 115 116 for (i = 0; i < 6; i++) 117 if ((ptp = topo_node_parent(ptp)) == NULL) 118 return (0); 119 pdp = did_find(mod, topo_node_getspecific(ptp)); 120 return (pdp && did_physlot_exists(pdp)); 121 } 122