1 //===-- SPIRVAsmPrinter.cpp - SPIR-V LLVM assembly writer ------*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to the SPIR-V assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "MCTargetDesc/SPIRVInstPrinter.h"
15 #include "SPIRV.h"
16 #include "SPIRVInstrInfo.h"
17 #include "SPIRVMCInstLower.h"
18 #include "SPIRVModuleAnalysis.h"
19 #include "SPIRVSubtarget.h"
20 #include "SPIRVTargetMachine.h"
21 #include "SPIRVUtils.h"
22 #include "TargetInfo/SPIRVTargetInfo.h"
23 #include "llvm/ADT/DenseMap.h"
24 #include "llvm/Analysis/ValueTracking.h"
25 #include "llvm/CodeGen/AsmPrinter.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineInstr.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCAssembler.h"
32 #include "llvm/MC/MCInst.h"
33 #include "llvm/MC/MCObjectStreamer.h"
34 #include "llvm/MC/MCSPIRVObjectWriter.h"
35 #include "llvm/MC/MCStreamer.h"
36 #include "llvm/MC/MCSymbol.h"
37 #include "llvm/MC/TargetRegistry.h"
38 #include "llvm/Support/Compiler.h"
39 #include "llvm/Support/raw_ostream.h"
40
41 using namespace llvm;
42
43 #define DEBUG_TYPE "asm-printer"
44
45 namespace {
46 class SPIRVAsmPrinter : public AsmPrinter {
47 unsigned NLabels = 0;
48 SmallPtrSet<const MachineBasicBlock *, 8> LabeledMBB;
49
50 public:
SPIRVAsmPrinter(TargetMachine & TM,std::unique_ptr<MCStreamer> Streamer)51 explicit SPIRVAsmPrinter(TargetMachine &TM,
52 std::unique_ptr<MCStreamer> Streamer)
53 : AsmPrinter(TM, std::move(Streamer), ID), ST(nullptr), TII(nullptr) {}
54 static char ID;
55 bool ModuleSectionsEmitted;
56 const SPIRVSubtarget *ST;
57 const SPIRVInstrInfo *TII;
58
getPassName() const59 StringRef getPassName() const override { return "SPIRV Assembly Printer"; }
60 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
61 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
62 const char *ExtraCode, raw_ostream &O) override;
63
64 void outputMCInst(MCInst &Inst);
65 void outputInstruction(const MachineInstr *MI);
66 void outputModuleSection(SPIRV::ModuleSectionType MSType);
67 void outputGlobalRequirements();
68 void outputEntryPoints();
69 void outputDebugSourceAndStrings(const Module &M);
70 void outputOpExtInstImports(const Module &M);
71 void outputOpMemoryModel();
72 void outputOpFunctionEnd();
73 void outputExtFuncDecls();
74 void outputExecutionModeFromMDNode(MCRegister Reg, MDNode *Node,
75 SPIRV::ExecutionMode::ExecutionMode EM,
76 unsigned ExpectMDOps, int64_t DefVal);
77 void outputExecutionModeFromNumthreadsAttribute(
78 const MCRegister &Reg, const Attribute &Attr,
79 SPIRV::ExecutionMode::ExecutionMode EM);
80 void outputExecutionMode(const Module &M);
81 void outputAnnotations(const Module &M);
82 void outputModuleSections();
isHidden()83 bool isHidden() {
84 return MF->getFunction()
85 .getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME)
86 .isValid();
87 }
88
89 void emitInstruction(const MachineInstr *MI) override;
emitFunctionEntryLabel()90 void emitFunctionEntryLabel() override {}
91 void emitFunctionHeader() override;
emitFunctionBodyStart()92 void emitFunctionBodyStart() override {}
93 void emitFunctionBodyEnd() override;
94 void emitBasicBlockStart(const MachineBasicBlock &MBB) override;
emitBasicBlockEnd(const MachineBasicBlock & MBB)95 void emitBasicBlockEnd(const MachineBasicBlock &MBB) override {}
emitGlobalVariable(const GlobalVariable * GV)96 void emitGlobalVariable(const GlobalVariable *GV) override {}
97 void emitOpLabel(const MachineBasicBlock &MBB);
98 void emitEndOfAsmFile(Module &M) override;
99 bool doInitialization(Module &M) override;
100
101 void getAnalysisUsage(AnalysisUsage &AU) const override;
102 SPIRV::ModuleAnalysisInfo *MAI;
103
104 protected:
105 void cleanUp(Module &M);
106 };
107 } // namespace
108
getAnalysisUsage(AnalysisUsage & AU) const109 void SPIRVAsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
110 AU.addRequired<SPIRVModuleAnalysis>();
111 AU.addPreserved<SPIRVModuleAnalysis>();
112 AsmPrinter::getAnalysisUsage(AU);
113 }
114
115 // If the module has no functions, we need output global info anyway.
emitEndOfAsmFile(Module & M)116 void SPIRVAsmPrinter::emitEndOfAsmFile(Module &M) {
117 if (ModuleSectionsEmitted == false) {
118 outputModuleSections();
119 ModuleSectionsEmitted = true;
120 }
121
122 ST = static_cast<const SPIRVTargetMachine &>(TM).getSubtargetImpl();
123 VersionTuple SPIRVVersion = ST->getSPIRVVersion();
124 uint32_t Major = SPIRVVersion.getMajor();
125 uint32_t Minor = SPIRVVersion.getMinor().value_or(0);
126 // Bound is an approximation that accounts for the maximum used register
127 // number and number of generated OpLabels
128 unsigned Bound = 2 * (ST->getBound() + 1) + NLabels;
129 if (MCAssembler *Asm = OutStreamer->getAssemblerPtr())
130 static_cast<SPIRVObjectWriter &>(Asm->getWriter())
131 .setBuildVersion(Major, Minor, Bound);
132
133 cleanUp(M);
134 }
135
136 // Any cleanup actions with the Module after we don't care about its content
137 // anymore.
cleanUp(Module & M)138 void SPIRVAsmPrinter::cleanUp(Module &M) {
139 // Verifier disallows uses of intrinsic global variables.
140 for (StringRef GVName : {"llvm.global_ctors", "llvm.global_dtors",
141 "llvm.used", "llvm.compiler.used"}) {
142 if (GlobalVariable *GV = M.getNamedGlobal(GVName))
143 GV->setName("");
144 }
145 }
146
emitFunctionHeader()147 void SPIRVAsmPrinter::emitFunctionHeader() {
148 if (ModuleSectionsEmitted == false) {
149 outputModuleSections();
150 ModuleSectionsEmitted = true;
151 }
152 // Get the subtarget from the current MachineFunction.
153 ST = &MF->getSubtarget<SPIRVSubtarget>();
154 TII = ST->getInstrInfo();
155 const Function &F = MF->getFunction();
156
157 if (isVerbose() && !isHidden()) {
158 OutStreamer->getCommentOS()
159 << "-- Begin function "
160 << GlobalValue::dropLLVMManglingEscape(F.getName()) << '\n';
161 }
162
163 auto Section = getObjFileLowering().SectionForGlobal(&F, TM);
164 MF->setSection(Section);
165 }
166
outputOpFunctionEnd()167 void SPIRVAsmPrinter::outputOpFunctionEnd() {
168 MCInst FunctionEndInst;
169 FunctionEndInst.setOpcode(SPIRV::OpFunctionEnd);
170 outputMCInst(FunctionEndInst);
171 }
172
emitFunctionBodyEnd()173 void SPIRVAsmPrinter::emitFunctionBodyEnd() {
174 if (!isHidden())
175 outputOpFunctionEnd();
176 }
177
emitOpLabel(const MachineBasicBlock & MBB)178 void SPIRVAsmPrinter::emitOpLabel(const MachineBasicBlock &MBB) {
179 // Do not emit anything if it's an internal service function.
180 if (isHidden())
181 return;
182
183 MCInst LabelInst;
184 LabelInst.setOpcode(SPIRV::OpLabel);
185 LabelInst.addOperand(MCOperand::createReg(MAI->getOrCreateMBBRegister(MBB)));
186 outputMCInst(LabelInst);
187 ++NLabels;
188 LabeledMBB.insert(&MBB);
189 }
190
emitBasicBlockStart(const MachineBasicBlock & MBB)191 void SPIRVAsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) {
192 // Do not emit anything if it's an internal service function.
193 if (MBB.empty())
194 return;
195
196 // If it's the first MBB in MF, it has OpFunction and OpFunctionParameter, so
197 // OpLabel should be output after them.
198 if (MBB.getNumber() == MF->front().getNumber()) {
199 for (const MachineInstr &MI : MBB)
200 if (MI.getOpcode() == SPIRV::OpFunction)
201 return;
202 // TODO: this case should be checked by the verifier.
203 report_fatal_error("OpFunction is expected in the front MBB of MF");
204 }
205 emitOpLabel(MBB);
206 }
207
printOperand(const MachineInstr * MI,int OpNum,raw_ostream & O)208 void SPIRVAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
209 raw_ostream &O) {
210 const MachineOperand &MO = MI->getOperand(OpNum);
211
212 switch (MO.getType()) {
213 case MachineOperand::MO_Register:
214 O << SPIRVInstPrinter::getRegisterName(MO.getReg());
215 break;
216
217 case MachineOperand::MO_Immediate:
218 O << MO.getImm();
219 break;
220
221 case MachineOperand::MO_FPImmediate:
222 O << MO.getFPImm();
223 break;
224
225 case MachineOperand::MO_MachineBasicBlock:
226 O << *MO.getMBB()->getSymbol();
227 break;
228
229 case MachineOperand::MO_GlobalAddress:
230 O << *getSymbol(MO.getGlobal());
231 break;
232
233 case MachineOperand::MO_BlockAddress: {
234 MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
235 O << BA->getName();
236 break;
237 }
238
239 case MachineOperand::MO_ExternalSymbol:
240 O << *GetExternalSymbolSymbol(MO.getSymbolName());
241 break;
242
243 case MachineOperand::MO_JumpTableIndex:
244 case MachineOperand::MO_ConstantPoolIndex:
245 default:
246 llvm_unreachable("<unknown operand type>");
247 }
248 }
249
PrintAsmOperand(const MachineInstr * MI,unsigned OpNo,const char * ExtraCode,raw_ostream & O)250 bool SPIRVAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
251 const char *ExtraCode, raw_ostream &O) {
252 if (ExtraCode && ExtraCode[0])
253 return true; // Invalid instruction - SPIR-V does not have special modifiers
254
255 printOperand(MI, OpNo, O);
256 return false;
257 }
258
isFuncOrHeaderInstr(const MachineInstr * MI,const SPIRVInstrInfo * TII)259 static bool isFuncOrHeaderInstr(const MachineInstr *MI,
260 const SPIRVInstrInfo *TII) {
261 return TII->isHeaderInstr(*MI) || MI->getOpcode() == SPIRV::OpFunction ||
262 MI->getOpcode() == SPIRV::OpFunctionParameter;
263 }
264
outputMCInst(MCInst & Inst)265 void SPIRVAsmPrinter::outputMCInst(MCInst &Inst) {
266 OutStreamer->emitInstruction(Inst, *OutContext.getSubtargetInfo());
267 }
268
outputInstruction(const MachineInstr * MI)269 void SPIRVAsmPrinter::outputInstruction(const MachineInstr *MI) {
270 SPIRVMCInstLower MCInstLowering;
271 MCInst TmpInst;
272 MCInstLowering.lower(MI, TmpInst, MAI);
273 outputMCInst(TmpInst);
274 }
275
emitInstruction(const MachineInstr * MI)276 void SPIRVAsmPrinter::emitInstruction(const MachineInstr *MI) {
277 SPIRV_MC::verifyInstructionPredicates(MI->getOpcode(),
278 getSubtargetInfo().getFeatureBits());
279
280 if (!MAI->getSkipEmission(MI))
281 outputInstruction(MI);
282
283 // Output OpLabel after OpFunction and OpFunctionParameter in the first MBB.
284 const MachineInstr *NextMI = MI->getNextNode();
285 if (!LabeledMBB.contains(MI->getParent()) && isFuncOrHeaderInstr(MI, TII) &&
286 (!NextMI || !isFuncOrHeaderInstr(NextMI, TII))) {
287 assert(MI->getParent()->getNumber() == MF->front().getNumber() &&
288 "OpFunction is not in the front MBB of MF");
289 emitOpLabel(*MI->getParent());
290 }
291 }
292
outputModuleSection(SPIRV::ModuleSectionType MSType)293 void SPIRVAsmPrinter::outputModuleSection(SPIRV::ModuleSectionType MSType) {
294 for (const MachineInstr *MI : MAI->getMSInstrs(MSType))
295 outputInstruction(MI);
296 }
297
outputDebugSourceAndStrings(const Module & M)298 void SPIRVAsmPrinter::outputDebugSourceAndStrings(const Module &M) {
299 // Output OpSourceExtensions.
300 for (auto &Str : MAI->SrcExt) {
301 MCInst Inst;
302 Inst.setOpcode(SPIRV::OpSourceExtension);
303 addStringImm(Str.first(), Inst);
304 outputMCInst(Inst);
305 }
306 // Output OpString.
307 outputModuleSection(SPIRV::MB_DebugStrings);
308 // Output OpSource.
309 MCInst Inst;
310 Inst.setOpcode(SPIRV::OpSource);
311 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->SrcLang)));
312 Inst.addOperand(
313 MCOperand::createImm(static_cast<unsigned>(MAI->SrcLangVersion)));
314 outputMCInst(Inst);
315 }
316
outputOpExtInstImports(const Module & M)317 void SPIRVAsmPrinter::outputOpExtInstImports(const Module &M) {
318 for (auto &CU : MAI->ExtInstSetMap) {
319 unsigned Set = CU.first;
320 MCRegister Reg = CU.second;
321 MCInst Inst;
322 Inst.setOpcode(SPIRV::OpExtInstImport);
323 Inst.addOperand(MCOperand::createReg(Reg));
324 addStringImm(getExtInstSetName(
325 static_cast<SPIRV::InstructionSet::InstructionSet>(Set)),
326 Inst);
327 outputMCInst(Inst);
328 }
329 }
330
outputOpMemoryModel()331 void SPIRVAsmPrinter::outputOpMemoryModel() {
332 MCInst Inst;
333 Inst.setOpcode(SPIRV::OpMemoryModel);
334 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Addr)));
335 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Mem)));
336 outputMCInst(Inst);
337 }
338
339 // Before the OpEntryPoints' output, we need to add the entry point's
340 // interfaces. The interface is a list of IDs of global OpVariable instructions.
341 // These declare the set of global variables from a module that form
342 // the interface of this entry point.
outputEntryPoints()343 void SPIRVAsmPrinter::outputEntryPoints() {
344 // Find all OpVariable IDs with required StorageClass.
345 DenseSet<MCRegister> InterfaceIDs;
346 for (const MachineInstr *MI : MAI->GlobalVarList) {
347 assert(MI->getOpcode() == SPIRV::OpVariable);
348 auto SC = static_cast<SPIRV::StorageClass::StorageClass>(
349 MI->getOperand(2).getImm());
350 // Before version 1.4, the interface's storage classes are limited to
351 // the Input and Output storage classes. Starting with version 1.4,
352 // the interface's storage classes are all storage classes used in
353 // declaring all global variables referenced by the entry point call tree.
354 if (ST->isAtLeastSPIRVVer(VersionTuple(1, 4)) ||
355 SC == SPIRV::StorageClass::Input || SC == SPIRV::StorageClass::Output) {
356 const MachineFunction *MF = MI->getMF();
357 MCRegister Reg = MAI->getRegisterAlias(MF, MI->getOperand(0).getReg());
358 InterfaceIDs.insert(Reg);
359 }
360 }
361
362 // Output OpEntryPoints adding interface args to all of them.
363 for (const MachineInstr *MI : MAI->getMSInstrs(SPIRV::MB_EntryPoints)) {
364 SPIRVMCInstLower MCInstLowering;
365 MCInst TmpInst;
366 MCInstLowering.lower(MI, TmpInst, MAI);
367 for (MCRegister Reg : InterfaceIDs) {
368 assert(Reg.isValid());
369 TmpInst.addOperand(MCOperand::createReg(Reg));
370 }
371 outputMCInst(TmpInst);
372 }
373 }
374
375 // Create global OpCapability instructions for the required capabilities.
outputGlobalRequirements()376 void SPIRVAsmPrinter::outputGlobalRequirements() {
377 // Abort here if not all requirements can be satisfied.
378 MAI->Reqs.checkSatisfiable(*ST);
379
380 for (const auto &Cap : MAI->Reqs.getMinimalCapabilities()) {
381 MCInst Inst;
382 Inst.setOpcode(SPIRV::OpCapability);
383 Inst.addOperand(MCOperand::createImm(Cap));
384 outputMCInst(Inst);
385 }
386
387 // Generate the final OpExtensions with strings instead of enums.
388 for (const auto &Ext : MAI->Reqs.getExtensions()) {
389 MCInst Inst;
390 Inst.setOpcode(SPIRV::OpExtension);
391 addStringImm(getSymbolicOperandMnemonic(
392 SPIRV::OperandCategory::ExtensionOperand, Ext),
393 Inst);
394 outputMCInst(Inst);
395 }
396 // TODO add a pseudo instr for version number.
397 }
398
outputExtFuncDecls()399 void SPIRVAsmPrinter::outputExtFuncDecls() {
400 // Insert OpFunctionEnd after each declaration.
401 auto I = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).begin(),
402 E = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).end();
403 for (; I != E; ++I) {
404 outputInstruction(*I);
405 if ((I + 1) == E || (*(I + 1))->getOpcode() == SPIRV::OpFunction)
406 outputOpFunctionEnd();
407 }
408 }
409
410 // Encode LLVM type by SPIR-V execution mode VecTypeHint.
encodeVecTypeHint(Type * Ty)411 static unsigned encodeVecTypeHint(Type *Ty) {
412 if (Ty->isHalfTy())
413 return 4;
414 if (Ty->isFloatTy())
415 return 5;
416 if (Ty->isDoubleTy())
417 return 6;
418 if (IntegerType *IntTy = dyn_cast<IntegerType>(Ty)) {
419 switch (IntTy->getIntegerBitWidth()) {
420 case 8:
421 return 0;
422 case 16:
423 return 1;
424 case 32:
425 return 2;
426 case 64:
427 return 3;
428 default:
429 llvm_unreachable("invalid integer type");
430 }
431 }
432 if (FixedVectorType *VecTy = dyn_cast<FixedVectorType>(Ty)) {
433 Type *EleTy = VecTy->getElementType();
434 unsigned Size = VecTy->getNumElements();
435 return Size << 16 | encodeVecTypeHint(EleTy);
436 }
437 llvm_unreachable("invalid type");
438 }
439
addOpsFromMDNode(MDNode * MDN,MCInst & Inst,SPIRV::ModuleAnalysisInfo * MAI)440 static void addOpsFromMDNode(MDNode *MDN, MCInst &Inst,
441 SPIRV::ModuleAnalysisInfo *MAI) {
442 for (const MDOperand &MDOp : MDN->operands()) {
443 if (auto *CMeta = dyn_cast<ConstantAsMetadata>(MDOp)) {
444 Constant *C = CMeta->getValue();
445 if (ConstantInt *Const = dyn_cast<ConstantInt>(C)) {
446 Inst.addOperand(MCOperand::createImm(Const->getZExtValue()));
447 } else if (auto *CE = dyn_cast<Function>(C)) {
448 MCRegister FuncReg = MAI->getFuncReg(CE);
449 assert(FuncReg.isValid());
450 Inst.addOperand(MCOperand::createReg(FuncReg));
451 }
452 }
453 }
454 }
455
outputExecutionModeFromMDNode(MCRegister Reg,MDNode * Node,SPIRV::ExecutionMode::ExecutionMode EM,unsigned ExpectMDOps,int64_t DefVal)456 void SPIRVAsmPrinter::outputExecutionModeFromMDNode(
457 MCRegister Reg, MDNode *Node, SPIRV::ExecutionMode::ExecutionMode EM,
458 unsigned ExpectMDOps, int64_t DefVal) {
459 MCInst Inst;
460 Inst.setOpcode(SPIRV::OpExecutionMode);
461 Inst.addOperand(MCOperand::createReg(Reg));
462 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM)));
463 addOpsFromMDNode(Node, Inst, MAI);
464 // reqd_work_group_size and work_group_size_hint require 3 operands,
465 // if metadata contains less operands, just add a default value
466 unsigned NodeSz = Node->getNumOperands();
467 if (ExpectMDOps > 0 && NodeSz < ExpectMDOps)
468 for (unsigned i = NodeSz; i < ExpectMDOps; ++i)
469 Inst.addOperand(MCOperand::createImm(DefVal));
470 outputMCInst(Inst);
471 }
472
outputExecutionModeFromNumthreadsAttribute(const MCRegister & Reg,const Attribute & Attr,SPIRV::ExecutionMode::ExecutionMode EM)473 void SPIRVAsmPrinter::outputExecutionModeFromNumthreadsAttribute(
474 const MCRegister &Reg, const Attribute &Attr,
475 SPIRV::ExecutionMode::ExecutionMode EM) {
476 assert(Attr.isValid() && "Function called with an invalid attribute.");
477
478 MCInst Inst;
479 Inst.setOpcode(SPIRV::OpExecutionMode);
480 Inst.addOperand(MCOperand::createReg(Reg));
481 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM)));
482
483 SmallVector<StringRef> NumThreads;
484 Attr.getValueAsString().split(NumThreads, ',');
485 assert(NumThreads.size() == 3 && "invalid numthreads");
486 for (uint32_t i = 0; i < 3; ++i) {
487 uint32_t V;
488 [[maybe_unused]] bool Result = NumThreads[i].getAsInteger(10, V);
489 assert(!Result && "Failed to parse numthreads");
490 Inst.addOperand(MCOperand::createImm(V));
491 }
492
493 outputMCInst(Inst);
494 }
495
outputExecutionMode(const Module & M)496 void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
497 NamedMDNode *Node = M.getNamedMetadata("spirv.ExecutionMode");
498 if (Node) {
499 for (unsigned i = 0; i < Node->getNumOperands(); i++) {
500 MCInst Inst;
501 Inst.setOpcode(SPIRV::OpExecutionMode);
502 addOpsFromMDNode(cast<MDNode>(Node->getOperand(i)), Inst, MAI);
503 outputMCInst(Inst);
504 }
505 }
506 for (auto FI = M.begin(), E = M.end(); FI != E; ++FI) {
507 const Function &F = *FI;
508 // Only operands of OpEntryPoint instructions are allowed to be
509 // <Entry Point> operands of OpExecutionMode
510 if (F.isDeclaration() || !isEntryPoint(F))
511 continue;
512 MCRegister FReg = MAI->getFuncReg(&F);
513 assert(FReg.isValid());
514
515 if (Attribute Attr = F.getFnAttribute("hlsl.shader"); Attr.isValid()) {
516 // SPIR-V common validation: Fragment requires OriginUpperLeft or
517 // OriginLowerLeft.
518 // VUID-StandaloneSpirv-OriginLowerLeft-04653: Fragment must declare
519 // OriginUpperLeft.
520 if (Attr.getValueAsString() == "pixel") {
521 MCInst Inst;
522 Inst.setOpcode(SPIRV::OpExecutionMode);
523 Inst.addOperand(MCOperand::createReg(FReg));
524 unsigned EM =
525 static_cast<unsigned>(SPIRV::ExecutionMode::OriginUpperLeft);
526 Inst.addOperand(MCOperand::createImm(EM));
527 outputMCInst(Inst);
528 }
529 }
530 if (MDNode *Node = F.getMetadata("reqd_work_group_size"))
531 outputExecutionModeFromMDNode(FReg, Node, SPIRV::ExecutionMode::LocalSize,
532 3, 1);
533 if (Attribute Attr = F.getFnAttribute("hlsl.numthreads"); Attr.isValid())
534 outputExecutionModeFromNumthreadsAttribute(
535 FReg, Attr, SPIRV::ExecutionMode::LocalSize);
536 if (MDNode *Node = F.getMetadata("work_group_size_hint"))
537 outputExecutionModeFromMDNode(FReg, Node,
538 SPIRV::ExecutionMode::LocalSizeHint, 3, 1);
539 if (MDNode *Node = F.getMetadata("intel_reqd_sub_group_size"))
540 outputExecutionModeFromMDNode(FReg, Node,
541 SPIRV::ExecutionMode::SubgroupSize, 0, 0);
542 if (MDNode *Node = F.getMetadata("vec_type_hint")) {
543 MCInst Inst;
544 Inst.setOpcode(SPIRV::OpExecutionMode);
545 Inst.addOperand(MCOperand::createReg(FReg));
546 unsigned EM = static_cast<unsigned>(SPIRV::ExecutionMode::VecTypeHint);
547 Inst.addOperand(MCOperand::createImm(EM));
548 unsigned TypeCode = encodeVecTypeHint(getMDOperandAsType(Node, 0));
549 Inst.addOperand(MCOperand::createImm(TypeCode));
550 outputMCInst(Inst);
551 }
552 if (ST->isKernel() && !M.getNamedMetadata("spirv.ExecutionMode") &&
553 !M.getNamedMetadata("opencl.enable.FP_CONTRACT")) {
554 MCInst Inst;
555 Inst.setOpcode(SPIRV::OpExecutionMode);
556 Inst.addOperand(MCOperand::createReg(FReg));
557 unsigned EM = static_cast<unsigned>(SPIRV::ExecutionMode::ContractionOff);
558 Inst.addOperand(MCOperand::createImm(EM));
559 outputMCInst(Inst);
560 }
561 }
562 }
563
outputAnnotations(const Module & M)564 void SPIRVAsmPrinter::outputAnnotations(const Module &M) {
565 outputModuleSection(SPIRV::MB_Annotations);
566 // Process llvm.global.annotations special global variable.
567 for (auto F = M.global_begin(), E = M.global_end(); F != E; ++F) {
568 if ((*F).getName() != "llvm.global.annotations")
569 continue;
570 const GlobalVariable *V = &(*F);
571 const ConstantArray *CA = cast<ConstantArray>(V->getOperand(0));
572 for (Value *Op : CA->operands()) {
573 ConstantStruct *CS = cast<ConstantStruct>(Op);
574 // The first field of the struct contains a pointer to
575 // the annotated variable.
576 Value *AnnotatedVar = CS->getOperand(0)->stripPointerCasts();
577 if (!isa<Function>(AnnotatedVar))
578 report_fatal_error("Unsupported value in llvm.global.annotations");
579 Function *Func = cast<Function>(AnnotatedVar);
580 MCRegister Reg = MAI->getFuncReg(Func);
581 if (!Reg.isValid()) {
582 std::string DiagMsg;
583 raw_string_ostream OS(DiagMsg);
584 AnnotatedVar->print(OS);
585 DiagMsg = "Unknown function in llvm.global.annotations: " + DiagMsg;
586 report_fatal_error(DiagMsg.c_str());
587 }
588
589 // The second field contains a pointer to a global annotation string.
590 GlobalVariable *GV =
591 cast<GlobalVariable>(CS->getOperand(1)->stripPointerCasts());
592
593 StringRef AnnotationString;
594 getConstantStringInfo(GV, AnnotationString);
595 MCInst Inst;
596 Inst.setOpcode(SPIRV::OpDecorate);
597 Inst.addOperand(MCOperand::createReg(Reg));
598 unsigned Dec = static_cast<unsigned>(SPIRV::Decoration::UserSemantic);
599 Inst.addOperand(MCOperand::createImm(Dec));
600 addStringImm(AnnotationString, Inst);
601 outputMCInst(Inst);
602 }
603 }
604 }
605
outputModuleSections()606 void SPIRVAsmPrinter::outputModuleSections() {
607 const Module *M = MMI->getModule();
608 // Get the global subtarget to output module-level info.
609 ST = static_cast<const SPIRVTargetMachine &>(TM).getSubtargetImpl();
610 TII = ST->getInstrInfo();
611 MAI = &SPIRVModuleAnalysis::MAI;
612 assert(ST && TII && MAI && M && "Module analysis is required");
613 // Output instructions according to the Logical Layout of a Module:
614 // 1,2. All OpCapability instructions, then optional OpExtension instructions.
615 outputGlobalRequirements();
616 // 3. Optional OpExtInstImport instructions.
617 outputOpExtInstImports(*M);
618 // 4. The single required OpMemoryModel instruction.
619 outputOpMemoryModel();
620 // 5. All entry point declarations, using OpEntryPoint.
621 outputEntryPoints();
622 // 6. Execution-mode declarations, using OpExecutionMode or OpExecutionModeId.
623 outputExecutionMode(*M);
624 // 7a. Debug: all OpString, OpSourceExtension, OpSource, and
625 // OpSourceContinued, without forward references.
626 outputDebugSourceAndStrings(*M);
627 // 7b. Debug: all OpName and all OpMemberName.
628 outputModuleSection(SPIRV::MB_DebugNames);
629 // 7c. Debug: all OpModuleProcessed instructions.
630 outputModuleSection(SPIRV::MB_DebugModuleProcessed);
631 // xxx. SPV_INTEL_memory_access_aliasing instructions go before 8.
632 // "All annotation instructions"
633 outputModuleSection(SPIRV::MB_AliasingInsts);
634 // 8. All annotation instructions (all decorations).
635 outputAnnotations(*M);
636 // 9. All type declarations (OpTypeXXX instructions), all constant
637 // instructions, and all global variable declarations. This section is
638 // the first section to allow use of: OpLine and OpNoLine debug information;
639 // non-semantic instructions with OpExtInst.
640 outputModuleSection(SPIRV::MB_TypeConstVars);
641 // 10. All global NonSemantic.Shader.DebugInfo.100 instructions.
642 outputModuleSection(SPIRV::MB_NonSemanticGlobalDI);
643 // 11. All function declarations (functions without a body).
644 outputExtFuncDecls();
645 // 12. All function definitions (functions with a body).
646 // This is done in regular function output.
647 }
648
doInitialization(Module & M)649 bool SPIRVAsmPrinter::doInitialization(Module &M) {
650 ModuleSectionsEmitted = false;
651 // We need to call the parent's one explicitly.
652 return AsmPrinter::doInitialization(M);
653 }
654
655 char SPIRVAsmPrinter::ID = 0;
656
657 INITIALIZE_PASS(SPIRVAsmPrinter, "spirv-asm-printer", "SPIRV Assembly Printer",
658 false, false)
659
660 // Force static initialization.
661 extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void
LLVMInitializeSPIRVAsmPrinter()662 LLVMInitializeSPIRVAsmPrinter() {
663 RegisterAsmPrinter<SPIRVAsmPrinter> X(getTheSPIRV32Target());
664 RegisterAsmPrinter<SPIRVAsmPrinter> Y(getTheSPIRV64Target());
665 RegisterAsmPrinter<SPIRVAsmPrinter> Z(getTheSPIRVLogicalTarget());
666 }
667