1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2024 Oxide Computer Company 14 */ 15 16 #ifndef _SYS_NVME_OCP_H 17 #define _SYS_NVME_OCP_H 18 19 /* 20 * This header defines vendor-specific NVMe interfaces and is not a committed 21 * interface. Its contents and existence are subject to change. 22 * 23 * This covers the OCP Datacenter NVMe SSD Specification versions 2.0 and 2.5. 24 * Version 1.0 of this specification was previously called the OCP NVMe Cloud 25 * SSD Specification. 26 */ 27 28 #include <sys/isa_defs.h> 29 #include <sys/debug.h> 30 #include <sys/stdint.h> 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 typedef enum { 37 /* 38 * This is the OCP variant of SMART information. Present since v1.0. 39 * Scoped to the NVM subsystem. Tracked by the ocp_vul_smart_t. 40 */ 41 OCP_LOG_DSSD_SMART = 0xc0, 42 /* 43 * Error recovery information. Present since v1.0. Scoped to the NVM 44 * subsystem. 45 */ 46 OCP_LOG_DSSD_ERROR_REC = 0xc1, 47 /* 48 * This log page covers firmware activation history. It was added in 49 * v1.0 of the specification, but v2.5 removed this as obsolete. Scoped 50 * to the NVM subsystem. 51 */ 52 OCP_LOG_DSSD_FWACT = 0xc2, 53 /* 54 * This is the latency monitor log page that has information in tandem 55 * with the Latency monitor feature (0xc5). Added in v2.0. Scoped to the 56 * controller. 57 */ 58 OCP_LOG_DSSD_LATENCY = 0xc3, 59 /* 60 * This log page indicates various device capabilities. Added in v2.0. 61 * Scoped to the NVM subsystem. 62 */ 63 OCP_LOG_DSSD_DEV_CAP = 0xc4, 64 /* 65 * This log page indicates which requirements aren't actually 66 * implemented by a device. Added in v2.0. Scoped to the NVM subsystem. 67 */ 68 OCP_LOG_DSSD_UNSUP_REQ = 0xc5, 69 /* 70 * This log page covers various trusted computing group configuration. 71 * Added in v2.5. Scoped to the NVM subsystem. 72 */ 73 OCP_LOG_DSSD_TCG = 0xc7, 74 /* 75 * This is the telemetry string log. Added in v2.5. Scoped to the NVM 76 * subsystem. 77 */ 78 OCP_LOG_DSSD_TELEMTRY = 0xc9 79 } ocp_vul_t; 80 81 typedef enum { 82 /* 83 * Error injection feature. Added in v1.0. Scoped to the NVM subsystem. 84 */ 85 OCP_FEAT_DSSD_ERR_INJ = 0xc0, 86 /* 87 * Clear the firmware activation and update history log. Added in v1.0, 88 * but marked obsolete in v2.5. Scoped to the NVM subsystem. 89 */ 90 OCP_FEAT_DSSD_CLEAR_FWACT = 0xc1, 91 /* 92 * Controls the failure mode on device EOL or power loss protection 93 * (PLP) failure. Added in v1.0. Scoped to the NVM subsystem. 94 */ 95 OCP_FEAT_DSSD_EOLPLP = 0xc2, 96 /* 97 * Clears the PCIe correctable error counters. Added in v1.0. Scoped to 98 * the controller. 99 */ 100 OCP_FEAT_DSSD_CLEAR_PCIE_ERRCOR = 0xc3, 101 /* 102 * Manipulates the IEEE1667 silo which ties into the OPAL security 103 * feature set. Added in v1.0. Scoped to the NVM subsystem. 104 */ 105 OCP_FEAT_DSSD_IEEE1667 = 0xc4, 106 /* 107 * Controls the latency monitor feature. Added in v2.0. Scoped to the 108 * controller. 109 */ 110 OCP_FEAT_DSSD_LATENCY = 0xc5, 111 /* 112 * Controls the PLP health check interval. Added in v2.0. Scoped to the 113 * NVM subsystem. 114 */ 115 OCP_FEAT_DSSD_PLP_HEALTH = 0xc6, 116 /* 117 * Controls the power state that the device is in. Added in v2.0. Scoped 118 * to the NVM subsystem. 119 */ 120 OCP_FEAT_DSSD_POWER_STATE = 0xc7, 121 /* 122 * Controls the OCP DSSD telemetry profile that should be active. Added 123 * in v2.5. Scoped to the NVM subsystem. 124 */ 125 OCP_FEAT_DSSD_TEL_PROFILE = 0xc8, 126 /* 127 * Controls whether additional spec-specific events should be sent with 128 * the asynchronous event commands. 129 */ 130 OCP_FEAT_DSSD_ASYNC_EVENT = 0xc9 131 } ocp_vuf_t; 132 133 /* 134 * All data structures must be packed to account for the layout from the various 135 * specifications. All fields are required to be in little endian. 136 */ 137 #pragma pack(1) 138 139 /* 140 * OCP SMART / Health log page. A number in parentheses like (2.0) indicates the 141 * version something was added in if it was not v1.0. 142 */ 143 typedef struct { 144 /* 145 * Physical media units read and written. 146 */ 147 uint8_t osh_pmed_write[16]; 148 uint8_t osh_pmed_read[16]; 149 /* 150 * Bad user and system NAND blocks. Both a raw count and normalized 151 * value (percentage remaining). 152 */ 153 uint8_t osh_bunb_raw[6]; 154 uint16_t osh_bunb_norm; 155 uint8_t osh_bsnb_raw[6]; 156 uint16_t osh_bsnb_norm; 157 /* 158 * Various error and recovery metrics: 159 * - XOR 160 * - Uncorrectable reads 161 * - Soft ECC errors 162 * - End to end errors detected and corrected 163 */ 164 uint64_t osh_xor_rec; 165 uint64_t osh_read_unrec; 166 uint64_t osh_soft_ecc_err; 167 uint32_t osh_e2e_det; 168 uint32_t osh_e2e_corr; 169 /* 170 * Tracks the normalized percent used of the device by estimated erase 171 * cycles per block. 172 */ 173 uint8_t osh_sys_used; 174 /* 175 * This is the count of blocks that have been refreshed. 176 */ 177 uint8_t osh_refresh[7]; 178 /* 179 * Tracks the maximum and minimum erase count across NAND reserved for 180 * the user. 181 */ 182 uint32_t osh_udec_max; 183 uint32_t osh_udec_min; 184 /* 185 * The number of events and the current level of throttling. 186 */ 187 uint8_t osh_therm_event; 188 uint8_t osh_throt_level; 189 /* 190 * DSSD versioning for the device. (2.0). 191 */ 192 uint8_t osh_vers_errata; 193 uint16_t osh_vers_point; 194 uint16_t osh_vers_minor; 195 uint8_t osh_vers_major; 196 /* 197 * PCIe Correctable error count. 198 */ 199 uint64_t osh_pcie_errcor; 200 /* 201 * Incomplete shutdowns. 202 */ 203 uint32_t osh_inc_shut; 204 uint8_t osh_rsvd116[4]; 205 /* 206 * Normalized free percentage. 207 */ 208 uint8_t osh_free; 209 uint8_t osh_rsvd121[7]; 210 /* 211 * Capacitor health as a percentage. 212 */ 213 uint16_t osh_cap_health; 214 /* 215 * NVMe base spec errata version (2.0). 216 * NVMe cmd spec errata version (2.5). 217 */ 218 uint8_t osh_nvme_base_errata; 219 uint8_t osh_nvme_cmd_errata; 220 uint8_t osh_rsvd132[4]; 221 /* 222 * Quantity of unaligned I/O 223 */ 224 uint64_t osh_unaligned; 225 /* 226 * An incrementing integer representing a security version that 227 * shouldn't be rolled back across. 228 */ 229 uint64_t osh_sec_vers; 230 /* 231 * Namespace utilization. 232 */ 233 uint64_t osh_nuse; 234 /* 235 * Count of events where PLP kicked in. 236 */ 237 uint8_t osh_plp_start[16]; 238 /* 239 * Estimation of total data that can be written to the device in bytes. 240 */ 241 uint8_t osh_endurnace[16]; 242 /* 243 * Count of PCIe retraining events (2.0). 244 */ 245 uint64_t osh_pcie_retrain; 246 /* 247 * Count of power state changes, regardless of initiator. (2.0). 248 */ 249 uint64_t osh_ps_change; 250 /* 251 * Minimum permitted firmware version for rollback purposes. 252 */ 253 uint64_t osh_min_fwrev; 254 uint8_t osh_rsvd216[278]; 255 /* 256 * v1.0: 2, v2.0: 3, v2.5: 4 257 */ 258 uint16_t osh_vers; 259 /* 260 * Log page GUID: AFD514C97C6F4F9CA4f2BFEA2810AFC5h. 261 */ 262 uint8_t osh_guid[16]; 263 } ocp_vul_smart_t; 264 265 /* 266 * OCP Error Recovery log. 267 */ 268 typedef struct { 269 /* 270 * Time in ms to wait for a reset to complete. 271 */ 272 uint16_t oer_prwt; 273 /* 274 * List of reset actions we should consider taking. See ocp_errrec_pra_t 275 * for bit meanings. 276 */ 277 uint8_t oer_pra; 278 /* 279 * List of steps to take to handle the device's recovery from a given 280 * situation. See ocp_errrec_dra_t for bit meanings. 281 */ 282 uint8_t oer_dra; 283 uint64_t oer_panic_id; 284 /* 285 * See ocp_errrec_devcap_t for more information. 286 */ 287 uint32_t oer_devcap; 288 /* 289 * Information for how to send the vendor specific recovery command. The 290 * timout was added in 2.0. 291 */ 292 uint8_t oer_vsr_opcode; 293 uint8_t oer_rsvd17[3]; 294 uint32_t oer_vsr_cdw12; 295 uint32_t oer_vsr_cdw13; 296 uint8_t oer_vsr_to; 297 /* 298 * Secondary recovery actions post-reset (2.5). Uses the same bits as 299 * ocp_errrec_dra_t. 300 */ 301 uint8_t oer_dra2; 302 uint8_t oer_dra2_to; 303 uint8_t oer_npanic; 304 uint64_t oer_old_panics[4]; 305 uint8_t oer_rsvd54[430]; 306 /* 307 * V1.0: 1, V2.0: 2, V2.5: 3 308 */ 309 uint16_t oer_vers; 310 /* 311 * Log page GUID: 5A1983BA3DFD4DABAE3430FE2131D944h. 312 */ 313 uint8_t oer_guid[16]; 314 } ocp_vul_errrec_t; 315 316 /* 317 * List of panic reset actions that should be taken to recover. 318 */ 319 typedef enum { 320 /* NVMe Controller Reset */ 321 OCP_LOG_ERRREC_F_PRA_CTRL = 1 << 0, 322 /* NVM Subsystem Reset */ 323 OCP_LOG_ERRREC_F_PRA_SUBSYS = 1 << 1, 324 /* PCIe Function Level Reset */ 325 OCP_LOG_ERRREC_F_PRA_FLR = 1 << 2, 326 /* ASSERT #PERST (PCIe Fundamental Reset) */ 327 OCP_LOG_ERRREC_F_PRA_PERST = 1 << 3, 328 /* Power cycle the device */ 329 OCP_LOG_ERRREC_F_PRA_POWER = 1 << 4, 330 /* PCIe conventional hot reset */ 331 OCP_LOG_ERRREC_F_PRA_HOT = 1 << 5 332 } ocp_errrec_pra_t; 333 334 typedef enum { 335 /* Do nothing */ 336 OCP_LOG_ERRREC_F_DRA_NONE = 1 << 0, 337 /* Format required */ 338 OCP_LOG_ERRREC_F_DRA_FMT = 1 << 1, 339 /* Vendor specific commad */ 340 OCP_LOG_ERRREC_F_DRA_VSC = 1 << 2, 341 /* Vendor analysis required */ 342 OCP_LOG_ERRREC_F_DRA_VAR = 1 << 3, 343 /* Replace the device */ 344 OCP_LOG_ERRREC_F_DRA_REPLACE = 1 << 4, 345 /* Sanitize required */ 346 OCP_LOG_ERRREC_F_DRA_SANITIZE = 1 << 5, 347 /* 348 * Indicates that there is permanent data loss in some LBAs. The LBAs 349 * are identified by the LBA Status log 0xe. 350 */ 351 OCP_LOG_ERRREC_F_DRA_DATALOSS = 1 << 6, 352 } ocp_errrec_dra_t; 353 354 /* 355 * Device capabilities. Used to indicate how a message about a panic can be sent 356 * today. 357 */ 358 typedef enum { 359 OCP_LOG_ERRREC_F_DEVCAP_AEN = 1 << 0, 360 OCP_LOG_ERRREC_F_DEVCAP_CFS = 1 << 1 361 } ocp_errrec_devcap_t; 362 363 /* 364 * OCP Firmware Activation. Present in 1.0 and 2.0. Removed in 2.5. 365 */ 366 typedef struct { 367 uint8_t ofe_vers; 368 uint8_t ofe_len; 369 uint8_t ofe_rsvd2[2]; 370 uint16_t ofe_count; 371 uint64_t ofe_ts; 372 uint8_t ofe_rsvd14[8]; 373 uint64_t ofe_pcc; 374 uint64_t ofe_prev_fw; 375 uint64_t ofe_new_fw; 376 uint8_t ofe_slot; 377 uint8_t ofe_ctype; 378 uint16_t ofe_res; 379 uint8_t ofe_rsvd50[14]; 380 } ocp_fwact_entry_t; 381 382 typedef struct { 383 uint8_t ofw_lid; 384 uint8_t ofw_rsvd1[3]; 385 uint32_t ofw_nents; 386 ocp_fwact_entry_t ofw_hist[20]; 387 uint8_t ofw_rsvd1288[2790]; 388 /* 389 * V1.0: 1, V2.0: 1 390 */ 391 uint16_t ofw_vers; 392 /* 393 * Log Page GUID: 3AC8AB24DE2A3F6DAB4769A796Dh. 394 */ 395 uint8_t ofw_guid[16]; 396 } ocp_vul_fwact_t; 397 398 /* 399 * Latency Monitor log. Added in V2.0. 400 */ 401 typedef struct { 402 uint32_t obc_read; 403 uint32_t obc_write; 404 uint32_t obc_dealloc; 405 uint32_t obc_rsvd; 406 } ocp_lat_bkt_ctr_t; 407 408 typedef struct { 409 uint64_t ola_read; 410 uint64_t ola_write; 411 uint64_t ola_dealloc; 412 } ocp_lat_alts_t; 413 414 typedef struct { 415 uint16_t olm_read; 416 uint16_t olm_write; 417 uint16_t olm_dealloc; 418 } ocp_lat_aml_t; 419 420 typedef struct { 421 /* 422 * Latency monitor features. See ocp_lat_lmfs_t. 423 */ 424 uint8_t ol_lmfs; 425 uint8_t ol_rsvd1[1]; 426 /* 427 * Active bucket timer, its threshold, and general thresholds. 428 */ 429 uint16_t ol_abt; 430 uint16_t ol_abt_thresh; 431 uint8_t ol_thresh_a; 432 uint8_t ol_thresh_b; 433 uint8_t ol_thresh_c; 434 uint8_t ol_thresh_d; 435 /* 436 * Active latency configuration. See ocp_lat_alc_t. 437 */ 438 uint16_t ol_alc; 439 uint8_t ol_alw_min; 440 uint8_t ol_rsvd13[19]; 441 /* 442 * Active bucket counters. 443 */ 444 ocp_lat_bkt_ctr_t ol_ctr0; 445 ocp_lat_bkt_ctr_t ol_ctr1; 446 ocp_lat_bkt_ctr_t ol_ctr2; 447 ocp_lat_bkt_ctr_t ol_ctr3; 448 /* 449 * Active Latency Stamps. These contain 64-bit timestamps for when 450 * events occurred. Grouped by bucket. 451 */ 452 ocp_lat_alts_t ol_ts0; 453 ocp_lat_alts_t ol_ts1; 454 ocp_lat_alts_t ol_ts2; 455 ocp_lat_alts_t ol_ts3; 456 /* 457 * Active Measured Latency. Grouped by bucket. 458 */ 459 ocp_lat_aml_t ol_aml0; 460 ocp_lat_aml_t ol_aml1; 461 ocp_lat_aml_t ol_aml2; 462 ocp_lat_aml_t ol_aml3; 463 uint16_t ol_als_units; 464 uint8_t ol_rsvd218[22]; 465 /* 466 * Static versions of everything above. 467 */ 468 ocp_lat_bkt_ctr_t ol_sb0; 469 ocp_lat_bkt_ctr_t ol_sb1; 470 ocp_lat_bkt_ctr_t ol_sb2; 471 ocp_lat_bkt_ctr_t ol_sb3; 472 ocp_lat_alts_t ol_sts0; 473 ocp_lat_alts_t ol_sts1; 474 ocp_lat_alts_t ol_sts2; 475 ocp_lat_alts_t ol_sts3; 476 ocp_lat_aml_t ol_saml0; 477 ocp_lat_aml_t ol_saml1; 478 ocp_lat_aml_t ol_saml2; 479 ocp_lat_aml_t ol_saml3; 480 uint16_t ol_als_sunits; 481 uint8_t ol_rsvd426[10]; 482 /* 483 * Debug log related fields. The number of dword fields is specific to 484 * v2.5. 485 */ 486 uint8_t ol_dbg_ndw[12]; 487 uint16_t ol_dbg_trig; 488 uint16_t ol_dbg_ml; 489 uint64_t ol_dbg_ts; 490 uint16_t ol_dbg_ptr; 491 uint16_t ol_dbg_src; 492 uint8_t ol_dbg_units; 493 uint8_t ol_rsvd465[29]; 494 /* 495 * V2.0: 1, V2.5: 4 496 */ 497 uint16_t ol_vers; 498 /* 499 * Log page GUID: 85D45E58D4E643709C6C84D08CC07A92h. 500 */ 501 uint8_t ol_guid[16]; 502 } ocp_vul_lat_t; 503 504 typedef enum { 505 OPC_LOG_LAT_F_LFMS_EN = 1 << 0, 506 OPC_LOG_LAT_F_LFMS_ALC_SUP = 1 << 1, 507 OPC_LOG_LAT_F_LFMS_AML_SUP = 1 << 2, 508 } ocp_lat_lmfs_t; 509 510 typedef enum { 511 OCP_LOG_LAT_F_ALC_B0_READ = 1 << 0, 512 OCP_LOG_LAT_F_ALC_B0_WRITE = 1 << 1, 513 OCP_LOG_LAT_F_ALC_B0_DEALLOC = 1 << 2, 514 OCP_LOG_LAT_F_ALC_B1_READ = 1 << 3, 515 OCP_LOG_LAT_F_ALC_B1_WRITE = 1 << 4, 516 OCP_LOG_LAT_F_ALC_B1_DEALLOC = 1 << 5, 517 OCP_LOG_LAT_F_ALC_B2_READ = 1 << 6, 518 OCP_LOG_LAT_F_ALC_B2_WRITE = 1 << 7, 519 OCP_LOG_LAT_F_ALC_B2_DEALLOC = 1 << 8, 520 OCP_LOG_LAT_F_ALC_B3_READ = 1 << 9, 521 OCP_LOG_LAT_F_ALC_B3_WRITE = 1 << 10, 522 OCP_LOG_LAT_F_ALC_B3_DEALLOC = 1 << 11 523 } ocp_lat_alc_t; 524 525 /* 526 * Device Capabilities Log. Introduced in v2.0. 527 */ 528 typedef struct { 529 #ifdef _BIT_FIELDS_LTOH 530 uint8_t odp_nps:5; 531 uint8_t odp_rsvd5:2; 532 uint8_t odp_valid:1; 533 #else 534 uint8_t odp_valid:1; 535 uint8_t odp_rsvd5:2; 536 uint8_t odp_nps:5; 537 #endif /* _BIT_FIELDS_LTOH */ 538 } ocp_dssd_ps_t; 539 540 typedef struct { 541 uint16_t odc_nports; 542 uint16_t odc_oob_sup; 543 uint16_t odc_wz_sup; 544 uint16_t odc_san_sup; 545 uint16_t odc_dsmgmt_sup; 546 uint16_t odc_wunc_sup; 547 uint16_t odc_fuse_sup; 548 uint16_t odc_dssd_min_valid; 549 ocp_dssd_ps_t odc_dssd[128]; 550 uint8_t odc_rsvd144[3934]; 551 /* 552 * V2.0: 1, V2.5: 1 553 */ 554 uint16_t odc_vers; 555 /* 556 * Log page GUID: B7053C914B58495D98C9E1D10D054297h 557 */ 558 uint8_t odc_guid[16]; 559 } ocp_vul_devcap_t; 560 561 typedef enum { 562 /* PCIe VDM Supported */ 563 OCP_LOG_DEVCAP_F_OOB_VDM = 1 << 0, 564 /* NVMe Basic Management Command supported */ 565 OCP_LOG_DEVCAP_F_OOB_BMC = 1 << 1, 566 /* Passed compliance testing */ 567 OCP_LOG_DEVCAP_F_OOB_COMPLY = 1 << 15, 568 } ocp_devcap_oob_t; 569 570 typedef enum { 571 /* Write Zeros command supported */ 572 OCP_LOG_DEVCAP_F_WZ_SUP = 1 << 0, 573 /* Write Zeros deallocate bit */ 574 OCP_LOG_DEVCAP_F_WZ_DEAC = 1 << 1, 575 /* Write Zeros force unit access */ 576 OCP_LOG_DEVCAP_F_WZ_FUA = 1 << 2, 577 /* Adheres to spec req NVME-IO-5 */ 578 OCP_LOG_DEVCAP_F_WZ_IO5 = 1 << 3, 579 /* Adheres to spec req NVME-IO-6 */ 580 OCP_LOG_DEVCAP_F_WZ_IO6 = 1 << 4, 581 /* Passed compliance testing */ 582 OCP_LOG_DEVCAP_F_WZ_COMPLY = 1 << 15 583 } ocp_devcap_wz_t; 584 585 typedef enum { 586 /* Dataset Management command supported */ 587 OCP_LOG_DEVCAP_F_DSMGMT_SUP = 1 << 0, 588 /* Attribute deallocate supported */ 589 OCP_LOG_DEVCAP_F_DSMGMT_AD = 1 << 1, 590 /* Passed compliance testing */ 591 OCP_LOG_DEVCAP_F_DSMGMT_COMPLY = 1 << 15 592 } ocp_devcap_dsmgmt_t; 593 594 typedef enum { 595 /* Write uncorrectable supported */ 596 OCP_LOG_DEVCAP_F_WUNC_SUP = 1 << 0, 597 /* Works with a single LBA */ 598 OCP_LOG_DEVCAP_F_WUNC_ONE = 1 << 1, 599 /* Works with max LBAs per NVMe spec */ 600 OCP_LOG_DEVCAP_F_WUNC_MAX = 1 << 2, 601 /* Adheres to spec req NVME-IO-14 */ 602 OCP_LOG_DEVCAP_F_WUNC_IO14 = 1 << 3, 603 /* Passed compliance testing */ 604 OCP_LOG_DEVCAP_F_WUNC_COMPLY = 1 << 15 605 } ocp_devcap_wunc_t; 606 607 typedef enum { 608 /* Fused operation supported */ 609 OCP_LOG_DEVCAP_F_FUSE_SUP = 1 << 0, 610 /* Passed compliance testing */ 611 OCP_LOG_DEVCAP_F_FUSE_COMPLY = 1 << 15 612 } ocp_devcap_fuse_t; 613 614 /* 615 * Unsupported Requirements log. This log is structured such that each 616 * unimplemented requirement must fit into a single 16 byte array which should 617 * be padded with zeros (but nothing in the spec suggests it guarantees 618 * termination). We keep the requirements string as a uint8_t as opposed to a 619 * char to indicate that this should not be trusted and must be parsed. 620 */ 621 typedef struct { 622 uint8_t ors_str[16]; 623 } ocp_req_str_t; 624 625 typedef struct { 626 uint16_t our_nunsup; 627 uint8_t our_rsvd2[14]; 628 ocp_req_str_t ors_reqs[253]; 629 uint8_t our_rsvd4064[14]; 630 /* 631 * V2.0: 1, V2.5: 1 632 */ 633 uint16_t our_vers; 634 /* 635 * Log page GUID: C7BB98B7D0324863BB2C23990E9C722Fh 636 */ 637 uint8_t our_guid[16]; 638 } ocp_vul_unsup_req_t; 639 640 /* 641 * Our current version of smatch cannot handle packed structures. 642 */ 643 #ifndef __CHECKER__ 644 CTASSERT(sizeof (ocp_vul_smart_t) == 512); 645 CTASSERT(offsetof(ocp_vul_smart_t, osh_therm_event) == 96); 646 CTASSERT(offsetof(ocp_vul_smart_t, osh_vers) == 494); 647 CTASSERT(sizeof (ocp_vul_errrec_t) == 512); 648 CTASSERT(offsetof(ocp_vul_errrec_t, oer_npanic) == 31); 649 CTASSERT(offsetof(ocp_vul_errrec_t, oer_npanic) == 31); 650 CTASSERT(sizeof (ocp_fwact_entry_t) == 64); 651 CTASSERT(offsetof(ocp_fwact_entry_t, ofe_rsvd50) == 50); 652 CTASSERT(sizeof (ocp_vul_fwact_t) == 4096); 653 CTASSERT(offsetof(ocp_vul_fwact_t, ofw_rsvd1288) == 1288); 654 CTASSERT(offsetof(ocp_vul_fwact_t, ofw_vers) == 4078); 655 CTASSERT(sizeof (ocp_lat_bkt_ctr_t) == 16); 656 CTASSERT(sizeof (ocp_lat_alts_t) == 24); 657 CTASSERT(sizeof (ocp_lat_aml_t) == 6); 658 CTASSERT(offsetof(ocp_vul_lat_t, ol_aml0) == 192); 659 CTASSERT(offsetof(ocp_vul_lat_t, ol_rsvd218) == 218); 660 CTASSERT(offsetof(ocp_vul_lat_t, ol_als_sunits) == 424); 661 CTASSERT(sizeof (ocp_vul_lat_t) == 512); 662 CTASSERT(sizeof (ocp_vul_devcap_t) == 4096); 663 CTASSERT(offsetof(ocp_vul_devcap_t, odc_rsvd144) == 144); 664 CTASSERT(sizeof (ocp_req_str_t) == 16); 665 CTASSERT(sizeof (ocp_vul_unsup_req_t) == 4096); 666 #endif 667 668 #pragma pack() /* pack(1) */ 669 670 #ifdef __cplusplus 671 } 672 #endif 673 674 #endif /* _SYS_NVME_OCP_H */ 675