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/linux/arch/mips/include/asm/mach-bcm63xx/
H A Dbcm63xx_io.h66 #define bcm_rset_readb(s, o) bcm_readb(bcm63xx_regset_address(s) + (o)) argument
67 #define bcm_rset_readw(s, o) bcm_readw(bcm63xx_regset_address(s) + (o)) argument
68 #define bcm_rset_readl(s, o) bcm_readl(bcm63xx_regset_address(s) + (o)) argument
69 #define bcm_rset_writeb(s, v, o) bcm_writeb((v), \ argument
71 #define bcm_rset_writew(s, v, o) bcm_writew((v), \ argument
73 #define bcm_rset_writel(s, v, o) bcm_writel((v), \ argument
79 #define bcm_perf_readl(o) bcm_rset_readl(RSET_PERF, (o)) argument
80 #define bcm_perf_writel(v, o) bcm_rset_writel(RSET_PERF, (v), (o)) argument
81 #define bcm_timer_readl(o) bcm_rset_readl(RSET_TIMER, (o)) argument
82 #define bcm_timer_writel(v, o) bcm_rset_writel(RSET_TIMER, (v), (o)) argument
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_sp.c51 struct bnx2x_exe_queue_obj *o, in bnx2x_exe_queue_init()
88 static inline int bnx2x_exe_queue_length(struct bnx2x_exe_queue_obj *o) in bnx2x_exe_queue_length()
114 struct bnx2x_exe_queue_obj *o, in bnx2x_exe_queue_add()
153 struct bnx2x_exe_queue_obj *o) in __bnx2x_exe_queue_reset_pending()
176 struct bnx2x_exe_queue_obj *o, in bnx2x_exe_queue_step()
240 static inline bool bnx2x_exe_queue_empty(struct bnx2x_exe_queue_obj *o) in bnx2x_exe_queue_empty()
258 static bool bnx2x_raw_check_pending(struct bnx2x_raw_obj *o) in bnx2x_raw_check_pending()
263 static void bnx2x_raw_clear_pending(struct bnx2x_raw_obj *o) in bnx2x_raw_clear_pending()
270 static void bnx2x_raw_set_pending(struct bnx2x_raw_obj *o) in bnx2x_raw_set_pending()
327 static bool bnx2x_get_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int *offset) in bnx2x_get_cam_offset_mac()
[all …]
/linux/drivers/gpu/drm/nouveau/include/nvhw/
H A Ddrf.h36 #define DRF_MW_SPANS(o,drf) (DRF_LW_IDX((o),drf) != DRF_HW_IDX((o),drf)) argument
37 #define DRF_MW_SIZE(o) (sizeof((o)[0]) * 8) argument
39 #define DRF_LW_IDX(o,drf) (DRF_LO(DRF_MW(drf)) / DRF_MW_SIZE(o)) argument
40 #define DRF_LW_LO(o,drf) (DRF_LO(DRF_MW(drf)) % DRF_MW_SIZE(o)) argument
41 #define DRF_LW_HI(o,drf) (DRF_MW_SPANS((o),drf) ? (DRF_MW_SIZE(o) - 1) : DRF_HW_HI((o),drf)) argument
42 #define DRF_LW_BITS(o,drf) (DRF_LW_HI((o),drf) - DRF_LW_LO((o),drf) + 1) argument
43 #define DRF_LW_MASK(o,drf) (~0ULL >> (64 - DRF_LW_BITS((o),drf))) argument
44 #define DRF_LW_SMASK(o,drf) (DRF_LW_MASK((o),drf) << DRF_LW_LO((o),drf)) argument
45 #define DRF_LW_GET(o,drf) (((o)[DRF_LW_IDX((o),drf)] >> DRF_LW_LO((o),drf)) & DRF_LW_MASK((o),drf… argument
46 #define DRF_LW_VAL(o,drf,v) (((v) & DRF_LW_MASK((o),drf)) << DRF_LW_LO((o),drf)) argument
[all …]
/linux/drivers/gpu/host1x/
H A Ddebug.c28 void host1x_debug_output(struct output *o, const char *fmt, ...) in host1x_debug_output()
40 void host1x_debug_cont(struct output *o, const char *fmt, ...) in host1x_debug_cont()
55 struct output *o = data; in show_channel() local
78 static void show_syncpts(struct host1x *m, struct output *o, bool show_all) in show_syncpts()
126 static void show_all(struct host1x *m, struct output *o, bool show_fifo) in show_all()
146 struct output o = { in host1x_debug_all_show() local
159 struct output o = { in host1x_debug_show() local
213 struct output o = { in host1x_debug_dump() local
222 struct output o = { in host1x_debug_dump_syncpts() local
/linux/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dmemory.h66 #define nvkm_memory_map(p,o,vm,va,av,ac) \ argument
73 #define nvkm_kmap(o) (o)->func->acquire(o) argument
74 #define nvkm_done(o) (o)->func->release(o) argument
76 #define nvkm_ro32(o,a) (o)->ptrs->rd32((o), (a)) argument
77 #define nvkm_wo32(o,a,d) (o)->ptrs->wr32((o), (a), (d)) argument
78 #define nvkm_mo32(o,a,m,d) ({ \ argument
84 #define nvkm_wo64(o,a,d) do { \ argument
90 #define nvkm_robj(o,a,p,s) do { \ argument
98 #define nvkm_wobj(o,a,p,s) do { \ argument
106 #define nvkm_fill(t,s,o,a,d,c) do { \ argument
[all …]
H A Dclient.h28 const struct nvkm_object *_object = (o); \ argument
35 #define nvif_error(o,f,a...) nvif_printk((o), ERROR, ERR, f, ##a) argument
36 #define nvif_debug(o,f,a...) nvif_printk((o), DEBUG, INFO, f, ##a) argument
37 #define nvif_trace(o,f,a...) nvif_printk((o), TRAC argument
38 nvif_trace(o,f,a...) global() argument
39 nvif_info(o,f,a...) global() argument
40 nvif_ioctl(o,f,a...) global() argument
[all...]
/linux/arch/riscv/include/asm/
H A Dcmpxchg.h110 #define __arch_cmpxchg_masked(sc_sfx, prepend, append, r, p, o, n) \ argument
140 #define __arch_cmpxchg(lr_sfx, sc_sfx, prepend, append, r, p, co, o, n) \ argument
184 #define arch_cmpxchg_relaxed(ptr, o, n) \ argument
187 #define arch_cmpxchg_acquire(ptr, o, n) \ argument
190 #define arch_cmpxchg_release(ptr, o, n) \ argument
193 #define arch_cmpxchg(ptr, o, n) \ argument
196 #define arch_cmpxchg_local(ptr, o, n) \ argument
199 #define arch_cmpxchg64(ptr, o, n) \ argument
205 #define arch_cmpxchg64_local(ptr, o, n) \ argument
211 #define arch_cmpxchg64_relaxed(ptr, o, n) \ argument
[all …]
/linux/drivers/clk/bcm/
H A Dclk-cygnus.c16 #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } argument
18 #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \ argument
21 #define SW_CTRL_VAL(o, s) { .offset = o, .shift = s, } argument
23 #define ASIU_DIV_VAL(o, es, hs, hw, ls, lw) \ argument
27 #define RESET_VAL(o, rs, prs) { .offset = o, .reset_shift = rs, \ argument
30 #define DF_VAL(o, kis, kiw, kps, kpw, kas, kaw) { .offset = o, .ki_shift = kis,\ argument
36 #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \ argument
39 #define ASIU_GATE_VAL(o, es) { .offset = o, .en_shift = es } argument
H A Dclk-nsp.c14 #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } argument
16 #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \ argument
19 #define RESET_VAL(o, rs, prs) { .offset = o, .reset_shift = rs, \ argument
22 #define DF_VAL(o, kis, kiw, kps, kpw, kas, kaw) { .offset = o, .ki_shift = kis,\ argument
26 #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \ argument
H A Dclk-ns2.c14 #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } argument
16 #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \ argument
19 #define RESET_VAL(o, rs, prs) { .offset = o, .reset_shift = rs, \ argument
22 #define DF_VAL(o, kis, kiw, kps, kpw, kas, kaw) { .offset = o, .ki_shift = kis,\ argument
28 #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \ argument
H A Dclk-sr.c14 #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } argument
16 #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \ argument
19 #define SW_CTRL_VAL(o, s) { .offset = o, .shift = s, } argument
21 #define RESET_VAL(o, rs, prs) { .offset = o, .reset_shift = rs, \ argument
24 #define DF_VAL(o, kis, kiw, kps, kpw, kas, kaw) { .offset = o, \ argument
30 #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \ argument
/linux/include/media/
H A Dv4l2-device.h293 #define __v4l2_device_call_subdevs_p(v4l2_dev, sd, cond, o, f, args...) \ argument
318 #define __v4l2_device_call_subdevs(v4l2_dev, cond, o, f, args...) \ argument
350 #define __v4l2_device_call_subdevs_until_err_p(v4l2_dev, sd, cond, o, f, args...) \ argument
385 #define __v4l2_device_call_subdevs_until_err(v4l2_dev, cond, o, f, args...) \ argument
412 #define v4l2_device_call_all(v4l2_dev, grpid, o, f, args...) \ argument
445 #define v4l2_device_call_until_err(v4l2_dev, grpid, o, f, args...) \ argument
472 #define v4l2_device_mask_call_all(v4l2_dev, grpmsk, o, f, args...) \ argument
504 #define v4l2_device_mask_call_until_err(v4l2_dev, grpmsk, o, f, args...) \ argument
526 #define v4l2_device_has_op(v4l2_dev, grpid, o, f) \ argument
554 #define v4l2_device_mask_has_op(v4l2_dev, grpmsk, o, f) \ argument
/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Dprintf.h7 #define NVIF_PRINT(l,o,f,a...) do { \ argument
14 #define NVIF_DEBUG(o,f,a...) NVIF_PRINT(debugf, (o), f, ##a) argument
16 #define NVIF_DEBUG(o,f,a...) argument
19 #define NVIF_ERROR(o,f,a...) NVIF_PRINT(errorf, (o), f, ##a) argument
20 #define NVIF_ERRON(c,o,f,a...) do { \ argument
H A Dpush.h103 #define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \ argument
116 #define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \ argument
126 #define PUSH_1(X,f,ds,n,o,p,s,mA,dA) do { \ argument
130 #define PUSH_2(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
135 #define PUSH_3(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
140 #define PUSH_4(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
145 #define PUSH_5(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
150 #define PUSH_6(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
155 #define PUSH_7(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
160 #define PUSH_8(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
[all …]
/linux/arch/arm/include/asm/
H A Dcmpxchg.h139 #define arch_cmpxchg_local(ptr, o, n) ({ \ argument
146 #define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n)) argument
216 #define arch_cmpxchg_relaxed(ptr,o,n) ({ \ argument
243 #define arch_cmpxchg_local(ptr, o, n) ({ \ argument
275 #define arch_cmpxchg64_relaxed(ptr, o, n) ({ \ argument
281 #define arch_cmpxchg64_local(ptr, o, n) arch_cmpxchg64_relaxed((ptr), (o), (n)) argument
/linux/arch/parisc/include/asm/
H A Dcmpxchg.h79 #define arch_cmpxchg(ptr, o, n) \ argument
107 #define arch_cmpxchg_local(ptr, o, n) \ argument
111 #define arch_cmpxchg64_local(ptr, o, n) \ argument
117 #define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n)) argument
120 #define arch_cmpxchg64(ptr, o, n) __cmpxchg_u64(ptr, o, n) argument
/linux/arch/mips/include/asm/
H A Dcmpxchg.h210 #define arch_cmpxchg64_local(ptr, o, n) \ argument
216 #define arch_cmpxchg64(ptr, o, n) \ argument
224 # define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n)) argument
299 # define arch_cmpxchg64(ptr, o, n) ({ \ argument
322 # define arch_cmpxchg64(ptr, o, n) arch_cmpxchg64_local((ptr), (o), (n)) argument
/linux/drivers/memory/
H A Drenesas-rpc-if.c59 #define RPCIF_DRENR_CDB(o) (u32)((((o) & 0x3) << 30)) argument
60 #define RPCIF_DRENR_OCDB(o) (((o) & 0x3) << 28) argument
61 #define RPCIF_DRENR_ADB(o) (((o) & 0x3) << 24) argument
62 #define RPCIF_DRENR_OPDB(o) (((o) & 0x3) << 20) argument
63 #define RPCIF_DRENR_DRDB(o) (((o) argument
83 RPCIF_SMOPR_OPD3(o) global() argument
84 RPCIF_SMOPR_OPD2(o) global() argument
85 RPCIF_SMOPR_OPD1(o) global() argument
86 RPCIF_SMOPR_OPD0(o) global() argument
89 RPCIF_SMENR_CDB(o) global() argument
90 RPCIF_SMENR_OCDB(o) global() argument
91 RPCIF_SMENR_ADB(o) global() argument
92 RPCIF_SMENR_OPDB(o) global() argument
93 RPCIF_SMENR_SPIDB(o) global() argument
[all...]
/linux/arch/csky/include/asm/
H A Dcmpxchg.h87 #define arch_cmpxchg_relaxed(ptr, o, n) \ argument
121 #define arch_cmpxchg_acquire(ptr, o, n) \ argument
156 #define arch_cmpxchg(ptr, o, n) \ argument
159 #define arch_cmpxchg_local(ptr, o, n) \ argument
/linux/arch/x86/tools/
H A Drelocs_32.c14 #define ELF_ST_TYPE(o) ELF32_ST_TYPE(o) argument
15 #define ELF_ST_BIND(o) ELF32_ST_BIND(o) argument
16 #define ELF_ST_VISIBILITY(o) ELF32_ST_VISIBILITY(o) argument
H A Drelocs_64.c14 #define ELF_ST_TYPE(o) ELF64_ST_TYPE(o) argument
15 #define ELF_ST_BIND(o) ELF64_ST_BIND(o) argument
16 #define ELF_ST_VISIBILITY(o) ELF64_ST_VISIBILITY(o) argument
/linux/arch/mips/boot/tools/
H A Drelocs_32.c14 #define ELF_ST_TYPE(o) ELF32_ST_TYPE(o) argument
15 #define ELF_ST_BIND(o) ELF32_ST_BIND(o) argument
16 #define ELF_ST_VISIBILITY(o) ELF32_ST_VISIBILITY(o) argument
/linux/arch/powerpc/include/asm/
H A Dcmpxchg.h699 #define arch_cmpxchg(ptr, o, n) \ argument
708 #define arch_cmpxchg_local(ptr, o, n) \ argument
716 #define arch_cmpxchg_relaxed(ptr, o, n) \ argument
725 #define arch_cmpxchg_acquire(ptr, o, n) \ argument
734 #define arch_cmpxchg64(ptr, o, n) \ argument
739 #define arch_cmpxchg64_local(ptr, o, n) \ argument
744 #define arch_cmpxchg64_relaxed(ptr, o, n) \ argument
749 #define arch_cmpxchg64_acquire(ptr, o, n) \ argument
756 #define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n)) argument
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dvmm.h347 #define VMM_FO(m,o,d,c,b) nvkm_fo##b((m)->memory, (o), (d), (c)) argument
348 #define VMM_WO(m,o,d,c,b) nvkm_wo##b((m)->memory, (o), (d)) argument
349 #define VMM_XO(m,v,o,d,c,b,fn,f,a...) do { \ argument
355 #define VMM_WO032(m,v,o,d) VMM_XO((m),(v),(o),(d), 1, 32, WO, "%08x") argument
356 #define VMM_FO032(m,v,o,d,c) \ argument
359 #define VMM_WO064(m,v,o,d) VMM_XO((m),(v),(o),(d), 1, 64, WO, "%016llx") argument
360 #define VMM_FO064(m,v,o,d,c) \ argument
363 #define VMM_XO128(m,v,o,lo,hi,c,f,a...) do { \ argument
374 #define VMM_WO128(m,v,o,lo,hi) VMM_XO128((m),(v),(o),(lo),(hi), 1, "") argument
375 #define VMM_FO128(m,v,o,lo,hi,c) do { \ argument
/linux/arch/xtensa/include/asm/
H A Dcmpxchg.h85 #define arch_cmpxchg(ptr,o,n) \ argument
112 #define arch_cmpxchg_local(ptr, o, n) \ argument
115 #define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n)) argument
116 #define arch_cmpxchg64(ptr, o, n) arch_cmpxchg64_local((ptr), (o), (n)) argument

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