1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_WMI_H
8 #define ATH11K_WMI_H
9
10 #if defined(__FreeBSD__)
11 #include <linux/wait.h>
12 #endif
13 #include <net/mac80211.h>
14 #include "htc.h"
15
16 struct ath11k_base;
17 struct ath11k;
18 struct ath11k_fw_stats;
19 struct ath11k_fw_dbglog;
20 struct ath11k_vif;
21 struct ath11k_reg_tpc_power_info;
22
23 #define PSOC_HOST_MAX_NUM_SS (8)
24
25 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */
26 #define MAX_HE_NSS 8
27 #define MAX_HE_MODULATION 8
28 #define MAX_HE_RU 4
29 #define HE_MODULATION_NONE 7
30 #define HE_PET_0_USEC 0
31 #define HE_PET_8_USEC 1
32 #define HE_PET_16_USEC 2
33
34 #define WMI_MAX_CHAINS 8
35
36 #define WMI_MAX_NUM_SS MAX_HE_NSS
37 #define WMI_MAX_NUM_RU MAX_HE_RU
38
39 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
40 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
41 #define WMI_TLV_CMD_UNSUPPORTED 0
42 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
43 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
44
45 struct wmi_cmd_hdr {
46 u32 cmd_id;
47 } __packed;
48
49 struct wmi_tlv {
50 u32 header;
51 u8 value[];
52 } __packed;
53
54 #define WMI_TLV_LEN GENMASK(15, 0)
55 #define WMI_TLV_TAG GENMASK(31, 16)
56 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header)
57
58 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0)
59 #define WMI_MAX_MEM_REQS 32
60 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5
61
62 #define WLAN_SCAN_MAX_HINT_S_SSID 10
63 #define WLAN_SCAN_MAX_HINT_BSSID 10
64 #define MAX_RNR_BSS 5
65
66 #define WLAN_SCAN_PARAMS_MAX_SSID 16
67 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
68 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 512
69
70 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
71
72 #define MAX_WMI_UTF_LEN 252
73 #define WMI_BA_MODE_BUFFER_SIZE_256 3
74 /*
75 * HW mode config type replicated from FW header
76 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
77 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
78 * one in 2G and another in 5G.
79 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
80 * same band; no tx allowed.
81 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
82 * Support for both PHYs within one band is planned
83 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
84 * but could be extended to other bands in the future.
85 * The separation of the band between the two PHYs needs
86 * to be communicated separately.
87 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
88 * as in WMI_HW_MODE_SBS, and 3rd on the other band
89 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
90 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
91 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
92 */
93 enum wmi_host_hw_mode_config_type {
94 WMI_HOST_HW_MODE_SINGLE = 0,
95 WMI_HOST_HW_MODE_DBS = 1,
96 WMI_HOST_HW_MODE_SBS_PASSIVE = 2,
97 WMI_HOST_HW_MODE_SBS = 3,
98 WMI_HOST_HW_MODE_DBS_SBS = 4,
99 WMI_HOST_HW_MODE_DBS_OR_SBS = 5,
100
101 /* keep last */
102 WMI_HOST_HW_MODE_MAX
103 };
104
105 /* HW mode priority values used to detect the preferred HW mode
106 * on the available modes.
107 */
108 enum wmi_host_hw_mode_priority {
109 WMI_HOST_HW_MODE_DBS_SBS_PRI,
110 WMI_HOST_HW_MODE_DBS_PRI,
111 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
112 WMI_HOST_HW_MODE_SBS_PRI,
113 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
114 WMI_HOST_HW_MODE_SINGLE_PRI,
115
116 /* keep last the lowest priority */
117 WMI_HOST_HW_MODE_MAX_PRI
118 };
119
120 enum WMI_HOST_WLAN_BAND {
121 WMI_HOST_WLAN_2G_CAP = 0x1,
122 WMI_HOST_WLAN_5G_CAP = 0x2,
123 WMI_HOST_WLAN_2G_5G_CAP = WMI_HOST_WLAN_2G_CAP | WMI_HOST_WLAN_5G_CAP,
124 };
125
126 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command.
127 * Used only for HE auto rate mode.
128 */
129 enum {
130 /* HE LTF related configuration */
131 WMI_HE_AUTORATE_LTF_1X = BIT(0),
132 WMI_HE_AUTORATE_LTF_2X = BIT(1),
133 WMI_HE_AUTORATE_LTF_4X = BIT(2),
134
135 /* HE GI related configuration */
136 WMI_AUTORATE_400NS_GI = BIT(8),
137 WMI_AUTORATE_800NS_GI = BIT(9),
138 WMI_AUTORATE_1600NS_GI = BIT(10),
139 WMI_AUTORATE_3200NS_GI = BIT(11),
140 };
141
142 enum {
143 WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP = 0x00000001,
144 WMI_HOST_VDEV_FLAGS_TRANSMIT_AP = 0x00000002,
145 WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP = 0x00000004,
146 WMI_HOST_VDEV_FLAGS_EMA_MODE = 0x00000008,
147 WMI_HOST_VDEV_FLAGS_SCAN_MODE_VAP = 0x00000010,
148 };
149
150 /*
151 * wmi command groups.
152 */
153 enum wmi_cmd_group {
154 /* 0 to 2 are reserved */
155 WMI_GRP_START = 0x3,
156 WMI_GRP_SCAN = WMI_GRP_START,
157 WMI_GRP_PDEV = 0x4,
158 WMI_GRP_VDEV = 0x5,
159 WMI_GRP_PEER = 0x6,
160 WMI_GRP_MGMT = 0x7,
161 WMI_GRP_BA_NEG = 0x8,
162 WMI_GRP_STA_PS = 0x9,
163 WMI_GRP_DFS = 0xa,
164 WMI_GRP_ROAM = 0xb,
165 WMI_GRP_OFL_SCAN = 0xc,
166 WMI_GRP_P2P = 0xd,
167 WMI_GRP_AP_PS = 0xe,
168 WMI_GRP_RATE_CTRL = 0xf,
169 WMI_GRP_PROFILE = 0x10,
170 WMI_GRP_SUSPEND = 0x11,
171 WMI_GRP_BCN_FILTER = 0x12,
172 WMI_GRP_WOW = 0x13,
173 WMI_GRP_RTT = 0x14,
174 WMI_GRP_SPECTRAL = 0x15,
175 WMI_GRP_STATS = 0x16,
176 WMI_GRP_ARP_NS_OFL = 0x17,
177 WMI_GRP_NLO_OFL = 0x18,
178 WMI_GRP_GTK_OFL = 0x19,
179 WMI_GRP_CSA_OFL = 0x1a,
180 WMI_GRP_CHATTER = 0x1b,
181 WMI_GRP_TID_ADDBA = 0x1c,
182 WMI_GRP_MISC = 0x1d,
183 WMI_GRP_GPIO = 0x1e,
184 WMI_GRP_FWTEST = 0x1f,
185 WMI_GRP_TDLS = 0x20,
186 WMI_GRP_RESMGR = 0x21,
187 WMI_GRP_STA_SMPS = 0x22,
188 WMI_GRP_WLAN_HB = 0x23,
189 WMI_GRP_RMC = 0x24,
190 WMI_GRP_MHF_OFL = 0x25,
191 WMI_GRP_LOCATION_SCAN = 0x26,
192 WMI_GRP_OEM = 0x27,
193 WMI_GRP_NAN = 0x28,
194 WMI_GRP_COEX = 0x29,
195 WMI_GRP_OBSS_OFL = 0x2a,
196 WMI_GRP_LPI = 0x2b,
197 WMI_GRP_EXTSCAN = 0x2c,
198 WMI_GRP_DHCP_OFL = 0x2d,
199 WMI_GRP_IPA = 0x2e,
200 WMI_GRP_MDNS_OFL = 0x2f,
201 WMI_GRP_SAP_OFL = 0x30,
202 WMI_GRP_OCB = 0x31,
203 WMI_GRP_SOC = 0x32,
204 WMI_GRP_PKT_FILTER = 0x33,
205 WMI_GRP_MAWC = 0x34,
206 WMI_GRP_PMF_OFFLOAD = 0x35,
207 WMI_GRP_BPF_OFFLOAD = 0x36,
208 WMI_GRP_NAN_DATA = 0x37,
209 WMI_GRP_PROTOTYPE = 0x38,
210 WMI_GRP_MONITOR = 0x39,
211 WMI_GRP_REGULATORY = 0x3a,
212 WMI_GRP_HW_DATA_FILTER = 0x3b,
213 WMI_GRP_WLM = 0x3c,
214 WMI_GRP_11K_OFFLOAD = 0x3d,
215 WMI_GRP_TWT = 0x3e,
216 WMI_GRP_MOTION_DET = 0x3f,
217 WMI_GRP_SPATIAL_REUSE = 0x40,
218 };
219
220 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
221 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
222
223 #define WMI_CMD_UNSUPPORTED 0
224
225 enum wmi_tlv_cmd_id {
226 WMI_INIT_CMDID = 0x1,
227 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
228 WMI_STOP_SCAN_CMDID,
229 WMI_SCAN_CHAN_LIST_CMDID,
230 WMI_SCAN_SCH_PRIO_TBL_CMDID,
231 WMI_SCAN_UPDATE_REQUEST_CMDID,
232 WMI_SCAN_PROB_REQ_OUI_CMDID,
233 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
234 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
235 WMI_PDEV_SET_CHANNEL_CMDID,
236 WMI_PDEV_SET_PARAM_CMDID,
237 WMI_PDEV_PKTLOG_ENABLE_CMDID,
238 WMI_PDEV_PKTLOG_DISABLE_CMDID,
239 WMI_PDEV_SET_WMM_PARAMS_CMDID,
240 WMI_PDEV_SET_HT_CAP_IE_CMDID,
241 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
242 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
243 WMI_PDEV_SET_QUIET_MODE_CMDID,
244 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
245 WMI_PDEV_GET_TPC_CONFIG_CMDID,
246 WMI_PDEV_SET_BASE_MACADDR_CMDID,
247 WMI_PDEV_DUMP_CMDID,
248 WMI_PDEV_SET_LED_CONFIG_CMDID,
249 WMI_PDEV_GET_TEMPERATURE_CMDID,
250 WMI_PDEV_SET_LED_FLASHING_CMDID,
251 WMI_PDEV_SMART_ANT_ENABLE_CMDID,
252 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
253 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
254 WMI_PDEV_SET_CTL_TABLE_CMDID,
255 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
256 WMI_PDEV_FIPS_CMDID,
257 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
258 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
259 WMI_PDEV_GET_NFCAL_POWER_CMDID,
260 WMI_PDEV_GET_TPC_CMDID,
261 WMI_MIB_STATS_ENABLE_CMDID,
262 WMI_PDEV_SET_PCL_CMDID,
263 WMI_PDEV_SET_HW_MODE_CMDID,
264 WMI_PDEV_SET_MAC_CONFIG_CMDID,
265 WMI_PDEV_SET_ANTENNA_MODE_CMDID,
266 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
267 WMI_PDEV_WAL_POWER_DEBUG_CMDID,
268 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
269 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
270 WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
271 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
272 WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
273 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
274 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
275 WMI_PDEV_CHECK_CAL_VERSION_CMDID,
276 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
277 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
278 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
279 WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
280 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
281 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
282 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
283 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
284 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
285 WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
286 WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
287 WMI_PDEV_PKTLOG_FILTER_CMDID,
288 WMI_PDEV_SET_RAP_CONFIG_CMDID,
289 WMI_PDEV_DSM_FILTER_CMDID,
290 WMI_PDEV_FRAME_INJECT_CMDID,
291 WMI_PDEV_TBTT_OFFSET_SYNC_CMDID,
292 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID,
293 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID,
294 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
295 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
296 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
297 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
298 WMI_PDEV_GET_TPC_STATS_CMDID,
299 WMI_PDEV_ENABLE_DURATION_BASED_TX_MODE_SELECTION_CMDID,
300 WMI_PDEV_GET_DPD_STATUS_CMDID,
301 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID,
302 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID,
303 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
304 WMI_VDEV_DELETE_CMDID,
305 WMI_VDEV_START_REQUEST_CMDID,
306 WMI_VDEV_RESTART_REQUEST_CMDID,
307 WMI_VDEV_UP_CMDID,
308 WMI_VDEV_STOP_CMDID,
309 WMI_VDEV_DOWN_CMDID,
310 WMI_VDEV_SET_PARAM_CMDID,
311 WMI_VDEV_INSTALL_KEY_CMDID,
312 WMI_VDEV_WNM_SLEEPMODE_CMDID,
313 WMI_VDEV_WMM_ADDTS_CMDID,
314 WMI_VDEV_WMM_DELTS_CMDID,
315 WMI_VDEV_SET_WMM_PARAMS_CMDID,
316 WMI_VDEV_SET_GTX_PARAMS_CMDID,
317 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
318 WMI_VDEV_PLMREQ_START_CMDID,
319 WMI_VDEV_PLMREQ_STOP_CMDID,
320 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
321 WMI_VDEV_SET_IE_CMDID,
322 WMI_VDEV_RATEMASK_CMDID,
323 WMI_VDEV_ATF_REQUEST_CMDID,
324 WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
325 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
326 WMI_VDEV_SET_QUIET_MODE_CMDID,
327 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
328 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
329 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
330 WMI_VDEV_SET_ARP_STAT_CMDID,
331 WMI_VDEV_GET_ARP_STAT_CMDID,
332 WMI_VDEV_GET_TX_POWER_CMDID,
333 WMI_VDEV_LIMIT_OFFCHAN_CMDID,
334 WMI_VDEV_SET_CUSTOM_SW_RETRY_TH_CMDID,
335 WMI_VDEV_CHAINMASK_CONFIG_CMDID,
336 WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID,
337 WMI_VDEV_GET_MWS_COEX_INFO_CMDID,
338 WMI_VDEV_DELETE_ALL_PEER_CMDID,
339 WMI_VDEV_BSS_MAX_IDLE_TIME_CMDID,
340 WMI_VDEV_AUDIO_SYNC_TRIGGER_CMDID,
341 WMI_VDEV_AUDIO_SYNC_QTIMER_CMDID,
342 WMI_VDEV_SET_PCL_CMDID,
343 WMI_VDEV_GET_BIG_DATA_CMDID,
344 WMI_VDEV_GET_BIG_DATA_P2_CMDID,
345 WMI_VDEV_SET_TPC_POWER_CMDID,
346 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
347 WMI_PEER_DELETE_CMDID,
348 WMI_PEER_FLUSH_TIDS_CMDID,
349 WMI_PEER_SET_PARAM_CMDID,
350 WMI_PEER_ASSOC_CMDID,
351 WMI_PEER_ADD_WDS_ENTRY_CMDID,
352 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
353 WMI_PEER_MCAST_GROUP_CMDID,
354 WMI_PEER_INFO_REQ_CMDID,
355 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
356 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
357 WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
358 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
359 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
360 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
361 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
362 WMI_PEER_ATF_REQUEST_CMDID,
363 WMI_PEER_BWF_REQUEST_CMDID,
364 WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
365 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
366 WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
367 WMI_PEER_ANTDIV_INFO_REQ_CMDID,
368 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
369 WMI_PDEV_SEND_BCN_CMDID,
370 WMI_BCN_TMPL_CMDID,
371 WMI_BCN_FILTER_RX_CMDID,
372 WMI_PRB_REQ_FILTER_RX_CMDID,
373 WMI_MGMT_TX_CMDID,
374 WMI_PRB_TMPL_CMDID,
375 WMI_MGMT_TX_SEND_CMDID,
376 WMI_OFFCHAN_DATA_TX_SEND_CMDID,
377 WMI_PDEV_SEND_FD_CMDID,
378 WMI_BCN_OFFLOAD_CTRL_CMDID,
379 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
380 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
381 WMI_FILS_DISCOVERY_TMPL_CMDID,
382 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
383 WMI_ADDBA_SEND_CMDID,
384 WMI_ADDBA_STATUS_CMDID,
385 WMI_DELBA_SEND_CMDID,
386 WMI_ADDBA_SET_RESP_CMDID,
387 WMI_SEND_SINGLEAMSDU_CMDID,
388 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
389 WMI_STA_POWERSAVE_PARAM_CMDID,
390 WMI_STA_MIMO_PS_MODE_CMDID,
391 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
392 WMI_PDEV_DFS_DISABLE_CMDID,
393 WMI_DFS_PHYERR_FILTER_ENA_CMDID,
394 WMI_DFS_PHYERR_FILTER_DIS_CMDID,
395 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
396 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
397 WMI_VDEV_ADFS_CH_CFG_CMDID,
398 WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
399 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
400 WMI_ROAM_SCAN_RSSI_THRESHOLD,
401 WMI_ROAM_SCAN_PERIOD,
402 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
403 WMI_ROAM_AP_PROFILE,
404 WMI_ROAM_CHAN_LIST,
405 WMI_ROAM_SCAN_CMD,
406 WMI_ROAM_SYNCH_COMPLETE,
407 WMI_ROAM_SET_RIC_REQUEST_CMDID,
408 WMI_ROAM_INVOKE_CMDID,
409 WMI_ROAM_FILTER_CMDID,
410 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
411 WMI_ROAM_CONFIGURE_MAWC_CMDID,
412 WMI_ROAM_SET_MBO_PARAM_CMDID,
413 WMI_ROAM_PER_CONFIG_CMDID,
414 WMI_ROAM_BTM_CONFIG_CMDID,
415 WMI_ENABLE_FILS_CMDID,
416 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
417 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
418 WMI_OFL_SCAN_PERIOD,
419 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
420 WMI_P2P_DEV_SET_DISCOVERABILITY,
421 WMI_P2P_GO_SET_BEACON_IE,
422 WMI_P2P_GO_SET_PROBE_RESP_IE,
423 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
424 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
425 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
426 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
427 WMI_P2P_SET_OPPPS_PARAM_CMDID,
428 WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
429 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
430 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
431 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
432 WMI_AP_PS_EGAP_PARAM_CMDID,
433 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
434 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
435 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
436 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
437 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
438 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
439 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
440 WMI_PDEV_RESUME_CMDID,
441 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
442 WMI_RMV_BCN_FILTER_CMDID,
443 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
444 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
445 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
446 WMI_WOW_ENABLE_CMDID,
447 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
448 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
449 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
450 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
451 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
452 WMI_D0_WOW_ENABLE_DISABLE_CMDID,
453 WMI_EXTWOW_ENABLE_CMDID,
454 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
455 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
456 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
457 WMI_WOW_UDP_SVC_OFLD_CMDID,
458 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
459 WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
460 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
461 WMI_RTT_TSF_CMDID,
462 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
463 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
464 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
465 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
466 WMI_REQUEST_STATS_EXT_CMDID,
467 WMI_REQUEST_LINK_STATS_CMDID,
468 WMI_START_LINK_STATS_CMDID,
469 WMI_CLEAR_LINK_STATS_CMDID,
470 WMI_GET_FW_MEM_DUMP_CMDID,
471 WMI_DEBUG_MESG_FLUSH_CMDID,
472 WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
473 WMI_REQUEST_WLAN_STATS_CMDID,
474 WMI_REQUEST_RCPI_CMDID,
475 WMI_REQUEST_PEER_STATS_INFO_CMDID,
476 WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
477 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
478 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
479 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
480 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
481 WMI_APFIND_CMDID,
482 WMI_PASSPOINT_LIST_CONFIG_CMDID,
483 WMI_NLO_CONFIGURE_MAWC_CMDID,
484 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
485 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
486 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
487 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
488 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
489 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
490 WMI_CHATTER_COALESCING_QUERY_CMDID,
491 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
492 WMI_PEER_TID_DELBA_CMDID,
493 WMI_STA_DTIM_PS_METHOD_CMDID,
494 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
495 WMI_STA_KEEPALIVE_CMDID,
496 WMI_BA_REQ_SSN_CMDID,
497 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
498 WMI_PDEV_UTF_CMDID,
499 WMI_DBGLOG_CFG_CMDID,
500 WMI_PDEV_QVIT_CMDID,
501 WMI_PDEV_FTM_INTG_CMDID,
502 WMI_VDEV_SET_KEEPALIVE_CMDID,
503 WMI_VDEV_GET_KEEPALIVE_CMDID,
504 WMI_FORCE_FW_HANG_CMDID,
505 WMI_SET_MCASTBCAST_FILTER_CMDID,
506 WMI_THERMAL_MGMT_CMDID,
507 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
508 WMI_TPC_CHAINMASK_CONFIG_CMDID,
509 WMI_SET_ANTENNA_DIVERSITY_CMDID,
510 WMI_OCB_SET_SCHED_CMDID,
511 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
512 WMI_LRO_CONFIG_CMDID,
513 WMI_TRANSFER_DATA_TO_FLASH_CMDID,
514 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
515 WMI_VDEV_WISA_CMDID,
516 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
517 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
518 WMI_READ_DATA_FROM_FLASH_CMDID,
519 WMI_THERM_THROT_SET_CONF_CMDID,
520 WMI_RUNTIME_DPD_RECAL_CMDID,
521 WMI_GET_TPC_POWER_CMDID,
522 WMI_IDLE_TRIGGER_MONITOR_CMDID,
523 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
524 WMI_GPIO_OUTPUT_CMDID,
525 WMI_TXBF_CMDID,
526 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
527 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
528 WMI_UNIT_TEST_CMDID,
529 WMI_FWTEST_CMDID,
530 WMI_QBOOST_CFG_CMDID,
531 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
532 WMI_TDLS_PEER_UPDATE_CMDID,
533 WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
534 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
535 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
536 WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
537 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
538 WMI_STA_SMPS_PARAM_CMDID,
539 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
540 WMI_HB_SET_TCP_PARAMS_CMDID,
541 WMI_HB_SET_TCP_PKT_FILTER_CMDID,
542 WMI_HB_SET_UDP_PARAMS_CMDID,
543 WMI_HB_SET_UDP_PKT_FILTER_CMDID,
544 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
545 WMI_RMC_SET_ACTION_PERIOD_CMDID,
546 WMI_RMC_CONFIG_CMDID,
547 WMI_RMC_SET_MANUAL_LEADER_CMDID,
548 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
549 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
550 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
551 WMI_BATCH_SCAN_DISABLE_CMDID,
552 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
553 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
554 WMI_OEM_REQUEST_CMDID,
555 WMI_LPI_OEM_REQ_CMDID,
556 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
557 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
558 WMI_CHAN_AVOID_UPDATE_CMDID,
559 WMI_COEX_CONFIG_CMDID,
560 WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
561 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
562 WMI_SAR_LIMITS_CMDID,
563 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
564 WMI_OBSS_SCAN_DISABLE_CMDID,
565 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
566 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
567 WMI_LPI_START_SCAN_CMDID,
568 WMI_LPI_STOP_SCAN_CMDID,
569 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
570 WMI_EXTSCAN_STOP_CMDID,
571 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
572 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
573 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
574 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
575 WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
576 WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
577 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
578 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
579 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
580 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
581 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
582 WMI_MDNS_SET_FQDN_CMDID,
583 WMI_MDNS_SET_RESPONSE_CMDID,
584 WMI_MDNS_GET_STATS_CMDID,
585 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
586 WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
587 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
588 WMI_OCB_SET_UTC_TIME_CMDID,
589 WMI_OCB_START_TIMING_ADVERT_CMDID,
590 WMI_OCB_STOP_TIMING_ADVERT_CMDID,
591 WMI_OCB_GET_TSF_TIMER_CMDID,
592 WMI_DCC_GET_STATS_CMDID,
593 WMI_DCC_CLEAR_STATS_CMDID,
594 WMI_DCC_UPDATE_NDL_CMDID,
595 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
596 WMI_SOC_SET_HW_MODE_CMDID,
597 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
598 WMI_SOC_SET_ANTENNA_MODE_CMDID,
599 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
600 WMI_PACKET_FILTER_ENABLE_CMDID,
601 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
602 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
603 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
604 WMI_BPF_GET_VDEV_STATS_CMDID,
605 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
606 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
607 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
608 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
609 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
610 WMI_11D_SCAN_START_CMDID,
611 WMI_11D_SCAN_STOP_CMDID,
612 WMI_SET_INIT_COUNTRY_CMDID,
613 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
614 WMI_NDP_INITIATOR_REQ_CMDID,
615 WMI_NDP_RESPONDER_REQ_CMDID,
616 WMI_NDP_END_REQ_CMDID,
617 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
618 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
619 WMI_TWT_DISABLE_CMDID,
620 WMI_TWT_ADD_DIALOG_CMDID,
621 WMI_TWT_DEL_DIALOG_CMDID,
622 WMI_TWT_PAUSE_DIALOG_CMDID,
623 WMI_TWT_RESUME_DIALOG_CMDID,
624 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
625 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
626 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
627 };
628
629 enum wmi_tlv_event_id {
630 WMI_SERVICE_READY_EVENTID = 0x1,
631 WMI_READY_EVENTID,
632 WMI_SERVICE_AVAILABLE_EVENTID,
633 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
634 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
635 WMI_CHAN_INFO_EVENTID,
636 WMI_PHYERR_EVENTID,
637 WMI_PDEV_DUMP_EVENTID,
638 WMI_TX_PAUSE_EVENTID,
639 WMI_DFS_RADAR_EVENTID,
640 WMI_PDEV_L1SS_TRACK_EVENTID,
641 WMI_PDEV_TEMPERATURE_EVENTID,
642 WMI_SERVICE_READY_EXT_EVENTID,
643 WMI_PDEV_FIPS_EVENTID,
644 WMI_PDEV_CHANNEL_HOPPING_EVENTID,
645 WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
646 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
647 WMI_PDEV_TPC_EVENTID,
648 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
649 WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
650 WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
651 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
652 WMI_PDEV_ANTDIV_STATUS_EVENTID,
653 WMI_PDEV_CHIP_POWER_STATS_EVENTID,
654 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
655 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
656 WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
657 WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
658 WMI_PDEV_BSS_CHAN_INFO_EVENTID,
659 WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
660 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
661 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
662 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
663 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
664 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
665 WMI_PDEV_RAP_INFO_EVENTID,
666 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
667 WMI_SERVICE_READY_EXT2_EVENTID,
668 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
669 WMI_VDEV_STOPPED_EVENTID,
670 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
671 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
672 WMI_VDEV_TSF_REPORT_EVENTID,
673 WMI_VDEV_DELETE_RESP_EVENTID,
674 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
675 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
676 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
677 WMI_PEER_INFO_EVENTID,
678 WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
679 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
680 WMI_PEER_STATE_EVENTID,
681 WMI_PEER_ASSOC_CONF_EVENTID,
682 WMI_PEER_DELETE_RESP_EVENTID,
683 WMI_PEER_RATECODE_LIST_EVENTID,
684 WMI_WDS_PEER_EVENTID,
685 WMI_PEER_STA_PS_STATECHG_EVENTID,
686 WMI_PEER_ANTDIV_INFO_EVENTID,
687 WMI_PEER_RESERVED0_EVENTID,
688 WMI_PEER_RESERVED1_EVENTID,
689 WMI_PEER_RESERVED2_EVENTID,
690 WMI_PEER_RESERVED3_EVENTID,
691 WMI_PEER_RESERVED4_EVENTID,
692 WMI_PEER_RESERVED5_EVENTID,
693 WMI_PEER_RESERVED6_EVENTID,
694 WMI_PEER_RESERVED7_EVENTID,
695 WMI_PEER_RESERVED8_EVENTID,
696 WMI_PEER_RESERVED9_EVENTID,
697 WMI_PEER_RESERVED10_EVENTID,
698 WMI_PEER_OPER_MODE_CHANGE_EVENTID,
699 WMI_PEER_TX_PN_RESPONSE_EVENTID,
700 WMI_PEER_CFR_CAPTURE_EVENTID,
701 WMI_PEER_CREATE_CONF_EVENTID,
702 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
703 WMI_HOST_SWBA_EVENTID,
704 WMI_TBTTOFFSET_UPDATE_EVENTID,
705 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
706 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
707 WMI_MGMT_TX_COMPLETION_EVENTID,
708 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
709 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
710 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID,
711 WMI_HOST_FILS_DISCOVERY_EVENTID,
712 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
713 WMI_TX_ADDBA_COMPLETE_EVENTID,
714 WMI_BA_RSP_SSN_EVENTID,
715 WMI_AGGR_STATE_TRIG_EVENTID,
716 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
717 WMI_PROFILE_MATCH,
718 WMI_ROAM_SYNCH_EVENTID,
719 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
720 WMI_P2P_NOA_EVENTID,
721 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
722 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
723 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
724 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
725 WMI_D0_WOW_DISABLE_ACK_EVENTID,
726 WMI_WOW_INITIAL_WAKEUP_EVENTID,
727 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
728 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
729 WMI_RTT_ERROR_REPORT_EVENTID,
730 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
731 WMI_IFACE_LINK_STATS_EVENTID,
732 WMI_PEER_LINK_STATS_EVENTID,
733 WMI_RADIO_LINK_STATS_EVENTID,
734 WMI_UPDATE_FW_MEM_DUMP_EVENTID,
735 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
736 WMI_INST_RSSI_STATS_EVENTID,
737 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
738 WMI_REPORT_STATS_EVENTID,
739 WMI_UPDATE_RCPI_EVENTID,
740 WMI_PEER_STATS_INFO_EVENTID,
741 WMI_RADIO_CHAN_STATS_EVENTID,
742 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
743 WMI_NLO_SCAN_COMPLETE_EVENTID,
744 WMI_APFIND_EVENTID,
745 WMI_PASSPOINT_MATCH_EVENTID,
746 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
747 WMI_GTK_REKEY_FAIL_EVENTID,
748 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
749 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
750 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
751 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
752 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
753 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
754 WMI_PDEV_UTF_EVENTID,
755 WMI_DEBUG_MESG_EVENTID,
756 WMI_UPDATE_STATS_EVENTID,
757 WMI_DEBUG_PRINT_EVENTID,
758 WMI_DCS_INTERFERENCE_EVENTID,
759 WMI_PDEV_QVIT_EVENTID,
760 WMI_WLAN_PROFILE_DATA_EVENTID,
761 WMI_PDEV_FTM_INTG_EVENTID,
762 WMI_WLAN_FREQ_AVOID_EVENTID,
763 WMI_VDEV_GET_KEEPALIVE_EVENTID,
764 WMI_THERMAL_MGMT_EVENTID,
765 WMI_DIAG_DATA_CONTAINER_EVENTID,
766 WMI_HOST_AUTO_SHUTDOWN_EVENTID,
767 WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
768 WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
769 WMI_DIAG_EVENTID,
770 WMI_OCB_SET_SCHED_EVENTID,
771 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
772 WMI_RSSI_BREACH_EVENTID,
773 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
774 WMI_PDEV_UTF_SCPC_EVENTID,
775 WMI_READ_DATA_FROM_FLASH_EVENTID,
776 WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
777 WMI_PKGID_EVENTID,
778 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
779 WMI_UPLOADH_EVENTID,
780 WMI_CAPTUREH_EVENTID,
781 WMI_RFKILL_STATE_CHANGE_EVENTID,
782 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
783 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
784 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
785 WMI_BATCH_SCAN_RESULT_EVENTID,
786 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
787 WMI_OEM_MEASUREMENT_REPORT_EVENTID,
788 WMI_OEM_ERROR_REPORT_EVENTID,
789 WMI_OEM_RESPONSE_EVENTID,
790 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
791 WMI_NAN_DISC_IFACE_CREATED_EVENTID,
792 WMI_NAN_DISC_IFACE_DELETED_EVENTID,
793 WMI_NAN_STARTED_CLUSTER_EVENTID,
794 WMI_NAN_JOINED_CLUSTER_EVENTID,
795 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
796 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
797 WMI_LPI_STATUS_EVENTID,
798 WMI_LPI_HANDOFF_EVENTID,
799 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
800 WMI_EXTSCAN_OPERATION_EVENTID,
801 WMI_EXTSCAN_TABLE_USAGE_EVENTID,
802 WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
803 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
804 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
805 WMI_EXTSCAN_CAPABILITIES_EVENTID,
806 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
807 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
808 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
809 WMI_SAP_OFL_DEL_STA_EVENTID,
810 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID =
811 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL),
812 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
813 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
814 WMI_DCC_GET_STATS_RESP_EVENTID,
815 WMI_DCC_UPDATE_NDL_RESP_EVENTID,
816 WMI_DCC_STATS_EVENTID,
817 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
818 WMI_SOC_HW_MODE_TRANSITION_EVENTID,
819 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
820 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
821 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
822 WMI_BPF_VDEV_STATS_INFO_EVENTID,
823 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
824 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
825 WMI_11D_NEW_COUNTRY_EVENTID,
826 WMI_REG_CHAN_LIST_CC_EXT_EVENTID,
827 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
828 WMI_NDP_INITIATOR_RSP_EVENTID,
829 WMI_NDP_RESPONDER_RSP_EVENTID,
830 WMI_NDP_END_RSP_EVENTID,
831 WMI_NDP_INDICATION_EVENTID,
832 WMI_NDP_CONFIRM_EVENTID,
833 WMI_NDP_END_INDICATION_EVENTID,
834
835 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
836 WMI_TWT_DISABLE_EVENTID,
837 WMI_TWT_ADD_DIALOG_EVENTID,
838 WMI_TWT_DEL_DIALOG_EVENTID,
839 WMI_TWT_PAUSE_DIALOG_EVENTID,
840 WMI_TWT_RESUME_DIALOG_EVENTID,
841 };
842
843 enum wmi_tlv_pdev_param {
844 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
845 WMI_PDEV_PARAM_RX_CHAIN_MASK,
846 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
847 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
848 WMI_PDEV_PARAM_TXPOWER_SCALE,
849 WMI_PDEV_PARAM_BEACON_GEN_MODE,
850 WMI_PDEV_PARAM_BEACON_TX_MODE,
851 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
852 WMI_PDEV_PARAM_PROTECTION_MODE,
853 WMI_PDEV_PARAM_DYNAMIC_BW,
854 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
855 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
856 WMI_PDEV_PARAM_STA_KICKOUT_TH,
857 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
858 WMI_PDEV_PARAM_LTR_ENABLE,
859 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
860 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
861 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
862 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
863 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
864 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
865 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
866 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
867 WMI_PDEV_PARAM_L1SS_ENABLE,
868 WMI_PDEV_PARAM_DSLEEP_ENABLE,
869 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
870 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
871 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
872 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
873 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
874 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
875 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
876 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
877 WMI_PDEV_PARAM_PMF_QOS,
878 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
879 WMI_PDEV_PARAM_DCS,
880 WMI_PDEV_PARAM_ANI_ENABLE,
881 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
882 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
883 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
884 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
885 WMI_PDEV_PARAM_DYNTXCHAIN,
886 WMI_PDEV_PARAM_PROXY_STA,
887 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
888 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
889 WMI_PDEV_PARAM_RFKILL_ENABLE,
890 WMI_PDEV_PARAM_BURST_DUR,
891 WMI_PDEV_PARAM_BURST_ENABLE,
892 WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
893 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
894 WMI_PDEV_PARAM_L1SS_TRACK,
895 WMI_PDEV_PARAM_HYST_EN,
896 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
897 WMI_PDEV_PARAM_LED_SYS_STATE,
898 WMI_PDEV_PARAM_LED_ENABLE,
899 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
900 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
901 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
902 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
903 WMI_PDEV_PARAM_CTS_CBW,
904 WMI_PDEV_PARAM_WNTS_CONFIG,
905 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
906 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
907 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
908 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
909 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
910 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
911 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
912 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
913 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
914 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
915 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
916 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
917 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
918 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
919 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
920 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
921 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
922 WMI_PDEV_PARAM_TXPOWER_DECR_DB,
923 WMI_PDEV_PARAM_AGGR_BURST,
924 WMI_PDEV_PARAM_RX_DECAP_MODE,
925 WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
926 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
927 WMI_PDEV_PARAM_ANTENNA_GAIN,
928 WMI_PDEV_PARAM_RX_FILTER,
929 WMI_PDEV_SET_MCAST_TO_UCAST_TID,
930 WMI_PDEV_PARAM_PROXY_STA_MODE,
931 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
932 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
933 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
934 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
935 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
936 WMI_PDEV_PARAM_BLOCK_INTERBSS,
937 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
938 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
939 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
940 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
941 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
942 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
943 WMI_PDEV_PARAM_EN_STATS,
944 WMI_PDEV_PARAM_MU_GROUP_POLICY,
945 WMI_PDEV_PARAM_NOISE_DETECTION,
946 WMI_PDEV_PARAM_NOISE_THRESHOLD,
947 WMI_PDEV_PARAM_DPD_ENABLE,
948 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
949 WMI_PDEV_PARAM_ATF_STRICT_SCH,
950 WMI_PDEV_PARAM_ATF_SCHED_DURATION,
951 WMI_PDEV_PARAM_ANT_PLZN,
952 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
953 WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
954 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
955 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
956 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
957 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
958 WMI_PDEV_PARAM_CCA_THRESHOLD,
959 WMI_PDEV_PARAM_RTS_FIXED_RATE,
960 WMI_PDEV_PARAM_PDEV_RESET,
961 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
962 WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
963 WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
964 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
965 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
966 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
967 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
968 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
969 WMI_PDEV_PARAM_PROPAGATION_DELAY,
970 WMI_PDEV_PARAM_ENA_ANT_DIV,
971 WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
972 WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
973 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
974 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
975 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
976 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
977 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
978 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
979 WMI_PDEV_PARAM_TX_SCH_DELAY,
980 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
981 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
982 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
983 WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
984 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
985 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
986 WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
987 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc,
988 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe,
989 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6,
990 };
991
992 enum wmi_tlv_vdev_param {
993 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
994 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
995 WMI_VDEV_PARAM_BEACON_INTERVAL,
996 WMI_VDEV_PARAM_LISTEN_INTERVAL,
997 WMI_VDEV_PARAM_MULTICAST_RATE,
998 WMI_VDEV_PARAM_MGMT_TX_RATE,
999 WMI_VDEV_PARAM_SLOT_TIME,
1000 WMI_VDEV_PARAM_PREAMBLE,
1001 WMI_VDEV_PARAM_SWBA_TIME,
1002 WMI_VDEV_STATS_UPDATE_PERIOD,
1003 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
1004 WMI_VDEV_HOST_SWBA_INTERVAL,
1005 WMI_VDEV_PARAM_DTIM_PERIOD,
1006 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1007 WMI_VDEV_PARAM_WDS,
1008 WMI_VDEV_PARAM_ATIM_WINDOW,
1009 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
1010 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
1011 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
1012 WMI_VDEV_PARAM_FEATURE_WMM,
1013 WMI_VDEV_PARAM_CHWIDTH,
1014 WMI_VDEV_PARAM_CHEXTOFFSET,
1015 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
1016 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
1017 WMI_VDEV_PARAM_MGMT_RATE,
1018 WMI_VDEV_PARAM_PROTECTION_MODE,
1019 WMI_VDEV_PARAM_FIXED_RATE,
1020 WMI_VDEV_PARAM_SGI,
1021 WMI_VDEV_PARAM_LDPC,
1022 WMI_VDEV_PARAM_TX_STBC,
1023 WMI_VDEV_PARAM_RX_STBC,
1024 WMI_VDEV_PARAM_INTRA_BSS_FWD,
1025 WMI_VDEV_PARAM_DEF_KEYID,
1026 WMI_VDEV_PARAM_NSS,
1027 WMI_VDEV_PARAM_BCAST_DATA_RATE,
1028 WMI_VDEV_PARAM_MCAST_DATA_RATE,
1029 WMI_VDEV_PARAM_MCAST_INDICATE,
1030 WMI_VDEV_PARAM_DHCP_INDICATE,
1031 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1032 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1033 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1034 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1035 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
1036 WMI_VDEV_PARAM_ENABLE_RTSCTS,
1037 WMI_VDEV_PARAM_TXBF,
1038 WMI_VDEV_PARAM_PACKET_POWERSAVE,
1039 WMI_VDEV_PARAM_DROP_UNENCRY,
1040 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
1041 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1042 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1043 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1044 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1045 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1046 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1047 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1048 WMI_VDEV_PARAM_TX_PWRLIMIT,
1049 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
1050 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
1051 WMI_VDEV_PARAM_ENABLE_RMC,
1052 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
1053 WMI_VDEV_PARAM_MAX_RATE,
1054 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
1055 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
1056 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
1057 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
1058 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
1059 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
1060 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
1061 WMI_VDEV_PARAM_INACTIVITY_CNT,
1062 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
1063 WMI_VDEV_PARAM_DTIM_POLICY,
1064 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
1065 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
1066 WMI_VDEV_PARAM_RX_LEAK_WINDOW,
1067 WMI_VDEV_PARAM_STATS_AVG_FACTOR,
1068 WMI_VDEV_PARAM_DISCONNECT_TH,
1069 WMI_VDEV_PARAM_RTSCTS_RATE,
1070 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
1071 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
1072 WMI_VDEV_PARAM_TXPOWER_SCALE,
1073 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
1074 WMI_VDEV_PARAM_MCAST2UCAST_SET,
1075 WMI_VDEV_PARAM_RC_NUM_RETRIES,
1076 WMI_VDEV_PARAM_CABQ_MAXDUR,
1077 WMI_VDEV_PARAM_MFPTEST_SET,
1078 WMI_VDEV_PARAM_RTS_FIXED_RATE,
1079 WMI_VDEV_PARAM_VHT_SGIMASK,
1080 WMI_VDEV_PARAM_VHT80_RATEMASK,
1081 WMI_VDEV_PARAM_PROXY_STA,
1082 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
1083 WMI_VDEV_PARAM_RX_DECAP_TYPE,
1084 WMI_VDEV_PARAM_BW_NSS_RATEMASK,
1085 WMI_VDEV_PARAM_SENSOR_AP,
1086 WMI_VDEV_PARAM_BEACON_RATE,
1087 WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
1088 WMI_VDEV_PARAM_STA_KICKOUT,
1089 WMI_VDEV_PARAM_CAPABILITIES,
1090 WMI_VDEV_PARAM_TSF_INCREMENT,
1091 WMI_VDEV_PARAM_AMPDU_PER_AC,
1092 WMI_VDEV_PARAM_RX_FILTER,
1093 WMI_VDEV_PARAM_MGMT_TX_POWER,
1094 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1095 WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1096 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1097 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1098 WMI_VDEV_PARAM_HE_DCM,
1099 WMI_VDEV_PARAM_HE_RANGE_EXT,
1100 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1101 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
1102 WMI_VDEV_PARAM_HE_LTF = 0x74,
1103 WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE = 0x7d,
1104 WMI_VDEV_PARAM_BA_MODE = 0x7e,
1105 WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
1106 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1107 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
1108 WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1109 WMI_VDEV_PARAM_BSS_COLOR,
1110 WMI_VDEV_PARAM_SET_HEMU_MODE,
1111 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
1112 };
1113
1114 enum wmi_tlv_peer_flags {
1115 WMI_PEER_AUTH = 0x00000001,
1116 WMI_PEER_QOS = 0x00000002,
1117 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
1118 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
1119 WMI_PEER_HE = 0x00000400,
1120 WMI_PEER_APSD = 0x00000800,
1121 WMI_PEER_HT = 0x00001000,
1122 WMI_PEER_40MHZ = 0x00002000,
1123 WMI_PEER_STBC = 0x00008000,
1124 WMI_PEER_LDPC = 0x00010000,
1125 WMI_PEER_DYN_MIMOPS = 0x00020000,
1126 WMI_PEER_STATIC_MIMOPS = 0x00040000,
1127 WMI_PEER_SPATIAL_MUX = 0x00200000,
1128 WMI_PEER_TWT_REQ = 0x00400000,
1129 WMI_PEER_TWT_RESP = 0x00800000,
1130 WMI_PEER_VHT = 0x02000000,
1131 WMI_PEER_80MHZ = 0x04000000,
1132 WMI_PEER_PMF = 0x08000000,
1133 WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1134 WMI_PEER_160MHZ = 0x40000000,
1135 WMI_PEER_SAFEMODE_EN = 0x80000000,
1136 };
1137
1138 /** Enum list of TLV Tags for each parameter structure type. */
1139 enum wmi_tlv_tag {
1140 WMI_TAG_LAST_RESERVED = 15,
1141 WMI_TAG_FIRST_ARRAY_ENUM,
1142 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1143 WMI_TAG_ARRAY_BYTE,
1144 WMI_TAG_ARRAY_STRUCT,
1145 WMI_TAG_ARRAY_FIXED_STRUCT,
1146 WMI_TAG_LAST_ARRAY_ENUM = 31,
1147 WMI_TAG_SERVICE_READY_EVENT,
1148 WMI_TAG_HAL_REG_CAPABILITIES,
1149 WMI_TAG_WLAN_HOST_MEM_REQ,
1150 WMI_TAG_READY_EVENT,
1151 WMI_TAG_SCAN_EVENT,
1152 WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1153 WMI_TAG_CHAN_INFO_EVENT,
1154 WMI_TAG_COMB_PHYERR_RX_HDR,
1155 WMI_TAG_VDEV_START_RESPONSE_EVENT,
1156 WMI_TAG_VDEV_STOPPED_EVENT,
1157 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1158 WMI_TAG_PEER_STA_KICKOUT_EVENT,
1159 WMI_TAG_MGMT_RX_HDR,
1160 WMI_TAG_TBTT_OFFSET_EVENT,
1161 WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1162 WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1163 WMI_TAG_ROAM_EVENT,
1164 WMI_TAG_WOW_EVENT_INFO,
1165 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1166 WMI_TAG_RTT_EVENT_HEADER,
1167 WMI_TAG_RTT_ERROR_REPORT_EVENT,
1168 WMI_TAG_RTT_MEAS_EVENT,
1169 WMI_TAG_ECHO_EVENT,
1170 WMI_TAG_FTM_INTG_EVENT,
1171 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1172 WMI_TAG_GPIO_INPUT_EVENT,
1173 WMI_TAG_CSA_EVENT,
1174 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1175 WMI_TAG_IGTK_INFO,
1176 WMI_TAG_DCS_INTERFERENCE_EVENT,
1177 WMI_TAG_ATH_DCS_CW_INT,
1178 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1179 WMI_TAG_ATH_DCS_CW_INT,
1180 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1181 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1182 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1183 WMI_TAG_WLAN_PROFILE_CTX_T,
1184 WMI_TAG_WLAN_PROFILE_T,
1185 WMI_TAG_PDEV_QVIT_EVENT,
1186 WMI_TAG_HOST_SWBA_EVENT,
1187 WMI_TAG_TIM_INFO,
1188 WMI_TAG_P2P_NOA_INFO,
1189 WMI_TAG_STATS_EVENT,
1190 WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1191 WMI_TAG_AVOID_FREQ_RANGE_DESC,
1192 WMI_TAG_GTK_REKEY_FAIL_EVENT,
1193 WMI_TAG_INIT_CMD,
1194 WMI_TAG_RESOURCE_CONFIG,
1195 WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1196 WMI_TAG_START_SCAN_CMD,
1197 WMI_TAG_STOP_SCAN_CMD,
1198 WMI_TAG_SCAN_CHAN_LIST_CMD,
1199 WMI_TAG_CHANNEL,
1200 WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1201 WMI_TAG_PDEV_SET_PARAM_CMD,
1202 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1203 WMI_TAG_WMM_PARAMS,
1204 WMI_TAG_PDEV_SET_QUIET_CMD,
1205 WMI_TAG_VDEV_CREATE_CMD,
1206 WMI_TAG_VDEV_DELETE_CMD,
1207 WMI_TAG_VDEV_START_REQUEST_CMD,
1208 WMI_TAG_P2P_NOA_DESCRIPTOR,
1209 WMI_TAG_P2P_GO_SET_BEACON_IE,
1210 WMI_TAG_GTK_OFFLOAD_CMD,
1211 WMI_TAG_VDEV_UP_CMD,
1212 WMI_TAG_VDEV_STOP_CMD,
1213 WMI_TAG_VDEV_DOWN_CMD,
1214 WMI_TAG_VDEV_SET_PARAM_CMD,
1215 WMI_TAG_VDEV_INSTALL_KEY_CMD,
1216 WMI_TAG_PEER_CREATE_CMD,
1217 WMI_TAG_PEER_DELETE_CMD,
1218 WMI_TAG_PEER_FLUSH_TIDS_CMD,
1219 WMI_TAG_PEER_SET_PARAM_CMD,
1220 WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1221 WMI_TAG_VHT_RATE_SET,
1222 WMI_TAG_BCN_TMPL_CMD,
1223 WMI_TAG_PRB_TMPL_CMD,
1224 WMI_TAG_BCN_PRB_INFO,
1225 WMI_TAG_PEER_TID_ADDBA_CMD,
1226 WMI_TAG_PEER_TID_DELBA_CMD,
1227 WMI_TAG_STA_POWERSAVE_MODE_CMD,
1228 WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1229 WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1230 WMI_TAG_ROAM_SCAN_MODE,
1231 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1232 WMI_TAG_ROAM_SCAN_PERIOD,
1233 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1234 WMI_TAG_PDEV_SUSPEND_CMD,
1235 WMI_TAG_PDEV_RESUME_CMD,
1236 WMI_TAG_ADD_BCN_FILTER_CMD,
1237 WMI_TAG_RMV_BCN_FILTER_CMD,
1238 WMI_TAG_WOW_ENABLE_CMD,
1239 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1240 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1241 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1242 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1243 WMI_TAG_ARP_OFFLOAD_TUPLE,
1244 WMI_TAG_NS_OFFLOAD_TUPLE,
1245 WMI_TAG_FTM_INTG_CMD,
1246 WMI_TAG_STA_KEEPALIVE_CMD,
1247 WMI_TAG_STA_KEEPALIVE_ARP_RESPONSE,
1248 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1249 WMI_TAG_AP_PS_PEER_CMD,
1250 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1251 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1252 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1253 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1254 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1255 WMI_TAG_WOW_DEL_PATTERN_CMD,
1256 WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1257 WMI_TAG_RTT_MEASREQ_HEAD,
1258 WMI_TAG_RTT_MEASREQ_BODY,
1259 WMI_TAG_RTT_TSF_CMD,
1260 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1261 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1262 WMI_TAG_REQUEST_STATS_CMD,
1263 WMI_TAG_NLO_CONFIG_CMD,
1264 WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1265 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1266 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1267 WMI_TAG_CHATTER_SET_MODE_CMD,
1268 WMI_TAG_ECHO_CMD,
1269 WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1270 WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1271 WMI_TAG_FORCE_FW_HANG_CMD,
1272 WMI_TAG_GPIO_CONFIG_CMD,
1273 WMI_TAG_GPIO_OUTPUT_CMD,
1274 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1275 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1276 WMI_TAG_BCN_TX_HDR,
1277 WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1278 WMI_TAG_MGMT_TX_HDR,
1279 WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1280 WMI_TAG_ADDBA_SEND_CMD,
1281 WMI_TAG_DELBA_SEND_CMD,
1282 WMI_TAG_ADDBA_SETRESPONSE_CMD,
1283 WMI_TAG_SEND_SINGLEAMSDU_CMD,
1284 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1285 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1286 WMI_TAG_PDEV_SET_HT_IE_CMD,
1287 WMI_TAG_PDEV_SET_VHT_IE_CMD,
1288 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1289 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1290 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1291 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1292 WMI_TAG_PEER_MCAST_GROUP_CMD,
1293 WMI_TAG_ROAM_AP_PROFILE,
1294 WMI_TAG_AP_PROFILE,
1295 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1296 WMI_TAG_PDEV_DFS_ENABLE_CMD,
1297 WMI_TAG_PDEV_DFS_DISABLE_CMD,
1298 WMI_TAG_WOW_ADD_PATTERN_CMD,
1299 WMI_TAG_WOW_BITMAP_PATTERN_T,
1300 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1301 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1302 WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1303 WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1304 WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1305 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1306 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1307 WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1308 WMI_TAG_TXBF_CMD,
1309 WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1310 WMI_TAG_NLO_EVENT,
1311 WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1312 WMI_TAG_UPLOAD_H_HDR,
1313 WMI_TAG_CAPTURE_H_EVENT_HDR,
1314 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1315 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1316 WMI_TAG_VDEV_WMM_ADDTS_CMD,
1317 WMI_TAG_VDEV_WMM_DELTS_CMD,
1318 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1319 WMI_TAG_TDLS_SET_STATE_CMD,
1320 WMI_TAG_TDLS_PEER_UPDATE_CMD,
1321 WMI_TAG_TDLS_PEER_EVENT,
1322 WMI_TAG_TDLS_PEER_CAPABILITIES,
1323 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1324 WMI_TAG_ROAM_CHAN_LIST,
1325 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1326 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1327 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1328 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1329 WMI_TAG_BA_REQ_SSN_CMD,
1330 WMI_TAG_BA_RSP_SSN_EVENT,
1331 WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1332 WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1333 WMI_TAG_P2P_SET_OPPPS_CMD,
1334 WMI_TAG_P2P_SET_NOA_CMD,
1335 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1336 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1337 WMI_TAG_STA_SMPS_PARAM_CMD,
1338 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1339 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1340 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1341 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1342 WMI_TAG_P2P_NOA_EVENT,
1343 WMI_TAG_HB_SET_ENABLE_CMD,
1344 WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1345 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1346 WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1347 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1348 WMI_TAG_HB_IND_EVENT,
1349 WMI_TAG_TX_PAUSE_EVENT,
1350 WMI_TAG_RFKILL_EVENT,
1351 WMI_TAG_DFS_RADAR_EVENT,
1352 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1353 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1354 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1355 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1356 WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1357 WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1358 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1359 WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1360 WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1361 WMI_TAG_VDEV_PLMREQ_START_CMD,
1362 WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1363 WMI_TAG_THERMAL_MGMT_CMD,
1364 WMI_TAG_THERMAL_MGMT_EVENT,
1365 WMI_TAG_PEER_INFO_REQ_CMD,
1366 WMI_TAG_PEER_INFO_EVENT,
1367 WMI_TAG_PEER_INFO,
1368 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1369 WMI_TAG_RMC_SET_MODE_CMD,
1370 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1371 WMI_TAG_RMC_CONFIG_CMD,
1372 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1373 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1374 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1375 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1376 WMI_TAG_NAN_CMD_PARAM,
1377 WMI_TAG_NAN_EVENT_HDR,
1378 WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1379 WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1380 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1381 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1382 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1383 WMI_TAG_AGGR_STATE_TRIG_EVENT,
1384 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1385 WMI_TAG_ROAM_SCAN_CMD,
1386 WMI_TAG_REQ_STATS_EXT_CMD,
1387 WMI_TAG_STATS_EXT_EVENT,
1388 WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1389 WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1390 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1391 WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1392 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1393 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1394 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1395 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1396 WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1397 WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1398 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1399 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1400 WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1401 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1402 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1403 WMI_TAG_START_LINK_STATS_CMD,
1404 WMI_TAG_CLEAR_LINK_STATS_CMD,
1405 WMI_TAG_REQUEST_LINK_STATS_CMD,
1406 WMI_TAG_IFACE_LINK_STATS_EVENT,
1407 WMI_TAG_RADIO_LINK_STATS_EVENT,
1408 WMI_TAG_PEER_STATS_EVENT,
1409 WMI_TAG_CHANNEL_STATS,
1410 WMI_TAG_RADIO_LINK_STATS,
1411 WMI_TAG_RATE_STATS,
1412 WMI_TAG_PEER_LINK_STATS,
1413 WMI_TAG_WMM_AC_STATS,
1414 WMI_TAG_IFACE_LINK_STATS,
1415 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1416 WMI_TAG_LPI_START_SCAN_CMD,
1417 WMI_TAG_LPI_STOP_SCAN_CMD,
1418 WMI_TAG_LPI_RESULT_EVENT,
1419 WMI_TAG_PEER_STATE_EVENT,
1420 WMI_TAG_EXTSCAN_BUCKET_CMD,
1421 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1422 WMI_TAG_EXTSCAN_START_CMD,
1423 WMI_TAG_EXTSCAN_STOP_CMD,
1424 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1425 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1426 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1427 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1428 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1429 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1430 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1431 WMI_TAG_EXTSCAN_OPERATION_EVENT,
1432 WMI_TAG_EXTSCAN_START_STOP_EVENT,
1433 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1434 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1435 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1436 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1437 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1438 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1439 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1440 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1441 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1442 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1443 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1444 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1445 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1446 WMI_TAG_UNIT_TEST_CMD,
1447 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1448 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1449 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1450 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1451 WMI_TAG_ROAM_SYNCH_EVENT,
1452 WMI_TAG_ROAM_SYNCH_COMPLETE,
1453 WMI_TAG_EXTWOW_ENABLE_CMD,
1454 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1455 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1456 WMI_TAG_LPI_STATUS_EVENT,
1457 WMI_TAG_LPI_HANDOFF_EVENT,
1458 WMI_TAG_VDEV_RATE_STATS_EVENT,
1459 WMI_TAG_VDEV_RATE_HT_INFO,
1460 WMI_TAG_RIC_REQUEST,
1461 WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1462 WMI_TAG_PDEV_TEMPERATURE_EVENT,
1463 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1464 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1465 WMI_TAG_RIC_TSPEC,
1466 WMI_TAG_TPC_CHAINMASK_CONFIG,
1467 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1468 WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1469 WMI_TAG_KEY_MATERIAL,
1470 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1471 WMI_TAG_SET_LED_FLASHING_CMD,
1472 WMI_TAG_MDNS_OFFLOAD_CMD,
1473 WMI_TAG_MDNS_SET_FQDN_CMD,
1474 WMI_TAG_MDNS_SET_RESP_CMD,
1475 WMI_TAG_MDNS_GET_STATS_CMD,
1476 WMI_TAG_MDNS_STATS_EVENT,
1477 WMI_TAG_ROAM_INVOKE_CMD,
1478 WMI_TAG_PDEV_RESUME_EVENT,
1479 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1480 WMI_TAG_SAP_OFL_ENABLE_CMD,
1481 WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1482 WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1483 WMI_TAG_APFIND_CMD_PARAM,
1484 WMI_TAG_APFIND_EVENT_HDR,
1485 WMI_TAG_OCB_SET_SCHED_CMD,
1486 WMI_TAG_OCB_SET_SCHED_EVENT,
1487 WMI_TAG_OCB_SET_CONFIG_CMD,
1488 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1489 WMI_TAG_OCB_SET_UTC_TIME_CMD,
1490 WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1491 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1492 WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1493 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1494 WMI_TAG_DCC_GET_STATS_CMD,
1495 WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1496 WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1497 WMI_TAG_DCC_CLEAR_STATS_CMD,
1498 WMI_TAG_DCC_UPDATE_NDL_CMD,
1499 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1500 WMI_TAG_DCC_STATS_EVENT,
1501 WMI_TAG_OCB_CHANNEL,
1502 WMI_TAG_OCB_SCHEDULE_ELEMENT,
1503 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1504 WMI_TAG_DCC_NDL_CHAN,
1505 WMI_TAG_QOS_PARAMETER,
1506 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1507 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1508 WMI_TAG_ROAM_FILTER,
1509 WMI_TAG_PASSPOINT_CONFIG_CMD,
1510 WMI_TAG_PASSPOINT_EVENT_HDR,
1511 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1512 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1513 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1514 WMI_TAG_VDEV_TSF_REPORT_EVENT,
1515 WMI_TAG_GET_FW_MEM_DUMP,
1516 WMI_TAG_UPDATE_FW_MEM_DUMP,
1517 WMI_TAG_FW_MEM_DUMP_PARAMS,
1518 WMI_TAG_DEBUG_MESG_FLUSH,
1519 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1520 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1521 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1522 WMI_TAG_VDEV_SET_IE_CMD,
1523 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1524 WMI_TAG_RSSI_BREACH_EVENT,
1525 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1526 WMI_TAG_SOC_SET_PCL_CMD,
1527 WMI_TAG_SOC_SET_HW_MODE_CMD,
1528 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1529 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1530 WMI_TAG_VDEV_TXRX_STREAMS,
1531 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1532 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1533 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1534 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1535 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1536 WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1537 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1538 WMI_TAG_PACKET_FILTER_CONFIG,
1539 WMI_TAG_PACKET_FILTER_ENABLE,
1540 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1541 WMI_TAG_MGMT_TX_SEND_CMD,
1542 WMI_TAG_MGMT_TX_COMPL_EVENT,
1543 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1544 WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1545 WMI_TAG_LRO_INFO_CMD,
1546 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1547 WMI_TAG_SERVICE_READY_EXT_EVENT,
1548 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1549 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1550 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1551 WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1552 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1553 WMI_TAG_PEER_ASSOC_CONF_EVENT,
1554 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1555 WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1556 WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1557 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1558 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1559 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1560 WMI_TAG_SCPC_EVENT,
1561 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1562 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1563 WMI_TAG_BPF_GET_CAPABILITY_CMD,
1564 WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1565 WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1566 WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1567 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1568 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1569 WMI_TAG_VDEV_DELETE_RESP_EVENT,
1570 WMI_TAG_PEER_DELETE_RESP_EVENT,
1571 WMI_TAG_ROAM_DENSE_THRES_PARAM,
1572 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1573 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1574 WMI_TAG_VDEV_CONFIG_RATEMASK,
1575 WMI_TAG_PDEV_FIPS_CMD,
1576 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1577 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1578 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1579 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1580 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1581 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1582 WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1583 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1584 WMI_TAG_FWTEST_SET_PARAM_CMD,
1585 WMI_TAG_PEER_ATF_REQUEST,
1586 WMI_TAG_VDEV_ATF_REQUEST,
1587 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1588 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1589 WMI_TAG_INST_RSSI_STATS_RESP,
1590 WMI_TAG_MED_UTIL_REPORT_EVENT,
1591 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1592 WMI_TAG_WDS_ADDR_EVENT,
1593 WMI_TAG_PEER_RATECODE_LIST_EVENT,
1594 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1595 WMI_TAG_PDEV_TPC_EVENT,
1596 WMI_TAG_ANI_OFDM_EVENT,
1597 WMI_TAG_ANI_CCK_EVENT,
1598 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1599 WMI_TAG_PDEV_FIPS_EVENT,
1600 WMI_TAG_ATF_PEER_INFO,
1601 WMI_TAG_PDEV_GET_TPC_CMD,
1602 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1603 WMI_TAG_QBOOST_CFG_CMD,
1604 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1605 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1606 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1607 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1608 WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1609 WMI_TAG_PEER_MCS_RATE_INFO,
1610 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1611 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1612 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1613 WMI_TAG_MU_REPORT_TOTAL_MU,
1614 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1615 WMI_TAG_ROAM_SET_MBO,
1616 WMI_TAG_MIB_STATS_ENABLE_CMD,
1617 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1618 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1619 WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1620 WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1621 WMI_TAG_NDI_GET_CAP_REQ,
1622 WMI_TAG_NDP_INITIATOR_REQ,
1623 WMI_TAG_NDP_RESPONDER_REQ,
1624 WMI_TAG_NDP_END_REQ,
1625 WMI_TAG_NDI_CAP_RSP_EVENT,
1626 WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1627 WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1628 WMI_TAG_NDP_END_RSP_EVENT,
1629 WMI_TAG_NDP_INDICATION_EVENT,
1630 WMI_TAG_NDP_CONFIRM_EVENT,
1631 WMI_TAG_NDP_END_INDICATION_EVENT,
1632 WMI_TAG_VDEV_SET_QUIET_CMD,
1633 WMI_TAG_PDEV_SET_PCL_CMD,
1634 WMI_TAG_PDEV_SET_HW_MODE_CMD,
1635 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1636 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1637 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1638 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1639 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1640 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1641 WMI_TAG_COEX_CONFIG_CMD,
1642 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1643 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1644 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1645 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1646 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1647 WMI_TAG_MAC_PHY_CAPABILITIES,
1648 WMI_TAG_HW_MODE_CAPABILITIES,
1649 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1650 WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1651 WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1652 WMI_TAG_VDEV_WISA_CMD,
1653 WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1654 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1655 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1656 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1657 WMI_TAG_NDP_END_RSP_PER_NDI,
1658 WMI_TAG_PEER_BWF_REQUEST,
1659 WMI_TAG_BWF_PEER_INFO,
1660 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1661 WMI_TAG_RMC_SET_LEADER_CMD,
1662 WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1663 WMI_TAG_PER_CHAIN_RSSI_STATS,
1664 WMI_TAG_RSSI_STATS,
1665 WMI_TAG_P2P_LO_START_CMD,
1666 WMI_TAG_P2P_LO_STOP_CMD,
1667 WMI_TAG_P2P_LO_STOPPED_EVENT,
1668 WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1669 WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1670 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1671 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1672 WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1673 WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1674 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1675 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1676 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1677 WMI_TAG_TLV_BUF_LEN_PARAM,
1678 WMI_TAG_SERVICE_AVAILABLE_EVENT,
1679 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1680 WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1681 WMI_TAG_PEER_ANTDIV_INFO,
1682 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1683 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1684 WMI_TAG_MNT_FILTER_CMD,
1685 WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1686 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1687 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1688 WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1689 WMI_TAG_CHAN_CCA_STATS,
1690 WMI_TAG_PEER_SIGNAL_STATS,
1691 WMI_TAG_TX_STATS,
1692 WMI_TAG_PEER_AC_TX_STATS,
1693 WMI_TAG_RX_STATS,
1694 WMI_TAG_PEER_AC_RX_STATS,
1695 WMI_TAG_REPORT_STATS_EVENT,
1696 WMI_TAG_CHAN_CCA_STATS_THRESH,
1697 WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1698 WMI_TAG_TX_STATS_THRESH,
1699 WMI_TAG_RX_STATS_THRESH,
1700 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1701 WMI_TAG_REQUEST_WLAN_STATS_CMD,
1702 WMI_TAG_RX_AGGR_FAILURE_EVENT,
1703 WMI_TAG_RX_AGGR_FAILURE_INFO,
1704 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1705 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1706 WMI_TAG_PDEV_BAND_TO_MAC,
1707 WMI_TAG_TBTT_OFFSET_INFO,
1708 WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1709 WMI_TAG_SAR_LIMITS_CMD,
1710 WMI_TAG_SAR_LIMIT_CMD_ROW,
1711 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1712 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1713 WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1714 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1715 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1716 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1717 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1718 WMI_TAG_VENDOR_OUI,
1719 WMI_TAG_REQUEST_RCPI_CMD,
1720 WMI_TAG_UPDATE_RCPI_EVENT,
1721 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1722 WMI_TAG_PEER_STATS_INFO,
1723 WMI_TAG_PEER_STATS_INFO_EVENT,
1724 WMI_TAG_PKGID_EVENT,
1725 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1726 WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1727 WMI_TAG_REGULATORY_RULE_STRUCT,
1728 WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1729 WMI_TAG_11D_SCAN_START_CMD,
1730 WMI_TAG_11D_SCAN_STOP_CMD,
1731 WMI_TAG_11D_NEW_COUNTRY_EVENT,
1732 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1733 WMI_TAG_RADIO_CHAN_STATS,
1734 WMI_TAG_RADIO_CHAN_STATS_EVENT,
1735 WMI_TAG_ROAM_PER_CONFIG,
1736 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1737 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1738 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1739 WMI_TAG_HW_DATA_FILTER_CMD,
1740 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1741 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1742 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1743 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1744 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1745 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1746 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1747 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1748 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1749 WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1750 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1751 WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1752 WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1753 WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1754 WMI_TAG_IFACE_OFFLOAD_STATS,
1755 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1756 WMI_TAG_RSSI_CTL_EXT,
1757 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1758 WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1759 WMI_TAG_VDEV_GET_TX_POWER_CMD,
1760 WMI_TAG_VDEV_TX_POWER_EVENT,
1761 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1762 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1763 WMI_TAG_TX_SEND_PARAMS,
1764 WMI_TAG_HE_RATE_SET,
1765 WMI_TAG_CONGESTION_STATS,
1766 WMI_TAG_SET_INIT_COUNTRY_CMD,
1767 WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1768 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1769 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1770 WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1771 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1772 WMI_TAG_THERM_THROT_STATS_EVENT,
1773 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1774 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1775 WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1776 WMI_TAG_OEM_DMA_RING_CFG_REQ,
1777 WMI_TAG_OEM_DMA_RING_CFG_RSP,
1778 WMI_TAG_OEM_INDIRECT_DATA,
1779 WMI_TAG_OEM_DMA_BUF_RELEASE,
1780 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1781 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1782 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1783 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1784 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1785 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1786 WMI_TAG_UNIT_TEST_EVENT,
1787 WMI_TAG_ROAM_FILS_OFFLOAD,
1788 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1789 WMI_TAG_PMK_CACHE,
1790 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1791 WMI_TAG_ROAM_FILS_SYNCH,
1792 WMI_TAG_GTK_OFFLOAD_EXTENDED,
1793 WMI_TAG_ROAM_BG_SCAN_ROAMING,
1794 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1795 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1796 WMI_TAG_OIC_PING_HANDOFF_EVENT,
1797 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1798 WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1799 WMI_TAG_BTM_CONFIG,
1800 WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1801 WMI_TAG_WLM_CONFIG_CMD,
1802 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1803 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1804 WMI_TAG_ROAM_CND_SCORING_PARAM,
1805 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1806 WMI_TAG_VENDOR_OUI_EXT,
1807 WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1808 WMI_TAG_FD_SEND_FROM_HOST_CMD,
1809 WMI_TAG_ENABLE_FILS_CMD,
1810 WMI_TAG_HOST_SWFDA_EVENT,
1811 WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1812 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1813 WMI_TAG_STATS_PERIOD,
1814 WMI_TAG_NDL_SCHEDULE_UPDATE,
1815 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1816 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1817 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1818 WMI_TAG_SAR2_RESULT_EVENT,
1819 WMI_TAG_SAR_CAPABILITIES,
1820 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1821 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1822 WMI_TAG_DMA_RING_CAPABILITIES,
1823 WMI_TAG_DMA_RING_CFG_REQ,
1824 WMI_TAG_DMA_RING_CFG_RSP,
1825 WMI_TAG_DMA_BUF_RELEASE,
1826 WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1827 WMI_TAG_SAR_GET_LIMITS_CMD,
1828 WMI_TAG_SAR_GET_LIMITS_EVENT,
1829 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1830 WMI_TAG_OFFLOAD_11K_REPORT,
1831 WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1832 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1833 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1834 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1835 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1836 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1837 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1838 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1839 WMI_TAG_PDEV_GET_NFCAL_POWER,
1840 WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1841 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1842 WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1843 WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1844 WMI_TAG_TWT_ENABLE_CMD,
1845 WMI_TAG_TWT_DISABLE_CMD,
1846 WMI_TAG_TWT_ADD_DIALOG_CMD,
1847 WMI_TAG_TWT_DEL_DIALOG_CMD,
1848 WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1849 WMI_TAG_TWT_RESUME_DIALOG_CMD,
1850 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1851 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1852 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1853 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1854 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1855 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1856 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1857 WMI_TAG_ROAM_SCAN_STATS_EVENT,
1858 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1859 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1860 WMI_TAG_GET_TPC_POWER_CMD,
1861 WMI_TAG_GET_TPC_POWER_EVENT,
1862 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1863 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1864 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1865 WMI_TAG_MOTION_DET_START_STOP_CMD,
1866 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1867 WMI_TAG_MOTION_DET_EVENT,
1868 WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1869 WMI_TAG_NDP_TRANSPORT_IP,
1870 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1871 WMI_TAG_ESP_ESTIMATE_EVENT,
1872 WMI_TAG_NAN_HOST_CONFIG,
1873 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1874 WMI_TAG_PEER_CFR_CAPTURE_CMD,
1875 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1876 WMI_TAG_CHAN_WIDTH_PEER_LIST,
1877 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1878 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1879 WMI_TAG_PEER_EXTD2_STATS,
1880 WMI_TAG_HPCS_PULSE_START_CMD,
1881 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1882 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1883 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1884 WMI_TAG_NAN_EVENT_INFO,
1885 WMI_TAG_NDP_CHANNEL_INFO,
1886 WMI_TAG_NDP_CMD,
1887 WMI_TAG_NDP_EVENT,
1888 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1889 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1890 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344,
1891 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b,
1892 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD,
1893 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381,
1894 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1895 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
1896 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1897 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9,
1898 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT,
1899 WMI_TAG_VDEV_SET_TPC_POWER_CMD = 0x3B5,
1900 WMI_TAG_VDEV_CH_POWER_INFO,
1901 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
1902 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
1903 WMI_TAG_MAX
1904 };
1905
1906 enum wmi_tlv_service {
1907 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1908 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1909 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1910 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1911 WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1912 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1913 WMI_TLV_SERVICE_AP_UAPSD = 6,
1914 WMI_TLV_SERVICE_AP_DFS = 7,
1915 WMI_TLV_SERVICE_11AC = 8,
1916 WMI_TLV_SERVICE_BLOCKACK = 9,
1917 WMI_TLV_SERVICE_PHYERR = 10,
1918 WMI_TLV_SERVICE_BCN_FILTER = 11,
1919 WMI_TLV_SERVICE_RTT = 12,
1920 WMI_TLV_SERVICE_WOW = 13,
1921 WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1922 WMI_TLV_SERVICE_IRAM_TIDS = 15,
1923 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1924 WMI_TLV_SERVICE_NLO = 17,
1925 WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1926 WMI_TLV_SERVICE_SCAN_SCH = 19,
1927 WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1928 WMI_TLV_SERVICE_CHATTER = 21,
1929 WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1930 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1931 WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1932 WMI_TLV_SERVICE_GPIO = 25,
1933 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1934 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1935 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1936 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1937 WMI_TLV_SERVICE_TX_ENCAP = 30,
1938 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1939 WMI_TLV_SERVICE_EARLY_RX = 32,
1940 WMI_TLV_SERVICE_STA_SMPS = 33,
1941 WMI_TLV_SERVICE_FWTEST = 34,
1942 WMI_TLV_SERVICE_STA_WMMAC = 35,
1943 WMI_TLV_SERVICE_TDLS = 36,
1944 WMI_TLV_SERVICE_BURST = 37,
1945 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1946 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1947 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1948 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1949 WMI_TLV_SERVICE_WLAN_HB = 42,
1950 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1951 WMI_TLV_SERVICE_BATCH_SCAN = 44,
1952 WMI_TLV_SERVICE_QPOWER = 45,
1953 WMI_TLV_SERVICE_PLMREQ = 46,
1954 WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1955 WMI_TLV_SERVICE_RMC = 48,
1956 WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1957 WMI_TLV_SERVICE_COEX_SAR = 50,
1958 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1959 WMI_TLV_SERVICE_NAN = 52,
1960 WMI_TLV_SERVICE_L1SS_STAT = 53,
1961 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1962 WMI_TLV_SERVICE_OBSS_SCAN = 55,
1963 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1964 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1965 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1966 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1967 WMI_TLV_SERVICE_LPASS = 60,
1968 WMI_TLV_SERVICE_EXTSCAN = 61,
1969 WMI_TLV_SERVICE_D0WOW = 62,
1970 WMI_TLV_SERVICE_HSOFFLOAD = 63,
1971 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
1972 WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
1973 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
1974 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
1975 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
1976 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
1977 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
1978 WMI_TLV_SERVICE_OCB = 71,
1979 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
1980 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
1981 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
1982 WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
1983 WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
1984 WMI_TLV_SERVICE_EXT_MSG = 77,
1985 WMI_TLV_SERVICE_MAWC = 78,
1986 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
1987 WMI_TLV_SERVICE_EGAP = 80,
1988 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
1989 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
1990 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
1991 WMI_TLV_SERVICE_ATF = 84,
1992 WMI_TLV_SERVICE_COEX_GPIO = 85,
1993 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
1994 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
1995 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
1996 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
1997 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
1998 WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
1999 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
2000 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
2001 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
2002 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
2003 WMI_TLV_SERVICE_NAN_DATA = 96,
2004 WMI_TLV_SERVICE_NAN_RTT = 97,
2005 WMI_TLV_SERVICE_11AX = 98,
2006 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
2007 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
2008 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
2009 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
2010 WMI_TLV_SERVICE_MESH_11S = 103,
2011 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
2012 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
2013 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
2014 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
2015 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
2016 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
2017 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
2018 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
2019 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
2020 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
2021 WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
2022 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
2023 WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
2024 WMI_TLV_SERVICE_REGULATORY_DB = 117,
2025 WMI_TLV_SERVICE_11D_OFFLOAD = 118,
2026 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
2027 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
2028 WMI_TLV_SERVICE_PKT_ROUTING = 121,
2029 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
2030 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
2031 WMI_TLV_SERVICE_8SS_TX_BFEE = 124,
2032 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
2033 WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
2034 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
2035
2036 /* The first 128 bits */
2037 WMI_MAX_SERVICE = 128,
2038
2039 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
2040 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
2041 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
2042 WMI_TLV_SERVICE_FILS_SUPPORT = 131,
2043 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
2044 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
2045 WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
2046 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
2047 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
2048 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
2049 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
2050 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
2051 WMI_TLV_SERVICE_THERM_THROT = 140,
2052 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
2053 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
2054 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
2055 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
2056 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
2057 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
2058 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
2059 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
2060 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
2061 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
2062 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
2063 WMI_TLV_SERVICE_STA_TWT = 152,
2064 WMI_TLV_SERVICE_AP_TWT = 153,
2065 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
2066 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
2067 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
2068 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
2069 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
2070 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
2071 WMI_TLV_SERVICE_MOTION_DET = 160,
2072 WMI_TLV_SERVICE_INFRA_MBSSID = 161,
2073 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
2074 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
2075 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
2076 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
2077 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
2078 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
2079 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
2080 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
2081 WMI_TLV_SERVICE_ESP_SUPPORT = 170,
2082 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
2083 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
2084 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
2085 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
2086 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
2087 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
2088 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
2089 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
2090 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
2091 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
2092 WMI_TLV_SERVICE_FETCH_TX_PN = 181,
2093 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
2094 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
2095 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
2096 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
2097 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
2098 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
2099 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
2100 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
2101 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
2102 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
2103 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
2104 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
2105 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
2106 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
2107 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
2108 WMI_TLV_SERVICE_VOW_ENABLE = 197,
2109 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
2110 WMI_TLV_SERVICE_BROADCAST_TWT = 199,
2111 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
2112 WMI_TLV_SERVICE_PS_TDCC = 201,
2113 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202,
2114 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
2115 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
2116 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
2117 WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
2118 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
2119 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
2120 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
2121 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
2122 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
2123 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
2124 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
2125 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
2126 WMI_TLV_SERVICE_EXT2_MSG = 220,
2127 WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246,
2128 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
2129 WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253,
2130 WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263,
2131
2132 /* The second 128 bits */
2133 WMI_MAX_EXT_SERVICE = 256,
2134 WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
2135 WMI_TLV_SERVICE_EXT_TPC_REG_SUPPORT = 280,
2136 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
2137 WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
2138 WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357,
2139
2140 /* The third 128 bits */
2141 WMI_MAX_EXT2_SERVICE = 384
2142 };
2143
2144 enum {
2145 WMI_SMPS_FORCED_MODE_NONE = 0,
2146 WMI_SMPS_FORCED_MODE_DISABLED,
2147 WMI_SMPS_FORCED_MODE_STATIC,
2148 WMI_SMPS_FORCED_MODE_DYNAMIC
2149 };
2150
2151 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0
2152 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1
2153 #define WMI_NUM_SUPPORTED_BAND_MAX 2
2154
2155 #define WMI_PEER_MIMO_PS_STATE 0x1
2156 #define WMI_PEER_AMPDU 0x2
2157 #define WMI_PEER_AUTHORIZE 0x3
2158 #define WMI_PEER_CHWIDTH 0x4
2159 #define WMI_PEER_NSS 0x5
2160 #define WMI_PEER_USE_4ADDR 0x6
2161 #define WMI_PEER_MEMBERSHIP 0x7
2162 #define WMI_PEER_USERPOS 0x8
2163 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9
2164 #define WMI_PEER_TX_FAIL_CNT_THR 0xA
2165 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB
2166 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC
2167 #define WMI_PEER_PHYMODE 0xD
2168 #define WMI_PEER_USE_FIXED_PWR 0xE
2169 #define WMI_PEER_PARAM_FIXED_RATE 0xF
2170 #define WMI_PEER_SET_MU_WHITELIST 0x10
2171 #define WMI_PEER_SET_MAX_TX_RATE 0x11
2172 #define WMI_PEER_SET_MIN_TX_RATE 0x12
2173 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13
2174
2175 /* slot time long */
2176 #define WMI_VDEV_SLOT_TIME_LONG 0x1
2177 /* slot time short */
2178 #define WMI_VDEV_SLOT_TIME_SHORT 0x2
2179 /* preablbe long */
2180 #define WMI_VDEV_PREAMBLE_LONG 0x1
2181 /* preablbe short */
2182 #define WMI_VDEV_PREAMBLE_SHORT 0x2
2183
2184 enum wmi_peer_smps_state {
2185 WMI_PEER_SMPS_PS_NONE = 0x0,
2186 WMI_PEER_SMPS_STATIC = 0x1,
2187 WMI_PEER_SMPS_DYNAMIC = 0x2
2188 };
2189
2190 enum wmi_peer_chwidth {
2191 WMI_PEER_CHWIDTH_20MHZ = 0,
2192 WMI_PEER_CHWIDTH_40MHZ = 1,
2193 WMI_PEER_CHWIDTH_80MHZ = 2,
2194 WMI_PEER_CHWIDTH_160MHZ = 3,
2195 };
2196
2197 enum wmi_beacon_gen_mode {
2198 WMI_BEACON_STAGGERED_MODE = 0,
2199 WMI_BEACON_BURST_MODE = 1
2200 };
2201
2202 enum wmi_direct_buffer_module {
2203 WMI_DIRECT_BUF_SPECTRAL = 0,
2204 WMI_DIRECT_BUF_CFR = 1,
2205
2206 /* keep it last */
2207 WMI_DIRECT_BUF_MAX
2208 };
2209
2210 /* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext
2211 * event
2212 * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss
2213 * of 80MHz
2214 * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss
2215 * of 80MHz
2216 * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz
2217 * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max
2218 * nss of 80MHz
2219 */
2220
2221 enum wmi_nss_ratio {
2222 WMI_NSS_RATIO_1BY2_NSS = 0x0,
2223 WMI_NSS_RATIO_3BY4_NSS = 0x1,
2224 WMI_NSS_RATIO_1_NSS = 0x2,
2225 WMI_NSS_RATIO_2_NSS = 0x3,
2226 };
2227
2228 enum wmi_dtim_policy {
2229 WMI_DTIM_POLICY_IGNORE = 1,
2230 WMI_DTIM_POLICY_NORMAL = 2,
2231 WMI_DTIM_POLICY_STICK = 3,
2232 WMI_DTIM_POLICY_AUTO = 4,
2233 };
2234
2235 struct wmi_host_pdev_band_to_mac {
2236 u32 pdev_id;
2237 u32 start_freq;
2238 u32 end_freq;
2239 };
2240
2241 struct ath11k_ppe_threshold {
2242 u32 numss_m1;
2243 u32 ru_bit_mask;
2244 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2245 };
2246
2247 struct ath11k_service_ext_param {
2248 u32 default_conc_scan_config_bits;
2249 u32 default_fw_config_bits;
2250 struct ath11k_ppe_threshold ppet;
2251 u32 he_cap_info;
2252 u32 mpdu_density;
2253 u32 max_bssid_rx_filters;
2254 u32 num_hw_modes;
2255 u32 num_phy;
2256 };
2257
2258 struct ath11k_hw_mode_caps {
2259 u32 hw_mode_id;
2260 u32 phy_id_map;
2261 u32 hw_mode_config_type;
2262 };
2263
2264 #define PSOC_HOST_MAX_PHY_SIZE (3)
2265 #define ATH11K_11B_SUPPORT BIT(0)
2266 #define ATH11K_11G_SUPPORT BIT(1)
2267 #define ATH11K_11A_SUPPORT BIT(2)
2268 #define ATH11K_11N_SUPPORT BIT(3)
2269 #define ATH11K_11AC_SUPPORT BIT(4)
2270 #define ATH11K_11AX_SUPPORT BIT(5)
2271
2272 struct ath11k_hal_reg_capabilities_ext {
2273 u32 phy_id;
2274 u32 eeprom_reg_domain;
2275 u32 eeprom_reg_domain_ext;
2276 u32 regcap1;
2277 u32 regcap2;
2278 u32 wireless_modes;
2279 u32 low_2ghz_chan;
2280 u32 high_2ghz_chan;
2281 u32 low_5ghz_chan;
2282 u32 high_5ghz_chan;
2283 };
2284
2285 #define WMI_HOST_MAX_PDEV 3
2286
2287 struct wlan_host_mem_chunk {
2288 u32 tlv_header;
2289 u32 req_id;
2290 u32 ptr;
2291 u32 size;
2292 } __packed;
2293
2294 struct wmi_host_mem_chunk {
2295 void *vaddr;
2296 dma_addr_t paddr;
2297 u32 len;
2298 u32 req_id;
2299 };
2300
2301 struct wmi_init_cmd_param {
2302 u32 tlv_header;
2303 struct target_resource_config *res_cfg;
2304 u8 num_mem_chunks;
2305 struct wmi_host_mem_chunk *mem_chunks;
2306 u32 hw_mode_id;
2307 u32 num_band_to_mac;
2308 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
2309 };
2310
2311 struct wmi_pdev_band_to_mac {
2312 u32 tlv_header;
2313 u32 pdev_id;
2314 u32 start_freq;
2315 u32 end_freq;
2316 } __packed;
2317
2318 struct wmi_pdev_set_hw_mode_cmd_param {
2319 u32 tlv_header;
2320 u32 pdev_id;
2321 u32 hw_mode_index;
2322 u32 num_band_to_mac;
2323 } __packed;
2324
2325 struct wmi_ppe_threshold {
2326 u32 numss_m1; /** NSS - 1*/
2327 union {
2328 u32 ru_count;
2329 u32 ru_mask;
2330 } __packed;
2331 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2332 } __packed;
2333
2334 #define HW_BD_INFO_SIZE 5
2335
2336 struct wmi_abi_version {
2337 u32 abi_version_0;
2338 u32 abi_version_1;
2339 u32 abi_version_ns_0;
2340 u32 abi_version_ns_1;
2341 u32 abi_version_ns_2;
2342 u32 abi_version_ns_3;
2343 } __packed;
2344
2345 struct wmi_init_cmd {
2346 u32 tlv_header;
2347 struct wmi_abi_version host_abi_vers;
2348 u32 num_host_mem_chunks;
2349 } __packed;
2350
2351 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
2352 #define WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET BIT(9)
2353 #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
2354
2355 #define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4
2356
2357 struct wmi_resource_config {
2358 u32 tlv_header;
2359 u32 num_vdevs;
2360 u32 num_peers;
2361 u32 num_offload_peers;
2362 u32 num_offload_reorder_buffs;
2363 u32 num_peer_keys;
2364 u32 num_tids;
2365 u32 ast_skid_limit;
2366 u32 tx_chain_mask;
2367 u32 rx_chain_mask;
2368 u32 rx_timeout_pri[4];
2369 u32 rx_decap_mode;
2370 u32 scan_max_pending_req;
2371 u32 bmiss_offload_max_vdev;
2372 u32 roam_offload_max_vdev;
2373 u32 roam_offload_max_ap_profiles;
2374 u32 num_mcast_groups;
2375 u32 num_mcast_table_elems;
2376 u32 mcast2ucast_mode;
2377 u32 tx_dbg_log_size;
2378 u32 num_wds_entries;
2379 u32 dma_burst_size;
2380 u32 mac_aggr_delim;
2381 u32 rx_skip_defrag_timeout_dup_detection_check;
2382 u32 vow_config;
2383 u32 gtk_offload_max_vdev;
2384 u32 num_msdu_desc;
2385 u32 max_frag_entries;
2386 u32 num_tdls_vdevs;
2387 u32 num_tdls_conn_table_entries;
2388 u32 beacon_tx_offload_max_vdev;
2389 u32 num_multicast_filter_entries;
2390 u32 num_wow_filters;
2391 u32 num_keep_alive_pattern;
2392 u32 keep_alive_pattern_size;
2393 u32 max_tdls_concurrent_sleep_sta;
2394 u32 max_tdls_concurrent_buffer_sta;
2395 u32 wmi_send_separate;
2396 u32 num_ocb_vdevs;
2397 u32 num_ocb_channels;
2398 u32 num_ocb_schedules;
2399 u32 flag1;
2400 u32 smart_ant_cap;
2401 u32 bk_minfree;
2402 u32 be_minfree;
2403 u32 vi_minfree;
2404 u32 vo_minfree;
2405 u32 alloc_frag_desc_for_data_pkt;
2406 u32 num_ns_ext_tuples_cfg;
2407 u32 bpf_instruction_size;
2408 u32 max_bssid_rx_filters;
2409 u32 use_pdev_id;
2410 u32 max_num_dbs_scan_duty_cycle;
2411 u32 max_num_group_keys;
2412 u32 peer_map_unmap_v2_support;
2413 u32 sched_params;
2414 u32 twt_ap_pdev_count;
2415 u32 twt_ap_sta_count;
2416 u32 max_nlo_ssids;
2417 u32 num_pkt_filters;
2418 u32 num_max_sta_vdevs;
2419 u32 max_bssid_indicator;
2420 u32 ul_resp_config;
2421 u32 msdu_flow_override_config0;
2422 u32 msdu_flow_override_config1;
2423 u32 flags2;
2424 u32 host_service_flags;
2425 u32 max_rnr_neighbours;
2426 u32 ema_max_vap_cnt;
2427 u32 ema_max_profile_period;
2428 } __packed;
2429
2430 struct wmi_service_ready_event {
2431 u32 fw_build_vers;
2432 struct wmi_abi_version fw_abi_vers;
2433 u32 phy_capability;
2434 u32 max_frag_entry;
2435 u32 num_rf_chains;
2436 u32 ht_cap_info;
2437 u32 vht_cap_info;
2438 u32 vht_supp_mcs;
2439 u32 hw_min_tx_power;
2440 u32 hw_max_tx_power;
2441 u32 sys_cap_info;
2442 u32 min_pkt_size_enable;
2443 u32 max_bcn_ie_size;
2444 u32 num_mem_reqs;
2445 u32 max_num_scan_channels;
2446 u32 hw_bd_id;
2447 u32 hw_bd_info[HW_BD_INFO_SIZE];
2448 u32 max_supported_macs;
2449 u32 wmi_fw_sub_feat_caps;
2450 u32 num_dbs_hw_modes;
2451 /* txrx_chainmask
2452 * [7:0] - 2G band tx chain mask
2453 * [15:8] - 2G band rx chain mask
2454 * [23:16] - 5G band tx chain mask
2455 * [31:24] - 5G band rx chain mask
2456 */
2457 u32 txrx_chainmask;
2458 u32 default_dbs_hw_mode_index;
2459 u32 num_msdu_desc;
2460 } __packed;
2461
2462 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2463
2464 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2465 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2466 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2467 #define WMI_SERVICE_BITS_IN_SIZE32 4
2468
2469 struct wmi_service_ready_ext_event {
2470 u32 default_conc_scan_config_bits;
2471 u32 default_fw_config_bits;
2472 struct wmi_ppe_threshold ppet;
2473 u32 he_cap_info;
2474 u32 mpdu_density;
2475 u32 max_bssid_rx_filters;
2476 u32 fw_build_vers_ext;
2477 u32 max_nlo_ssids;
2478 u32 max_bssid_indicator;
2479 u32 he_cap_info_ext;
2480 } __packed;
2481
2482 struct wmi_soc_mac_phy_hw_mode_caps {
2483 u32 num_hw_modes;
2484 u32 num_chainmask_tables;
2485 } __packed;
2486
2487 struct wmi_hw_mode_capabilities {
2488 u32 tlv_header;
2489 u32 hw_mode_id;
2490 u32 phy_id_map;
2491 u32 hw_mode_config_type;
2492 } __packed;
2493
2494 #define WMI_MAX_HECAP_PHY_SIZE (3)
2495 #define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS BIT(0)
2496 #define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \
2497 FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val)
2498 #define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1)
2499 #define WMI_NSS_RATIO_INFO_GET(_val) \
2500 FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val)
2501
2502 struct wmi_mac_phy_capabilities {
2503 u32 hw_mode_id;
2504 u32 pdev_id;
2505 u32 phy_id;
2506 u32 supported_flags;
2507 u32 supported_bands;
2508 u32 ampdu_density;
2509 u32 max_bw_supported_2g;
2510 u32 ht_cap_info_2g;
2511 u32 vht_cap_info_2g;
2512 u32 vht_supp_mcs_2g;
2513 u32 he_cap_info_2g;
2514 u32 he_supp_mcs_2g;
2515 u32 tx_chain_mask_2g;
2516 u32 rx_chain_mask_2g;
2517 u32 max_bw_supported_5g;
2518 u32 ht_cap_info_5g;
2519 u32 vht_cap_info_5g;
2520 u32 vht_supp_mcs_5g;
2521 u32 he_cap_info_5g;
2522 u32 he_supp_mcs_5g;
2523 u32 tx_chain_mask_5g;
2524 u32 rx_chain_mask_5g;
2525 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2526 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2527 struct wmi_ppe_threshold he_ppet2g;
2528 struct wmi_ppe_threshold he_ppet5g;
2529 u32 chainmask_table_id;
2530 u32 lmac_id;
2531 u32 he_cap_info_2g_ext;
2532 u32 he_cap_info_5g_ext;
2533 u32 he_cap_info_internal;
2534 u32 wireless_modes;
2535 u32 low_2ghz_chan_freq;
2536 u32 high_2ghz_chan_freq;
2537 u32 low_5ghz_chan_freq;
2538 u32 high_5ghz_chan_freq;
2539 u32 nss_ratio;
2540 } __packed;
2541
2542 struct wmi_hal_reg_capabilities_ext {
2543 u32 tlv_header;
2544 u32 phy_id;
2545 u32 eeprom_reg_domain;
2546 u32 eeprom_reg_domain_ext;
2547 u32 regcap1;
2548 u32 regcap2;
2549 u32 wireless_modes;
2550 u32 low_2ghz_chan;
2551 u32 high_2ghz_chan;
2552 u32 low_5ghz_chan;
2553 u32 high_5ghz_chan;
2554 } __packed;
2555
2556 struct wmi_soc_hal_reg_capabilities {
2557 u32 num_phy;
2558 } __packed;
2559
2560 /* 2 word representation of MAC addr */
2561 struct wmi_mac_addr {
2562 union {
2563 u8 addr[6];
2564 struct {
2565 u32 word0;
2566 u32 word1;
2567 } __packed;
2568 } __packed;
2569 } __packed;
2570
2571 struct wmi_dma_ring_capabilities {
2572 u32 tlv_header;
2573 u32 pdev_id;
2574 u32 module_id;
2575 u32 min_elem;
2576 u32 min_buf_sz;
2577 u32 min_buf_align;
2578 } __packed;
2579
2580 struct wmi_ready_event_min {
2581 struct wmi_abi_version fw_abi_vers;
2582 struct wmi_mac_addr mac_addr;
2583 u32 status;
2584 u32 num_dscp_table;
2585 u32 num_extra_mac_addr;
2586 u32 num_total_peers;
2587 u32 num_extra_peers;
2588 } __packed;
2589
2590 struct wmi_ready_event {
2591 struct wmi_ready_event_min ready_event_min;
2592 u32 max_ast_index;
2593 u32 pktlog_defs_checksum;
2594 } __packed;
2595
2596 struct wmi_service_available_event {
2597 u32 wmi_service_segment_offset;
2598 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2599 } __packed;
2600
2601 struct ath11k_pdev_wmi {
2602 struct ath11k_wmi_base *wmi_ab;
2603 enum ath11k_htc_ep_id eid;
2604 u32 rx_decap_mode;
2605 wait_queue_head_t tx_ce_desc_wq;
2606 };
2607
2608 struct vdev_create_params {
2609 u8 if_id;
2610 u32 type;
2611 u32 subtype;
2612 struct {
2613 u8 tx;
2614 u8 rx;
2615 } chains[NUM_NL80211_BANDS];
2616 u32 pdev_id;
2617 u32 mbssid_flags;
2618 u32 mbssid_tx_vdev_id;
2619 };
2620
2621 struct wmi_vdev_create_cmd {
2622 u32 tlv_header;
2623 u32 vdev_id;
2624 u32 vdev_type;
2625 u32 vdev_subtype;
2626 struct wmi_mac_addr vdev_macaddr;
2627 u32 num_cfg_txrx_streams;
2628 u32 pdev_id;
2629 u32 mbssid_flags;
2630 u32 mbssid_tx_vdev_id;
2631 } __packed;
2632
2633 struct wmi_vdev_txrx_streams {
2634 u32 tlv_header;
2635 u32 band;
2636 u32 supported_tx_streams;
2637 u32 supported_rx_streams;
2638 } __packed;
2639
2640 struct wmi_vdev_delete_cmd {
2641 u32 tlv_header;
2642 u32 vdev_id;
2643 } __packed;
2644
2645 struct wmi_vdev_up_cmd {
2646 u32 tlv_header;
2647 u32 vdev_id;
2648 u32 vdev_assoc_id;
2649 struct wmi_mac_addr vdev_bssid;
2650 struct wmi_mac_addr tx_vdev_bssid;
2651 u32 nontx_profile_idx;
2652 u32 nontx_profile_cnt;
2653 } __packed;
2654
2655 struct wmi_vdev_stop_cmd {
2656 u32 tlv_header;
2657 u32 vdev_id;
2658 } __packed;
2659
2660 struct wmi_vdev_down_cmd {
2661 u32 tlv_header;
2662 u32 vdev_id;
2663 } __packed;
2664
2665 #define WMI_VDEV_START_HIDDEN_SSID BIT(0)
2666 #define WMI_VDEV_START_PMF_ENABLED BIT(1)
2667 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2668 #define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4)
2669
2670 struct wmi_ssid {
2671 u32 ssid_len;
2672 u32 ssid[8];
2673 } __packed;
2674
2675 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
2676
2677 struct wmi_vdev_start_request_cmd {
2678 u32 tlv_header;
2679 u32 vdev_id;
2680 u32 requestor_id;
2681 u32 beacon_interval;
2682 u32 dtim_period;
2683 u32 flags;
2684 struct wmi_ssid ssid;
2685 u32 bcn_tx_rate;
2686 u32 bcn_txpower;
2687 u32 num_noa_descriptors;
2688 u32 disable_hw_ack;
2689 u32 preferred_tx_streams;
2690 u32 preferred_rx_streams;
2691 u32 he_ops;
2692 u32 cac_duration_ms;
2693 u32 regdomain;
2694 u32 min_data_rate;
2695 u32 mbssid_flags;
2696 u32 mbssid_tx_vdev_id;
2697 } __packed;
2698
2699 #define MGMT_TX_DL_FRM_LEN 64
2700 #define WMI_MAC_MAX_SSID_LENGTH 32
2701 struct mac_ssid {
2702 u8 length;
2703 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
2704 } __packed;
2705
2706 struct wmi_p2p_noa_descriptor {
2707 u32 type_count;
2708 u32 duration;
2709 u32 interval;
2710 u32 start_time;
2711 };
2712
2713 struct channel_param {
2714 u8 chan_id;
2715 u8 pwr;
2716 u32 mhz;
2717 u32 half_rate:1,
2718 quarter_rate:1,
2719 dfs_set:1,
2720 dfs_set_cfreq2:1,
2721 is_chan_passive:1,
2722 allow_ht:1,
2723 allow_vht:1,
2724 allow_he:1,
2725 set_agile:1,
2726 psc_channel:1;
2727 u32 phy_mode;
2728 u32 cfreq1;
2729 u32 cfreq2;
2730 char maxpower;
2731 char minpower;
2732 char maxregpower;
2733 u8 antennamax;
2734 u8 reg_class_id;
2735 } __packed;
2736
2737 enum wmi_phy_mode {
2738 MODE_11A = 0,
2739 MODE_11G = 1, /* 11b/g Mode */
2740 MODE_11B = 2, /* 11b Mode */
2741 MODE_11GONLY = 3, /* 11g only Mode */
2742 MODE_11NA_HT20 = 4,
2743 MODE_11NG_HT20 = 5,
2744 MODE_11NA_HT40 = 6,
2745 MODE_11NG_HT40 = 7,
2746 MODE_11AC_VHT20 = 8,
2747 MODE_11AC_VHT40 = 9,
2748 MODE_11AC_VHT80 = 10,
2749 MODE_11AC_VHT20_2G = 11,
2750 MODE_11AC_VHT40_2G = 12,
2751 MODE_11AC_VHT80_2G = 13,
2752 MODE_11AC_VHT80_80 = 14,
2753 MODE_11AC_VHT160 = 15,
2754 MODE_11AX_HE20 = 16,
2755 MODE_11AX_HE40 = 17,
2756 MODE_11AX_HE80 = 18,
2757 MODE_11AX_HE80_80 = 19,
2758 MODE_11AX_HE160 = 20,
2759 MODE_11AX_HE20_2G = 21,
2760 MODE_11AX_HE40_2G = 22,
2761 MODE_11AX_HE80_2G = 23,
2762 MODE_UNKNOWN = 24,
2763 MODE_MAX = 24
2764 };
2765
ath11k_wmi_phymode_str(enum wmi_phy_mode mode)2766 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
2767 {
2768 switch (mode) {
2769 case MODE_11A:
2770 return "11a";
2771 case MODE_11G:
2772 return "11g";
2773 case MODE_11B:
2774 return "11b";
2775 case MODE_11GONLY:
2776 return "11gonly";
2777 case MODE_11NA_HT20:
2778 return "11na-ht20";
2779 case MODE_11NG_HT20:
2780 return "11ng-ht20";
2781 case MODE_11NA_HT40:
2782 return "11na-ht40";
2783 case MODE_11NG_HT40:
2784 return "11ng-ht40";
2785 case MODE_11AC_VHT20:
2786 return "11ac-vht20";
2787 case MODE_11AC_VHT40:
2788 return "11ac-vht40";
2789 case MODE_11AC_VHT80:
2790 return "11ac-vht80";
2791 case MODE_11AC_VHT160:
2792 return "11ac-vht160";
2793 case MODE_11AC_VHT80_80:
2794 return "11ac-vht80+80";
2795 case MODE_11AC_VHT20_2G:
2796 return "11ac-vht20-2g";
2797 case MODE_11AC_VHT40_2G:
2798 return "11ac-vht40-2g";
2799 case MODE_11AC_VHT80_2G:
2800 return "11ac-vht80-2g";
2801 case MODE_11AX_HE20:
2802 return "11ax-he20";
2803 case MODE_11AX_HE40:
2804 return "11ax-he40";
2805 case MODE_11AX_HE80:
2806 return "11ax-he80";
2807 case MODE_11AX_HE80_80:
2808 return "11ax-he80+80";
2809 case MODE_11AX_HE160:
2810 return "11ax-he160";
2811 case MODE_11AX_HE20_2G:
2812 return "11ax-he20-2g";
2813 case MODE_11AX_HE40_2G:
2814 return "11ax-he40-2g";
2815 case MODE_11AX_HE80_2G:
2816 return "11ax-he80-2g";
2817 case MODE_UNKNOWN:
2818 /* skip */
2819 break;
2820
2821 /* no default handler to allow compiler to check that the
2822 * enum is fully handled
2823 */
2824 }
2825
2826 return "<unknown>";
2827 }
2828
2829 struct wmi_channel_arg {
2830 u32 freq;
2831 u32 band_center_freq1;
2832 u32 band_center_freq2;
2833 bool passive;
2834 bool allow_ibss;
2835 bool allow_ht;
2836 bool allow_vht;
2837 bool ht40plus;
2838 bool chan_radar;
2839 bool freq2_radar;
2840 bool allow_he;
2841 u32 min_power;
2842 u32 max_power;
2843 u32 max_reg_power;
2844 u32 max_antenna_gain;
2845 enum wmi_phy_mode mode;
2846 };
2847
2848 struct wmi_vdev_start_req_arg {
2849 u32 vdev_id;
2850 struct wmi_channel_arg channel;
2851 u32 bcn_intval;
2852 u32 dtim_period;
2853 u8 *ssid;
2854 u32 ssid_len;
2855 u32 bcn_tx_rate;
2856 u32 bcn_tx_power;
2857 bool disable_hw_ack;
2858 bool hidden_ssid;
2859 bool pmf_enabled;
2860 u32 he_ops;
2861 u32 cac_duration_ms;
2862 u32 regdomain;
2863 u32 pref_rx_streams;
2864 u32 pref_tx_streams;
2865 u32 num_noa_descriptors;
2866 u32 min_data_rate;
2867 u32 mbssid_flags;
2868 u32 mbssid_tx_vdev_id;
2869 };
2870
2871 struct peer_create_params {
2872 const u8 *peer_addr;
2873 u32 peer_type;
2874 u32 vdev_id;
2875 };
2876
2877 struct peer_delete_params {
2878 u8 vdev_id;
2879 };
2880
2881 struct peer_flush_params {
2882 u32 peer_tid_bitmap;
2883 u8 vdev_id;
2884 };
2885
2886 struct pdev_set_regdomain_params {
2887 u16 current_rd_in_use;
2888 u16 current_rd_2g;
2889 u16 current_rd_5g;
2890 u32 ctl_2g;
2891 u32 ctl_5g;
2892 u8 dfs_domain;
2893 u32 pdev_id;
2894 };
2895
2896 struct rx_reorder_queue_remove_params {
2897 u8 *peer_macaddr;
2898 u16 vdev_id;
2899 u32 peer_tid_bitmap;
2900 };
2901
2902 #define WMI_HOST_PDEV_ID_SOC 0xFF
2903 #define WMI_HOST_PDEV_ID_0 0
2904 #define WMI_HOST_PDEV_ID_1 1
2905 #define WMI_HOST_PDEV_ID_2 2
2906
2907 #define WMI_PDEV_ID_SOC 0
2908 #define WMI_PDEV_ID_1ST 1
2909 #define WMI_PDEV_ID_2ND 2
2910 #define WMI_PDEV_ID_3RD 3
2911
2912 /* Freq units in MHz */
2913 #define REG_RULE_START_FREQ 0x0000ffff
2914 #define REG_RULE_END_FREQ 0xffff0000
2915 #define REG_RULE_FLAGS 0x0000ffff
2916 #define REG_RULE_MAX_BW 0x0000ffff
2917 #define REG_RULE_REG_PWR 0x00ff0000
2918 #define REG_RULE_ANT_GAIN 0xff000000
2919 #define REG_RULE_PSD_INFO BIT(0)
2920 #define REG_RULE_PSD_EIRP 0xff0000
2921
2922 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2923 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2924 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2925 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2926
2927 #define HE_PHYCAP_BYTE_0 0
2928 #define HE_PHYCAP_BYTE_1 1
2929 #define HE_PHYCAP_BYTE_2 2
2930 #define HE_PHYCAP_BYTE_3 3
2931 #define HE_PHYCAP_BYTE_4 4
2932
2933 #define HECAP_PHY_SU_BFER BIT(7)
2934 #define HECAP_PHY_SU_BFEE BIT(0)
2935 #define HECAP_PHY_MU_BFER BIT(1)
2936 #define HECAP_PHY_UL_MUMIMO BIT(6)
2937 #define HECAP_PHY_UL_MUOFDMA BIT(7)
2938
2939 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2940 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3])
2941
2942 #define HECAP_PHY_SUBFME_GET(hecap_phy) \
2943 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4])
2944
2945 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2946 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4])
2947
2948 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2949 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2])
2950
2951 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2952 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2])
2953
2954 #define HE_MODE_SU_TX_BFEE BIT(0)
2955 #define HE_MODE_SU_TX_BFER BIT(1)
2956 #define HE_MODE_MU_TX_BFEE BIT(2)
2957 #define HE_MODE_MU_TX_BFER BIT(3)
2958 #define HE_MODE_DL_OFDMA BIT(4)
2959 #define HE_MODE_UL_OFDMA BIT(5)
2960 #define HE_MODE_UL_MUMIMO BIT(6)
2961
2962 #define HE_DL_MUOFDMA_ENABLE 1
2963 #define HE_UL_MUOFDMA_ENABLE 1
2964 #define HE_DL_MUMIMO_ENABLE 1
2965 #define HE_UL_MUMIMO_ENABLE 1
2966 #define HE_MU_BFEE_ENABLE 1
2967 #define HE_SU_BFEE_ENABLE 1
2968 #define HE_MU_BFER_ENABLE 1
2969 #define HE_SU_BFER_ENABLE 1
2970
2971 #define HE_VHT_SOUNDING_MODE_ENABLE 1
2972 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1
2973 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1
2974
2975 /* HE or VHT Sounding */
2976 #define HE_VHT_SOUNDING_MODE BIT(0)
2977 /* SU or MU Sounding */
2978 #define HE_SU_MU_SOUNDING_MODE BIT(2)
2979 /* Trig or Non-Trig Sounding */
2980 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3)
2981
2982 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4
2983 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
2984 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8
2985 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700
2986
2987 struct pdev_params {
2988 u32 param_id;
2989 u32 param_value;
2990 };
2991
2992 enum wmi_peer_type {
2993 WMI_PEER_TYPE_DEFAULT = 0,
2994 WMI_PEER_TYPE_BSS = 1,
2995 WMI_PEER_TYPE_TDLS = 2,
2996 };
2997
2998 struct wmi_peer_create_cmd {
2999 u32 tlv_header;
3000 u32 vdev_id;
3001 struct wmi_mac_addr peer_macaddr;
3002 u32 peer_type;
3003 } __packed;
3004
3005 struct wmi_peer_delete_cmd {
3006 u32 tlv_header;
3007 u32 vdev_id;
3008 struct wmi_mac_addr peer_macaddr;
3009 } __packed;
3010
3011 struct wmi_peer_reorder_queue_setup_cmd {
3012 u32 tlv_header;
3013 u32 vdev_id;
3014 struct wmi_mac_addr peer_macaddr;
3015 u32 tid;
3016 u32 queue_ptr_lo;
3017 u32 queue_ptr_hi;
3018 u32 queue_no;
3019 u32 ba_window_size_valid;
3020 u32 ba_window_size;
3021 } __packed;
3022
3023 struct wmi_peer_reorder_queue_remove_cmd {
3024 u32 tlv_header;
3025 u32 vdev_id;
3026 struct wmi_mac_addr peer_macaddr;
3027 u32 tid_mask;
3028 } __packed;
3029
3030 struct gpio_config_params {
3031 u32 gpio_num;
3032 u32 input;
3033 u32 pull_type;
3034 u32 intr_mode;
3035 };
3036
3037 enum wmi_gpio_type {
3038 WMI_GPIO_PULL_NONE,
3039 WMI_GPIO_PULL_UP,
3040 WMI_GPIO_PULL_DOWN
3041 };
3042
3043 enum wmi_gpio_intr_type {
3044 WMI_GPIO_INTTYPE_DISABLE,
3045 WMI_GPIO_INTTYPE_RISING_EDGE,
3046 WMI_GPIO_INTTYPE_FALLING_EDGE,
3047 WMI_GPIO_INTTYPE_BOTH_EDGE,
3048 WMI_GPIO_INTTYPE_LEVEL_LOW,
3049 WMI_GPIO_INTTYPE_LEVEL_HIGH
3050 };
3051
3052 enum wmi_bss_chan_info_req_type {
3053 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
3054 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
3055 };
3056
3057 struct wmi_gpio_config_cmd_param {
3058 u32 tlv_header;
3059 u32 gpio_num;
3060 u32 input;
3061 u32 pull_type;
3062 u32 intr_mode;
3063 };
3064
3065 struct gpio_output_params {
3066 u32 gpio_num;
3067 u32 set;
3068 };
3069
3070 struct wmi_gpio_output_cmd_param {
3071 u32 tlv_header;
3072 u32 gpio_num;
3073 u32 set;
3074 };
3075
3076 struct set_fwtest_params {
3077 u32 arg;
3078 u32 value;
3079 };
3080
3081 struct wmi_fwtest_set_param_cmd_param {
3082 u32 tlv_header;
3083 u32 param_id;
3084 u32 param_value;
3085 };
3086
3087 struct wmi_pdev_set_param_cmd {
3088 u32 tlv_header;
3089 u32 pdev_id;
3090 u32 param_id;
3091 u32 param_value;
3092 } __packed;
3093
3094 struct wmi_pdev_set_ps_mode_cmd {
3095 u32 tlv_header;
3096 u32 vdev_id;
3097 u32 sta_ps_mode;
3098 } __packed;
3099
3100 struct wmi_pdev_suspend_cmd {
3101 u32 tlv_header;
3102 u32 pdev_id;
3103 u32 suspend_opt;
3104 } __packed;
3105
3106 struct wmi_pdev_resume_cmd {
3107 u32 tlv_header;
3108 u32 pdev_id;
3109 } __packed;
3110
3111 struct wmi_pdev_bss_chan_info_req_cmd {
3112 u32 tlv_header;
3113 /* ref wmi_bss_chan_info_req_type */
3114 u32 req_type;
3115 u32 pdev_id;
3116 } __packed;
3117
3118 struct wmi_ap_ps_peer_cmd {
3119 u32 tlv_header;
3120 u32 vdev_id;
3121 struct wmi_mac_addr peer_macaddr;
3122 u32 param;
3123 u32 value;
3124 } __packed;
3125
3126 struct wmi_sta_powersave_param_cmd {
3127 u32 tlv_header;
3128 u32 vdev_id;
3129 u32 param;
3130 u32 value;
3131 } __packed;
3132
3133 struct wmi_pdev_set_regdomain_cmd {
3134 u32 tlv_header;
3135 u32 pdev_id;
3136 u32 reg_domain;
3137 u32 reg_domain_2g;
3138 u32 reg_domain_5g;
3139 u32 conformance_test_limit_2g;
3140 u32 conformance_test_limit_5g;
3141 u32 dfs_domain;
3142 } __packed;
3143
3144 struct wmi_peer_set_param_cmd {
3145 u32 tlv_header;
3146 u32 vdev_id;
3147 struct wmi_mac_addr peer_macaddr;
3148 u32 param_id;
3149 u32 param_value;
3150 } __packed;
3151
3152 struct wmi_peer_flush_tids_cmd {
3153 u32 tlv_header;
3154 u32 vdev_id;
3155 struct wmi_mac_addr peer_macaddr;
3156 u32 peer_tid_bitmap;
3157 } __packed;
3158
3159 struct wmi_dfs_phyerr_offload_cmd {
3160 u32 tlv_header;
3161 u32 pdev_id;
3162 } __packed;
3163
3164 struct wmi_bcn_offload_ctrl_cmd {
3165 u32 tlv_header;
3166 u32 vdev_id;
3167 u32 bcn_ctrl_op;
3168 } __packed;
3169
3170 enum scan_dwelltime_adaptive_mode {
3171 SCAN_DWELL_MODE_DEFAULT = 0,
3172 SCAN_DWELL_MODE_CONSERVATIVE = 1,
3173 SCAN_DWELL_MODE_MODERATE = 2,
3174 SCAN_DWELL_MODE_AGGRESSIVE = 3,
3175 SCAN_DWELL_MODE_STATIC = 4
3176 };
3177
3178 #define WLAN_SSID_MAX_LEN 32
3179
3180 struct element_info {
3181 u32 len;
3182 u8 *ptr;
3183 };
3184
3185 struct wlan_ssid {
3186 u8 length;
3187 u8 ssid[WLAN_SSID_MAX_LEN];
3188 };
3189
3190 struct wmi_vdev_ch_power_info {
3191 u32 tlv_header;
3192
3193 /* Channel center frequency (MHz) */
3194 u32 chan_cfreq;
3195
3196 /* Unit: dBm, either PSD/EIRP power for this frequency or
3197 * incremental for non-PSD BW
3198 */
3199 u32 tx_power;
3200 } __packed;
3201
3202 struct wmi_vdev_set_tpc_power_cmd {
3203 u32 tlv_header;
3204 u32 vdev_id;
3205
3206 /* Value: 0 or 1, is PSD power or not */
3207 u32 psd_power;
3208
3209 /* Maximum EIRP power (dBm units), valid only if power is PSD */
3210 u32 eirp_power;
3211
3212 /* Type: WMI_6GHZ_REG_TYPE, used for halphy CTL lookup */
3213 u32 power_type_6ghz;
3214
3215 /* This fixed_param TLV is followed by the below TLVs:
3216 * num_pwr_levels of wmi_vdev_ch_power_info
3217 * For PSD power, it is the PSD/EIRP power of the frequency (20 MHz chunks).
3218 * For non-PSD power, the power values are for 20, 40, and till
3219 * BSS BW power levels.
3220 * The num_pwr_levels will be checked by sw how many elements present
3221 * in the variable-length array.
3222 */
3223 } __packed;
3224
3225 #define WMI_IE_BITMAP_SIZE 8
3226
3227 /* prefix used by scan requestor ids on the host */
3228 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3229
3230 /* prefix used by scan request ids generated on the host */
3231 /* host cycles through the lower 12 bits to generate ids */
3232 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3233
3234 /* Values lower than this may be refused by some firmware revisions with a scan
3235 * completion with a timedout reason.
3236 */
3237 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3238
3239 /* Scan priority numbers must be sequential, starting with 0 */
3240 enum wmi_scan_priority {
3241 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3242 WMI_SCAN_PRIORITY_LOW,
3243 WMI_SCAN_PRIORITY_MEDIUM,
3244 WMI_SCAN_PRIORITY_HIGH,
3245 WMI_SCAN_PRIORITY_VERY_HIGH,
3246 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
3247 };
3248
3249 enum wmi_scan_event_type {
3250 WMI_SCAN_EVENT_STARTED = BIT(0),
3251 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3252 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3253 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3),
3254 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3255 /* possibly by high-prio scan */
3256 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3257 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3258 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3259 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8),
3260 WMI_SCAN_EVENT_SUSPENDED = BIT(9),
3261 WMI_SCAN_EVENT_RESUMED = BIT(10),
3262 WMI_SCAN_EVENT_MAX = BIT(15),
3263 };
3264
3265 enum wmi_scan_completion_reason {
3266 WMI_SCAN_REASON_COMPLETED,
3267 WMI_SCAN_REASON_CANCELLED,
3268 WMI_SCAN_REASON_PREEMPTED,
3269 WMI_SCAN_REASON_TIMEDOUT,
3270 WMI_SCAN_REASON_INTERNAL_FAILURE,
3271 WMI_SCAN_REASON_MAX,
3272 };
3273
3274 struct wmi_start_scan_cmd {
3275 u32 tlv_header;
3276 u32 scan_id;
3277 u32 scan_req_id;
3278 u32 vdev_id;
3279 u32 scan_priority;
3280 u32 notify_scan_events;
3281 u32 dwell_time_active;
3282 u32 dwell_time_passive;
3283 u32 min_rest_time;
3284 u32 max_rest_time;
3285 u32 repeat_probe_time;
3286 u32 probe_spacing_time;
3287 u32 idle_time;
3288 u32 max_scan_time;
3289 u32 probe_delay;
3290 u32 scan_ctrl_flags;
3291 u32 burst_duration;
3292 u32 num_chan;
3293 u32 num_bssid;
3294 u32 num_ssids;
3295 u32 ie_len;
3296 u32 n_probes;
3297 struct wmi_mac_addr mac_addr;
3298 struct wmi_mac_addr mac_mask;
3299 u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3300 u32 num_vendor_oui;
3301 u32 scan_ctrl_flags_ext;
3302 u32 dwell_time_active_2g;
3303 u32 dwell_time_active_6g;
3304 u32 dwell_time_passive_6g;
3305 u32 scan_start_offset;
3306 } __packed;
3307
3308 #define WMI_SCAN_FLAG_PASSIVE 0x1
3309 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3310 #define WMI_SCAN_ADD_CCK_RATES 0x4
3311 #define WMI_SCAN_ADD_OFDM_RATES 0x8
3312 #define WMI_SCAN_CHAN_STAT_EVENT 0x10
3313 #define WMI_SCAN_FILTER_PROBE_REQ 0x20
3314 #define WMI_SCAN_BYPASS_DFS_CHN 0x40
3315 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3316 #define WMI_SCAN_FILTER_PROMISCUOS 0x100
3317 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3318 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400
3319 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800
3320 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000
3321 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000
3322 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000
3323 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000
3324 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3325 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000
3326 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000
3327 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3328 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3329
3330 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
3331 #define WMI_SCAN_DWELL_MODE_SHIFT 21
3332 #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE 0x00000800
3333
3334 #define WMI_SCAN_CONFIG_PER_CHANNEL_MASK GENMASK(19, 0)
3335 #define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND BIT(20)
3336
3337 enum {
3338 WMI_SCAN_DWELL_MODE_DEFAULT = 0,
3339 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3340 WMI_SCAN_DWELL_MODE_MODERATE = 2,
3341 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3,
3342 WMI_SCAN_DWELL_MODE_STATIC = 4,
3343 };
3344
3345 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
3346 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
3347 WMI_SCAN_DWELL_MODE_MASK))
3348
3349 struct hint_short_ssid {
3350 u32 freq_flags;
3351 u32 short_ssid;
3352 };
3353
3354 struct hint_bssid {
3355 u32 freq_flags;
3356 struct wmi_mac_addr bssid;
3357 };
3358
3359 struct scan_req_params {
3360 u32 scan_id;
3361 u32 scan_req_id;
3362 u32 vdev_id;
3363 u32 pdev_id;
3364 enum wmi_scan_priority scan_priority;
3365 u32 scan_ev_started:1,
3366 scan_ev_completed:1,
3367 scan_ev_bss_chan:1,
3368 scan_ev_foreign_chan:1,
3369 scan_ev_dequeued:1,
3370 scan_ev_preempted:1,
3371 scan_ev_start_failed:1,
3372 scan_ev_restarted:1,
3373 scan_ev_foreign_chn_exit:1,
3374 scan_ev_invalid:1,
3375 scan_ev_gpio_timeout:1,
3376 scan_ev_suspended:1,
3377 scan_ev_resumed:1;
3378 u32 scan_ctrl_flags_ext;
3379 u32 dwell_time_active;
3380 u32 dwell_time_active_2g;
3381 u32 dwell_time_passive;
3382 u32 dwell_time_active_6g;
3383 u32 dwell_time_passive_6g;
3384 u32 min_rest_time;
3385 u32 max_rest_time;
3386 u32 repeat_probe_time;
3387 u32 probe_spacing_time;
3388 u32 idle_time;
3389 u32 max_scan_time;
3390 u32 probe_delay;
3391 u32 scan_f_passive:1,
3392 scan_f_bcast_probe:1,
3393 scan_f_cck_rates:1,
3394 scan_f_ofdm_rates:1,
3395 scan_f_chan_stat_evnt:1,
3396 scan_f_filter_prb_req:1,
3397 scan_f_bypass_dfs_chn:1,
3398 scan_f_continue_on_err:1,
3399 scan_f_offchan_mgmt_tx:1,
3400 scan_f_offchan_data_tx:1,
3401 scan_f_promisc_mode:1,
3402 scan_f_capture_phy_err:1,
3403 scan_f_strict_passive_pch:1,
3404 scan_f_half_rate:1,
3405 scan_f_quarter_rate:1,
3406 scan_f_force_active_dfs_chn:1,
3407 scan_f_add_tpc_ie_in_probe:1,
3408 scan_f_add_ds_ie_in_probe:1,
3409 scan_f_add_spoofed_mac_in_probe:1,
3410 scan_f_add_rand_seq_in_probe:1,
3411 scan_f_en_ie_whitelist_in_probe:1,
3412 scan_f_forced:1,
3413 scan_f_2ghz:1,
3414 scan_f_5ghz:1,
3415 scan_f_80mhz:1;
3416 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3417 u32 burst_duration;
3418 u32 num_chan;
3419 u32 num_bssid;
3420 u32 num_ssids;
3421 u32 n_probes;
3422 u32 *chan_list;
3423 u32 notify_scan_events;
3424 struct wlan_ssid ssid[WLAN_SCAN_PARAMS_MAX_SSID];
3425 struct wmi_mac_addr bssid_list[WLAN_SCAN_PARAMS_MAX_BSSID];
3426 struct element_info extraie;
3427 struct element_info htcap;
3428 struct element_info vhtcap;
3429 u32 num_hint_s_ssid;
3430 u32 num_hint_bssid;
3431 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
3432 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
3433 struct wmi_mac_addr mac_addr;
3434 struct wmi_mac_addr mac_mask;
3435 };
3436
3437 struct wmi_ssid_arg {
3438 int len;
3439 const u8 *ssid;
3440 };
3441
3442 struct wmi_bssid_arg {
3443 const u8 *bssid;
3444 };
3445
3446 #define WMI_SCAN_STOP_ONE 0x00000000
3447 #define WMI_SCN_STOP_VAP_ALL 0x01000000
3448 #define WMI_SCAN_STOP_ALL 0x04000000
3449
3450 /* Prefix 0xA000 indicates that the scan request
3451 * is trigger by HOST
3452 */
3453 #define ATH11K_SCAN_ID 0xA000
3454
3455 enum scan_cancel_req_type {
3456 WLAN_SCAN_CANCEL_SINGLE = 1,
3457 WLAN_SCAN_CANCEL_VDEV_ALL,
3458 WLAN_SCAN_CANCEL_PDEV_ALL,
3459 };
3460
3461 struct scan_cancel_param {
3462 u32 requester;
3463 u32 scan_id;
3464 enum scan_cancel_req_type req_type;
3465 u32 vdev_id;
3466 u32 pdev_id;
3467 };
3468
3469 struct wmi_bcn_send_from_host_cmd {
3470 u32 tlv_header;
3471 u32 vdev_id;
3472 u32 data_len;
3473 union {
3474 u32 frag_ptr;
3475 u32 frag_ptr_lo;
3476 };
3477 u32 frame_ctrl;
3478 u32 dtim_flag;
3479 u32 bcn_antenna;
3480 u32 frag_ptr_hi;
3481 };
3482
3483 #define WMI_CHAN_INFO_MODE GENMASK(5, 0)
3484 #define WMI_CHAN_INFO_HT40_PLUS BIT(6)
3485 #define WMI_CHAN_INFO_PASSIVE BIT(7)
3486 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8)
3487 #define WMI_CHAN_INFO_AP_DISABLED BIT(9)
3488 #define WMI_CHAN_INFO_DFS BIT(10)
3489 #define WMI_CHAN_INFO_ALLOW_HT BIT(11)
3490 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12)
3491 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13)
3492 #define WMI_CHAN_INFO_HALF_RATE BIT(14)
3493 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
3494 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
3495 #define WMI_CHAN_INFO_ALLOW_HE BIT(17)
3496 #define WMI_CHAN_INFO_PSC BIT(18)
3497
3498 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
3499 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
3500 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16)
3501 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24)
3502
3503 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0)
3504 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8)
3505
3506 struct wmi_channel {
3507 u32 tlv_header;
3508 u32 mhz;
3509 u32 band_center_freq1;
3510 u32 band_center_freq2;
3511 u32 info;
3512 u32 reg_info_1;
3513 u32 reg_info_2;
3514 } __packed;
3515
3516 struct wmi_mgmt_params {
3517 void *tx_frame;
3518 u16 frm_len;
3519 u8 vdev_id;
3520 u16 chanfreq;
3521 void *pdata;
3522 u16 desc_id;
3523 u8 *macaddr;
3524 };
3525
3526 enum wmi_sta_ps_mode {
3527 WMI_STA_PS_MODE_DISABLED = 0,
3528 WMI_STA_PS_MODE_ENABLED = 1,
3529 };
3530
3531 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3532 #define WMI_SMPS_MASK_UPPER_3BITS 0x7
3533 #define WMI_SMPS_PARAM_VALUE_SHIFT 29
3534
3535 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
3536 #define ATH11K_WMI_FW_HANG_DELAY 0
3537
3538 /* type, 0:unused 1: ASSERT 2: not respond detect command
3539 * delay_time_ms, the simulate will delay time
3540 */
3541
3542 struct wmi_force_fw_hang_cmd {
3543 u32 tlv_header;
3544 u32 type;
3545 u32 delay_time_ms;
3546 };
3547
3548 struct wmi_vdev_set_param_cmd {
3549 u32 tlv_header;
3550 u32 vdev_id;
3551 u32 param_id;
3552 u32 param_value;
3553 } __packed;
3554
3555 enum wmi_stats_id {
3556 WMI_REQUEST_PEER_STAT = BIT(0),
3557 WMI_REQUEST_AP_STAT = BIT(1),
3558 WMI_REQUEST_PDEV_STAT = BIT(2),
3559 WMI_REQUEST_VDEV_STAT = BIT(3),
3560 WMI_REQUEST_BCNFLT_STAT = BIT(4),
3561 WMI_REQUEST_VDEV_RATE_STAT = BIT(5),
3562 WMI_REQUEST_INST_STAT = BIT(6),
3563 WMI_REQUEST_MIB_STAT = BIT(7),
3564 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8),
3565 WMI_REQUEST_CONGESTION_STAT = BIT(9),
3566 WMI_REQUEST_PEER_EXTD_STAT = BIT(10),
3567 WMI_REQUEST_BCN_STAT = BIT(11),
3568 WMI_REQUEST_BCN_STAT_RESET = BIT(12),
3569 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13),
3570 };
3571
3572 struct wmi_request_stats_cmd {
3573 u32 tlv_header;
3574 enum wmi_stats_id stats_id;
3575 u32 vdev_id;
3576 struct wmi_mac_addr peer_macaddr;
3577 u32 pdev_id;
3578 } __packed;
3579
3580 struct wmi_get_pdev_temperature_cmd {
3581 u32 tlv_header;
3582 u32 param;
3583 u32 pdev_id;
3584 } __packed;
3585
3586 struct wmi_ftm_seg_hdr {
3587 u32 len;
3588 u32 msgref;
3589 u32 segmentinfo;
3590 u32 pdev_id;
3591 } __packed;
3592
3593 struct wmi_ftm_cmd {
3594 u32 tlv_header;
3595 struct wmi_ftm_seg_hdr seg_hdr;
3596 u8 data[];
3597 } __packed;
3598
3599 struct wmi_ftm_event_msg {
3600 struct wmi_ftm_seg_hdr seg_hdr;
3601 u8 data[];
3602 } __packed;
3603
3604 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4
3605
3606 struct wmi_p2p_noa_event {
3607 u32 vdev_id;
3608 } __packed;
3609
3610 struct ath11k_wmi_p2p_noa_descriptor {
3611 u32 type_count; /* 255: continuous schedule, 0: reserved */
3612 u32 duration; /* Absent period duration in micro seconds */
3613 u32 interval; /* Absent period interval in micro seconds */
3614 u32 start_time; /* 32 bit tsf time when in starts */
3615 } __packed;
3616
3617 #define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0)
3618 #define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8)
3619 #define WMI_P2P_NOA_INFO_OPP_PS BIT(16)
3620 #define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17)
3621 #define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24)
3622
3623 struct ath11k_wmi_p2p_noa_info {
3624 /* Bit 0 - Flag to indicate an update in NOA schedule
3625 * Bits 7-1 - Reserved
3626 * Bits 15-8 - Index (identifies the instance of NOA sub element)
3627 * Bit 16 - Opp PS state of the AP
3628 * Bits 23-17 - Ctwindow in TUs
3629 * Bits 31-24 - Number of NOA descriptors
3630 */
3631 u32 noa_attr;
3632 struct ath11k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
3633 } __packed;
3634
3635 #define WMI_BEACON_TX_BUFFER_SIZE 512
3636
3637 #define WMI_EMA_TMPL_IDX_SHIFT 8
3638 #define WMI_EMA_FIRST_TMPL_SHIFT 16
3639 #define WMI_EMA_LAST_TMPL_SHIFT 24
3640
3641 struct wmi_bcn_tmpl_cmd {
3642 u32 tlv_header;
3643 u32 vdev_id;
3644 u32 tim_ie_offset;
3645 u32 buf_len;
3646 u32 csa_switch_count_offset;
3647 u32 ext_csa_switch_count_offset;
3648 u32 csa_event_bitmap;
3649 u32 mbssid_ie_offset;
3650 u32 esp_ie_offset;
3651 u32 csc_switch_count_offset;
3652 u32 csc_event_bitmap;
3653 u32 mu_edca_ie_offset;
3654 u32 feature_enable_bitmap;
3655 u32 ema_params;
3656 } __packed;
3657
3658 struct wmi_p2p_go_set_beacon_ie_cmd {
3659 u32 tlv_header;
3660 u32 vdev_id;
3661 u32 ie_buf_len;
3662 u8 tlv[];
3663 } __packed;
3664
3665 struct wmi_key_seq_counter {
3666 u32 key_seq_counter_l;
3667 u32 key_seq_counter_h;
3668 } __packed;
3669
3670 struct wmi_vdev_install_key_cmd {
3671 u32 tlv_header;
3672 u32 vdev_id;
3673 struct wmi_mac_addr peer_macaddr;
3674 u32 key_idx;
3675 u32 key_flags;
3676 u32 key_cipher;
3677 struct wmi_key_seq_counter key_rsc_counter;
3678 struct wmi_key_seq_counter key_global_rsc_counter;
3679 struct wmi_key_seq_counter key_tsc_counter;
3680 u8 wpi_key_rsc_counter[16];
3681 u8 wpi_key_tsc_counter[16];
3682 u32 key_len;
3683 u32 key_txmic_len;
3684 u32 key_rxmic_len;
3685 u32 is_group_key_id_valid;
3686 u32 group_key_id;
3687
3688 /* Followed by key_data containing key followed by
3689 * tx mic and then rx mic
3690 */
3691 } __packed;
3692
3693 struct wmi_vdev_install_key_arg {
3694 u32 vdev_id;
3695 const u8 *macaddr;
3696 u32 key_idx;
3697 u32 key_flags;
3698 u32 key_cipher;
3699 u32 key_len;
3700 u32 key_txmic_len;
3701 u32 key_rxmic_len;
3702 u64 key_rsc_counter;
3703 const void *key_data;
3704 };
3705
3706 #define WMI_MAX_SUPPORTED_RATES 128
3707 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3
3708 #define WMI_HOST_MAX_HE_RATE_SET 3
3709 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
3710 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
3711 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
3712
3713 struct wmi_rate_set_arg {
3714 u32 num_rates;
3715 u8 rates[WMI_MAX_SUPPORTED_RATES];
3716 };
3717
3718 struct peer_assoc_params {
3719 struct wmi_mac_addr peer_macaddr;
3720 u32 vdev_id;
3721 u32 peer_new_assoc;
3722 u32 peer_associd;
3723 u32 peer_flags;
3724 u32 peer_caps;
3725 u32 peer_listen_intval;
3726 u32 peer_ht_caps;
3727 u32 peer_max_mpdu;
3728 u32 peer_mpdu_density;
3729 u32 peer_rate_caps;
3730 u32 peer_nss;
3731 u32 peer_vht_caps;
3732 u32 peer_phymode;
3733 u32 peer_ht_info[2];
3734 struct wmi_rate_set_arg peer_legacy_rates;
3735 struct wmi_rate_set_arg peer_ht_rates;
3736 u32 rx_max_rate;
3737 u32 rx_mcs_set;
3738 u32 tx_max_rate;
3739 u32 tx_mcs_set;
3740 u8 vht_capable;
3741 u8 min_data_rate;
3742 u32 tx_max_mcs_nss;
3743 u32 peer_bw_rxnss_override;
3744 bool is_pmf_enabled;
3745 bool is_wme_set;
3746 bool qos_flag;
3747 bool apsd_flag;
3748 bool ht_flag;
3749 bool bw_40;
3750 bool bw_80;
3751 bool bw_160;
3752 bool stbc_flag;
3753 bool ldpc_flag;
3754 bool static_mimops_flag;
3755 bool dynamic_mimops_flag;
3756 bool spatial_mux_flag;
3757 bool vht_flag;
3758 bool vht_ng_flag;
3759 bool need_ptk_4_way;
3760 bool need_gtk_2_way;
3761 bool auth_flag;
3762 bool safe_mode_enabled;
3763 bool amsdu_disable;
3764 /* Use common structure */
3765 u8 peer_mac[ETH_ALEN];
3766
3767 bool he_flag;
3768 u32 peer_he_cap_macinfo[2];
3769 u32 peer_he_cap_macinfo_internal;
3770 u32 peer_he_caps_6ghz;
3771 u32 peer_he_ops;
3772 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3773 u32 peer_he_mcs_count;
3774 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3775 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3776 bool twt_responder;
3777 bool twt_requester;
3778 bool is_assoc;
3779 struct ath11k_ppe_threshold peer_ppet;
3780 };
3781
3782 struct wmi_peer_assoc_complete_cmd {
3783 u32 tlv_header;
3784 struct wmi_mac_addr peer_macaddr;
3785 u32 vdev_id;
3786 u32 peer_new_assoc;
3787 u32 peer_associd;
3788 u32 peer_flags;
3789 u32 peer_caps;
3790 u32 peer_listen_intval;
3791 u32 peer_ht_caps;
3792 u32 peer_max_mpdu;
3793 u32 peer_mpdu_density;
3794 u32 peer_rate_caps;
3795 u32 peer_nss;
3796 u32 peer_vht_caps;
3797 u32 peer_phymode;
3798 u32 peer_ht_info[2];
3799 u32 num_peer_legacy_rates;
3800 u32 num_peer_ht_rates;
3801 u32 peer_bw_rxnss_override;
3802 struct wmi_ppe_threshold peer_ppet;
3803 u32 peer_he_cap_info;
3804 u32 peer_he_ops;
3805 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3806 u32 peer_he_mcs;
3807 u32 peer_he_cap_info_ext;
3808 u32 peer_he_cap_info_internal;
3809 u32 min_data_rate;
3810 u32 peer_he_caps_6ghz;
3811 } __packed;
3812
3813 struct wmi_stop_scan_cmd {
3814 u32 tlv_header;
3815 u32 requestor;
3816 u32 scan_id;
3817 u32 req_type;
3818 u32 vdev_id;
3819 u32 pdev_id;
3820 };
3821
3822 struct scan_chan_list_params {
3823 struct list_head list;
3824 u32 pdev_id;
3825 u16 nallchans;
3826 struct channel_param ch_param[];
3827 };
3828
3829 struct wmi_scan_chan_list_cmd {
3830 u32 tlv_header;
3831 u32 num_scan_chans;
3832 u32 flags;
3833 u32 pdev_id;
3834 } __packed;
3835
3836 struct wmi_scan_prob_req_oui_cmd {
3837 u32 tlv_header;
3838 u32 prob_req_oui;
3839 } __packed;
3840
3841 #define WMI_MGMT_SEND_DOWNLD_LEN 64
3842
3843 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
3844 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
3845 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20)
3846 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28)
3847
3848 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0)
3849 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8)
3850 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15)
3851 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20)
3852 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21)
3853
3854 struct wmi_mgmt_send_params {
3855 u32 tlv_header;
3856 u32 tx_params_dword0;
3857 u32 tx_params_dword1;
3858 };
3859
3860 struct wmi_mgmt_send_cmd {
3861 u32 tlv_header;
3862 u32 vdev_id;
3863 u32 desc_id;
3864 u32 chanfreq;
3865 u32 paddr_lo;
3866 u32 paddr_hi;
3867 u32 frame_len;
3868 u32 buf_len;
3869 u32 tx_params_valid;
3870
3871 /* This TLV is followed by struct wmi_mgmt_frame */
3872
3873 /* Followed by struct wmi_mgmt_send_params */
3874 } __packed;
3875
3876 struct wmi_sta_powersave_mode_cmd {
3877 u32 tlv_header;
3878 u32 vdev_id;
3879 u32 sta_ps_mode;
3880 };
3881
3882 struct wmi_sta_smps_force_mode_cmd {
3883 u32 tlv_header;
3884 u32 vdev_id;
3885 u32 forced_mode;
3886 };
3887
3888 struct wmi_sta_smps_param_cmd {
3889 u32 tlv_header;
3890 u32 vdev_id;
3891 u32 param;
3892 u32 value;
3893 };
3894
3895 struct wmi_bcn_prb_info {
3896 u32 tlv_header;
3897 u32 caps;
3898 u32 erp;
3899 } __packed;
3900
3901 enum {
3902 WMI_PDEV_SUSPEND,
3903 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3904 };
3905
3906 struct green_ap_ps_params {
3907 u32 value;
3908 };
3909
3910 struct wmi_pdev_green_ap_ps_enable_cmd_param {
3911 u32 tlv_header;
3912 u32 pdev_id;
3913 u32 enable;
3914 };
3915
3916 struct ap_ps_params {
3917 u32 vdev_id;
3918 u32 param;
3919 u32 value;
3920 };
3921
3922 struct vdev_set_params {
3923 u32 if_id;
3924 u32 param_id;
3925 u32 param_value;
3926 };
3927
3928 struct stats_request_params {
3929 u32 stats_id;
3930 u32 vdev_id;
3931 u32 pdev_id;
3932 };
3933
3934 struct wmi_set_current_country_params {
3935 u8 alpha2[3];
3936 };
3937
3938 struct wmi_set_current_country_cmd {
3939 u32 tlv_header;
3940 u32 pdev_id;
3941 u32 new_alpha2;
3942 } __packed;
3943
3944 enum set_init_cc_type {
3945 WMI_COUNTRY_INFO_TYPE_ALPHA,
3946 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3947 WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3948 };
3949
3950 enum set_init_cc_flags {
3951 INVALID_CC,
3952 CC_IS_SET,
3953 REGDMN_IS_SET,
3954 ALPHA_IS_SET,
3955 };
3956
3957 struct wmi_init_country_params {
3958 union {
3959 u16 country_code;
3960 u16 regdom_id;
3961 u8 alpha2[3];
3962 } cc_info;
3963 enum set_init_cc_flags flags;
3964 };
3965
3966 struct wmi_init_country_cmd {
3967 u32 tlv_header;
3968 u32 pdev_id;
3969 u32 init_cc_type;
3970 union {
3971 u32 country_code;
3972 u32 regdom_id;
3973 u32 alpha2;
3974 } cc_info;
3975 } __packed;
3976
3977 struct wmi_11d_scan_start_params {
3978 u32 vdev_id;
3979 u32 scan_period_msec;
3980 u32 start_interval_msec;
3981 };
3982
3983 struct wmi_11d_scan_start_cmd {
3984 u32 tlv_header;
3985 u32 vdev_id;
3986 u32 scan_period_msec;
3987 u32 start_interval_msec;
3988 } __packed;
3989
3990 struct wmi_11d_scan_stop_cmd {
3991 u32 tlv_header;
3992 u32 vdev_id;
3993 } __packed;
3994
3995 struct wmi_11d_new_cc_ev {
3996 u32 new_alpha2;
3997 } __packed;
3998
3999 #define THERMAL_LEVELS 1
4000 struct tt_level_config {
4001 u32 tmplwm;
4002 u32 tmphwm;
4003 u32 dcoffpercent;
4004 u32 priority;
4005 };
4006
4007 struct thermal_mitigation_params {
4008 u32 pdev_id;
4009 u32 enable;
4010 u32 dc;
4011 u32 dc_per_event;
4012 struct tt_level_config levelconf[THERMAL_LEVELS];
4013 };
4014
4015 struct wmi_therm_throt_config_request_cmd {
4016 u32 tlv_header;
4017 u32 pdev_id;
4018 u32 enable;
4019 u32 dc;
4020 u32 dc_per_event;
4021 u32 therm_throt_levels;
4022 } __packed;
4023
4024 struct wmi_therm_throt_level_config_info {
4025 u32 tlv_header;
4026 u32 temp_lwm;
4027 u32 temp_hwm;
4028 u32 dc_off_percent;
4029 u32 prio;
4030 } __packed;
4031
4032 struct wmi_delba_send_cmd {
4033 u32 tlv_header;
4034 u32 vdev_id;
4035 struct wmi_mac_addr peer_macaddr;
4036 u32 tid;
4037 u32 initiator;
4038 u32 reasoncode;
4039 } __packed;
4040
4041 struct wmi_addba_setresponse_cmd {
4042 u32 tlv_header;
4043 u32 vdev_id;
4044 struct wmi_mac_addr peer_macaddr;
4045 u32 tid;
4046 u32 statuscode;
4047 } __packed;
4048
4049 struct wmi_addba_send_cmd {
4050 u32 tlv_header;
4051 u32 vdev_id;
4052 struct wmi_mac_addr peer_macaddr;
4053 u32 tid;
4054 u32 buffersize;
4055 } __packed;
4056
4057 struct wmi_addba_clear_resp_cmd {
4058 u32 tlv_header;
4059 u32 vdev_id;
4060 struct wmi_mac_addr peer_macaddr;
4061 } __packed;
4062
4063 struct wmi_pdev_pktlog_filter_info {
4064 u32 tlv_header;
4065 struct wmi_mac_addr peer_macaddr;
4066 } __packed;
4067
4068 struct wmi_pdev_pktlog_filter_cmd {
4069 u32 tlv_header;
4070 u32 pdev_id;
4071 u32 enable;
4072 u32 filter_type;
4073 u32 num_mac;
4074 } __packed;
4075
4076 enum ath11k_wmi_pktlog_enable {
4077 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0,
4078 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
4079 };
4080
4081 struct wmi_pktlog_enable_cmd {
4082 u32 tlv_header;
4083 u32 pdev_id;
4084 u32 evlist; /* WMI_PKTLOG_EVENT */
4085 u32 enable;
4086 } __packed;
4087
4088 struct wmi_pktlog_disable_cmd {
4089 u32 tlv_header;
4090 u32 pdev_id;
4091 } __packed;
4092
4093 #define DFS_PHYERR_UNIT_TEST_CMD 0
4094 #define DFS_UNIT_TEST_MODULE 0x2b
4095 #define DFS_UNIT_TEST_TOKEN 0xAA
4096
4097 enum dfs_test_args_idx {
4098 DFS_TEST_CMDID = 0,
4099 DFS_TEST_PDEV_ID,
4100 DFS_TEST_RADAR_PARAM,
4101 DFS_MAX_TEST_ARGS,
4102 };
4103
4104 struct wmi_dfs_unit_test_arg {
4105 u32 cmd_id;
4106 u32 pdev_id;
4107 u32 radar_param;
4108 };
4109
4110 struct wmi_unit_test_cmd {
4111 u32 tlv_header;
4112 u32 vdev_id;
4113 u32 module_id;
4114 u32 num_args;
4115 u32 diag_token;
4116 /* Followed by test args*/
4117 } __packed;
4118
4119 #define MAX_SUPPORTED_RATES 128
4120
4121 struct beacon_tmpl_params {
4122 u8 vdev_id;
4123 u32 tim_ie_offset;
4124 u32 tmpl_len;
4125 u32 tmpl_len_aligned;
4126 u32 csa_switch_count_offset;
4127 u32 ext_csa_switch_count_offset;
4128 u8 *frm;
4129 };
4130
4131 struct wmi_rate_set {
4132 u32 num_rates;
4133 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
4134 };
4135
4136 struct wmi_vht_rate_set {
4137 u32 tlv_header;
4138 u32 rx_max_rate;
4139 u32 rx_mcs_set;
4140 u32 tx_max_rate;
4141 u32 tx_mcs_set;
4142 u32 tx_max_mcs_nss;
4143 } __packed;
4144
4145 struct wmi_he_rate_set {
4146 u32 tlv_header;
4147
4148 /* MCS at which the peer can receive */
4149 u32 rx_mcs_set;
4150
4151 /* MCS at which the peer can transmit */
4152 u32 tx_mcs_set;
4153 } __packed;
4154
4155 #define MAX_REG_RULES 10
4156 #define REG_ALPHA2_LEN 2
4157 #define MAX_6GHZ_REG_RULES 5
4158
4159 enum wmi_start_event_param {
4160 WMI_VDEV_START_RESP_EVENT = 0,
4161 WMI_VDEV_RESTART_RESP_EVENT,
4162 };
4163
4164 struct wmi_vdev_start_resp_event {
4165 u32 vdev_id;
4166 u32 requestor_id;
4167 enum wmi_start_event_param resp_type;
4168 u32 status;
4169 u32 chain_mask;
4170 u32 smps_mode;
4171 union {
4172 u32 mac_id;
4173 u32 pdev_id;
4174 };
4175 u32 cfgd_tx_streams;
4176 u32 cfgd_rx_streams;
4177 s32 max_allowed_tx_power;
4178 } __packed;
4179
4180 /* VDEV start response status codes */
4181 enum wmi_vdev_start_resp_status_code {
4182 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
4183 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
4184 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
4185 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
4186 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
4187 };
4188
4189 /* Regaulatory Rule Flags Passed by FW */
4190 #define REGULATORY_CHAN_DISABLED BIT(0)
4191 #define REGULATORY_CHAN_NO_IR BIT(1)
4192 #define REGULATORY_CHAN_RADAR BIT(3)
4193 #define REGULATORY_CHAN_NO_OFDM BIT(6)
4194 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9)
4195
4196 #define REGULATORY_CHAN_NO_HT40 BIT(4)
4197 #define REGULATORY_CHAN_NO_80MHZ BIT(7)
4198 #define REGULATORY_CHAN_NO_160MHZ BIT(8)
4199 #define REGULATORY_CHAN_NO_20MHZ BIT(11)
4200 #define REGULATORY_CHAN_NO_10MHZ BIT(12)
4201
4202 enum wmi_reg_chan_list_cmd_type {
4203 WMI_REG_CHAN_LIST_CC_ID = 0,
4204 WMI_REG_CHAN_LIST_CC_EXT_ID = 1,
4205 };
4206
4207 enum wmi_reg_cc_setting_code {
4208 WMI_REG_SET_CC_STATUS_PASS = 0,
4209 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
4210 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
4211 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
4212 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
4213 WMI_REG_SET_CC_STATUS_FAIL = 5,
4214
4215 /* add new setting code above, update in
4216 * @enum cc_setting_code as well.
4217 * Also handle it in ath11k_wmi_cc_setting_code_to_reg()
4218 */
4219 };
4220
4221 enum cc_setting_code {
4222 REG_SET_CC_STATUS_PASS = 0,
4223 REG_CURRENT_ALPHA2_NOT_FOUND = 1,
4224 REG_INIT_ALPHA2_NOT_FOUND = 2,
4225 REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
4226 REG_SET_CC_STATUS_NO_MEMORY = 4,
4227 REG_SET_CC_STATUS_FAIL = 5,
4228
4229 /* add new setting code above, update in
4230 * @enum wmi_reg_cc_setting_code as well.
4231 * Also handle it in ath11k_cc_status_to_str()
4232 */
4233 };
4234
4235 static inline enum cc_setting_code
ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code)4236 ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code)
4237 {
4238 switch (status_code) {
4239 case WMI_REG_SET_CC_STATUS_PASS:
4240 return REG_SET_CC_STATUS_PASS;
4241 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
4242 return REG_CURRENT_ALPHA2_NOT_FOUND;
4243 case WMI_REG_INIT_ALPHA2_NOT_FOUND:
4244 return REG_INIT_ALPHA2_NOT_FOUND;
4245 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
4246 return REG_SET_CC_CHANGE_NOT_ALLOWED;
4247 case WMI_REG_SET_CC_STATUS_NO_MEMORY:
4248 return REG_SET_CC_STATUS_NO_MEMORY;
4249 case WMI_REG_SET_CC_STATUS_FAIL:
4250 return REG_SET_CC_STATUS_FAIL;
4251 }
4252
4253 return REG_SET_CC_STATUS_FAIL;
4254 }
4255
ath11k_cc_status_to_str(enum cc_setting_code code)4256 static inline const char *ath11k_cc_status_to_str(enum cc_setting_code code)
4257 {
4258 switch (code) {
4259 case REG_SET_CC_STATUS_PASS:
4260 return "REG_SET_CC_STATUS_PASS";
4261 case REG_CURRENT_ALPHA2_NOT_FOUND:
4262 return "REG_CURRENT_ALPHA2_NOT_FOUND";
4263 case REG_INIT_ALPHA2_NOT_FOUND:
4264 return "REG_INIT_ALPHA2_NOT_FOUND";
4265 case REG_SET_CC_CHANGE_NOT_ALLOWED:
4266 return "REG_SET_CC_CHANGE_NOT_ALLOWED";
4267 case REG_SET_CC_STATUS_NO_MEMORY:
4268 return "REG_SET_CC_STATUS_NO_MEMORY";
4269 case REG_SET_CC_STATUS_FAIL:
4270 return "REG_SET_CC_STATUS_FAIL";
4271 }
4272
4273 return "Unknown CC status";
4274 }
4275
4276 enum wmi_reg_6ghz_ap_type {
4277 WMI_REG_INDOOR_AP = 0,
4278 WMI_REG_STANDARD_POWER_AP = 1,
4279 WMI_REG_VERY_LOW_POWER_AP = 2,
4280
4281 /* add AP type above, handle in ath11k_6ghz_ap_type_to_str()
4282 */
4283 WMI_REG_CURRENT_MAX_AP_TYPE,
4284 WMI_REG_MAX_AP_TYPE = 7,
4285 };
4286
4287 static inline const char *
ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type)4288 ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type)
4289 {
4290 switch (type) {
4291 case WMI_REG_INDOOR_AP:
4292 return "INDOOR AP";
4293 case WMI_REG_STANDARD_POWER_AP:
4294 return "STANDARD POWER AP";
4295 case WMI_REG_VERY_LOW_POWER_AP:
4296 return "VERY LOW POWER AP";
4297 case WMI_REG_CURRENT_MAX_AP_TYPE:
4298 return "CURRENT_MAX_AP_TYPE";
4299 case WMI_REG_MAX_AP_TYPE:
4300 return "MAX_AP_TYPE";
4301 }
4302
4303 return "unknown 6 GHz AP type";
4304 }
4305
4306 enum wmi_reg_6ghz_client_type {
4307 WMI_REG_DEFAULT_CLIENT = 0,
4308 WMI_REG_SUBORDINATE_CLIENT = 1,
4309 WMI_REG_MAX_CLIENT_TYPE = 2,
4310
4311 /* add client type above, handle it in
4312 * ath11k_6ghz_client_type_to_str()
4313 */
4314 };
4315
4316 static inline const char *
ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type)4317 ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type)
4318 {
4319 switch (type) {
4320 case WMI_REG_DEFAULT_CLIENT:
4321 return "DEFAULT CLIENT";
4322 case WMI_REG_SUBORDINATE_CLIENT:
4323 return "SUBORDINATE CLIENT";
4324 case WMI_REG_MAX_CLIENT_TYPE:
4325 return "MAX_CLIENT_TYPE";
4326 }
4327
4328 return "unknown 6 GHz client type";
4329 }
4330
4331 enum reg_subdomains_6ghz {
4332 EMPTY_6GHZ = 0x0,
4333 FCC1_CLIENT_LPI_REGULAR_6GHZ = 0x01,
4334 FCC1_CLIENT_SP_6GHZ = 0x02,
4335 FCC1_AP_LPI_6GHZ = 0x03,
4336 FCC1_CLIENT_LPI_SUBORDINATE = FCC1_AP_LPI_6GHZ,
4337 FCC1_AP_SP_6GHZ = 0x04,
4338 ETSI1_LPI_6GHZ = 0x10,
4339 ETSI1_VLP_6GHZ = 0x11,
4340 ETSI2_LPI_6GHZ = 0x12,
4341 ETSI2_VLP_6GHZ = 0x13,
4342 APL1_LPI_6GHZ = 0x20,
4343 APL1_VLP_6GHZ = 0x21,
4344
4345 /* add sub-domain above, handle it in
4346 * ath11k_sub_reg_6ghz_to_str()
4347 */
4348 };
4349
4350 static inline const char *
ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id)4351 ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id)
4352 {
4353 switch (sub_id) {
4354 case EMPTY_6GHZ:
4355 return "N/A";
4356 case FCC1_CLIENT_LPI_REGULAR_6GHZ:
4357 return "FCC1_CLIENT_LPI_REGULAR_6GHZ";
4358 case FCC1_CLIENT_SP_6GHZ:
4359 return "FCC1_CLIENT_SP_6GHZ";
4360 case FCC1_AP_LPI_6GHZ:
4361 return "FCC1_AP_LPI_6GHZ/FCC1_CLIENT_LPI_SUBORDINATE";
4362 case FCC1_AP_SP_6GHZ:
4363 return "FCC1_AP_SP_6GHZ";
4364 case ETSI1_LPI_6GHZ:
4365 return "ETSI1_LPI_6GHZ";
4366 case ETSI1_VLP_6GHZ:
4367 return "ETSI1_VLP_6GHZ";
4368 case ETSI2_LPI_6GHZ:
4369 return "ETSI2_LPI_6GHZ";
4370 case ETSI2_VLP_6GHZ:
4371 return "ETSI2_VLP_6GHZ";
4372 case APL1_LPI_6GHZ:
4373 return "APL1_LPI_6GHZ";
4374 case APL1_VLP_6GHZ:
4375 return "APL1_VLP_6GHZ";
4376 }
4377
4378 return "unknown sub reg id";
4379 }
4380
4381 enum reg_super_domain_6ghz {
4382 FCC1_6GHZ = 0x01,
4383 ETSI1_6GHZ = 0x02,
4384 ETSI2_6GHZ = 0x03,
4385 APL1_6GHZ = 0x04,
4386 FCC1_6GHZ_CL = 0x05,
4387
4388 /* add super domain above, handle it in
4389 * ath11k_super_reg_6ghz_to_str()
4390 */
4391 };
4392
4393 static inline const char *
ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id)4394 ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id)
4395 {
4396 switch (domain_id) {
4397 case FCC1_6GHZ:
4398 return "FCC1_6GHZ";
4399 case ETSI1_6GHZ:
4400 return "ETSI1_6GHZ";
4401 case ETSI2_6GHZ:
4402 return "ETSI2_6GHZ";
4403 case APL1_6GHZ:
4404 return "APL1_6GHZ";
4405 case FCC1_6GHZ_CL:
4406 return "FCC1_6GHZ_CL";
4407 }
4408
4409 return "unknown domain id";
4410 }
4411
4412 struct cur_reg_rule {
4413 u16 start_freq;
4414 u16 end_freq;
4415 u16 max_bw;
4416 u8 reg_power;
4417 u8 ant_gain;
4418 u16 flags;
4419 bool psd_flag;
4420 s8 psd_eirp;
4421 };
4422
4423 struct cur_regulatory_info {
4424 enum cc_setting_code status_code;
4425 u8 num_phy;
4426 u8 phy_id;
4427 u16 reg_dmn_pair;
4428 u16 ctry_code;
4429 u8 alpha2[REG_ALPHA2_LEN + 1];
4430 u32 dfs_region;
4431 u32 phybitmap;
4432 u32 min_bw_2ghz;
4433 u32 max_bw_2ghz;
4434 u32 min_bw_5ghz;
4435 u32 max_bw_5ghz;
4436 u32 num_2ghz_reg_rules;
4437 u32 num_5ghz_reg_rules;
4438 struct cur_reg_rule *reg_rules_2ghz_ptr;
4439 struct cur_reg_rule *reg_rules_5ghz_ptr;
4440 bool is_ext_reg_event;
4441 enum wmi_reg_6ghz_client_type client_type;
4442 bool rnr_tpe_usable;
4443 bool unspecified_ap_usable;
4444 u8 domain_code_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4445 u8 domain_code_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4446 u32 domain_code_6ghz_super_id;
4447 u32 min_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4448 u32 max_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4449 u32 min_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4450 u32 max_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4451 u32 num_6ghz_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4452 u32 num_6ghz_rules_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4453 struct cur_reg_rule *reg_rules_6ghz_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE];
4454 struct cur_reg_rule *reg_rules_6ghz_client_ptr
4455 [WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4456 };
4457
4458 struct wmi_reg_chan_list_cc_event {
4459 u32 status_code;
4460 u32 phy_id;
4461 u32 alpha2;
4462 u32 num_phy;
4463 u32 country_id;
4464 u32 domain_code;
4465 u32 dfs_region;
4466 u32 phybitmap;
4467 u32 min_bw_2ghz;
4468 u32 max_bw_2ghz;
4469 u32 min_bw_5ghz;
4470 u32 max_bw_5ghz;
4471 u32 num_2ghz_reg_rules;
4472 u32 num_5ghz_reg_rules;
4473 } __packed;
4474
4475 struct wmi_regulatory_rule_struct {
4476 u32 tlv_header;
4477 u32 freq_info;
4478 u32 bw_pwr_info;
4479 u32 flag_info;
4480 };
4481
4482 #define WMI_REG_CLIENT_MAX 4
4483
4484 struct wmi_reg_chan_list_cc_ext_event {
4485 u32 status_code;
4486 u32 phy_id;
4487 u32 alpha2;
4488 u32 num_phy;
4489 u32 country_id;
4490 u32 domain_code;
4491 u32 dfs_region;
4492 u32 phybitmap;
4493 u32 min_bw_2ghz;
4494 u32 max_bw_2ghz;
4495 u32 min_bw_5ghz;
4496 u32 max_bw_5ghz;
4497 u32 num_2ghz_reg_rules;
4498 u32 num_5ghz_reg_rules;
4499 u32 client_type;
4500 u32 rnr_tpe_usable;
4501 u32 unspecified_ap_usable;
4502 u32 domain_code_6ghz_ap_lpi;
4503 u32 domain_code_6ghz_ap_sp;
4504 u32 domain_code_6ghz_ap_vlp;
4505 u32 domain_code_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4506 u32 domain_code_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4507 u32 domain_code_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4508 u32 domain_code_6ghz_super_id;
4509 u32 min_bw_6ghz_ap_sp;
4510 u32 max_bw_6ghz_ap_sp;
4511 u32 min_bw_6ghz_ap_lpi;
4512 u32 max_bw_6ghz_ap_lpi;
4513 u32 min_bw_6ghz_ap_vlp;
4514 u32 max_bw_6ghz_ap_vlp;
4515 u32 min_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4516 u32 max_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4517 u32 min_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4518 u32 max_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4519 u32 min_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4520 u32 max_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4521 u32 num_6ghz_reg_rules_ap_sp;
4522 u32 num_6ghz_reg_rules_ap_lpi;
4523 u32 num_6ghz_reg_rules_ap_vlp;
4524 u32 num_6ghz_reg_rules_client_sp[WMI_REG_CLIENT_MAX];
4525 u32 num_6ghz_reg_rules_client_lpi[WMI_REG_CLIENT_MAX];
4526 u32 num_6ghz_reg_rules_client_vlp[WMI_REG_CLIENT_MAX];
4527 } __packed;
4528
4529 struct wmi_regulatory_ext_rule {
4530 u32 tlv_header;
4531 u32 freq_info;
4532 u32 bw_pwr_info;
4533 u32 flag_info;
4534 u32 psd_power_info;
4535 } __packed;
4536
4537 struct wmi_vdev_delete_resp_event {
4538 u32 vdev_id;
4539 } __packed;
4540
4541 struct wmi_peer_delete_resp_event {
4542 u32 vdev_id;
4543 struct wmi_mac_addr peer_macaddr;
4544 } __packed;
4545
4546 struct wmi_bcn_tx_status_event {
4547 u32 vdev_id;
4548 u32 tx_status;
4549 } __packed;
4550
4551 struct wmi_vdev_stopped_event {
4552 u32 vdev_id;
4553 } __packed;
4554
4555 struct wmi_pdev_bss_chan_info_event {
4556 u32 freq; /* Units in MHz */
4557 u32 noise_floor; /* units are dBm */
4558 /* rx clear - how often the channel was unused */
4559 u32 rx_clear_count_low;
4560 u32 rx_clear_count_high;
4561 /* cycle count - elapsed time during measured period, in clock ticks */
4562 u32 cycle_count_low;
4563 u32 cycle_count_high;
4564 /* tx cycle count - elapsed time spent in tx, in clock ticks */
4565 u32 tx_cycle_count_low;
4566 u32 tx_cycle_count_high;
4567 /* rx cycle count - elapsed time spent in rx, in clock ticks */
4568 u32 rx_cycle_count_low;
4569 u32 rx_cycle_count_high;
4570 /*rx_cycle cnt for my bss in 64bits format */
4571 u32 rx_bss_cycle_count_low;
4572 u32 rx_bss_cycle_count_high;
4573 u32 pdev_id;
4574 } __packed;
4575
4576 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
4577
4578 struct wmi_vdev_install_key_compl_event {
4579 u32 vdev_id;
4580 struct wmi_mac_addr peer_macaddr;
4581 u32 key_idx;
4582 u32 key_flags;
4583 u32 status;
4584 } __packed;
4585
4586 struct wmi_vdev_install_key_complete_arg {
4587 u32 vdev_id;
4588 const u8 *macaddr;
4589 u32 key_idx;
4590 u32 key_flags;
4591 u32 status;
4592 };
4593
4594 struct wmi_peer_assoc_conf_event {
4595 u32 vdev_id;
4596 struct wmi_mac_addr peer_macaddr;
4597 } __packed;
4598
4599 struct wmi_peer_assoc_conf_arg {
4600 u32 vdev_id;
4601 const u8 *macaddr;
4602 };
4603
4604 struct wmi_fils_discovery_event {
4605 u32 vdev_id;
4606 u32 fils_tt;
4607 u32 tbtt;
4608 } __packed;
4609
4610 struct wmi_probe_resp_tx_status_event {
4611 u32 vdev_id;
4612 u32 tx_status;
4613 } __packed;
4614
4615 /*
4616 * PDEV statistics
4617 */
4618 struct wmi_pdev_stats_base {
4619 s32 chan_nf;
4620 u32 tx_frame_count; /* Cycles spent transmitting frames */
4621 u32 rx_frame_count; /* Cycles spent receiving frames */
4622 u32 rx_clear_count; /* Total channel busy time, evidently */
4623 u32 cycle_count; /* Total on-channel time */
4624 u32 phy_err_count;
4625 u32 chan_tx_pwr;
4626 } __packed;
4627
4628 struct wmi_pdev_stats_extra {
4629 u32 ack_rx_bad;
4630 u32 rts_bad;
4631 u32 rts_good;
4632 u32 fcs_bad;
4633 u32 no_beacons;
4634 u32 mib_int_count;
4635 } __packed;
4636
4637 struct wmi_pdev_stats_tx {
4638 /* Num HTT cookies queued to dispatch list */
4639 s32 comp_queued;
4640
4641 /* Num HTT cookies dispatched */
4642 s32 comp_delivered;
4643
4644 /* Num MSDU queued to WAL */
4645 s32 msdu_enqued;
4646
4647 /* Num MPDU queue to WAL */
4648 s32 mpdu_enqued;
4649
4650 /* Num MSDUs dropped by WMM limit */
4651 s32 wmm_drop;
4652
4653 /* Num Local frames queued */
4654 s32 local_enqued;
4655
4656 /* Num Local frames done */
4657 s32 local_freed;
4658
4659 /* Num queued to HW */
4660 s32 hw_queued;
4661
4662 /* Num PPDU reaped from HW */
4663 s32 hw_reaped;
4664
4665 /* Num underruns */
4666 s32 underrun;
4667
4668 /* Num hw paused */
4669 u32 hw_paused;
4670
4671 /* Num PPDUs cleaned up in TX abort */
4672 s32 tx_abort;
4673
4674 /* Num MPDUs requeued by SW */
4675 s32 mpdus_requeued;
4676
4677 /* excessive retries */
4678 u32 tx_ko;
4679
4680 u32 tx_xretry;
4681
4682 /* data hw rate code */
4683 u32 data_rc;
4684
4685 /* Scheduler self triggers */
4686 u32 self_triggers;
4687
4688 /* frames dropped due to excessive sw retries */
4689 u32 sw_retry_failure;
4690
4691 /* illegal rate phy errors */
4692 u32 illgl_rate_phy_err;
4693
4694 /* wal pdev continuous xretry */
4695 u32 pdev_cont_xretry;
4696
4697 /* wal pdev tx timeouts */
4698 u32 pdev_tx_timeout;
4699
4700 /* wal pdev resets */
4701 u32 pdev_resets;
4702
4703 /* frames dropped due to non-availability of stateless TIDs */
4704 u32 stateless_tid_alloc_failure;
4705
4706 /* PhY/BB underrun */
4707 u32 phy_underrun;
4708
4709 /* MPDU is more than txop limit */
4710 u32 txop_ovf;
4711
4712 /* Num sequences posted */
4713 u32 seq_posted;
4714
4715 /* Num sequences failed in queueing */
4716 u32 seq_failed_queueing;
4717
4718 /* Num sequences completed */
4719 u32 seq_completed;
4720
4721 /* Num sequences restarted */
4722 u32 seq_restarted;
4723
4724 /* Num of MU sequences posted */
4725 u32 mu_seq_posted;
4726
4727 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
4728 * (Reset,channel change)
4729 */
4730 s32 mpdus_sw_flush;
4731
4732 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
4733 s32 mpdus_hw_filter;
4734
4735 /* Num MPDUs truncated by PDG (TXOP, TBTT,
4736 * PPDU_duration based on rate, dyn_bw)
4737 */
4738 s32 mpdus_truncated;
4739
4740 /* Num MPDUs that was tried but didn't receive ACK or BA */
4741 s32 mpdus_ack_failed;
4742
4743 /* Num MPDUs that was dropped du to expiry. */
4744 s32 mpdus_expired;
4745 } __packed;
4746
4747 struct wmi_pdev_stats_rx {
4748 /* Cnts any change in ring routing mid-ppdu */
4749 s32 mid_ppdu_route_change;
4750
4751 /* Total number of statuses processed */
4752 s32 status_rcvd;
4753
4754 /* Extra frags on rings 0-3 */
4755 s32 r0_frags;
4756 s32 r1_frags;
4757 s32 r2_frags;
4758 s32 r3_frags;
4759
4760 /* MSDUs / MPDUs delivered to HTT */
4761 s32 htt_msdus;
4762 s32 htt_mpdus;
4763
4764 /* MSDUs / MPDUs delivered to local stack */
4765 s32 loc_msdus;
4766 s32 loc_mpdus;
4767
4768 /* AMSDUs that have more MSDUs than the status ring size */
4769 s32 oversize_amsdu;
4770
4771 /* Number of PHY errors */
4772 s32 phy_errs;
4773
4774 /* Number of PHY errors drops */
4775 s32 phy_err_drop;
4776
4777 /* Number of mpdu errors - FCS, MIC, ENC etc. */
4778 s32 mpdu_errs;
4779
4780 /* Num overflow errors */
4781 s32 rx_ovfl_errs;
4782 } __packed;
4783
4784 struct wmi_pdev_stats {
4785 struct wmi_pdev_stats_base base;
4786 struct wmi_pdev_stats_tx tx;
4787 struct wmi_pdev_stats_rx rx;
4788 } __packed;
4789
4790 #define WLAN_MAX_AC 4
4791 #define MAX_TX_RATE_VALUES 10
4792 #define MAX_TX_RATE_VALUES 10
4793
4794 struct wmi_vdev_stats {
4795 u32 vdev_id;
4796 u32 beacon_snr;
4797 u32 data_snr;
4798 u32 num_tx_frames[WLAN_MAX_AC];
4799 u32 num_rx_frames;
4800 u32 num_tx_frames_retries[WLAN_MAX_AC];
4801 u32 num_tx_frames_failures[WLAN_MAX_AC];
4802 u32 num_rts_fail;
4803 u32 num_rts_success;
4804 u32 num_rx_err;
4805 u32 num_rx_discard;
4806 u32 num_tx_not_acked;
4807 u32 tx_rate_history[MAX_TX_RATE_VALUES];
4808 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
4809 } __packed;
4810
4811 struct wmi_bcn_stats {
4812 u32 vdev_id;
4813 u32 tx_bcn_succ_cnt;
4814 u32 tx_bcn_outage_cnt;
4815 } __packed;
4816
4817 struct wmi_stats_event {
4818 u32 stats_id;
4819 u32 num_pdev_stats;
4820 u32 num_vdev_stats;
4821 u32 num_peer_stats;
4822 u32 num_bcnflt_stats;
4823 u32 num_chan_stats;
4824 u32 num_mib_stats;
4825 u32 pdev_id;
4826 u32 num_bcn_stats;
4827 u32 num_peer_extd_stats;
4828 u32 num_peer_extd2_stats;
4829 } __packed;
4830
4831 struct wmi_rssi_stats {
4832 u32 vdev_id;
4833 u32 rssi_avg_beacon[WMI_MAX_CHAINS];
4834 u32 rssi_avg_data[WMI_MAX_CHAINS];
4835 struct wmi_mac_addr peer_macaddr;
4836 } __packed;
4837
4838 struct wmi_per_chain_rssi_stats {
4839 u32 num_per_chain_rssi_stats;
4840 } __packed;
4841
4842 struct wmi_pdev_ctl_failsafe_chk_event {
4843 u32 pdev_id;
4844 u32 ctl_failsafe_status;
4845 } __packed;
4846
4847 struct wmi_pdev_csa_switch_ev {
4848 u32 pdev_id;
4849 u32 current_switch_count;
4850 u32 num_vdevs;
4851 } __packed;
4852
4853 struct wmi_pdev_radar_ev {
4854 u32 pdev_id;
4855 u32 detection_mode;
4856 u32 chan_freq;
4857 u32 chan_width;
4858 u32 detector_id;
4859 u32 segment_id;
4860 u32 timestamp;
4861 u32 is_chirp;
4862 s32 freq_offset;
4863 s32 sidx;
4864 } __packed;
4865
4866 struct wmi_pdev_temperature_event {
4867 /* temperature value in Celsius degree */
4868 s32 temp;
4869 u32 pdev_id;
4870 } __packed;
4871
4872 #define WMI_RX_STATUS_OK 0x00
4873 #define WMI_RX_STATUS_ERR_CRC 0x01
4874 #define WMI_RX_STATUS_ERR_DECRYPT 0x08
4875 #define WMI_RX_STATUS_ERR_MIC 0x10
4876 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
4877
4878 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4879
4880 struct mgmt_rx_event_params {
4881 u32 chan_freq;
4882 u32 channel;
4883 u32 snr;
4884 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4885 u32 rate;
4886 enum wmi_phy_mode phy_mode;
4887 u32 buf_len;
4888 int status;
4889 u32 flags;
4890 int rssi;
4891 u32 tsf_delta;
4892 u8 pdev_id;
4893 };
4894
4895 #define ATH_MAX_ANTENNA 4
4896
4897 struct wmi_mgmt_rx_hdr {
4898 u32 channel;
4899 u32 snr;
4900 u32 rate;
4901 u32 phy_mode;
4902 u32 buf_len;
4903 u32 status;
4904 u32 rssi_ctl[ATH_MAX_ANTENNA];
4905 u32 flags;
4906 int rssi;
4907 u32 tsf_delta;
4908 u32 rx_tsf_l32;
4909 u32 rx_tsf_u32;
4910 u32 pdev_id;
4911 u32 chan_freq;
4912 } __packed;
4913
4914 #define MAX_ANTENNA_EIGHT 8
4915
4916 struct wmi_rssi_ctl_ext {
4917 u32 tlv_header;
4918 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
4919 };
4920
4921 struct wmi_mgmt_tx_compl_event {
4922 u32 desc_id;
4923 u32 status;
4924 u32 pdev_id;
4925 u32 ppdu_id;
4926 u32 ack_rssi;
4927 } __packed;
4928
4929 struct wmi_scan_event {
4930 u32 event_type; /* %WMI_SCAN_EVENT_ */
4931 u32 reason; /* %WMI_SCAN_REASON_ */
4932 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4933 u32 scan_req_id;
4934 u32 scan_id;
4935 u32 vdev_id;
4936 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4937 * In case of AP it is TSF of the AP vdev
4938 * In case of STA connected state, this is the TSF of the AP
4939 * In case of STA not connected, it will be the free running HW timer
4940 */
4941 u32 tsf_timestamp;
4942 } __packed;
4943
4944 struct wmi_peer_sta_kickout_arg {
4945 const u8 *mac_addr;
4946 };
4947
4948 struct wmi_peer_sta_kickout_event {
4949 struct wmi_mac_addr peer_macaddr;
4950 } __packed;
4951
4952 enum wmi_roam_reason {
4953 WMI_ROAM_REASON_BETTER_AP = 1,
4954 WMI_ROAM_REASON_BEACON_MISS = 2,
4955 WMI_ROAM_REASON_LOW_RSSI = 3,
4956 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4957 WMI_ROAM_REASON_HO_FAILED = 5,
4958
4959 /* keep last */
4960 WMI_ROAM_REASON_MAX,
4961 };
4962
4963 struct wmi_roam_event {
4964 u32 vdev_id;
4965 u32 reason;
4966 u32 rssi;
4967 } __packed;
4968
4969 #define WMI_CHAN_INFO_START_RESP 0
4970 #define WMI_CHAN_INFO_END_RESP 1
4971
4972 struct wmi_chan_info_event {
4973 u32 err_code;
4974 u32 freq;
4975 u32 cmd_flags;
4976 u32 noise_floor;
4977 u32 rx_clear_count;
4978 u32 cycle_count;
4979 u32 chan_tx_pwr_range;
4980 u32 chan_tx_pwr_tp;
4981 u32 rx_frame_count;
4982 u32 my_bss_rx_cycle_count;
4983 u32 rx_11b_mode_data_duration;
4984 u32 tx_frame_cnt;
4985 u32 mac_clk_mhz;
4986 u32 vdev_id;
4987 } __packed;
4988
4989 struct ath11k_targ_cap {
4990 u32 phy_capability;
4991 u32 max_frag_entry;
4992 u32 num_rf_chains;
4993 u32 ht_cap_info;
4994 u32 vht_cap_info;
4995 u32 vht_supp_mcs;
4996 u32 hw_min_tx_power;
4997 u32 hw_max_tx_power;
4998 u32 sys_cap_info;
4999 u32 min_pkt_size_enable;
5000 u32 max_bcn_ie_size;
5001 u32 max_num_scan_channels;
5002 u32 max_supported_macs;
5003 u32 wmi_fw_sub_feat_caps;
5004 u32 txrx_chainmask;
5005 u32 default_dbs_hw_mode_index;
5006 u32 num_msdu_desc;
5007 };
5008
5009 enum wmi_vdev_type {
5010 WMI_VDEV_TYPE_UNSPEC = 0,
5011 WMI_VDEV_TYPE_AP = 1,
5012 WMI_VDEV_TYPE_STA = 2,
5013 WMI_VDEV_TYPE_IBSS = 3,
5014 WMI_VDEV_TYPE_MONITOR = 4,
5015 };
5016
5017 enum wmi_vdev_subtype {
5018 WMI_VDEV_SUBTYPE_NONE,
5019 WMI_VDEV_SUBTYPE_P2P_DEVICE,
5020 WMI_VDEV_SUBTYPE_P2P_CLIENT,
5021 WMI_VDEV_SUBTYPE_P2P_GO,
5022 WMI_VDEV_SUBTYPE_PROXY_STA,
5023 WMI_VDEV_SUBTYPE_MESH_NON_11S,
5024 WMI_VDEV_SUBTYPE_MESH_11S,
5025 };
5026
5027 enum wmi_sta_powersave_param {
5028 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5029 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5030 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5031 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5032 WMI_STA_PS_PARAM_UAPSD = 4,
5033 };
5034
5035 #define WMI_UAPSD_AC_TYPE_DELI 0
5036 #define WMI_UAPSD_AC_TYPE_TRIG 1
5037
5038 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5039 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \
5040 (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
5041
5042 enum wmi_sta_ps_param_uapsd {
5043 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5044 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5045 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5046 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5047 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5048 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5049 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5050 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5051 };
5052
5053 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5054
5055 struct wmi_sta_uapsd_auto_trig_param {
5056 u32 wmm_ac;
5057 u32 user_priority;
5058 u32 service_interval;
5059 u32 suspend_interval;
5060 u32 delay_interval;
5061 };
5062
5063 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5064 u32 vdev_id;
5065 struct wmi_mac_addr peer_macaddr;
5066 u32 num_ac;
5067 };
5068
5069 struct wmi_sta_uapsd_auto_trig_arg {
5070 u32 wmm_ac;
5071 u32 user_priority;
5072 u32 service_interval;
5073 u32 suspend_interval;
5074 u32 delay_interval;
5075 };
5076
5077 enum wmi_sta_ps_param_tx_wake_threshold {
5078 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5079 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5080
5081 /* Values greater than one indicate that many TX attempts per beacon
5082 * interval before the STA will wake up
5083 */
5084 };
5085
5086 /* The maximum number of PS-Poll frames the FW will send in response to
5087 * traffic advertised in TIM before waking up (by sending a null frame with PS
5088 * = 0). Value 0 has a special meaning: there is no maximum count and the FW
5089 * will send as many PS-Poll as are necessary to retrieve buffered BU. This
5090 * parameter is used when the RX wake policy is
5091 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
5092 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
5093 */
5094 enum wmi_sta_ps_param_pspoll_count {
5095 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5096 /* Values greater than 0 indicate the maximum number of PS-Poll frames
5097 * FW will send before waking up.
5098 */
5099 };
5100
5101 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
5102 enum wmi_ap_ps_param_uapsd {
5103 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5104 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5105 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5106 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5107 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5108 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5109 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5110 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5111 };
5112
5113 /* U-APSD maximum service period of peer station */
5114 enum wmi_ap_ps_peer_param_max_sp {
5115 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5116 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5117 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5118 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5119 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5120 };
5121
5122 enum wmi_ap_ps_peer_param {
5123 /** Set uapsd configuration for a given peer.
5124 *
5125 * This include the delivery and trigger enabled state for each AC.
5126 * The host MLME needs to set this based on AP capability and stations
5127 * request Set in the association request received from the station.
5128 *
5129 * Lower 8 bits of the value specify the UAPSD configuration.
5130 *
5131 * (see enum wmi_ap_ps_param_uapsd)
5132 * The default value is 0.
5133 */
5134 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
5135
5136 /**
5137 * Set the service period for a UAPSD capable station
5138 *
5139 * The service period from wme ie in the (re)assoc request frame.
5140 *
5141 * (see enum wmi_ap_ps_peer_param_max_sp)
5142 */
5143 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
5144
5145 /** Time in seconds for aging out buffered frames
5146 * for STA in power save
5147 */
5148 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
5149
5150 /** Specify frame types that are considered SIFS
5151 * RESP trigger frame
5152 */
5153 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
5154
5155 /** Specifies the trigger state of TID.
5156 * Valid only for UAPSD frame type
5157 */
5158 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
5159
5160 /* Specifies the WNM sleep state of a STA */
5161 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
5162 };
5163
5164 #define DISABLE_SIFS_RESPONSE_TRIGGER 0
5165
5166 #define WMI_MAX_KEY_INDEX 3
5167 #define WMI_MAX_KEY_LEN 32
5168
5169 #define WMI_KEY_PAIRWISE 0x00
5170 #define WMI_KEY_GROUP 0x01
5171
5172 #define WMI_CIPHER_NONE 0x0 /* clear key */
5173 #define WMI_CIPHER_WEP 0x1
5174 #define WMI_CIPHER_TKIP 0x2
5175 #define WMI_CIPHER_AES_OCB 0x3
5176 #define WMI_CIPHER_AES_CCM 0x4
5177 #define WMI_CIPHER_WAPI 0x5
5178 #define WMI_CIPHER_CKIP 0x6
5179 #define WMI_CIPHER_AES_CMAC 0x7
5180 #define WMI_CIPHER_ANY 0x8
5181 #define WMI_CIPHER_AES_GCM 0x9
5182 #define WMI_CIPHER_AES_GMAC 0xa
5183
5184 /* Value to disable fixed rate setting */
5185 #define WMI_FIXED_RATE_NONE (0xffff)
5186
5187 #define ATH11K_RC_VERSION_OFFSET 28
5188 #define ATH11K_RC_PREAMBLE_OFFSET 8
5189 #define ATH11K_RC_NSS_OFFSET 5
5190
5191 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \
5192 ((1 << ATH11K_RC_VERSION_OFFSET) | \
5193 ((nss) << ATH11K_RC_NSS_OFFSET) | \
5194 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \
5195 (rate))
5196
5197 /* Preamble types to be used with VDEV fixed rate configuration */
5198 enum wmi_rate_preamble {
5199 WMI_RATE_PREAMBLE_OFDM,
5200 WMI_RATE_PREAMBLE_CCK,
5201 WMI_RATE_PREAMBLE_HT,
5202 WMI_RATE_PREAMBLE_VHT,
5203 WMI_RATE_PREAMBLE_HE,
5204 };
5205
5206 /**
5207 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
5208 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled.
5209 * @WMI_USE_RTS_CTS: RTS/CTS Enabled.
5210 * @WMI_USE_CTS2SELF: CTS to self protection Enabled.
5211 */
5212 enum wmi_rtscts_prot_mode {
5213 WMI_RTS_CTS_DISABLED = 0,
5214 WMI_USE_RTS_CTS = 1,
5215 WMI_USE_CTS2SELF = 2,
5216 };
5217
5218 /**
5219 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
5220 * protection mode.
5221 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS
5222 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS
5223 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS,
5224 * but if there's a sw retry, both the rate
5225 * series will use RTS-CTS.
5226 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU.
5227 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series.
5228 */
5229 enum wmi_rtscts_profile {
5230 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
5231 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
5232 WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
5233 WMI_RTSCTS_ERP = 3,
5234 WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
5235 };
5236
5237 struct ath11k_hal_reg_cap {
5238 u32 eeprom_rd;
5239 u32 eeprom_rd_ext;
5240 u32 regcap1;
5241 u32 regcap2;
5242 u32 wireless_modes;
5243 u32 low_2ghz_chan;
5244 u32 high_2ghz_chan;
5245 u32 low_5ghz_chan;
5246 u32 high_5ghz_chan;
5247 };
5248
5249 struct ath11k_mem_chunk {
5250 void *vaddr;
5251 dma_addr_t paddr;
5252 u32 len;
5253 u32 req_id;
5254 };
5255
5256 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
5257
5258 enum wmi_sta_ps_param_rx_wake_policy {
5259 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5260 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5261 };
5262
5263 /* Do not change existing values! Used by ath11k_frame_mode parameter
5264 * module parameter.
5265 */
5266 enum ath11k_hw_txrx_mode {
5267 ATH11K_HW_TXRX_RAW = 0,
5268 ATH11K_HW_TXRX_NATIVE_WIFI = 1,
5269 ATH11K_HW_TXRX_ETHERNET = 2,
5270 };
5271
5272 struct wmi_wmm_params {
5273 u32 tlv_header;
5274 u32 cwmin;
5275 u32 cwmax;
5276 u32 aifs;
5277 u32 txoplimit;
5278 u32 acm;
5279 u32 no_ack;
5280 } __packed;
5281
5282 struct wmi_wmm_params_arg {
5283 u8 acm;
5284 u8 aifs;
5285 u16 cwmin;
5286 u16 cwmax;
5287 u16 txop;
5288 u8 no_ack;
5289 };
5290
5291 struct wmi_vdev_set_wmm_params_cmd {
5292 u32 tlv_header;
5293 u32 vdev_id;
5294 struct wmi_wmm_params wmm_params[4];
5295 u32 wmm_param_type;
5296 } __packed;
5297
5298 struct wmi_wmm_params_all_arg {
5299 struct wmi_wmm_params_arg ac_be;
5300 struct wmi_wmm_params_arg ac_bk;
5301 struct wmi_wmm_params_arg ac_vi;
5302 struct wmi_wmm_params_arg ac_vo;
5303 };
5304
5305 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000
5306 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10
5307 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50
5308 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20
5309 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100
5310 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80
5311 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50
5312 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10
5313 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2
5314 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2
5315 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2
5316 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500
5317 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000
5318 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000
5319 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000
5320
5321 struct wmi_twt_enable_params {
5322 u32 sta_cong_timer_ms;
5323 u32 mbss_support;
5324 u32 default_slot_size;
5325 u32 congestion_thresh_setup;
5326 u32 congestion_thresh_teardown;
5327 u32 congestion_thresh_critical;
5328 u32 interference_thresh_teardown;
5329 u32 interference_thresh_setup;
5330 u32 min_no_sta_setup;
5331 u32 min_no_sta_teardown;
5332 u32 no_of_bcast_mcast_slots;
5333 u32 min_no_twt_slots;
5334 u32 max_no_sta_twt;
5335 u32 mode_check_interval;
5336 u32 add_sta_slot_interval;
5337 u32 remove_sta_slot_interval;
5338 };
5339
5340 struct wmi_twt_enable_params_cmd {
5341 u32 tlv_header;
5342 u32 pdev_id;
5343 u32 sta_cong_timer_ms;
5344 u32 mbss_support;
5345 u32 default_slot_size;
5346 u32 congestion_thresh_setup;
5347 u32 congestion_thresh_teardown;
5348 u32 congestion_thresh_critical;
5349 u32 interference_thresh_teardown;
5350 u32 interference_thresh_setup;
5351 u32 min_no_sta_setup;
5352 u32 min_no_sta_teardown;
5353 u32 no_of_bcast_mcast_slots;
5354 u32 min_no_twt_slots;
5355 u32 max_no_sta_twt;
5356 u32 mode_check_interval;
5357 u32 add_sta_slot_interval;
5358 u32 remove_sta_slot_interval;
5359 } __packed;
5360
5361 struct wmi_twt_disable_params_cmd {
5362 u32 tlv_header;
5363 u32 pdev_id;
5364 } __packed;
5365
5366 enum WMI_HOST_TWT_COMMAND {
5367 WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0,
5368 WMI_HOST_TWT_COMMAND_SUGGEST_TWT,
5369 WMI_HOST_TWT_COMMAND_DEMAND_TWT,
5370 WMI_HOST_TWT_COMMAND_TWT_GROUPING,
5371 WMI_HOST_TWT_COMMAND_ACCEPT_TWT,
5372 WMI_HOST_TWT_COMMAND_ALTERNATE_TWT,
5373 WMI_HOST_TWT_COMMAND_DICTATE_TWT,
5374 WMI_HOST_TWT_COMMAND_REJECT_TWT,
5375 };
5376
5377 #define WMI_TWT_ADD_DIALOG_FLAG_BCAST BIT(8)
5378 #define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER BIT(9)
5379 #define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE BIT(10)
5380 #define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION BIT(11)
5381
5382 struct wmi_twt_add_dialog_params_cmd {
5383 u32 tlv_header;
5384 u32 vdev_id;
5385 struct wmi_mac_addr peer_macaddr;
5386 u32 dialog_id;
5387 u32 wake_intvl_us;
5388 u32 wake_intvl_mantis;
5389 u32 wake_dura_us;
5390 u32 sp_offset_us;
5391 u32 flags;
5392 } __packed;
5393
5394 struct wmi_twt_add_dialog_params {
5395 u32 vdev_id;
5396 u8 peer_macaddr[ETH_ALEN];
5397 u32 dialog_id;
5398 u32 wake_intvl_us;
5399 u32 wake_intvl_mantis;
5400 u32 wake_dura_us;
5401 u32 sp_offset_us;
5402 u8 twt_cmd;
5403 u8 flag_bcast;
5404 u8 flag_trigger;
5405 u8 flag_flow_type;
5406 u8 flag_protection;
5407 } __packed;
5408
5409 enum wmi_twt_add_dialog_status {
5410 WMI_ADD_TWT_STATUS_OK,
5411 WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED,
5412 WMI_ADD_TWT_STATUS_USED_DIALOG_ID,
5413 WMI_ADD_TWT_STATUS_INVALID_PARAM,
5414 WMI_ADD_TWT_STATUS_NOT_READY,
5415 WMI_ADD_TWT_STATUS_NO_RESOURCE,
5416 WMI_ADD_TWT_STATUS_NO_ACK,
5417 WMI_ADD_TWT_STATUS_NO_RESPONSE,
5418 WMI_ADD_TWT_STATUS_DENIED,
5419 WMI_ADD_TWT_STATUS_UNKNOWN_ERROR,
5420 };
5421
5422 struct wmi_twt_add_dialog_event {
5423 u32 vdev_id;
5424 struct wmi_mac_addr peer_macaddr;
5425 u32 dialog_id;
5426 u32 status;
5427 } __packed;
5428
5429 struct wmi_twt_del_dialog_params {
5430 u32 vdev_id;
5431 u8 peer_macaddr[ETH_ALEN];
5432 u32 dialog_id;
5433 } __packed;
5434
5435 struct wmi_twt_del_dialog_params_cmd {
5436 u32 tlv_header;
5437 u32 vdev_id;
5438 struct wmi_mac_addr peer_macaddr;
5439 u32 dialog_id;
5440 } __packed;
5441
5442 struct wmi_twt_pause_dialog_params {
5443 u32 vdev_id;
5444 u8 peer_macaddr[ETH_ALEN];
5445 u32 dialog_id;
5446 } __packed;
5447
5448 struct wmi_twt_pause_dialog_params_cmd {
5449 u32 tlv_header;
5450 u32 vdev_id;
5451 struct wmi_mac_addr peer_macaddr;
5452 u32 dialog_id;
5453 } __packed;
5454
5455 struct wmi_twt_resume_dialog_params {
5456 u32 vdev_id;
5457 u8 peer_macaddr[ETH_ALEN];
5458 u32 dialog_id;
5459 u32 sp_offset_us;
5460 u32 next_twt_size;
5461 } __packed;
5462
5463 struct wmi_twt_resume_dialog_params_cmd {
5464 u32 tlv_header;
5465 u32 vdev_id;
5466 struct wmi_mac_addr peer_macaddr;
5467 u32 dialog_id;
5468 u32 sp_offset_us;
5469 u32 next_twt_size;
5470 } __packed;
5471
5472 struct wmi_obss_spatial_reuse_params_cmd {
5473 u32 tlv_header;
5474 u32 pdev_id;
5475 u32 enable;
5476 s32 obss_min;
5477 s32 obss_max;
5478 u32 vdev_id;
5479 } __packed;
5480
5481 struct wmi_pdev_obss_pd_bitmap_cmd {
5482 u32 tlv_header;
5483 u32 pdev_id;
5484 u32 bitmap[2];
5485 } __packed;
5486
5487 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200
5488 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0
5489 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1
5490
5491 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000
5492 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000
5493
5494 enum wmi_bss_color_collision {
5495 WMI_BSS_COLOR_COLLISION_DISABLE = 0,
5496 WMI_BSS_COLOR_COLLISION_DETECTION,
5497 WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY,
5498 WMI_BSS_COLOR_FREE_SLOT_AVAILABLE,
5499 };
5500
5501 struct wmi_obss_color_collision_cfg_params_cmd {
5502 u32 tlv_header;
5503 u32 vdev_id;
5504 u32 flags;
5505 u32 evt_type;
5506 u32 current_bss_color;
5507 u32 detection_period_ms;
5508 u32 scan_period_ms;
5509 u32 free_slot_expiry_time_ms;
5510 } __packed;
5511
5512 struct wmi_bss_color_change_enable_params_cmd {
5513 u32 tlv_header;
5514 u32 vdev_id;
5515 u32 enable;
5516 } __packed;
5517
5518 struct wmi_obss_color_collision_event {
5519 u32 vdev_id;
5520 u32 evt_type;
5521 u64 obss_color_bitmap;
5522 } __packed;
5523
5524 #define ATH11K_IPV4_TH_SEED_SIZE 5
5525 #define ATH11K_IPV6_TH_SEED_SIZE 11
5526
5527 struct ath11k_wmi_pdev_lro_config_cmd {
5528 u32 tlv_header;
5529 u32 lro_enable;
5530 u32 res;
5531 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE];
5532 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE];
5533 u32 pdev_id;
5534 } __packed;
5535
5536 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0
5537 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224
5538 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1
5539 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5540 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1
5541 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5542 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5543 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5544 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5545 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5546 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5547 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5548 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5549 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5550 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5551 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5552 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5553 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5554
5555 struct ath11k_wmi_vdev_spectral_conf_param {
5556 u32 vdev_id;
5557 u32 scan_count;
5558 u32 scan_period;
5559 u32 scan_priority;
5560 u32 scan_fft_size;
5561 u32 scan_gc_ena;
5562 u32 scan_restart_ena;
5563 u32 scan_noise_floor_ref;
5564 u32 scan_init_delay;
5565 u32 scan_nb_tone_thr;
5566 u32 scan_str_bin_thr;
5567 u32 scan_wb_rpt_mode;
5568 u32 scan_rssi_rpt_mode;
5569 u32 scan_rssi_thr;
5570 u32 scan_pwr_format;
5571 u32 scan_rpt_mode;
5572 u32 scan_bin_scale;
5573 u32 scan_dbm_adj;
5574 u32 scan_chn_mask;
5575 } __packed;
5576
5577 struct ath11k_wmi_vdev_spectral_conf_cmd {
5578 u32 tlv_header;
5579 struct ath11k_wmi_vdev_spectral_conf_param param;
5580 } __packed;
5581
5582 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5583 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5584 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5585 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5586
5587 struct ath11k_wmi_vdev_spectral_enable_cmd {
5588 u32 tlv_header;
5589 u32 vdev_id;
5590 u32 trigger_cmd;
5591 u32 enable_cmd;
5592 } __packed;
5593
5594 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd {
5595 u32 tlv_header;
5596 u32 pdev_id;
5597 u32 module_id; /* see enum wmi_direct_buffer_module */
5598 u32 base_paddr_lo;
5599 u32 base_paddr_hi;
5600 u32 head_idx_paddr_lo;
5601 u32 head_idx_paddr_hi;
5602 u32 tail_idx_paddr_lo;
5603 u32 tail_idx_paddr_hi;
5604 u32 num_elems; /* Number of elems in the ring */
5605 u32 buf_size; /* size of allocated buffer in bytes */
5606
5607 /* Number of wmi_dma_buf_release_entry packed together */
5608 u32 num_resp_per_event;
5609
5610 /* Target should timeout and send whatever resp
5611 * it has if this time expires, units in milliseconds
5612 */
5613 u32 event_timeout_ms;
5614 } __packed;
5615
5616 struct ath11k_wmi_dma_buf_release_fixed_param {
5617 u32 pdev_id;
5618 u32 module_id;
5619 u32 num_buf_release_entry;
5620 u32 num_meta_data_entry;
5621 } __packed;
5622
5623 struct wmi_dma_buf_release_entry {
5624 u32 tlv_header;
5625 u32 paddr_lo;
5626
5627 /* Bits 11:0: address of data
5628 * Bits 31:12: host context data
5629 */
5630 u32 paddr_hi;
5631 } __packed;
5632
5633 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0)
5634 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16)
5635
5636 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0)
5637
5638 struct wmi_dma_buf_release_meta_data {
5639 u32 tlv_header;
5640 s32 noise_floor[WMI_MAX_CHAINS];
5641 u32 reset_delay;
5642 u32 freq1;
5643 u32 freq2;
5644 u32 ch_width;
5645 } __packed;
5646
5647 enum wmi_fils_discovery_cmd_type {
5648 WMI_FILS_DISCOVERY_CMD,
5649 WMI_UNSOL_BCAST_PROBE_RESP,
5650 };
5651
5652 struct wmi_fils_discovery_cmd {
5653 u32 tlv_header;
5654 u32 vdev_id;
5655 u32 interval;
5656 u32 config; /* enum wmi_fils_discovery_cmd_type */
5657 } __packed;
5658
5659 struct wmi_fils_discovery_tmpl_cmd {
5660 u32 tlv_header;
5661 u32 vdev_id;
5662 u32 buf_len;
5663 } __packed;
5664
5665 struct wmi_probe_tmpl_cmd {
5666 u32 tlv_header;
5667 u32 vdev_id;
5668 u32 buf_len;
5669 } __packed;
5670
5671 struct target_resource_config {
5672 u32 num_vdevs;
5673 u32 num_peers;
5674 u32 num_active_peers;
5675 u32 num_offload_peers;
5676 u32 num_offload_reorder_buffs;
5677 u32 num_peer_keys;
5678 u32 num_tids;
5679 u32 ast_skid_limit;
5680 u32 tx_chain_mask;
5681 u32 rx_chain_mask;
5682 u32 rx_timeout_pri[4];
5683 u32 rx_decap_mode;
5684 u32 scan_max_pending_req;
5685 u32 bmiss_offload_max_vdev;
5686 u32 roam_offload_max_vdev;
5687 u32 roam_offload_max_ap_profiles;
5688 u32 num_mcast_groups;
5689 u32 num_mcast_table_elems;
5690 u32 mcast2ucast_mode;
5691 u32 tx_dbg_log_size;
5692 u32 num_wds_entries;
5693 u32 dma_burst_size;
5694 u32 mac_aggr_delim;
5695 u32 rx_skip_defrag_timeout_dup_detection_check;
5696 u32 vow_config;
5697 u32 gtk_offload_max_vdev;
5698 u32 num_msdu_desc;
5699 u32 max_frag_entries;
5700 u32 max_peer_ext_stats;
5701 u32 smart_ant_cap;
5702 u32 bk_minfree;
5703 u32 be_minfree;
5704 u32 vi_minfree;
5705 u32 vo_minfree;
5706 u32 rx_batchmode;
5707 u32 tt_support;
5708 u32 flag1;
5709 u32 iphdr_pad_config;
5710 u32 qwrap_config:16,
5711 alloc_frag_desc_for_data_pkt:16;
5712 u32 num_tdls_vdevs;
5713 u32 num_tdls_conn_table_entries;
5714 u32 beacon_tx_offload_max_vdev;
5715 u32 num_multicast_filter_entries;
5716 u32 num_wow_filters;
5717 u32 num_keep_alive_pattern;
5718 u32 keep_alive_pattern_size;
5719 u32 max_tdls_concurrent_sleep_sta;
5720 u32 max_tdls_concurrent_buffer_sta;
5721 u32 wmi_send_separate;
5722 u32 num_ocb_vdevs;
5723 u32 num_ocb_channels;
5724 u32 num_ocb_schedules;
5725 u32 num_ns_ext_tuples_cfg;
5726 u32 bpf_instruction_size;
5727 u32 max_bssid_rx_filters;
5728 u32 use_pdev_id;
5729 u32 peer_map_unmap_v2_support;
5730 u32 sched_params;
5731 u32 twt_ap_pdev_count;
5732 u32 twt_ap_sta_count;
5733 u8 is_reg_cc_ext_event_supported;
5734 u32 ema_max_vap_cnt;
5735 u32 ema_max_profile_period;
5736 };
5737
5738 enum wmi_debug_log_param {
5739 WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1,
5740 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE,
5741 WMI_DEBUG_LOG_PARAM_VDEV_DISABLE,
5742 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP,
5743 WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP,
5744 WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP,
5745 };
5746
5747 struct wmi_debug_log_config_cmd_fixed_param {
5748 u32 tlv_header;
5749 u32 dbg_log_param;
5750 u32 value;
5751 } __packed;
5752
5753 #define MAX_RADIOS 3
5754
5755 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
5756 #define WMI_SEND_TIMEOUT_HZ (3 * HZ)
5757
5758 enum ath11k_wmi_peer_ps_state {
5759 WMI_PEER_PS_STATE_OFF,
5760 WMI_PEER_PS_STATE_ON,
5761 WMI_PEER_PS_STATE_DISABLED,
5762 };
5763
5764 enum wmi_peer_ps_supported_bitmap {
5765 /* Used to indicate that power save state change is valid */
5766 WMI_PEER_PS_VALID = 0x1,
5767 WMI_PEER_PS_STATE_TIMESTAMP = 0x2,
5768 };
5769
5770 struct wmi_peer_sta_ps_state_chg_event {
5771 struct wmi_mac_addr peer_macaddr;
5772 u32 peer_ps_state;
5773 u32 ps_supported_bitmap;
5774 u32 peer_ps_valid;
5775 u32 peer_ps_timestamp;
5776 } __packed;
5777
5778 struct ath11k_wmi_base {
5779 struct ath11k_base *ab;
5780 struct ath11k_pdev_wmi wmi[MAX_RADIOS];
5781 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
5782 u32 max_msg_len[MAX_RADIOS];
5783
5784 struct completion service_ready;
5785 struct completion unified_ready;
5786 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE);
5787 wait_queue_head_t tx_credits_wq;
5788 u32 num_mem_chunks;
5789 u32 rx_decap_mode;
5790 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
5791
5792 enum wmi_host_hw_mode_config_type preferred_hw_mode;
5793 struct target_resource_config wlan_resource_config;
5794
5795 struct ath11k_targ_cap *targ_cap;
5796 };
5797
5798 /* Definition of HW data filtering */
5799 enum hw_data_filter_type {
5800 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0),
5801 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1),
5802 };
5803
5804 struct wmi_hw_data_filter_cmd {
5805 u32 tlv_header;
5806 u32 vdev_id;
5807 u32 enable;
5808 u32 hw_filter_bitmap;
5809 } __packed;
5810
5811 /* WOW structures */
5812 enum wmi_wow_wakeup_event {
5813 WOW_BMISS_EVENT = 0,
5814 WOW_BETTER_AP_EVENT,
5815 WOW_DEAUTH_RECVD_EVENT,
5816 WOW_MAGIC_PKT_RECVD_EVENT,
5817 WOW_GTK_ERR_EVENT,
5818 WOW_FOURWAY_HSHAKE_EVENT,
5819 WOW_EAPOL_RECVD_EVENT,
5820 WOW_NLO_DETECTED_EVENT,
5821 WOW_DISASSOC_RECVD_EVENT,
5822 WOW_PATTERN_MATCH_EVENT,
5823 WOW_CSA_IE_EVENT,
5824 WOW_PROBE_REQ_WPS_IE_EVENT,
5825 WOW_AUTH_REQ_EVENT,
5826 WOW_ASSOC_REQ_EVENT,
5827 WOW_HTT_EVENT,
5828 WOW_RA_MATCH_EVENT,
5829 WOW_HOST_AUTO_SHUTDOWN_EVENT,
5830 WOW_IOAC_MAGIC_EVENT,
5831 WOW_IOAC_SHORT_EVENT,
5832 WOW_IOAC_EXTEND_EVENT,
5833 WOW_IOAC_TIMER_EVENT,
5834 WOW_DFS_PHYERR_RADAR_EVENT,
5835 WOW_BEACON_EVENT,
5836 WOW_CLIENT_KICKOUT_EVENT,
5837 WOW_EVENT_MAX,
5838 };
5839
5840 enum wmi_wow_interface_cfg {
5841 WOW_IFACE_PAUSE_ENABLED,
5842 WOW_IFACE_PAUSE_DISABLED
5843 };
5844
5845 #define C2S(x) case x: return #x
5846
wow_wakeup_event(enum wmi_wow_wakeup_event ev)5847 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
5848 {
5849 switch (ev) {
5850 C2S(WOW_BMISS_EVENT);
5851 C2S(WOW_BETTER_AP_EVENT);
5852 C2S(WOW_DEAUTH_RECVD_EVENT);
5853 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
5854 C2S(WOW_GTK_ERR_EVENT);
5855 C2S(WOW_FOURWAY_HSHAKE_EVENT);
5856 C2S(WOW_EAPOL_RECVD_EVENT);
5857 C2S(WOW_NLO_DETECTED_EVENT);
5858 C2S(WOW_DISASSOC_RECVD_EVENT);
5859 C2S(WOW_PATTERN_MATCH_EVENT);
5860 C2S(WOW_CSA_IE_EVENT);
5861 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
5862 C2S(WOW_AUTH_REQ_EVENT);
5863 C2S(WOW_ASSOC_REQ_EVENT);
5864 C2S(WOW_HTT_EVENT);
5865 C2S(WOW_RA_MATCH_EVENT);
5866 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
5867 C2S(WOW_IOAC_MAGIC_EVENT);
5868 C2S(WOW_IOAC_SHORT_EVENT);
5869 C2S(WOW_IOAC_EXTEND_EVENT);
5870 C2S(WOW_IOAC_TIMER_EVENT);
5871 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
5872 C2S(WOW_BEACON_EVENT);
5873 C2S(WOW_CLIENT_KICKOUT_EVENT);
5874 C2S(WOW_EVENT_MAX);
5875 default:
5876 return NULL;
5877 }
5878 }
5879
5880 enum wmi_wow_wake_reason {
5881 WOW_REASON_UNSPECIFIED = -1,
5882 WOW_REASON_NLOD = 0,
5883 WOW_REASON_AP_ASSOC_LOST,
5884 WOW_REASON_LOW_RSSI,
5885 WOW_REASON_DEAUTH_RECVD,
5886 WOW_REASON_DISASSOC_RECVD,
5887 WOW_REASON_GTK_HS_ERR,
5888 WOW_REASON_EAP_REQ,
5889 WOW_REASON_FOURWAY_HS_RECV,
5890 WOW_REASON_TIMER_INTR_RECV,
5891 WOW_REASON_PATTERN_MATCH_FOUND,
5892 WOW_REASON_RECV_MAGIC_PATTERN,
5893 WOW_REASON_P2P_DISC,
5894 WOW_REASON_WLAN_HB,
5895 WOW_REASON_CSA_EVENT,
5896 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
5897 WOW_REASON_AUTH_REQ_RECV,
5898 WOW_REASON_ASSOC_REQ_RECV,
5899 WOW_REASON_HTT_EVENT,
5900 WOW_REASON_RA_MATCH,
5901 WOW_REASON_HOST_AUTO_SHUTDOWN,
5902 WOW_REASON_IOAC_MAGIC_EVENT,
5903 WOW_REASON_IOAC_SHORT_EVENT,
5904 WOW_REASON_IOAC_EXTEND_EVENT,
5905 WOW_REASON_IOAC_TIMER_EVENT,
5906 WOW_REASON_ROAM_HO,
5907 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
5908 WOW_REASON_BEACON_RECV,
5909 WOW_REASON_CLIENT_KICKOUT_EVENT,
5910 WOW_REASON_PAGE_FAULT = 0x3a,
5911 WOW_REASON_DEBUG_TEST = 0xFF,
5912 };
5913
wow_reason(enum wmi_wow_wake_reason reason)5914 static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
5915 {
5916 switch (reason) {
5917 C2S(WOW_REASON_UNSPECIFIED);
5918 C2S(WOW_REASON_NLOD);
5919 C2S(WOW_REASON_AP_ASSOC_LOST);
5920 C2S(WOW_REASON_LOW_RSSI);
5921 C2S(WOW_REASON_DEAUTH_RECVD);
5922 C2S(WOW_REASON_DISASSOC_RECVD);
5923 C2S(WOW_REASON_GTK_HS_ERR);
5924 C2S(WOW_REASON_EAP_REQ);
5925 C2S(WOW_REASON_FOURWAY_HS_RECV);
5926 C2S(WOW_REASON_TIMER_INTR_RECV);
5927 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
5928 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
5929 C2S(WOW_REASON_P2P_DISC);
5930 C2S(WOW_REASON_WLAN_HB);
5931 C2S(WOW_REASON_CSA_EVENT);
5932 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
5933 C2S(WOW_REASON_AUTH_REQ_RECV);
5934 C2S(WOW_REASON_ASSOC_REQ_RECV);
5935 C2S(WOW_REASON_HTT_EVENT);
5936 C2S(WOW_REASON_RA_MATCH);
5937 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
5938 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
5939 C2S(WOW_REASON_IOAC_SHORT_EVENT);
5940 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
5941 C2S(WOW_REASON_IOAC_TIMER_EVENT);
5942 C2S(WOW_REASON_ROAM_HO);
5943 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
5944 C2S(WOW_REASON_BEACON_RECV);
5945 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
5946 C2S(WOW_REASON_PAGE_FAULT);
5947 C2S(WOW_REASON_DEBUG_TEST);
5948 default:
5949 return NULL;
5950 }
5951 }
5952
5953 #undef C2S
5954
5955 struct wmi_wow_ev_arg {
5956 u32 vdev_id;
5957 u32 flag;
5958 enum wmi_wow_wake_reason wake_reason;
5959 u32 data_len;
5960 };
5961
5962 enum wmi_tlv_pattern_type {
5963 WOW_PATTERN_MIN = 0,
5964 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN,
5965 WOW_IPV4_SYNC_PATTERN,
5966 WOW_IPV6_SYNC_PATTERN,
5967 WOW_WILD_CARD_PATTERN,
5968 WOW_TIMER_PATTERN,
5969 WOW_MAGIC_PATTERN,
5970 WOW_IPV6_RA_PATTERN,
5971 WOW_IOAC_PKT_PATTERN,
5972 WOW_IOAC_TMR_PATTERN,
5973 WOW_PATTERN_MAX
5974 };
5975
5976 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148
5977 #define WOW_DEFAULT_BITMASK_SIZE 148
5978
5979 #define WOW_MIN_PATTERN_SIZE 1
5980 #define WOW_MAX_PATTERN_SIZE 148
5981 #define WOW_MAX_PKT_OFFSET 128
5982 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \
5983 sizeof(struct rfc1042_hdr))
5984 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \
5985 offsetof(struct ieee80211_hdr_3addr, addr1))
5986
5987 struct wmi_wow_add_del_event_cmd {
5988 u32 tlv_header;
5989 u32 vdev_id;
5990 u32 is_add;
5991 u32 event_bitmap;
5992 } __packed;
5993
5994 struct wmi_wow_enable_cmd {
5995 u32 tlv_header;
5996 u32 enable;
5997 u32 pause_iface_config;
5998 u32 flags;
5999 } __packed;
6000
6001 struct wmi_wow_host_wakeup_ind {
6002 u32 tlv_header;
6003 u32 reserved;
6004 } __packed;
6005
6006 struct wmi_tlv_wow_event_info {
6007 u32 vdev_id;
6008 u32 flag;
6009 u32 wake_reason;
6010 u32 data_len;
6011 } __packed;
6012
6013 struct wmi_wow_bitmap_pattern {
6014 u32 tlv_header;
6015 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE];
6016 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE];
6017 u32 pattern_offset;
6018 u32 pattern_len;
6019 u32 bitmask_len;
6020 u32 pattern_id;
6021 } __packed;
6022
6023 struct wmi_wow_add_pattern_cmd {
6024 u32 tlv_header;
6025 u32 vdev_id;
6026 u32 pattern_id;
6027 u32 pattern_type;
6028 } __packed;
6029
6030 struct wmi_wow_del_pattern_cmd {
6031 u32 tlv_header;
6032 u32 vdev_id;
6033 u32 pattern_id;
6034 u32 pattern_type;
6035 } __packed;
6036
6037 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2
6038 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200
6039 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
6040 #define WMI_PNO_MAX_NETW_CHANNELS 26
6041 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60
6042 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID
6043 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN
6044
6045 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */
6046 #define WMI_PNO_MAX_PB_REQ_SIZE 450
6047
6048 #define WMI_PNO_24G_DEFAULT_CH 1
6049 #define WMI_PNO_5G_DEFAULT_CH 36
6050
6051 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40
6052 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110
6053
6054 /* SSID broadcast type */
6055 enum wmi_ssid_bcast_type {
6056 BCAST_UNKNOWN = 0,
6057 BCAST_NORMAL = 1,
6058 BCAST_HIDDEN = 2,
6059 };
6060
6061 #define WMI_NLO_MAX_SSIDS 16
6062 #define WMI_NLO_MAX_CHAN 48
6063
6064 #define WMI_NLO_CONFIG_STOP BIT(0)
6065 #define WMI_NLO_CONFIG_START BIT(1)
6066 #define WMI_NLO_CONFIG_RESET BIT(2)
6067 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4)
6068 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5)
6069 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6)
6070
6071 /* This bit is used to indicate if EPNO or supplicant PNO is enabled.
6072 * Only one of them can be enabled at a given time
6073 */
6074 #define WMI_NLO_CONFIG_ENLO BIT(7)
6075 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8)
6076 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9)
6077 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10)
6078 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11)
6079 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12)
6080 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13)
6081
6082 struct wmi_nlo_ssid_param {
6083 u32 valid;
6084 struct wmi_ssid ssid;
6085 } __packed;
6086
6087 struct wmi_nlo_enc_param {
6088 u32 valid;
6089 u32 enc_type;
6090 } __packed;
6091
6092 struct wmi_nlo_auth_param {
6093 u32 valid;
6094 u32 auth_type;
6095 } __packed;
6096
6097 struct wmi_nlo_bcast_nw_param {
6098 u32 valid;
6099 u32 bcast_nw_type;
6100 } __packed;
6101
6102 struct wmi_nlo_rssi_param {
6103 u32 valid;
6104 s32 rssi;
6105 } __packed;
6106
6107 struct nlo_configured_parameters {
6108 /* TLV tag and len;*/
6109 u32 tlv_header;
6110 struct wmi_nlo_ssid_param ssid;
6111 struct wmi_nlo_enc_param enc_type;
6112 struct wmi_nlo_auth_param auth_type;
6113 struct wmi_nlo_rssi_param rssi_cond;
6114
6115 /* indicates if the SSID is hidden or not */
6116 struct wmi_nlo_bcast_nw_param bcast_nw_type;
6117 } __packed;
6118
6119 struct wmi_network_type {
6120 struct wmi_ssid ssid;
6121 u32 authentication;
6122 u32 encryption;
6123 u32 bcast_nw_type;
6124 u8 channel_count;
6125 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
6126 s32 rssi_threshold;
6127 };
6128
6129 struct wmi_pno_scan_req {
6130 u8 enable;
6131 u8 vdev_id;
6132 u8 uc_networks_count;
6133 struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
6134 u32 fast_scan_period;
6135 u32 slow_scan_period;
6136 u8 fast_scan_max_cycles;
6137
6138 bool do_passive_scan;
6139
6140 u32 delay_start_time;
6141 u32 active_min_time;
6142 u32 active_max_time;
6143 u32 passive_min_time;
6144 u32 passive_max_time;
6145
6146 /* mac address randomization attributes */
6147 u32 enable_pno_scan_randomization;
6148 u8 mac_addr[ETH_ALEN];
6149 u8 mac_addr_mask[ETH_ALEN];
6150 };
6151
6152 struct wmi_wow_nlo_config_cmd {
6153 u32 tlv_header;
6154 u32 flags;
6155 u32 vdev_id;
6156 u32 fast_scan_max_cycles;
6157 u32 active_dwell_time;
6158 u32 passive_dwell_time;
6159 u32 probe_bundle_size;
6160
6161 /* ART = IRT */
6162 u32 rest_time;
6163
6164 /* Max value that can be reached after SBM */
6165 u32 max_rest_time;
6166
6167 /* SBM */
6168 u32 scan_backoff_multiplier;
6169
6170 /* SCBM */
6171 u32 fast_scan_period;
6172
6173 /* specific to windows */
6174 u32 slow_scan_period;
6175
6176 u32 no_of_ssids;
6177
6178 u32 num_of_channels;
6179
6180 /* NLO scan start delay time in milliseconds */
6181 u32 delay_start_time;
6182
6183 /* MAC Address to use in Probe Req as SA */
6184 struct wmi_mac_addr mac_addr;
6185
6186 /* Mask on which MAC has to be randomized */
6187 struct wmi_mac_addr mac_mask;
6188
6189 /* IE bitmap to use in Probe Req */
6190 u32 ie_bitmap[8];
6191
6192 /* Number of vendor OUIs. In the TLV vendor_oui[] */
6193 u32 num_vendor_oui;
6194
6195 /* Number of connected NLO band preferences */
6196 u32 num_cnlo_band_pref;
6197
6198 /* The TLVs will follow.
6199 * nlo_configured_parameters nlo_list[];
6200 * u32 channel_list[num_of_channels];
6201 */
6202 } __packed;
6203
6204 #define WMI_MAX_NS_OFFLOADS 2
6205 #define WMI_MAX_ARP_OFFLOADS 2
6206
6207 #define WMI_ARPOL_FLAGS_VALID BIT(0)
6208 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1)
6209 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2)
6210
6211 struct wmi_arp_offload_tuple {
6212 u32 tlv_header;
6213 u32 flags;
6214 u8 target_ipaddr[4];
6215 u8 remote_ipaddr[4];
6216 struct wmi_mac_addr target_mac;
6217 } __packed;
6218
6219 #define WMI_NSOL_FLAGS_VALID BIT(0)
6220 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1)
6221 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2)
6222 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3)
6223
6224 #define WMI_NSOL_MAX_TARGET_IPS 2
6225
6226 struct wmi_ns_offload_tuple {
6227 u32 tlv_header;
6228 u32 flags;
6229 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16];
6230 u8 solicitation_ipaddr[16];
6231 u8 remote_ipaddr[16];
6232 struct wmi_mac_addr target_mac;
6233 } __packed;
6234
6235 struct wmi_set_arp_ns_offload_cmd {
6236 u32 tlv_header;
6237 u32 flags;
6238 u32 vdev_id;
6239 u32 num_ns_ext_tuples;
6240 /* The TLVs follow:
6241 * wmi_ns_offload_tuple ns_tuples[WMI_MAX_NS_OFFLOADS];
6242 * wmi_arp_offload_tuple arp_tuples[WMI_MAX_ARP_OFFLOADS];
6243 * wmi_ns_offload_tuple ns_ext_tuples[num_ns_ext_tuples];
6244 */
6245 } __packed;
6246
6247 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000
6248 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000
6249 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000
6250 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000
6251
6252 #define GTK_OFFLOAD_KEK_BYTES 16
6253 #define GTK_OFFLOAD_KCK_BYTES 16
6254 #define GTK_REPLAY_COUNTER_BYTES 8
6255 #define WMI_MAX_KEY_LEN 32
6256 #define IGTK_PN_SIZE 6
6257
6258 struct wmi_replayc_cnt {
6259 union {
6260 u8 counter[GTK_REPLAY_COUNTER_BYTES];
6261 struct {
6262 u32 word0;
6263 u32 word1;
6264 } __packed;
6265 } __packed;
6266 } __packed;
6267
6268 struct wmi_gtk_offload_status_event {
6269 u32 vdev_id;
6270 u32 flags;
6271 u32 refresh_cnt;
6272 struct wmi_replayc_cnt replay_ctr;
6273 u8 igtk_key_index;
6274 u8 igtk_key_length;
6275 u8 igtk_key_rsc[IGTK_PN_SIZE];
6276 u8 igtk_key[WMI_MAX_KEY_LEN];
6277 u8 gtk_key_index;
6278 u8 gtk_key_length;
6279 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES];
6280 u8 gtk_key[WMI_MAX_KEY_LEN];
6281 } __packed;
6282
6283 struct wmi_gtk_rekey_offload_cmd {
6284 u32 tlv_header;
6285 u32 vdev_id;
6286 u32 flags;
6287 u8 kek[GTK_OFFLOAD_KEK_BYTES];
6288 u8 kck[GTK_OFFLOAD_KCK_BYTES];
6289 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES];
6290 } __packed;
6291
6292 #define BIOS_SAR_TABLE_LEN (22)
6293 #define BIOS_SAR_RSVD1_LEN (6)
6294 #define BIOS_SAR_RSVD2_LEN (18)
6295
6296 struct wmi_pdev_set_sar_table_cmd {
6297 u32 tlv_header;
6298 u32 pdev_id;
6299 u32 sar_len;
6300 u32 rsvd_len;
6301 } __packed;
6302
6303 struct wmi_pdev_set_geo_table_cmd {
6304 u32 tlv_header;
6305 u32 pdev_id;
6306 u32 rsvd_len;
6307 } __packed;
6308
6309 struct wmi_sta_keepalive_cmd {
6310 u32 tlv_header;
6311 u32 vdev_id;
6312 u32 enabled;
6313
6314 /* WMI_STA_KEEPALIVE_METHOD_ */
6315 u32 method;
6316
6317 /* in seconds */
6318 u32 interval;
6319
6320 /* following this structure is the TLV for struct
6321 * wmi_sta_keepalive_arp_resp
6322 */
6323 } __packed;
6324
6325 struct wmi_sta_keepalive_arp_resp {
6326 u32 tlv_header;
6327 u32 src_ip4_addr;
6328 u32 dest_ip4_addr;
6329 struct wmi_mac_addr dest_mac_addr;
6330 } __packed;
6331
6332 struct wmi_sta_keepalive_arg {
6333 u32 vdev_id;
6334 u32 enabled;
6335 u32 method;
6336 u32 interval;
6337 u32 src_ip4_addr;
6338 u32 dest_ip4_addr;
6339 const u8 dest_mac_addr[ETH_ALEN];
6340 };
6341
6342 enum wmi_sta_keepalive_method {
6343 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6344 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2,
6345 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3,
6346 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4,
6347 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5,
6348 };
6349
6350 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30
6351 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6352
6353 enum wmi_wmm_params_type {
6354 WMI_WMM_PARAM_TYPE_LEGACY = 0,
6355 WMI_WMM_PARAM_TYPE_11AX_MU_EDCA = 1,
6356 };
6357
6358 const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab,
6359 struct sk_buff *skb, gfp_t gfp);
6360 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
6361 u32 cmd_id);
6362 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
6363 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
6364 struct sk_buff *frame);
6365 int ath11k_wmi_p2p_go_bcn_ie(struct ath11k *ar, u32 vdev_id,
6366 const u8 *p2p_ie);
6367 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
6368 struct ieee80211_mutable_offsets *offs,
6369 struct sk_buff *bcn, u32 ema_param);
6370 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
6371 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
6372 const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx,
6373 u32 nontx_profile_cnt);
6374 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
6375 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
6376 bool restart);
6377 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
6378 u32 vdev_id, u32 param_id, u32 param_val);
6379 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
6380 u32 param_value, u8 pdev_id);
6381 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id,
6382 enum wmi_sta_ps_mode psmode);
6383 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
6384 int ath11k_wmi_cmd_init(struct ath11k_base *ab);
6385 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
6386 int ath11k_wmi_connect(struct ath11k_base *ab);
6387 int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
6388 u8 pdev_id);
6389 int ath11k_wmi_attach(struct ath11k_base *ab);
6390 void ath11k_wmi_detach(struct ath11k_base *ab);
6391 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
6392 struct vdev_create_params *param);
6393 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
6394 const u8 *addr, dma_addr_t paddr,
6395 u8 tid, u8 ba_window_size_valid,
6396 u32 ba_window_size);
6397 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
6398 struct peer_create_params *param);
6399 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
6400 u32 param_id, u32 param_value);
6401
6402 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
6403 u32 param, u32 param_value);
6404 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
6405 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
6406 const u8 *peer_addr, u8 vdev_id);
6407 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
6408 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
6409 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
6410 struct scan_req_params *params);
6411 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
6412 struct scan_cancel_param *param);
6413 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
6414 struct wmi_wmm_params_all_arg *param,
6415 enum wmi_wmm_params_type wmm_param_type);
6416 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
6417 u32 pdev_id);
6418 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
6419
6420 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
6421 struct peer_assoc_params *param);
6422 int ath11k_wmi_vdev_install_key(struct ath11k *ar,
6423 struct wmi_vdev_install_key_arg *arg);
6424 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
6425 enum wmi_bss_chan_info_req_type type);
6426 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
6427 struct stats_request_params *param);
6428 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
6429 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
6430 u8 peer_addr[ETH_ALEN],
6431 struct peer_flush_params *param);
6432 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
6433 struct ap_ps_params *param);
6434 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
6435 struct scan_chan_list_params *chan_list);
6436 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
6437 u32 pdev_id);
6438 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac);
6439 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6440 u32 tid, u32 buf_size);
6441 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6442 u32 tid, u32 status);
6443 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6444 u32 tid, u32 initiator, u32 reason);
6445 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
6446 u32 vdev_id, u32 bcn_ctrl_op);
6447 int ath11k_wmi_send_set_current_country_cmd(struct ath11k *ar,
6448 struct wmi_set_current_country_params *param);
6449 int
6450 ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
6451 struct wmi_init_country_params init_cc_param);
6452
6453 int ath11k_wmi_send_11d_scan_start_cmd(struct ath11k *ar,
6454 struct wmi_11d_scan_start_params *param);
6455 int ath11k_wmi_send_11d_scan_stop_cmd(struct ath11k *ar, u32 vdev_id);
6456
6457 int
6458 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
6459 struct thermal_mitigation_params *param);
6460 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
6461 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
6462 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
6463 int
6464 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
6465 struct rx_reorder_queue_remove_params *param);
6466 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
6467 struct pdev_set_regdomain_params *param);
6468 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
6469 struct ath11k_fw_stats *stats);
6470 void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
6471 struct ath11k_fw_stats *fw_stats, u32 stats_id,
6472 char *buf);
6473 int ath11k_wmi_simulate_radar(struct ath11k *ar);
6474 void ath11k_wmi_fill_default_twt_params(struct wmi_twt_enable_params *twt_params);
6475 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id,
6476 struct wmi_twt_enable_params *params);
6477 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
6478 int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar,
6479 struct wmi_twt_add_dialog_params *params);
6480 int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar,
6481 struct wmi_twt_del_dialog_params *params);
6482 int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar,
6483 struct wmi_twt_pause_dialog_params *params);
6484 int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar,
6485 struct wmi_twt_resume_dialog_params *params);
6486 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
6487 struct ieee80211_he_obss_pd *he_obss_pd);
6488 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap);
6489 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap);
6490 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar,
6491 u32 *bitmap);
6492 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
6493 u32 *bitmap);
6494 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar,
6495 u32 *bitmap);
6496 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
6497 u32 *bitmap);
6498 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
6499 u8 bss_color, u32 period,
6500 bool enable);
6501 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
6502 bool enable);
6503 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
6504 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar,
6505 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param);
6506 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id,
6507 u32 trigger, u32 enable);
6508 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar,
6509 struct ath11k_wmi_vdev_spectral_conf_param *param);
6510 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id,
6511 struct sk_buff *tmpl);
6512 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval,
6513 bool unsol_bcast_probe_resp_enabled);
6514 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id,
6515 struct sk_buff *tmpl);
6516 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab,
6517 enum wmi_host_hw_mode_config_type mode);
6518 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar);
6519 int ath11k_wmi_wow_enable(struct ath11k *ar);
6520 int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar,
6521 const u8 mac_addr[ETH_ALEN]);
6522 int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap,
6523 struct ath11k_fw_dbglog *dbglog);
6524 int ath11k_wmi_wow_config_pno(struct ath11k *ar, u32 vdev_id,
6525 struct wmi_pno_scan_req *pno_scan);
6526 int ath11k_wmi_wow_del_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id);
6527 int ath11k_wmi_wow_add_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id,
6528 const u8 *pattern, const u8 *mask,
6529 int pattern_len, int pattern_offset);
6530 int ath11k_wmi_wow_add_wakeup_event(struct ath11k *ar, u32 vdev_id,
6531 enum wmi_wow_wakeup_event event,
6532 u32 enable);
6533 int ath11k_wmi_hw_data_filter_cmd(struct ath11k *ar, u32 vdev_id,
6534 u32 filter_bitmap, bool enable);
6535 int ath11k_wmi_arp_ns_offload(struct ath11k *ar,
6536 struct ath11k_vif *arvif, bool enable);
6537 int ath11k_wmi_gtk_rekey_offload(struct ath11k *ar,
6538 struct ath11k_vif *arvif, bool enable);
6539 int ath11k_wmi_gtk_rekey_getinfo(struct ath11k *ar,
6540 struct ath11k_vif *arvif);
6541 int ath11k_wmi_pdev_set_bios_sar_table_param(struct ath11k *ar, const u8 *sar_val);
6542 int ath11k_wmi_pdev_set_bios_geo_table_param(struct ath11k *ar);
6543 int ath11k_wmi_sta_keepalive(struct ath11k *ar,
6544 const struct wmi_sta_keepalive_arg *arg);
6545 bool ath11k_wmi_supports_6ghz_cc_ext(struct ath11k *ar);
6546 int ath11k_wmi_send_vdev_set_tpc_power(struct ath11k *ar,
6547 u32 vdev_id,
6548 struct ath11k_reg_tpc_power_info *param);
6549
6550 #endif
6551