1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3
4 #ifndef _FBNIC_H_
5 #define _FBNIC_H_
6
7 #include <linux/interrupt.h>
8 #include <linux/io.h>
9 #include <linux/ptp_clock_kernel.h>
10 #include <linux/types.h>
11 #include <linux/workqueue.h>
12
13 #include "fbnic_csr.h"
14 #include "fbnic_fw.h"
15 #include "fbnic_hw_stats.h"
16 #include "fbnic_mac.h"
17 #include "fbnic_rpc.h"
18
19 struct fbnic_napi_vector;
20
21 #define FBNIC_MAX_NAPI_VECTORS 128u
22
23 struct fbnic_dev {
24 struct device *dev;
25 struct net_device *netdev;
26 struct dentry *dbg_fbd;
27 struct device *hwmon;
28
29 u32 __iomem *uc_addr0;
30 u32 __iomem *uc_addr4;
31 const struct fbnic_mac *mac;
32 unsigned int fw_msix_vector;
33 unsigned int pcs_msix_vector;
34 unsigned short num_irqs;
35
36 struct {
37 u8 users;
38 char name[IFNAMSIZ + 9];
39 } napi_irq[FBNIC_MAX_NAPI_VECTORS];
40
41 struct delayed_work service_task;
42
43 struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES];
44 struct fbnic_fw_cap fw_cap;
45 struct fbnic_fw_completion *cmpl_data;
46 /* Lock protecting Tx Mailbox queue to prevent possible races */
47 spinlock_t fw_tx_lock;
48
49 unsigned long last_heartbeat_request;
50 unsigned long last_heartbeat_response;
51 u8 fw_heartbeat_enabled;
52
53 u64 dsn;
54 u32 mps;
55 u32 readrq;
56
57 /* Local copy of the devices TCAM */
58 struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES];
59 struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES];
60 u8 mac_addr_boundary;
61 u8 tce_tcam_last;
62
63 /* Number of TCQs/RCQs available on hardware */
64 u16 max_num_queues;
65
66 /* Lock protecting writes to @time_high, @time_offset of fbnic_netdev,
67 * and the HW time CSR machinery.
68 */
69 spinlock_t time_lock;
70 /* Externally accessible PTP clock, may be NULL */
71 struct ptp_clock *ptp;
72 struct ptp_clock_info ptp_info;
73 /* Last @time_high refresh time in jiffies (to catch stalls) */
74 unsigned long last_read;
75
76 /* Local copy of hardware statistics */
77 struct fbnic_hw_stats hw_stats;
78 };
79
80 /* Reserve entry 0 in the MSI-X "others" array until we have filled all
81 * 32 of the possible interrupt slots. By doing this we can avoid any
82 * potential conflicts should we need to enable one of the debug interrupt
83 * causes later.
84 */
85 enum {
86 FBNIC_FW_MSIX_ENTRY,
87 FBNIC_PCS_MSIX_ENTRY,
88 FBNIC_NON_NAPI_VECTORS
89 };
90
fbnic_present(struct fbnic_dev * fbd)91 static inline bool fbnic_present(struct fbnic_dev *fbd)
92 {
93 return !!READ_ONCE(fbd->uc_addr0);
94 }
95
fbnic_wr32(struct fbnic_dev * fbd,u32 reg,u32 val)96 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val)
97 {
98 u32 __iomem *csr = READ_ONCE(fbd->uc_addr0);
99
100 if (csr)
101 writel(val, csr + reg);
102 }
103
104 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg);
105
fbnic_wrfl(struct fbnic_dev * fbd)106 static inline void fbnic_wrfl(struct fbnic_dev *fbd)
107 {
108 fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0);
109 }
110
111 static inline void
fbnic_rmw32(struct fbnic_dev * fbd,u32 reg,u32 mask,u32 val)112 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val)
113 {
114 u32 v;
115
116 v = fbnic_rd32(fbd, reg);
117 v &= ~mask;
118 v |= val;
119 fbnic_wr32(fbd, reg, v);
120 }
121
122 #define wr32(_f, _r, _v) fbnic_wr32(_f, _r, _v)
123 #define rd32(_f, _r) fbnic_rd32(_f, _r)
124 #define wrfl(_f) fbnic_wrfl(_f)
125
126 bool fbnic_fw_present(struct fbnic_dev *fbd);
127 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg);
128 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val);
129
130 #define fw_rd32(_f, _r) fbnic_fw_rd32(_f, _r)
131 #define fw_wr32(_f, _r, _v) fbnic_fw_wr32(_f, _r, _v)
132 #define fw_wrfl(_f) fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG)
133
fbnic_bmc_present(struct fbnic_dev * fbd)134 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd)
135 {
136 return fbd->fw_cap.bmc_present;
137 }
138
fbnic_init_failure(struct fbnic_dev * fbd)139 static inline bool fbnic_init_failure(struct fbnic_dev *fbd)
140 {
141 return !fbd->netdev;
142 }
143
144 extern char fbnic_driver_name[];
145
146 void fbnic_devlink_free(struct fbnic_dev *fbd);
147 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev);
148 void fbnic_devlink_register(struct fbnic_dev *fbd);
149 void fbnic_devlink_unregister(struct fbnic_dev *fbd);
150
151 int fbnic_fw_enable_mbx(struct fbnic_dev *fbd);
152 void fbnic_fw_disable_mbx(struct fbnic_dev *fbd);
153
154 void fbnic_hwmon_register(struct fbnic_dev *fbd);
155 void fbnic_hwmon_unregister(struct fbnic_dev *fbd);
156
157 int fbnic_pcs_irq_enable(struct fbnic_dev *fbd);
158 void fbnic_pcs_irq_disable(struct fbnic_dev *fbd);
159
160 void fbnic_napi_name_irqs(struct fbnic_dev *fbd);
161 int fbnic_napi_request_irq(struct fbnic_dev *fbd,
162 struct fbnic_napi_vector *nv);
163 void fbnic_napi_free_irq(struct fbnic_dev *fbd,
164 struct fbnic_napi_vector *nv);
165 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr);
166 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler,
167 unsigned long flags, const char *name, void *data);
168 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data);
169 void fbnic_free_irqs(struct fbnic_dev *fbd);
170 int fbnic_alloc_irqs(struct fbnic_dev *fbd);
171
172 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,
173 const size_t str_sz);
174
175 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd);
176 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd);
177 void fbnic_dbg_init(void);
178 void fbnic_dbg_exit(void);
179
180 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version);
181 int fbnic_csr_regs_len(struct fbnic_dev *fbd);
182
183 enum fbnic_boards {
184 fbnic_board_asic
185 };
186
187 struct fbnic_info {
188 unsigned int max_num_queues;
189 unsigned int bar_mask;
190 };
191
192 #endif /* _FBNIC_H_ */
193