1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4 *
5 * Copyright 2017 Hannes Reinecke, SUSE Linux GmbH <hare@suse.com>
6 *
7 * Based on the original DAC960 driver,
8 * Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
9 * Portions Copyright 2002 by Mylex (An IBM Business Unit)
10 *
11 */
12
13 #include <linux/module.h>
14 #include <linux/types.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/pci.h>
18 #include <linux/raid_class.h>
19 #include <linux/unaligned.h>
20 #include <scsi/scsi.h>
21 #include <scsi/scsi_host.h>
22 #include <scsi/scsi_device.h>
23 #include <scsi/scsi_cmnd.h>
24 #include <scsi/scsi_tcq.h>
25 #include "myrb.h"
26
27 static struct raid_template *myrb_raid_template;
28
29 static void myrb_monitor(struct work_struct *work);
30 static inline void myrb_translate_devstate(void *DeviceState);
31
myrb_logical_channel(struct Scsi_Host * shost)32 static inline int myrb_logical_channel(struct Scsi_Host *shost)
33 {
34 return shost->max_channel - 1;
35 }
36
37 static struct myrb_devstate_name_entry {
38 enum myrb_devstate state;
39 const char *name;
40 } myrb_devstate_name_list[] = {
41 { MYRB_DEVICE_DEAD, "Dead" },
42 { MYRB_DEVICE_WO, "WriteOnly" },
43 { MYRB_DEVICE_ONLINE, "Online" },
44 { MYRB_DEVICE_CRITICAL, "Critical" },
45 { MYRB_DEVICE_STANDBY, "Standby" },
46 { MYRB_DEVICE_OFFLINE, "Offline" },
47 };
48
myrb_devstate_name(enum myrb_devstate state)49 static const char *myrb_devstate_name(enum myrb_devstate state)
50 {
51 struct myrb_devstate_name_entry *entry = myrb_devstate_name_list;
52 int i;
53
54 for (i = 0; i < ARRAY_SIZE(myrb_devstate_name_list); i++) {
55 if (entry[i].state == state)
56 return entry[i].name;
57 }
58 return "Unknown";
59 }
60
61 static struct myrb_raidlevel_name_entry {
62 enum myrb_raidlevel level;
63 const char *name;
64 } myrb_raidlevel_name_list[] = {
65 { MYRB_RAID_LEVEL0, "RAID0" },
66 { MYRB_RAID_LEVEL1, "RAID1" },
67 { MYRB_RAID_LEVEL3, "RAID3" },
68 { MYRB_RAID_LEVEL5, "RAID5" },
69 { MYRB_RAID_LEVEL6, "RAID6" },
70 { MYRB_RAID_JBOD, "JBOD" },
71 };
72
myrb_raidlevel_name(enum myrb_raidlevel level)73 static const char *myrb_raidlevel_name(enum myrb_raidlevel level)
74 {
75 struct myrb_raidlevel_name_entry *entry = myrb_raidlevel_name_list;
76 int i;
77
78 for (i = 0; i < ARRAY_SIZE(myrb_raidlevel_name_list); i++) {
79 if (entry[i].level == level)
80 return entry[i].name;
81 }
82 return NULL;
83 }
84
85 /*
86 * myrb_create_mempools - allocates auxiliary data structures
87 *
88 * Return: true on success, false otherwise.
89 */
myrb_create_mempools(struct pci_dev * pdev,struct myrb_hba * cb)90 static bool myrb_create_mempools(struct pci_dev *pdev, struct myrb_hba *cb)
91 {
92 size_t elem_size, elem_align;
93
94 elem_align = sizeof(struct myrb_sge);
95 elem_size = cb->host->sg_tablesize * elem_align;
96 cb->sg_pool = dma_pool_create("myrb_sg", &pdev->dev,
97 elem_size, elem_align, 0);
98 if (cb->sg_pool == NULL) {
99 shost_printk(KERN_ERR, cb->host,
100 "Failed to allocate SG pool\n");
101 return false;
102 }
103
104 cb->dcdb_pool = dma_pool_create("myrb_dcdb", &pdev->dev,
105 sizeof(struct myrb_dcdb),
106 sizeof(unsigned int), 0);
107 if (!cb->dcdb_pool) {
108 dma_pool_destroy(cb->sg_pool);
109 cb->sg_pool = NULL;
110 shost_printk(KERN_ERR, cb->host,
111 "Failed to allocate DCDB pool\n");
112 return false;
113 }
114
115 cb->work_q = alloc_ordered_workqueue("myrb_wq_%d", WQ_MEM_RECLAIM,
116 cb->host->host_no);
117 if (!cb->work_q) {
118 dma_pool_destroy(cb->dcdb_pool);
119 cb->dcdb_pool = NULL;
120 dma_pool_destroy(cb->sg_pool);
121 cb->sg_pool = NULL;
122 shost_printk(KERN_ERR, cb->host,
123 "Failed to create workqueue\n");
124 return false;
125 }
126
127 /*
128 * Initialize the Monitoring Timer.
129 */
130 INIT_DELAYED_WORK(&cb->monitor_work, myrb_monitor);
131 queue_delayed_work(cb->work_q, &cb->monitor_work, 1);
132
133 return true;
134 }
135
136 /*
137 * myrb_destroy_mempools - tears down the memory pools for the controller
138 */
myrb_destroy_mempools(struct myrb_hba * cb)139 static void myrb_destroy_mempools(struct myrb_hba *cb)
140 {
141 cancel_delayed_work_sync(&cb->monitor_work);
142 destroy_workqueue(cb->work_q);
143
144 dma_pool_destroy(cb->sg_pool);
145 dma_pool_destroy(cb->dcdb_pool);
146 }
147
148 /*
149 * myrb_reset_cmd - reset command block
150 */
myrb_reset_cmd(struct myrb_cmdblk * cmd_blk)151 static inline void myrb_reset_cmd(struct myrb_cmdblk *cmd_blk)
152 {
153 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
154
155 memset(mbox, 0, sizeof(union myrb_cmd_mbox));
156 cmd_blk->status = 0;
157 }
158
159 /*
160 * myrb_qcmd - queues command block for execution
161 */
myrb_qcmd(struct myrb_hba * cb,struct myrb_cmdblk * cmd_blk)162 static void myrb_qcmd(struct myrb_hba *cb, struct myrb_cmdblk *cmd_blk)
163 {
164 void __iomem *base = cb->io_base;
165 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
166 union myrb_cmd_mbox *next_mbox = cb->next_cmd_mbox;
167
168 cb->write_cmd_mbox(next_mbox, mbox);
169 if (cb->prev_cmd_mbox1->words[0] == 0 ||
170 cb->prev_cmd_mbox2->words[0] == 0)
171 cb->get_cmd_mbox(base);
172 cb->prev_cmd_mbox2 = cb->prev_cmd_mbox1;
173 cb->prev_cmd_mbox1 = next_mbox;
174 if (++next_mbox > cb->last_cmd_mbox)
175 next_mbox = cb->first_cmd_mbox;
176 cb->next_cmd_mbox = next_mbox;
177 }
178
179 /*
180 * myrb_exec_cmd - executes command block and waits for completion.
181 *
182 * Return: command status
183 */
myrb_exec_cmd(struct myrb_hba * cb,struct myrb_cmdblk * cmd_blk)184 static unsigned short myrb_exec_cmd(struct myrb_hba *cb,
185 struct myrb_cmdblk *cmd_blk)
186 {
187 DECLARE_COMPLETION_ONSTACK(cmpl);
188 unsigned long flags;
189
190 cmd_blk->completion = &cmpl;
191
192 spin_lock_irqsave(&cb->queue_lock, flags);
193 cb->qcmd(cb, cmd_blk);
194 spin_unlock_irqrestore(&cb->queue_lock, flags);
195
196 wait_for_completion(&cmpl);
197 return cmd_blk->status;
198 }
199
200 /*
201 * myrb_exec_type3 - executes a type 3 command and waits for completion.
202 *
203 * Return: command status
204 */
myrb_exec_type3(struct myrb_hba * cb,enum myrb_cmd_opcode op,dma_addr_t addr)205 static unsigned short myrb_exec_type3(struct myrb_hba *cb,
206 enum myrb_cmd_opcode op, dma_addr_t addr)
207 {
208 struct myrb_cmdblk *cmd_blk = &cb->dcmd_blk;
209 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
210 unsigned short status;
211
212 mutex_lock(&cb->dcmd_mutex);
213 myrb_reset_cmd(cmd_blk);
214 mbox->type3.id = MYRB_DCMD_TAG;
215 mbox->type3.opcode = op;
216 mbox->type3.addr = addr;
217 status = myrb_exec_cmd(cb, cmd_blk);
218 mutex_unlock(&cb->dcmd_mutex);
219 return status;
220 }
221
222 /*
223 * myrb_exec_type3D - executes a type 3D command and waits for completion.
224 *
225 * Return: command status
226 */
myrb_exec_type3D(struct myrb_hba * cb,enum myrb_cmd_opcode op,struct scsi_device * sdev,struct myrb_pdev_state * pdev_info)227 static unsigned short myrb_exec_type3D(struct myrb_hba *cb,
228 enum myrb_cmd_opcode op, struct scsi_device *sdev,
229 struct myrb_pdev_state *pdev_info)
230 {
231 struct myrb_cmdblk *cmd_blk = &cb->dcmd_blk;
232 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
233 unsigned short status;
234 dma_addr_t pdev_info_addr;
235
236 pdev_info_addr = dma_map_single(&cb->pdev->dev, pdev_info,
237 sizeof(struct myrb_pdev_state),
238 DMA_FROM_DEVICE);
239 if (dma_mapping_error(&cb->pdev->dev, pdev_info_addr))
240 return MYRB_STATUS_SUBSYS_FAILED;
241
242 mutex_lock(&cb->dcmd_mutex);
243 myrb_reset_cmd(cmd_blk);
244 mbox->type3D.id = MYRB_DCMD_TAG;
245 mbox->type3D.opcode = op;
246 mbox->type3D.channel = sdev->channel;
247 mbox->type3D.target = sdev->id;
248 mbox->type3D.addr = pdev_info_addr;
249 status = myrb_exec_cmd(cb, cmd_blk);
250 mutex_unlock(&cb->dcmd_mutex);
251 dma_unmap_single(&cb->pdev->dev, pdev_info_addr,
252 sizeof(struct myrb_pdev_state), DMA_FROM_DEVICE);
253 if (status == MYRB_STATUS_SUCCESS &&
254 mbox->type3D.opcode == MYRB_CMD_GET_DEVICE_STATE_OLD)
255 myrb_translate_devstate(pdev_info);
256
257 return status;
258 }
259
260 static char *myrb_event_msg[] = {
261 "killed because write recovery failed",
262 "killed because of SCSI bus reset failure",
263 "killed because of double check condition",
264 "killed because it was removed",
265 "killed because of gross error on SCSI chip",
266 "killed because of bad tag returned from drive",
267 "killed because of timeout on SCSI command",
268 "killed because of reset SCSI command issued from system",
269 "killed because busy or parity error count exceeded limit",
270 "killed because of 'kill drive' command from system",
271 "killed because of selection timeout",
272 "killed due to SCSI phase sequence error",
273 "killed due to unknown status",
274 };
275
276 /**
277 * myrb_get_event - get event log from HBA
278 * @cb: pointer to the hba structure
279 * @event: number of the event
280 *
281 * Execute a type 3E command and logs the event message
282 */
myrb_get_event(struct myrb_hba * cb,unsigned int event)283 static void myrb_get_event(struct myrb_hba *cb, unsigned int event)
284 {
285 struct myrb_cmdblk *cmd_blk = &cb->mcmd_blk;
286 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
287 struct myrb_log_entry *ev_buf;
288 dma_addr_t ev_addr;
289 unsigned short status;
290
291 ev_buf = dma_alloc_coherent(&cb->pdev->dev,
292 sizeof(struct myrb_log_entry),
293 &ev_addr, GFP_KERNEL);
294 if (!ev_buf)
295 return;
296
297 myrb_reset_cmd(cmd_blk);
298 mbox->type3E.id = MYRB_MCMD_TAG;
299 mbox->type3E.opcode = MYRB_CMD_EVENT_LOG_OPERATION;
300 mbox->type3E.optype = DAC960_V1_GetEventLogEntry;
301 mbox->type3E.opqual = 1;
302 mbox->type3E.ev_seq = event;
303 mbox->type3E.addr = ev_addr;
304 status = myrb_exec_cmd(cb, cmd_blk);
305 if (status != MYRB_STATUS_SUCCESS)
306 shost_printk(KERN_INFO, cb->host,
307 "Failed to get event log %d, status %04x\n",
308 event, status);
309
310 else if (ev_buf->seq_num == event) {
311 struct scsi_sense_hdr sshdr;
312
313 memset(&sshdr, 0, sizeof(sshdr));
314 scsi_normalize_sense(ev_buf->sense, 32, &sshdr);
315
316 if (sshdr.sense_key == VENDOR_SPECIFIC &&
317 sshdr.asc == 0x80 &&
318 sshdr.ascq < ARRAY_SIZE(myrb_event_msg))
319 shost_printk(KERN_CRIT, cb->host,
320 "Physical drive %d:%d: %s\n",
321 ev_buf->channel, ev_buf->target,
322 myrb_event_msg[sshdr.ascq]);
323 else
324 shost_printk(KERN_CRIT, cb->host,
325 "Physical drive %d:%d: Sense: %X/%02X/%02X\n",
326 ev_buf->channel, ev_buf->target,
327 sshdr.sense_key, sshdr.asc, sshdr.ascq);
328 }
329
330 dma_free_coherent(&cb->pdev->dev, sizeof(struct myrb_log_entry),
331 ev_buf, ev_addr);
332 }
333
334 /*
335 * myrb_get_errtable - retrieves the error table from the controller
336 *
337 * Executes a type 3 command and logs the error table from the controller.
338 */
myrb_get_errtable(struct myrb_hba * cb)339 static void myrb_get_errtable(struct myrb_hba *cb)
340 {
341 struct myrb_cmdblk *cmd_blk = &cb->mcmd_blk;
342 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
343 unsigned short status;
344 struct myrb_error_entry old_table[MYRB_MAX_CHANNELS * MYRB_MAX_TARGETS];
345
346 memcpy(&old_table, cb->err_table, sizeof(old_table));
347
348 myrb_reset_cmd(cmd_blk);
349 mbox->type3.id = MYRB_MCMD_TAG;
350 mbox->type3.opcode = MYRB_CMD_GET_ERROR_TABLE;
351 mbox->type3.addr = cb->err_table_addr;
352 status = myrb_exec_cmd(cb, cmd_blk);
353 if (status == MYRB_STATUS_SUCCESS) {
354 struct myrb_error_entry *table = cb->err_table;
355 struct myrb_error_entry *new, *old;
356 size_t err_table_offset;
357 struct scsi_device *sdev;
358
359 shost_for_each_device(sdev, cb->host) {
360 if (sdev->channel >= myrb_logical_channel(cb->host))
361 continue;
362 err_table_offset = sdev->channel * MYRB_MAX_TARGETS
363 + sdev->id;
364 new = table + err_table_offset;
365 old = &old_table[err_table_offset];
366 if (new->parity_err == old->parity_err &&
367 new->soft_err == old->soft_err &&
368 new->hard_err == old->hard_err &&
369 new->misc_err == old->misc_err)
370 continue;
371 sdev_printk(KERN_CRIT, sdev,
372 "Errors: Parity = %d, Soft = %d, Hard = %d, Misc = %d\n",
373 new->parity_err, new->soft_err,
374 new->hard_err, new->misc_err);
375 }
376 }
377 }
378
379 /*
380 * myrb_get_ldev_info - retrieves the logical device table from the controller
381 *
382 * Executes a type 3 command and updates the logical device table.
383 *
384 * Return: command status
385 */
myrb_get_ldev_info(struct myrb_hba * cb)386 static unsigned short myrb_get_ldev_info(struct myrb_hba *cb)
387 {
388 unsigned short status;
389 int ldev_num, ldev_cnt = cb->enquiry->ldev_count;
390 struct Scsi_Host *shost = cb->host;
391
392 status = myrb_exec_type3(cb, MYRB_CMD_GET_LDEV_INFO,
393 cb->ldev_info_addr);
394 if (status != MYRB_STATUS_SUCCESS)
395 return status;
396
397 for (ldev_num = 0; ldev_num < ldev_cnt; ldev_num++) {
398 struct myrb_ldev_info *old = NULL;
399 struct myrb_ldev_info *new = cb->ldev_info_buf + ldev_num;
400 struct scsi_device *sdev;
401
402 sdev = scsi_device_lookup(shost, myrb_logical_channel(shost),
403 ldev_num, 0);
404 if (!sdev) {
405 if (new->state == MYRB_DEVICE_OFFLINE)
406 continue;
407 shost_printk(KERN_INFO, shost,
408 "Adding Logical Drive %d in state %s\n",
409 ldev_num, myrb_devstate_name(new->state));
410 scsi_add_device(shost, myrb_logical_channel(shost),
411 ldev_num, 0);
412 continue;
413 }
414 old = sdev->hostdata;
415 if (new->state != old->state)
416 shost_printk(KERN_INFO, shost,
417 "Logical Drive %d is now %s\n",
418 ldev_num, myrb_devstate_name(new->state));
419 if (new->wb_enabled != old->wb_enabled)
420 sdev_printk(KERN_INFO, sdev,
421 "Logical Drive is now WRITE %s\n",
422 (new->wb_enabled ? "BACK" : "THRU"));
423 memcpy(old, new, sizeof(*new));
424 scsi_device_put(sdev);
425 }
426 return status;
427 }
428
429 /*
430 * myrb_get_rbld_progress - get rebuild progress information
431 *
432 * Executes a type 3 command and returns the rebuild progress
433 * information.
434 *
435 * Return: command status
436 */
myrb_get_rbld_progress(struct myrb_hba * cb,struct myrb_rbld_progress * rbld)437 static unsigned short myrb_get_rbld_progress(struct myrb_hba *cb,
438 struct myrb_rbld_progress *rbld)
439 {
440 struct myrb_cmdblk *cmd_blk = &cb->mcmd_blk;
441 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
442 struct myrb_rbld_progress *rbld_buf;
443 dma_addr_t rbld_addr;
444 unsigned short status;
445
446 rbld_buf = dma_alloc_coherent(&cb->pdev->dev,
447 sizeof(struct myrb_rbld_progress),
448 &rbld_addr, GFP_KERNEL);
449 if (!rbld_buf)
450 return MYRB_STATUS_RBLD_NOT_CHECKED;
451
452 myrb_reset_cmd(cmd_blk);
453 mbox->type3.id = MYRB_MCMD_TAG;
454 mbox->type3.opcode = MYRB_CMD_GET_REBUILD_PROGRESS;
455 mbox->type3.addr = rbld_addr;
456 status = myrb_exec_cmd(cb, cmd_blk);
457 if (rbld)
458 memcpy(rbld, rbld_buf, sizeof(struct myrb_rbld_progress));
459 dma_free_coherent(&cb->pdev->dev, sizeof(struct myrb_rbld_progress),
460 rbld_buf, rbld_addr);
461 return status;
462 }
463
464 /*
465 * myrb_update_rbld_progress - updates the rebuild status
466 *
467 * Updates the rebuild status for the attached logical devices.
468 */
myrb_update_rbld_progress(struct myrb_hba * cb)469 static void myrb_update_rbld_progress(struct myrb_hba *cb)
470 {
471 struct myrb_rbld_progress rbld_buf;
472 unsigned short status;
473
474 status = myrb_get_rbld_progress(cb, &rbld_buf);
475 if (status == MYRB_NO_STDBY_RBLD_OR_CHECK_IN_PROGRESS &&
476 cb->last_rbld_status == MYRB_STATUS_SUCCESS)
477 status = MYRB_STATUS_RBLD_SUCCESS;
478 if (status != MYRB_NO_STDBY_RBLD_OR_CHECK_IN_PROGRESS) {
479 unsigned int blocks_done =
480 rbld_buf.ldev_size - rbld_buf.blocks_left;
481 struct scsi_device *sdev;
482
483 sdev = scsi_device_lookup(cb->host,
484 myrb_logical_channel(cb->host),
485 rbld_buf.ldev_num, 0);
486 if (!sdev)
487 return;
488
489 switch (status) {
490 case MYRB_STATUS_SUCCESS:
491 sdev_printk(KERN_INFO, sdev,
492 "Rebuild in Progress, %d%% completed\n",
493 (100 * (blocks_done >> 7))
494 / (rbld_buf.ldev_size >> 7));
495 break;
496 case MYRB_STATUS_RBLD_FAILED_LDEV_FAILURE:
497 sdev_printk(KERN_INFO, sdev,
498 "Rebuild Failed due to Logical Drive Failure\n");
499 break;
500 case MYRB_STATUS_RBLD_FAILED_BADBLOCKS:
501 sdev_printk(KERN_INFO, sdev,
502 "Rebuild Failed due to Bad Blocks on Other Drives\n");
503 break;
504 case MYRB_STATUS_RBLD_FAILED_NEW_DRIVE_FAILED:
505 sdev_printk(KERN_INFO, sdev,
506 "Rebuild Failed due to Failure of Drive Being Rebuilt\n");
507 break;
508 case MYRB_STATUS_RBLD_SUCCESS:
509 sdev_printk(KERN_INFO, sdev,
510 "Rebuild Completed Successfully\n");
511 break;
512 case MYRB_STATUS_RBLD_SUCCESS_TERMINATED:
513 sdev_printk(KERN_INFO, sdev,
514 "Rebuild Successfully Terminated\n");
515 break;
516 default:
517 break;
518 }
519 scsi_device_put(sdev);
520 }
521 cb->last_rbld_status = status;
522 }
523
524 /*
525 * myrb_get_cc_progress - retrieve the rebuild status
526 *
527 * Execute a type 3 Command and fetch the rebuild / consistency check
528 * status.
529 */
myrb_get_cc_progress(struct myrb_hba * cb)530 static void myrb_get_cc_progress(struct myrb_hba *cb)
531 {
532 struct myrb_cmdblk *cmd_blk = &cb->mcmd_blk;
533 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
534 struct myrb_rbld_progress *rbld_buf;
535 dma_addr_t rbld_addr;
536 unsigned short status;
537
538 rbld_buf = dma_alloc_coherent(&cb->pdev->dev,
539 sizeof(struct myrb_rbld_progress),
540 &rbld_addr, GFP_KERNEL);
541 if (!rbld_buf) {
542 cb->need_cc_status = true;
543 return;
544 }
545 myrb_reset_cmd(cmd_blk);
546 mbox->type3.id = MYRB_MCMD_TAG;
547 mbox->type3.opcode = MYRB_CMD_REBUILD_STAT;
548 mbox->type3.addr = rbld_addr;
549 status = myrb_exec_cmd(cb, cmd_blk);
550 if (status == MYRB_STATUS_SUCCESS) {
551 unsigned int ldev_num = rbld_buf->ldev_num;
552 unsigned int ldev_size = rbld_buf->ldev_size;
553 unsigned int blocks_done =
554 ldev_size - rbld_buf->blocks_left;
555 struct scsi_device *sdev;
556
557 sdev = scsi_device_lookup(cb->host,
558 myrb_logical_channel(cb->host),
559 ldev_num, 0);
560 if (sdev) {
561 sdev_printk(KERN_INFO, sdev,
562 "Consistency Check in Progress: %d%% completed\n",
563 (100 * (blocks_done >> 7))
564 / (ldev_size >> 7));
565 scsi_device_put(sdev);
566 }
567 }
568 dma_free_coherent(&cb->pdev->dev, sizeof(struct myrb_rbld_progress),
569 rbld_buf, rbld_addr);
570 }
571
572 /*
573 * myrb_bgi_control - updates background initialisation status
574 *
575 * Executes a type 3B command and updates the background initialisation status
576 */
myrb_bgi_control(struct myrb_hba * cb)577 static void myrb_bgi_control(struct myrb_hba *cb)
578 {
579 struct myrb_cmdblk *cmd_blk = &cb->mcmd_blk;
580 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
581 struct myrb_bgi_status *bgi, *last_bgi;
582 dma_addr_t bgi_addr;
583 struct scsi_device *sdev = NULL;
584 unsigned short status;
585
586 bgi = dma_alloc_coherent(&cb->pdev->dev, sizeof(struct myrb_bgi_status),
587 &bgi_addr, GFP_KERNEL);
588 if (!bgi) {
589 shost_printk(KERN_ERR, cb->host,
590 "Failed to allocate bgi memory\n");
591 return;
592 }
593 myrb_reset_cmd(cmd_blk);
594 mbox->type3B.id = MYRB_DCMD_TAG;
595 mbox->type3B.opcode = MYRB_CMD_BGI_CONTROL;
596 mbox->type3B.optype = 0x20;
597 mbox->type3B.addr = bgi_addr;
598 status = myrb_exec_cmd(cb, cmd_blk);
599 last_bgi = &cb->bgi_status;
600 sdev = scsi_device_lookup(cb->host,
601 myrb_logical_channel(cb->host),
602 bgi->ldev_num, 0);
603 switch (status) {
604 case MYRB_STATUS_SUCCESS:
605 switch (bgi->status) {
606 case MYRB_BGI_INVALID:
607 break;
608 case MYRB_BGI_STARTED:
609 if (!sdev)
610 break;
611 sdev_printk(KERN_INFO, sdev,
612 "Background Initialization Started\n");
613 break;
614 case MYRB_BGI_INPROGRESS:
615 if (!sdev)
616 break;
617 if (bgi->blocks_done == last_bgi->blocks_done &&
618 bgi->ldev_num == last_bgi->ldev_num)
619 break;
620 sdev_printk(KERN_INFO, sdev,
621 "Background Initialization in Progress: %d%% completed\n",
622 (100 * (bgi->blocks_done >> 7))
623 / (bgi->ldev_size >> 7));
624 break;
625 case MYRB_BGI_SUSPENDED:
626 if (!sdev)
627 break;
628 sdev_printk(KERN_INFO, sdev,
629 "Background Initialization Suspended\n");
630 break;
631 case MYRB_BGI_CANCELLED:
632 if (!sdev)
633 break;
634 sdev_printk(KERN_INFO, sdev,
635 "Background Initialization Cancelled\n");
636 break;
637 }
638 memcpy(&cb->bgi_status, bgi, sizeof(struct myrb_bgi_status));
639 break;
640 case MYRB_STATUS_BGI_SUCCESS:
641 if (sdev && cb->bgi_status.status == MYRB_BGI_INPROGRESS)
642 sdev_printk(KERN_INFO, sdev,
643 "Background Initialization Completed Successfully\n");
644 cb->bgi_status.status = MYRB_BGI_INVALID;
645 break;
646 case MYRB_STATUS_BGI_ABORTED:
647 if (sdev && cb->bgi_status.status == MYRB_BGI_INPROGRESS)
648 sdev_printk(KERN_INFO, sdev,
649 "Background Initialization Aborted\n");
650 fallthrough;
651 case MYRB_STATUS_NO_BGI_INPROGRESS:
652 cb->bgi_status.status = MYRB_BGI_INVALID;
653 break;
654 }
655 if (sdev)
656 scsi_device_put(sdev);
657 dma_free_coherent(&cb->pdev->dev, sizeof(struct myrb_bgi_status),
658 bgi, bgi_addr);
659 }
660
661 /*
662 * myrb_hba_enquiry - updates the controller status
663 *
664 * Executes a DAC_V1_Enquiry command and updates the controller status.
665 *
666 * Return: command status
667 */
myrb_hba_enquiry(struct myrb_hba * cb)668 static unsigned short myrb_hba_enquiry(struct myrb_hba *cb)
669 {
670 struct myrb_enquiry old, *new;
671 unsigned short status;
672
673 memcpy(&old, cb->enquiry, sizeof(struct myrb_enquiry));
674
675 status = myrb_exec_type3(cb, MYRB_CMD_ENQUIRY, cb->enquiry_addr);
676 if (status != MYRB_STATUS_SUCCESS)
677 return status;
678
679 new = cb->enquiry;
680 if (new->ldev_count > old.ldev_count) {
681 int ldev_num = old.ldev_count - 1;
682
683 while (++ldev_num < new->ldev_count)
684 shost_printk(KERN_CRIT, cb->host,
685 "Logical Drive %d Now Exists\n",
686 ldev_num);
687 }
688 if (new->ldev_count < old.ldev_count) {
689 int ldev_num = new->ldev_count - 1;
690
691 while (++ldev_num < old.ldev_count)
692 shost_printk(KERN_CRIT, cb->host,
693 "Logical Drive %d No Longer Exists\n",
694 ldev_num);
695 }
696 if (new->status.deferred != old.status.deferred)
697 shost_printk(KERN_CRIT, cb->host,
698 "Deferred Write Error Flag is now %s\n",
699 (new->status.deferred ? "TRUE" : "FALSE"));
700 if (new->ev_seq != old.ev_seq) {
701 cb->new_ev_seq = new->ev_seq;
702 cb->need_err_info = true;
703 shost_printk(KERN_INFO, cb->host,
704 "Event log %d/%d (%d/%d) available\n",
705 cb->old_ev_seq, cb->new_ev_seq,
706 old.ev_seq, new->ev_seq);
707 }
708 if ((new->ldev_critical > 0 &&
709 new->ldev_critical != old.ldev_critical) ||
710 (new->ldev_offline > 0 &&
711 new->ldev_offline != old.ldev_offline) ||
712 (new->ldev_count != old.ldev_count)) {
713 shost_printk(KERN_INFO, cb->host,
714 "Logical drive count changed (%d/%d/%d)\n",
715 new->ldev_critical,
716 new->ldev_offline,
717 new->ldev_count);
718 cb->need_ldev_info = true;
719 }
720 if (new->pdev_dead > 0 ||
721 new->pdev_dead != old.pdev_dead ||
722 time_after_eq(jiffies, cb->secondary_monitor_time
723 + MYRB_SECONDARY_MONITOR_INTERVAL)) {
724 cb->need_bgi_status = cb->bgi_status_supported;
725 cb->secondary_monitor_time = jiffies;
726 }
727 if (new->rbld == MYRB_STDBY_RBLD_IN_PROGRESS ||
728 new->rbld == MYRB_BG_RBLD_IN_PROGRESS ||
729 old.rbld == MYRB_STDBY_RBLD_IN_PROGRESS ||
730 old.rbld == MYRB_BG_RBLD_IN_PROGRESS) {
731 cb->need_rbld = true;
732 cb->rbld_first = (new->ldev_critical < old.ldev_critical);
733 }
734 if (old.rbld == MYRB_BG_CHECK_IN_PROGRESS)
735 switch (new->rbld) {
736 case MYRB_NO_STDBY_RBLD_OR_CHECK_IN_PROGRESS:
737 shost_printk(KERN_INFO, cb->host,
738 "Consistency Check Completed Successfully\n");
739 break;
740 case MYRB_STDBY_RBLD_IN_PROGRESS:
741 case MYRB_BG_RBLD_IN_PROGRESS:
742 break;
743 case MYRB_BG_CHECK_IN_PROGRESS:
744 cb->need_cc_status = true;
745 break;
746 case MYRB_STDBY_RBLD_COMPLETED_WITH_ERROR:
747 shost_printk(KERN_INFO, cb->host,
748 "Consistency Check Completed with Error\n");
749 break;
750 case MYRB_BG_RBLD_OR_CHECK_FAILED_DRIVE_FAILED:
751 shost_printk(KERN_INFO, cb->host,
752 "Consistency Check Failed - Physical Device Failed\n");
753 break;
754 case MYRB_BG_RBLD_OR_CHECK_FAILED_LDEV_FAILED:
755 shost_printk(KERN_INFO, cb->host,
756 "Consistency Check Failed - Logical Drive Failed\n");
757 break;
758 case MYRB_BG_RBLD_OR_CHECK_FAILED_OTHER:
759 shost_printk(KERN_INFO, cb->host,
760 "Consistency Check Failed - Other Causes\n");
761 break;
762 case MYRB_BG_RBLD_OR_CHECK_SUCCESS_TERMINATED:
763 shost_printk(KERN_INFO, cb->host,
764 "Consistency Check Successfully Terminated\n");
765 break;
766 }
767 else if (new->rbld == MYRB_BG_CHECK_IN_PROGRESS)
768 cb->need_cc_status = true;
769
770 return MYRB_STATUS_SUCCESS;
771 }
772
773 /*
774 * myrb_set_pdev_state - sets the device state for a physical device
775 *
776 * Return: command status
777 */
myrb_set_pdev_state(struct myrb_hba * cb,struct scsi_device * sdev,enum myrb_devstate state)778 static unsigned short myrb_set_pdev_state(struct myrb_hba *cb,
779 struct scsi_device *sdev, enum myrb_devstate state)
780 {
781 struct myrb_cmdblk *cmd_blk = &cb->dcmd_blk;
782 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
783 unsigned short status;
784
785 mutex_lock(&cb->dcmd_mutex);
786 mbox->type3D.opcode = MYRB_CMD_START_DEVICE;
787 mbox->type3D.id = MYRB_DCMD_TAG;
788 mbox->type3D.channel = sdev->channel;
789 mbox->type3D.target = sdev->id;
790 mbox->type3D.state = state & 0x1F;
791 status = myrb_exec_cmd(cb, cmd_blk);
792 mutex_unlock(&cb->dcmd_mutex);
793
794 return status;
795 }
796
797 /*
798 * myrb_enable_mmio - enables the Memory Mailbox Interface
799 *
800 * PD and P controller types have no memory mailbox, but still need the
801 * other dma mapped memory.
802 *
803 * Return: true on success, false otherwise.
804 */
myrb_enable_mmio(struct myrb_hba * cb,mbox_mmio_init_t mmio_init_fn)805 static bool myrb_enable_mmio(struct myrb_hba *cb, mbox_mmio_init_t mmio_init_fn)
806 {
807 void __iomem *base = cb->io_base;
808 struct pci_dev *pdev = cb->pdev;
809 size_t err_table_size;
810 size_t ldev_info_size;
811 union myrb_cmd_mbox *cmd_mbox_mem;
812 struct myrb_stat_mbox *stat_mbox_mem;
813 union myrb_cmd_mbox mbox;
814 unsigned short status;
815
816 memset(&mbox, 0, sizeof(union myrb_cmd_mbox));
817
818 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
819 dev_err(&pdev->dev, "DMA mask out of range\n");
820 return false;
821 }
822
823 cb->enquiry = dma_alloc_coherent(&pdev->dev,
824 sizeof(struct myrb_enquiry),
825 &cb->enquiry_addr, GFP_KERNEL);
826 if (!cb->enquiry)
827 return false;
828
829 err_table_size = sizeof(struct myrb_error_entry) *
830 MYRB_MAX_CHANNELS * MYRB_MAX_TARGETS;
831 cb->err_table = dma_alloc_coherent(&pdev->dev, err_table_size,
832 &cb->err_table_addr, GFP_KERNEL);
833 if (!cb->err_table)
834 return false;
835
836 ldev_info_size = sizeof(struct myrb_ldev_info) * MYRB_MAX_LDEVS;
837 cb->ldev_info_buf = dma_alloc_coherent(&pdev->dev, ldev_info_size,
838 &cb->ldev_info_addr, GFP_KERNEL);
839 if (!cb->ldev_info_buf)
840 return false;
841
842 /*
843 * Skip mailbox initialisation for PD and P Controllers
844 */
845 if (!mmio_init_fn)
846 return true;
847
848 /* These are the base addresses for the command memory mailbox array */
849 cb->cmd_mbox_size = MYRB_CMD_MBOX_COUNT * sizeof(union myrb_cmd_mbox);
850 cb->first_cmd_mbox = dma_alloc_coherent(&pdev->dev,
851 cb->cmd_mbox_size,
852 &cb->cmd_mbox_addr,
853 GFP_KERNEL);
854 if (!cb->first_cmd_mbox)
855 return false;
856
857 cmd_mbox_mem = cb->first_cmd_mbox;
858 cmd_mbox_mem += MYRB_CMD_MBOX_COUNT - 1;
859 cb->last_cmd_mbox = cmd_mbox_mem;
860 cb->next_cmd_mbox = cb->first_cmd_mbox;
861 cb->prev_cmd_mbox1 = cb->last_cmd_mbox;
862 cb->prev_cmd_mbox2 = cb->last_cmd_mbox - 1;
863
864 /* These are the base addresses for the status memory mailbox array */
865 cb->stat_mbox_size = MYRB_STAT_MBOX_COUNT *
866 sizeof(struct myrb_stat_mbox);
867 cb->first_stat_mbox = dma_alloc_coherent(&pdev->dev,
868 cb->stat_mbox_size,
869 &cb->stat_mbox_addr,
870 GFP_KERNEL);
871 if (!cb->first_stat_mbox)
872 return false;
873
874 stat_mbox_mem = cb->first_stat_mbox;
875 stat_mbox_mem += MYRB_STAT_MBOX_COUNT - 1;
876 cb->last_stat_mbox = stat_mbox_mem;
877 cb->next_stat_mbox = cb->first_stat_mbox;
878
879 /* Enable the Memory Mailbox Interface. */
880 cb->dual_mode_interface = true;
881 mbox.typeX.opcode = 0x2B;
882 mbox.typeX.id = 0;
883 mbox.typeX.opcode2 = 0x14;
884 mbox.typeX.cmd_mbox_addr = cb->cmd_mbox_addr;
885 mbox.typeX.stat_mbox_addr = cb->stat_mbox_addr;
886
887 status = mmio_init_fn(pdev, base, &mbox);
888 if (status != MYRB_STATUS_SUCCESS) {
889 cb->dual_mode_interface = false;
890 mbox.typeX.opcode2 = 0x10;
891 status = mmio_init_fn(pdev, base, &mbox);
892 if (status != MYRB_STATUS_SUCCESS) {
893 dev_err(&pdev->dev,
894 "Failed to enable mailbox, statux %02X\n",
895 status);
896 return false;
897 }
898 }
899 return true;
900 }
901
902 /*
903 * myrb_get_hba_config - reads the configuration information
904 *
905 * Reads the configuration information from the controller and
906 * initializes the controller structure.
907 *
908 * Return: 0 on success, errno otherwise
909 */
myrb_get_hba_config(struct myrb_hba * cb)910 static int myrb_get_hba_config(struct myrb_hba *cb)
911 {
912 struct myrb_enquiry2 *enquiry2;
913 dma_addr_t enquiry2_addr;
914 struct myrb_config2 *config2;
915 dma_addr_t config2_addr;
916 struct Scsi_Host *shost = cb->host;
917 struct pci_dev *pdev = cb->pdev;
918 int pchan_max = 0, pchan_cur = 0;
919 unsigned short status;
920 int ret = -ENODEV, memsize = 0;
921
922 enquiry2 = dma_alloc_coherent(&pdev->dev, sizeof(struct myrb_enquiry2),
923 &enquiry2_addr, GFP_KERNEL);
924 if (!enquiry2) {
925 shost_printk(KERN_ERR, cb->host,
926 "Failed to allocate V1 enquiry2 memory\n");
927 return -ENOMEM;
928 }
929 config2 = dma_alloc_coherent(&pdev->dev, sizeof(struct myrb_config2),
930 &config2_addr, GFP_KERNEL);
931 if (!config2) {
932 shost_printk(KERN_ERR, cb->host,
933 "Failed to allocate V1 config2 memory\n");
934 dma_free_coherent(&pdev->dev, sizeof(struct myrb_enquiry2),
935 enquiry2, enquiry2_addr);
936 return -ENOMEM;
937 }
938 mutex_lock(&cb->dma_mutex);
939 status = myrb_hba_enquiry(cb);
940 mutex_unlock(&cb->dma_mutex);
941 if (status != MYRB_STATUS_SUCCESS) {
942 shost_printk(KERN_WARNING, cb->host,
943 "Failed it issue V1 Enquiry\n");
944 goto out_free;
945 }
946
947 status = myrb_exec_type3(cb, MYRB_CMD_ENQUIRY2, enquiry2_addr);
948 if (status != MYRB_STATUS_SUCCESS) {
949 shost_printk(KERN_WARNING, cb->host,
950 "Failed to issue V1 Enquiry2\n");
951 goto out_free;
952 }
953
954 status = myrb_exec_type3(cb, MYRB_CMD_READ_CONFIG2, config2_addr);
955 if (status != MYRB_STATUS_SUCCESS) {
956 shost_printk(KERN_WARNING, cb->host,
957 "Failed to issue ReadConfig2\n");
958 goto out_free;
959 }
960
961 status = myrb_get_ldev_info(cb);
962 if (status != MYRB_STATUS_SUCCESS) {
963 shost_printk(KERN_WARNING, cb->host,
964 "Failed to get logical drive information\n");
965 goto out_free;
966 }
967
968 /*
969 * Initialize the Controller Model Name and Full Model Name fields.
970 */
971 switch (enquiry2->hw.sub_model) {
972 case DAC960_V1_P_PD_PU:
973 if (enquiry2->scsi_cap.bus_speed == MYRB_SCSI_SPEED_ULTRA)
974 strcpy(cb->model_name, "DAC960PU");
975 else
976 strcpy(cb->model_name, "DAC960PD");
977 break;
978 case DAC960_V1_PL:
979 strcpy(cb->model_name, "DAC960PL");
980 break;
981 case DAC960_V1_PG:
982 strcpy(cb->model_name, "DAC960PG");
983 break;
984 case DAC960_V1_PJ:
985 strcpy(cb->model_name, "DAC960PJ");
986 break;
987 case DAC960_V1_PR:
988 strcpy(cb->model_name, "DAC960PR");
989 break;
990 case DAC960_V1_PT:
991 strcpy(cb->model_name, "DAC960PT");
992 break;
993 case DAC960_V1_PTL0:
994 strcpy(cb->model_name, "DAC960PTL0");
995 break;
996 case DAC960_V1_PRL:
997 strcpy(cb->model_name, "DAC960PRL");
998 break;
999 case DAC960_V1_PTL1:
1000 strcpy(cb->model_name, "DAC960PTL1");
1001 break;
1002 case DAC960_V1_1164P:
1003 strcpy(cb->model_name, "eXtremeRAID 1100");
1004 break;
1005 default:
1006 shost_printk(KERN_WARNING, cb->host,
1007 "Unknown Model %X\n",
1008 enquiry2->hw.sub_model);
1009 goto out;
1010 }
1011 /*
1012 * Initialize the Controller Firmware Version field and verify that it
1013 * is a supported firmware version.
1014 * The supported firmware versions are:
1015 *
1016 * DAC1164P 5.06 and above
1017 * DAC960PTL/PRL/PJ/PG 4.06 and above
1018 * DAC960PU/PD/PL 3.51 and above
1019 * DAC960PU/PD/PL/P 2.73 and above
1020 */
1021 #if defined(CONFIG_ALPHA)
1022 /*
1023 * DEC Alpha machines were often equipped with DAC960 cards that were
1024 * OEMed from Mylex, and had their own custom firmware. Version 2.70,
1025 * the last custom FW revision to be released by DEC for these older
1026 * controllers, appears to work quite well with this driver.
1027 *
1028 * Cards tested successfully were several versions each of the PD and
1029 * PU, called by DEC the KZPSC and KZPAC, respectively, and having
1030 * the Manufacturer Numbers (from Mylex), usually on a sticker on the
1031 * back of the board, of:
1032 *
1033 * KZPSC: D040347 (1-channel) or D040348 (2-channel)
1034 * or D040349 (3-channel)
1035 * KZPAC: D040395 (1-channel) or D040396 (2-channel)
1036 * or D040397 (3-channel)
1037 */
1038 # define FIRMWARE_27X "2.70"
1039 #else
1040 # define FIRMWARE_27X "2.73"
1041 #endif
1042
1043 if (enquiry2->fw.major_version == 0) {
1044 enquiry2->fw.major_version = cb->enquiry->fw_major_version;
1045 enquiry2->fw.minor_version = cb->enquiry->fw_minor_version;
1046 enquiry2->fw.firmware_type = '0';
1047 enquiry2->fw.turn_id = 0;
1048 }
1049 snprintf(cb->fw_version, sizeof(cb->fw_version),
1050 "%u.%02u-%c-%02u",
1051 enquiry2->fw.major_version,
1052 enquiry2->fw.minor_version,
1053 enquiry2->fw.firmware_type,
1054 enquiry2->fw.turn_id);
1055 if (!((enquiry2->fw.major_version == 5 &&
1056 enquiry2->fw.minor_version >= 6) ||
1057 (enquiry2->fw.major_version == 4 &&
1058 enquiry2->fw.minor_version >= 6) ||
1059 (enquiry2->fw.major_version == 3 &&
1060 enquiry2->fw.minor_version >= 51) ||
1061 (enquiry2->fw.major_version == 2 &&
1062 strcmp(cb->fw_version, FIRMWARE_27X) >= 0))) {
1063 shost_printk(KERN_WARNING, cb->host,
1064 "Firmware Version '%s' unsupported\n",
1065 cb->fw_version);
1066 goto out;
1067 }
1068 /*
1069 * Initialize the Channels, Targets, Memory Size, and SAF-TE
1070 * Enclosure Management Enabled fields.
1071 */
1072 switch (enquiry2->hw.model) {
1073 case MYRB_5_CHANNEL_BOARD:
1074 pchan_max = 5;
1075 break;
1076 case MYRB_3_CHANNEL_BOARD:
1077 case MYRB_3_CHANNEL_ASIC_DAC:
1078 pchan_max = 3;
1079 break;
1080 case MYRB_2_CHANNEL_BOARD:
1081 pchan_max = 2;
1082 break;
1083 default:
1084 pchan_max = enquiry2->cfg_chan;
1085 break;
1086 }
1087 pchan_cur = enquiry2->cur_chan;
1088 if (enquiry2->scsi_cap.bus_width == MYRB_WIDTH_WIDE_32BIT)
1089 cb->bus_width = 32;
1090 else if (enquiry2->scsi_cap.bus_width == MYRB_WIDTH_WIDE_16BIT)
1091 cb->bus_width = 16;
1092 else
1093 cb->bus_width = 8;
1094 cb->ldev_block_size = enquiry2->ldev_block_size;
1095 shost->max_channel = pchan_cur;
1096 shost->max_id = enquiry2->max_targets;
1097 memsize = enquiry2->mem_size >> 20;
1098 cb->safte_enabled = (enquiry2->fault_mgmt == MYRB_FAULT_SAFTE);
1099 /*
1100 * Initialize the Controller Queue Depth, Driver Queue Depth,
1101 * Logical Drive Count, Maximum Blocks per Command, Controller
1102 * Scatter/Gather Limit, and Driver Scatter/Gather Limit.
1103 * The Driver Queue Depth must be at most one less than the
1104 * Controller Queue Depth to allow for an automatic drive
1105 * rebuild operation.
1106 */
1107 shost->can_queue = cb->enquiry->max_tcq;
1108 if (shost->can_queue < 3)
1109 shost->can_queue = enquiry2->max_cmds;
1110 if (shost->can_queue < 3)
1111 /* Play safe and disable TCQ */
1112 shost->can_queue = 1;
1113
1114 if (shost->can_queue > MYRB_CMD_MBOX_COUNT - 2)
1115 shost->can_queue = MYRB_CMD_MBOX_COUNT - 2;
1116 shost->max_sectors = enquiry2->max_sectors;
1117 shost->sg_tablesize = enquiry2->max_sge;
1118 if (shost->sg_tablesize > MYRB_SCATTER_GATHER_LIMIT)
1119 shost->sg_tablesize = MYRB_SCATTER_GATHER_LIMIT;
1120 /*
1121 * Initialize the Stripe Size, Segment Size, and Geometry Translation.
1122 */
1123 cb->stripe_size = config2->blocks_per_stripe * config2->block_factor
1124 >> (10 - MYRB_BLKSIZE_BITS);
1125 cb->segment_size = config2->blocks_per_cacheline * config2->block_factor
1126 >> (10 - MYRB_BLKSIZE_BITS);
1127 /* Assume 255/63 translation */
1128 cb->ldev_geom_heads = 255;
1129 cb->ldev_geom_sectors = 63;
1130 if (config2->drive_geometry) {
1131 cb->ldev_geom_heads = 128;
1132 cb->ldev_geom_sectors = 32;
1133 }
1134
1135 /*
1136 * Initialize the Background Initialization Status.
1137 */
1138 if ((cb->fw_version[0] == '4' &&
1139 strcmp(cb->fw_version, "4.08") >= 0) ||
1140 (cb->fw_version[0] == '5' &&
1141 strcmp(cb->fw_version, "5.08") >= 0)) {
1142 cb->bgi_status_supported = true;
1143 myrb_bgi_control(cb);
1144 }
1145 cb->last_rbld_status = MYRB_NO_STDBY_RBLD_OR_CHECK_IN_PROGRESS;
1146 ret = 0;
1147
1148 out:
1149 shost_printk(KERN_INFO, cb->host,
1150 "Configuring %s PCI RAID Controller\n", cb->model_name);
1151 shost_printk(KERN_INFO, cb->host,
1152 " Firmware Version: %s, Memory Size: %dMB\n",
1153 cb->fw_version, memsize);
1154 if (cb->io_addr == 0)
1155 shost_printk(KERN_INFO, cb->host,
1156 " I/O Address: n/a, PCI Address: 0x%lX, IRQ Channel: %d\n",
1157 (unsigned long)cb->pci_addr, cb->irq);
1158 else
1159 shost_printk(KERN_INFO, cb->host,
1160 " I/O Address: 0x%lX, PCI Address: 0x%lX, IRQ Channel: %d\n",
1161 (unsigned long)cb->io_addr, (unsigned long)cb->pci_addr,
1162 cb->irq);
1163 shost_printk(KERN_INFO, cb->host,
1164 " Controller Queue Depth: %d, Maximum Blocks per Command: %d\n",
1165 cb->host->can_queue, cb->host->max_sectors);
1166 shost_printk(KERN_INFO, cb->host,
1167 " Driver Queue Depth: %d, Scatter/Gather Limit: %d of %d Segments\n",
1168 cb->host->can_queue, cb->host->sg_tablesize,
1169 MYRB_SCATTER_GATHER_LIMIT);
1170 shost_printk(KERN_INFO, cb->host,
1171 " Stripe Size: %dKB, Segment Size: %dKB, BIOS Geometry: %d/%d%s\n",
1172 cb->stripe_size, cb->segment_size,
1173 cb->ldev_geom_heads, cb->ldev_geom_sectors,
1174 cb->safte_enabled ?
1175 " SAF-TE Enclosure Management Enabled" : "");
1176 shost_printk(KERN_INFO, cb->host,
1177 " Physical: %d/%d channels %d/%d/%d devices\n",
1178 pchan_cur, pchan_max, 0, cb->enquiry->pdev_dead,
1179 cb->host->max_id);
1180
1181 shost_printk(KERN_INFO, cb->host,
1182 " Logical: 1/1 channels, %d/%d disks\n",
1183 cb->enquiry->ldev_count, MYRB_MAX_LDEVS);
1184
1185 out_free:
1186 dma_free_coherent(&pdev->dev, sizeof(struct myrb_enquiry2),
1187 enquiry2, enquiry2_addr);
1188 dma_free_coherent(&pdev->dev, sizeof(struct myrb_config2),
1189 config2, config2_addr);
1190
1191 return ret;
1192 }
1193
1194 /*
1195 * myrb_unmap - unmaps controller structures
1196 */
myrb_unmap(struct myrb_hba * cb)1197 static void myrb_unmap(struct myrb_hba *cb)
1198 {
1199 if (cb->ldev_info_buf) {
1200 size_t ldev_info_size = sizeof(struct myrb_ldev_info) *
1201 MYRB_MAX_LDEVS;
1202 dma_free_coherent(&cb->pdev->dev, ldev_info_size,
1203 cb->ldev_info_buf, cb->ldev_info_addr);
1204 cb->ldev_info_buf = NULL;
1205 }
1206 if (cb->err_table) {
1207 size_t err_table_size = sizeof(struct myrb_error_entry) *
1208 MYRB_MAX_CHANNELS * MYRB_MAX_TARGETS;
1209 dma_free_coherent(&cb->pdev->dev, err_table_size,
1210 cb->err_table, cb->err_table_addr);
1211 cb->err_table = NULL;
1212 }
1213 if (cb->enquiry) {
1214 dma_free_coherent(&cb->pdev->dev, sizeof(struct myrb_enquiry),
1215 cb->enquiry, cb->enquiry_addr);
1216 cb->enquiry = NULL;
1217 }
1218 if (cb->first_stat_mbox) {
1219 dma_free_coherent(&cb->pdev->dev, cb->stat_mbox_size,
1220 cb->first_stat_mbox, cb->stat_mbox_addr);
1221 cb->first_stat_mbox = NULL;
1222 }
1223 if (cb->first_cmd_mbox) {
1224 dma_free_coherent(&cb->pdev->dev, cb->cmd_mbox_size,
1225 cb->first_cmd_mbox, cb->cmd_mbox_addr);
1226 cb->first_cmd_mbox = NULL;
1227 }
1228 }
1229
1230 /*
1231 * myrb_cleanup - cleanup controller structures
1232 */
myrb_cleanup(struct myrb_hba * cb)1233 static void myrb_cleanup(struct myrb_hba *cb)
1234 {
1235 struct pci_dev *pdev = cb->pdev;
1236
1237 /* Free the memory mailbox, status, and related structures */
1238 myrb_unmap(cb);
1239
1240 if (cb->mmio_base) {
1241 if (cb->disable_intr)
1242 cb->disable_intr(cb->io_base);
1243 iounmap(cb->mmio_base);
1244 }
1245 if (cb->irq)
1246 free_irq(cb->irq, cb);
1247 if (cb->io_addr)
1248 release_region(cb->io_addr, 0x80);
1249 pci_set_drvdata(pdev, NULL);
1250 pci_disable_device(pdev);
1251 scsi_host_put(cb->host);
1252 }
1253
myrb_host_reset(struct scsi_cmnd * scmd)1254 static int myrb_host_reset(struct scsi_cmnd *scmd)
1255 {
1256 struct Scsi_Host *shost = scmd->device->host;
1257 struct myrb_hba *cb = shost_priv(shost);
1258
1259 cb->reset(cb->io_base);
1260 return SUCCESS;
1261 }
1262
myrb_pthru_queuecommand(struct Scsi_Host * shost,struct scsi_cmnd * scmd)1263 static int myrb_pthru_queuecommand(struct Scsi_Host *shost,
1264 struct scsi_cmnd *scmd)
1265 {
1266 struct request *rq = scsi_cmd_to_rq(scmd);
1267 struct myrb_hba *cb = shost_priv(shost);
1268 struct myrb_cmdblk *cmd_blk = scsi_cmd_priv(scmd);
1269 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
1270 struct myrb_dcdb *dcdb;
1271 dma_addr_t dcdb_addr;
1272 struct scsi_device *sdev = scmd->device;
1273 struct scatterlist *sgl;
1274 unsigned long flags;
1275 int nsge;
1276
1277 myrb_reset_cmd(cmd_blk);
1278 dcdb = dma_pool_alloc(cb->dcdb_pool, GFP_ATOMIC, &dcdb_addr);
1279 if (!dcdb)
1280 return SCSI_MLQUEUE_HOST_BUSY;
1281 nsge = scsi_dma_map(scmd);
1282 if (nsge > 1) {
1283 dma_pool_free(cb->dcdb_pool, dcdb, dcdb_addr);
1284 scmd->result = (DID_ERROR << 16);
1285 scsi_done(scmd);
1286 return 0;
1287 }
1288
1289 mbox->type3.opcode = MYRB_CMD_DCDB;
1290 mbox->type3.id = rq->tag + 3;
1291 mbox->type3.addr = dcdb_addr;
1292 dcdb->channel = sdev->channel;
1293 dcdb->target = sdev->id;
1294 switch (scmd->sc_data_direction) {
1295 case DMA_NONE:
1296 dcdb->data_xfer = MYRB_DCDB_XFER_NONE;
1297 break;
1298 case DMA_TO_DEVICE:
1299 dcdb->data_xfer = MYRB_DCDB_XFER_SYSTEM_TO_DEVICE;
1300 break;
1301 case DMA_FROM_DEVICE:
1302 dcdb->data_xfer = MYRB_DCDB_XFER_DEVICE_TO_SYSTEM;
1303 break;
1304 default:
1305 dcdb->data_xfer = MYRB_DCDB_XFER_ILLEGAL;
1306 break;
1307 }
1308 dcdb->early_status = false;
1309 if (rq->timeout <= 10)
1310 dcdb->timeout = MYRB_DCDB_TMO_10_SECS;
1311 else if (rq->timeout <= 60)
1312 dcdb->timeout = MYRB_DCDB_TMO_60_SECS;
1313 else if (rq->timeout <= 600)
1314 dcdb->timeout = MYRB_DCDB_TMO_10_MINS;
1315 else
1316 dcdb->timeout = MYRB_DCDB_TMO_24_HRS;
1317 dcdb->no_autosense = false;
1318 dcdb->allow_disconnect = true;
1319 sgl = scsi_sglist(scmd);
1320 dcdb->dma_addr = sg_dma_address(sgl);
1321 if (sg_dma_len(sgl) > USHRT_MAX) {
1322 dcdb->xfer_len_lo = sg_dma_len(sgl) & 0xffff;
1323 dcdb->xfer_len_hi4 = sg_dma_len(sgl) >> 16;
1324 } else {
1325 dcdb->xfer_len_lo = sg_dma_len(sgl);
1326 dcdb->xfer_len_hi4 = 0;
1327 }
1328 dcdb->cdb_len = scmd->cmd_len;
1329 dcdb->sense_len = sizeof(dcdb->sense);
1330 memcpy(&dcdb->cdb, scmd->cmnd, scmd->cmd_len);
1331
1332 spin_lock_irqsave(&cb->queue_lock, flags);
1333 cb->qcmd(cb, cmd_blk);
1334 spin_unlock_irqrestore(&cb->queue_lock, flags);
1335 return 0;
1336 }
1337
myrb_inquiry(struct myrb_hba * cb,struct scsi_cmnd * scmd)1338 static void myrb_inquiry(struct myrb_hba *cb,
1339 struct scsi_cmnd *scmd)
1340 {
1341 unsigned char inq[36] = {
1342 0x00, 0x00, 0x03, 0x02, 0x20, 0x00, 0x01, 0x00,
1343 0x4d, 0x59, 0x4c, 0x45, 0x58, 0x20, 0x20, 0x20,
1344 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
1345 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
1346 0x20, 0x20, 0x20, 0x20,
1347 };
1348
1349 if (cb->bus_width > 16)
1350 inq[7] |= 1 << 6;
1351 if (cb->bus_width > 8)
1352 inq[7] |= 1 << 5;
1353 memcpy(&inq[16], cb->model_name, 16);
1354 memcpy(&inq[32], cb->fw_version, 1);
1355 memcpy(&inq[33], &cb->fw_version[2], 2);
1356 memcpy(&inq[35], &cb->fw_version[7], 1);
1357
1358 scsi_sg_copy_from_buffer(scmd, (void *)inq, 36);
1359 }
1360
1361 static void
myrb_mode_sense(struct myrb_hba * cb,struct scsi_cmnd * scmd,struct myrb_ldev_info * ldev_info)1362 myrb_mode_sense(struct myrb_hba *cb, struct scsi_cmnd *scmd,
1363 struct myrb_ldev_info *ldev_info)
1364 {
1365 unsigned char modes[32], *mode_pg;
1366 bool dbd;
1367 size_t mode_len;
1368
1369 dbd = (scmd->cmnd[1] & 0x08) == 0x08;
1370 if (dbd) {
1371 mode_len = 24;
1372 mode_pg = &modes[4];
1373 } else {
1374 mode_len = 32;
1375 mode_pg = &modes[12];
1376 }
1377 memset(modes, 0, sizeof(modes));
1378 modes[0] = mode_len - 1;
1379 if (!dbd) {
1380 unsigned char *block_desc = &modes[4];
1381
1382 modes[3] = 8;
1383 put_unaligned_be32(ldev_info->size, &block_desc[0]);
1384 put_unaligned_be32(cb->ldev_block_size, &block_desc[5]);
1385 }
1386 mode_pg[0] = 0x08;
1387 mode_pg[1] = 0x12;
1388 if (ldev_info->wb_enabled)
1389 mode_pg[2] |= 0x04;
1390 if (cb->segment_size) {
1391 mode_pg[2] |= 0x08;
1392 put_unaligned_be16(cb->segment_size, &mode_pg[14]);
1393 }
1394
1395 scsi_sg_copy_from_buffer(scmd, modes, mode_len);
1396 }
1397
myrb_request_sense(struct myrb_hba * cb,struct scsi_cmnd * scmd)1398 static void myrb_request_sense(struct myrb_hba *cb,
1399 struct scsi_cmnd *scmd)
1400 {
1401 scsi_build_sense(scmd, 0, NO_SENSE, 0, 0);
1402 scsi_sg_copy_from_buffer(scmd, scmd->sense_buffer,
1403 SCSI_SENSE_BUFFERSIZE);
1404 }
1405
myrb_read_capacity(struct myrb_hba * cb,struct scsi_cmnd * scmd,struct myrb_ldev_info * ldev_info)1406 static void myrb_read_capacity(struct myrb_hba *cb, struct scsi_cmnd *scmd,
1407 struct myrb_ldev_info *ldev_info)
1408 {
1409 unsigned char data[8];
1410
1411 dev_dbg(&scmd->device->sdev_gendev,
1412 "Capacity %u, blocksize %u\n",
1413 ldev_info->size, cb->ldev_block_size);
1414 put_unaligned_be32(ldev_info->size - 1, &data[0]);
1415 put_unaligned_be32(cb->ldev_block_size, &data[4]);
1416 scsi_sg_copy_from_buffer(scmd, data, 8);
1417 }
1418
myrb_ldev_queuecommand(struct Scsi_Host * shost,struct scsi_cmnd * scmd)1419 static int myrb_ldev_queuecommand(struct Scsi_Host *shost,
1420 struct scsi_cmnd *scmd)
1421 {
1422 struct myrb_hba *cb = shost_priv(shost);
1423 struct myrb_cmdblk *cmd_blk = scsi_cmd_priv(scmd);
1424 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
1425 struct myrb_ldev_info *ldev_info;
1426 struct scsi_device *sdev = scmd->device;
1427 struct scatterlist *sgl;
1428 unsigned long flags;
1429 u64 lba;
1430 u32 block_cnt;
1431 int nsge;
1432
1433 ldev_info = sdev->hostdata;
1434 if (ldev_info->state != MYRB_DEVICE_ONLINE &&
1435 ldev_info->state != MYRB_DEVICE_WO) {
1436 dev_dbg(&shost->shost_gendev, "ldev %u in state %x, skip\n",
1437 sdev->id, ldev_info ? ldev_info->state : 0xff);
1438 scmd->result = (DID_BAD_TARGET << 16);
1439 scsi_done(scmd);
1440 return 0;
1441 }
1442 switch (scmd->cmnd[0]) {
1443 case TEST_UNIT_READY:
1444 scmd->result = (DID_OK << 16);
1445 scsi_done(scmd);
1446 return 0;
1447 case INQUIRY:
1448 if (scmd->cmnd[1] & 1) {
1449 /* Illegal request, invalid field in CDB */
1450 scsi_build_sense(scmd, 0, ILLEGAL_REQUEST, 0x24, 0);
1451 } else {
1452 myrb_inquiry(cb, scmd);
1453 scmd->result = (DID_OK << 16);
1454 }
1455 scsi_done(scmd);
1456 return 0;
1457 case SYNCHRONIZE_CACHE:
1458 scmd->result = (DID_OK << 16);
1459 scsi_done(scmd);
1460 return 0;
1461 case MODE_SENSE:
1462 if ((scmd->cmnd[2] & 0x3F) != 0x3F &&
1463 (scmd->cmnd[2] & 0x3F) != 0x08) {
1464 /* Illegal request, invalid field in CDB */
1465 scsi_build_sense(scmd, 0, ILLEGAL_REQUEST, 0x24, 0);
1466 } else {
1467 myrb_mode_sense(cb, scmd, ldev_info);
1468 scmd->result = (DID_OK << 16);
1469 }
1470 scsi_done(scmd);
1471 return 0;
1472 case READ_CAPACITY:
1473 if ((scmd->cmnd[1] & 1) ||
1474 (scmd->cmnd[8] & 1)) {
1475 /* Illegal request, invalid field in CDB */
1476 scsi_build_sense(scmd, 0, ILLEGAL_REQUEST, 0x24, 0);
1477 scsi_done(scmd);
1478 return 0;
1479 }
1480 lba = get_unaligned_be32(&scmd->cmnd[2]);
1481 if (lba) {
1482 /* Illegal request, invalid field in CDB */
1483 scsi_build_sense(scmd, 0, ILLEGAL_REQUEST, 0x24, 0);
1484 scsi_done(scmd);
1485 return 0;
1486 }
1487 myrb_read_capacity(cb, scmd, ldev_info);
1488 scsi_done(scmd);
1489 return 0;
1490 case REQUEST_SENSE:
1491 myrb_request_sense(cb, scmd);
1492 scmd->result = (DID_OK << 16);
1493 return 0;
1494 case SEND_DIAGNOSTIC:
1495 if (scmd->cmnd[1] != 0x04) {
1496 /* Illegal request, invalid field in CDB */
1497 scsi_build_sense(scmd, 0, ILLEGAL_REQUEST, 0x24, 0);
1498 } else {
1499 /* Assume good status */
1500 scmd->result = (DID_OK << 16);
1501 }
1502 scsi_done(scmd);
1503 return 0;
1504 case READ_6:
1505 if (ldev_info->state == MYRB_DEVICE_WO) {
1506 /* Data protect, attempt to read invalid data */
1507 scsi_build_sense(scmd, 0, DATA_PROTECT, 0x21, 0x06);
1508 scsi_done(scmd);
1509 return 0;
1510 }
1511 fallthrough;
1512 case WRITE_6:
1513 lba = (((scmd->cmnd[1] & 0x1F) << 16) |
1514 (scmd->cmnd[2] << 8) |
1515 scmd->cmnd[3]);
1516 block_cnt = scmd->cmnd[4];
1517 break;
1518 case READ_10:
1519 if (ldev_info->state == MYRB_DEVICE_WO) {
1520 /* Data protect, attempt to read invalid data */
1521 scsi_build_sense(scmd, 0, DATA_PROTECT, 0x21, 0x06);
1522 scsi_done(scmd);
1523 return 0;
1524 }
1525 fallthrough;
1526 case WRITE_10:
1527 case VERIFY: /* 0x2F */
1528 case WRITE_VERIFY: /* 0x2E */
1529 lba = get_unaligned_be32(&scmd->cmnd[2]);
1530 block_cnt = get_unaligned_be16(&scmd->cmnd[7]);
1531 break;
1532 case READ_12:
1533 if (ldev_info->state == MYRB_DEVICE_WO) {
1534 /* Data protect, attempt to read invalid data */
1535 scsi_build_sense(scmd, 0, DATA_PROTECT, 0x21, 0x06);
1536 scsi_done(scmd);
1537 return 0;
1538 }
1539 fallthrough;
1540 case WRITE_12:
1541 case VERIFY_12: /* 0xAF */
1542 case WRITE_VERIFY_12: /* 0xAE */
1543 lba = get_unaligned_be32(&scmd->cmnd[2]);
1544 block_cnt = get_unaligned_be32(&scmd->cmnd[6]);
1545 break;
1546 default:
1547 /* Illegal request, invalid opcode */
1548 scsi_build_sense(scmd, 0, ILLEGAL_REQUEST, 0x20, 0);
1549 scsi_done(scmd);
1550 return 0;
1551 }
1552
1553 myrb_reset_cmd(cmd_blk);
1554 mbox->type5.id = scsi_cmd_to_rq(scmd)->tag + 3;
1555 if (scmd->sc_data_direction == DMA_NONE)
1556 goto submit;
1557 nsge = scsi_dma_map(scmd);
1558 if (nsge == 1) {
1559 sgl = scsi_sglist(scmd);
1560 if (scmd->sc_data_direction == DMA_FROM_DEVICE)
1561 mbox->type5.opcode = MYRB_CMD_READ;
1562 else
1563 mbox->type5.opcode = MYRB_CMD_WRITE;
1564
1565 mbox->type5.ld.xfer_len = block_cnt;
1566 mbox->type5.ld.ldev_num = sdev->id;
1567 mbox->type5.lba = lba;
1568 mbox->type5.addr = (u32)sg_dma_address(sgl);
1569 } else {
1570 struct myrb_sge *hw_sgl;
1571 dma_addr_t hw_sgl_addr;
1572 int i;
1573
1574 hw_sgl = dma_pool_alloc(cb->sg_pool, GFP_ATOMIC, &hw_sgl_addr);
1575 if (!hw_sgl)
1576 return SCSI_MLQUEUE_HOST_BUSY;
1577
1578 cmd_blk->sgl = hw_sgl;
1579 cmd_blk->sgl_addr = hw_sgl_addr;
1580
1581 if (scmd->sc_data_direction == DMA_FROM_DEVICE)
1582 mbox->type5.opcode = MYRB_CMD_READ_SG;
1583 else
1584 mbox->type5.opcode = MYRB_CMD_WRITE_SG;
1585
1586 mbox->type5.ld.xfer_len = block_cnt;
1587 mbox->type5.ld.ldev_num = sdev->id;
1588 mbox->type5.lba = lba;
1589 mbox->type5.addr = hw_sgl_addr;
1590 mbox->type5.sg_count = nsge;
1591
1592 scsi_for_each_sg(scmd, sgl, nsge, i) {
1593 hw_sgl->sge_addr = (u32)sg_dma_address(sgl);
1594 hw_sgl->sge_count = (u32)sg_dma_len(sgl);
1595 hw_sgl++;
1596 }
1597 }
1598 submit:
1599 spin_lock_irqsave(&cb->queue_lock, flags);
1600 cb->qcmd(cb, cmd_blk);
1601 spin_unlock_irqrestore(&cb->queue_lock, flags);
1602
1603 return 0;
1604 }
1605
myrb_queuecommand(struct Scsi_Host * shost,struct scsi_cmnd * scmd)1606 static int myrb_queuecommand(struct Scsi_Host *shost,
1607 struct scsi_cmnd *scmd)
1608 {
1609 struct scsi_device *sdev = scmd->device;
1610
1611 if (sdev->channel > myrb_logical_channel(shost)) {
1612 scmd->result = (DID_BAD_TARGET << 16);
1613 scsi_done(scmd);
1614 return 0;
1615 }
1616 if (sdev->channel == myrb_logical_channel(shost))
1617 return myrb_ldev_queuecommand(shost, scmd);
1618
1619 return myrb_pthru_queuecommand(shost, scmd);
1620 }
1621
myrb_ldev_slave_alloc(struct scsi_device * sdev)1622 static int myrb_ldev_slave_alloc(struct scsi_device *sdev)
1623 {
1624 struct myrb_hba *cb = shost_priv(sdev->host);
1625 struct myrb_ldev_info *ldev_info;
1626 unsigned short ldev_num = sdev->id;
1627 enum raid_level level;
1628
1629 ldev_info = cb->ldev_info_buf + ldev_num;
1630 if (!ldev_info)
1631 return -ENXIO;
1632
1633 sdev->hostdata = kzalloc(sizeof(*ldev_info), GFP_KERNEL);
1634 if (!sdev->hostdata)
1635 return -ENOMEM;
1636 dev_dbg(&sdev->sdev_gendev,
1637 "slave alloc ldev %d state %x\n",
1638 ldev_num, ldev_info->state);
1639 memcpy(sdev->hostdata, ldev_info,
1640 sizeof(*ldev_info));
1641 switch (ldev_info->raid_level) {
1642 case MYRB_RAID_LEVEL0:
1643 level = RAID_LEVEL_LINEAR;
1644 break;
1645 case MYRB_RAID_LEVEL1:
1646 level = RAID_LEVEL_1;
1647 break;
1648 case MYRB_RAID_LEVEL3:
1649 level = RAID_LEVEL_3;
1650 break;
1651 case MYRB_RAID_LEVEL5:
1652 level = RAID_LEVEL_5;
1653 break;
1654 case MYRB_RAID_LEVEL6:
1655 level = RAID_LEVEL_6;
1656 break;
1657 case MYRB_RAID_JBOD:
1658 level = RAID_LEVEL_JBOD;
1659 break;
1660 default:
1661 level = RAID_LEVEL_UNKNOWN;
1662 break;
1663 }
1664 raid_set_level(myrb_raid_template, &sdev->sdev_gendev, level);
1665 return 0;
1666 }
1667
myrb_pdev_slave_alloc(struct scsi_device * sdev)1668 static int myrb_pdev_slave_alloc(struct scsi_device *sdev)
1669 {
1670 struct myrb_hba *cb = shost_priv(sdev->host);
1671 struct myrb_pdev_state *pdev_info;
1672 unsigned short status;
1673
1674 if (sdev->id > MYRB_MAX_TARGETS)
1675 return -ENXIO;
1676
1677 pdev_info = kzalloc(sizeof(*pdev_info), GFP_KERNEL);
1678 if (!pdev_info)
1679 return -ENOMEM;
1680
1681 status = myrb_exec_type3D(cb, MYRB_CMD_GET_DEVICE_STATE,
1682 sdev, pdev_info);
1683 if (status != MYRB_STATUS_SUCCESS) {
1684 dev_dbg(&sdev->sdev_gendev,
1685 "Failed to get device state, status %x\n",
1686 status);
1687 kfree(pdev_info);
1688 return -ENXIO;
1689 }
1690 if (!pdev_info->present) {
1691 dev_dbg(&sdev->sdev_gendev,
1692 "device not present, skip\n");
1693 kfree(pdev_info);
1694 return -ENXIO;
1695 }
1696 dev_dbg(&sdev->sdev_gendev,
1697 "slave alloc pdev %d:%d state %x\n",
1698 sdev->channel, sdev->id, pdev_info->state);
1699 sdev->hostdata = pdev_info;
1700
1701 return 0;
1702 }
1703
myrb_slave_alloc(struct scsi_device * sdev)1704 static int myrb_slave_alloc(struct scsi_device *sdev)
1705 {
1706 if (sdev->channel > myrb_logical_channel(sdev->host))
1707 return -ENXIO;
1708
1709 if (sdev->lun > 0)
1710 return -ENXIO;
1711
1712 if (sdev->channel == myrb_logical_channel(sdev->host))
1713 return myrb_ldev_slave_alloc(sdev);
1714
1715 return myrb_pdev_slave_alloc(sdev);
1716 }
1717
myrb_slave_configure(struct scsi_device * sdev)1718 static int myrb_slave_configure(struct scsi_device *sdev)
1719 {
1720 struct myrb_ldev_info *ldev_info;
1721
1722 if (sdev->channel > myrb_logical_channel(sdev->host))
1723 return -ENXIO;
1724
1725 if (sdev->channel < myrb_logical_channel(sdev->host)) {
1726 sdev->no_uld_attach = 1;
1727 return 0;
1728 }
1729 if (sdev->lun != 0)
1730 return -ENXIO;
1731
1732 ldev_info = sdev->hostdata;
1733 if (!ldev_info)
1734 return -ENXIO;
1735 if (ldev_info->state != MYRB_DEVICE_ONLINE)
1736 sdev_printk(KERN_INFO, sdev,
1737 "Logical drive is %s\n",
1738 myrb_devstate_name(ldev_info->state));
1739
1740 sdev->tagged_supported = 1;
1741 return 0;
1742 }
1743
myrb_slave_destroy(struct scsi_device * sdev)1744 static void myrb_slave_destroy(struct scsi_device *sdev)
1745 {
1746 kfree(sdev->hostdata);
1747 }
1748
myrb_biosparam(struct scsi_device * sdev,struct block_device * bdev,sector_t capacity,int geom[])1749 static int myrb_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1750 sector_t capacity, int geom[])
1751 {
1752 struct myrb_hba *cb = shost_priv(sdev->host);
1753
1754 geom[0] = cb->ldev_geom_heads;
1755 geom[1] = cb->ldev_geom_sectors;
1756 geom[2] = sector_div(capacity, geom[0] * geom[1]);
1757
1758 return 0;
1759 }
1760
raid_state_show(struct device * dev,struct device_attribute * attr,char * buf)1761 static ssize_t raid_state_show(struct device *dev,
1762 struct device_attribute *attr, char *buf)
1763 {
1764 struct scsi_device *sdev = to_scsi_device(dev);
1765 struct myrb_hba *cb = shost_priv(sdev->host);
1766 int ret;
1767
1768 if (!sdev->hostdata)
1769 return snprintf(buf, 16, "Unknown\n");
1770
1771 if (sdev->channel == myrb_logical_channel(sdev->host)) {
1772 struct myrb_ldev_info *ldev_info = sdev->hostdata;
1773 const char *name;
1774
1775 name = myrb_devstate_name(ldev_info->state);
1776 if (name)
1777 ret = snprintf(buf, 64, "%s\n", name);
1778 else
1779 ret = snprintf(buf, 64, "Invalid (%02X)\n",
1780 ldev_info->state);
1781 } else {
1782 struct myrb_pdev_state *pdev_info = sdev->hostdata;
1783 unsigned short status;
1784 const char *name;
1785
1786 status = myrb_exec_type3D(cb, MYRB_CMD_GET_DEVICE_STATE,
1787 sdev, pdev_info);
1788 if (status != MYRB_STATUS_SUCCESS)
1789 sdev_printk(KERN_INFO, sdev,
1790 "Failed to get device state, status %x\n",
1791 status);
1792
1793 if (!pdev_info->present)
1794 name = "Removed";
1795 else
1796 name = myrb_devstate_name(pdev_info->state);
1797 if (name)
1798 ret = snprintf(buf, 64, "%s\n", name);
1799 else
1800 ret = snprintf(buf, 64, "Invalid (%02X)\n",
1801 pdev_info->state);
1802 }
1803 return ret;
1804 }
1805
raid_state_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1806 static ssize_t raid_state_store(struct device *dev,
1807 struct device_attribute *attr, const char *buf, size_t count)
1808 {
1809 struct scsi_device *sdev = to_scsi_device(dev);
1810 struct myrb_hba *cb = shost_priv(sdev->host);
1811 struct myrb_pdev_state *pdev_info;
1812 enum myrb_devstate new_state;
1813 unsigned short status;
1814
1815 if (!strncmp(buf, "kill", 4) ||
1816 !strncmp(buf, "offline", 7))
1817 new_state = MYRB_DEVICE_DEAD;
1818 else if (!strncmp(buf, "online", 6))
1819 new_state = MYRB_DEVICE_ONLINE;
1820 else if (!strncmp(buf, "standby", 7))
1821 new_state = MYRB_DEVICE_STANDBY;
1822 else
1823 return -EINVAL;
1824
1825 pdev_info = sdev->hostdata;
1826 if (!pdev_info) {
1827 sdev_printk(KERN_INFO, sdev,
1828 "Failed - no physical device information\n");
1829 return -ENXIO;
1830 }
1831 if (!pdev_info->present) {
1832 sdev_printk(KERN_INFO, sdev,
1833 "Failed - device not present\n");
1834 return -ENXIO;
1835 }
1836
1837 if (pdev_info->state == new_state)
1838 return count;
1839
1840 status = myrb_set_pdev_state(cb, sdev, new_state);
1841 switch (status) {
1842 case MYRB_STATUS_SUCCESS:
1843 break;
1844 case MYRB_STATUS_START_DEVICE_FAILED:
1845 sdev_printk(KERN_INFO, sdev,
1846 "Failed - Unable to Start Device\n");
1847 count = -EAGAIN;
1848 break;
1849 case MYRB_STATUS_NO_DEVICE:
1850 sdev_printk(KERN_INFO, sdev,
1851 "Failed - No Device at Address\n");
1852 count = -ENODEV;
1853 break;
1854 case MYRB_STATUS_INVALID_CHANNEL_OR_TARGET:
1855 sdev_printk(KERN_INFO, sdev,
1856 "Failed - Invalid Channel or Target or Modifier\n");
1857 count = -EINVAL;
1858 break;
1859 case MYRB_STATUS_CHANNEL_BUSY:
1860 sdev_printk(KERN_INFO, sdev,
1861 "Failed - Channel Busy\n");
1862 count = -EBUSY;
1863 break;
1864 default:
1865 sdev_printk(KERN_INFO, sdev,
1866 "Failed - Unexpected Status %04X\n", status);
1867 count = -EIO;
1868 break;
1869 }
1870 return count;
1871 }
1872 static DEVICE_ATTR_RW(raid_state);
1873
raid_level_show(struct device * dev,struct device_attribute * attr,char * buf)1874 static ssize_t raid_level_show(struct device *dev,
1875 struct device_attribute *attr, char *buf)
1876 {
1877 struct scsi_device *sdev = to_scsi_device(dev);
1878
1879 if (sdev->channel == myrb_logical_channel(sdev->host)) {
1880 struct myrb_ldev_info *ldev_info = sdev->hostdata;
1881 const char *name;
1882
1883 if (!ldev_info)
1884 return -ENXIO;
1885
1886 name = myrb_raidlevel_name(ldev_info->raid_level);
1887 if (!name)
1888 return snprintf(buf, 64, "Invalid (%02X)\n",
1889 ldev_info->state);
1890 return snprintf(buf, 64, "%s\n", name);
1891 }
1892 return snprintf(buf, 64, "Physical Drive\n");
1893 }
1894 static DEVICE_ATTR_RO(raid_level);
1895
rebuild_show(struct device * dev,struct device_attribute * attr,char * buf)1896 static ssize_t rebuild_show(struct device *dev,
1897 struct device_attribute *attr, char *buf)
1898 {
1899 struct scsi_device *sdev = to_scsi_device(dev);
1900 struct myrb_hba *cb = shost_priv(sdev->host);
1901 struct myrb_rbld_progress rbld_buf;
1902 unsigned char status;
1903
1904 if (sdev->channel < myrb_logical_channel(sdev->host))
1905 return snprintf(buf, 64, "physical device - not rebuilding\n");
1906
1907 status = myrb_get_rbld_progress(cb, &rbld_buf);
1908
1909 if (rbld_buf.ldev_num != sdev->id ||
1910 status != MYRB_STATUS_SUCCESS)
1911 return snprintf(buf, 64, "not rebuilding\n");
1912
1913 return snprintf(buf, 64, "rebuilding block %u of %u\n",
1914 rbld_buf.ldev_size - rbld_buf.blocks_left,
1915 rbld_buf.ldev_size);
1916 }
1917
rebuild_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1918 static ssize_t rebuild_store(struct device *dev,
1919 struct device_attribute *attr, const char *buf, size_t count)
1920 {
1921 struct scsi_device *sdev = to_scsi_device(dev);
1922 struct myrb_hba *cb = shost_priv(sdev->host);
1923 struct myrb_cmdblk *cmd_blk;
1924 union myrb_cmd_mbox *mbox;
1925 unsigned short status;
1926 int rc, start;
1927 const char *msg;
1928
1929 rc = kstrtoint(buf, 0, &start);
1930 if (rc)
1931 return rc;
1932
1933 if (sdev->channel >= myrb_logical_channel(sdev->host))
1934 return -ENXIO;
1935
1936 status = myrb_get_rbld_progress(cb, NULL);
1937 if (start) {
1938 if (status == MYRB_STATUS_SUCCESS) {
1939 sdev_printk(KERN_INFO, sdev,
1940 "Rebuild Not Initiated; already in progress\n");
1941 return -EALREADY;
1942 }
1943 mutex_lock(&cb->dcmd_mutex);
1944 cmd_blk = &cb->dcmd_blk;
1945 myrb_reset_cmd(cmd_blk);
1946 mbox = &cmd_blk->mbox;
1947 mbox->type3D.opcode = MYRB_CMD_REBUILD_ASYNC;
1948 mbox->type3D.id = MYRB_DCMD_TAG;
1949 mbox->type3D.channel = sdev->channel;
1950 mbox->type3D.target = sdev->id;
1951 status = myrb_exec_cmd(cb, cmd_blk);
1952 mutex_unlock(&cb->dcmd_mutex);
1953 } else {
1954 struct pci_dev *pdev = cb->pdev;
1955 unsigned char *rate;
1956 dma_addr_t rate_addr;
1957
1958 if (status != MYRB_STATUS_SUCCESS) {
1959 sdev_printk(KERN_INFO, sdev,
1960 "Rebuild Not Cancelled; not in progress\n");
1961 return 0;
1962 }
1963
1964 rate = dma_alloc_coherent(&pdev->dev, sizeof(char),
1965 &rate_addr, GFP_KERNEL);
1966 if (rate == NULL) {
1967 sdev_printk(KERN_INFO, sdev,
1968 "Cancellation of Rebuild Failed - Out of Memory\n");
1969 return -ENOMEM;
1970 }
1971 mutex_lock(&cb->dcmd_mutex);
1972 cmd_blk = &cb->dcmd_blk;
1973 myrb_reset_cmd(cmd_blk);
1974 mbox = &cmd_blk->mbox;
1975 mbox->type3R.opcode = MYRB_CMD_REBUILD_CONTROL;
1976 mbox->type3R.id = MYRB_DCMD_TAG;
1977 mbox->type3R.rbld_rate = 0xFF;
1978 mbox->type3R.addr = rate_addr;
1979 status = myrb_exec_cmd(cb, cmd_blk);
1980 dma_free_coherent(&pdev->dev, sizeof(char), rate, rate_addr);
1981 mutex_unlock(&cb->dcmd_mutex);
1982 }
1983 if (status == MYRB_STATUS_SUCCESS) {
1984 sdev_printk(KERN_INFO, sdev, "Rebuild %s\n",
1985 start ? "Initiated" : "Cancelled");
1986 return count;
1987 }
1988 if (!start) {
1989 sdev_printk(KERN_INFO, sdev,
1990 "Rebuild Not Cancelled, status 0x%x\n",
1991 status);
1992 return -EIO;
1993 }
1994
1995 switch (status) {
1996 case MYRB_STATUS_ATTEMPT_TO_RBLD_ONLINE_DRIVE:
1997 msg = "Attempt to Rebuild Online or Unresponsive Drive";
1998 break;
1999 case MYRB_STATUS_RBLD_NEW_DISK_FAILED:
2000 msg = "New Disk Failed During Rebuild";
2001 break;
2002 case MYRB_STATUS_INVALID_ADDRESS:
2003 msg = "Invalid Device Address";
2004 break;
2005 case MYRB_STATUS_RBLD_OR_CHECK_INPROGRESS:
2006 msg = "Already in Progress";
2007 break;
2008 default:
2009 msg = NULL;
2010 break;
2011 }
2012 if (msg)
2013 sdev_printk(KERN_INFO, sdev,
2014 "Rebuild Failed - %s\n", msg);
2015 else
2016 sdev_printk(KERN_INFO, sdev,
2017 "Rebuild Failed, status 0x%x\n", status);
2018
2019 return -EIO;
2020 }
2021 static DEVICE_ATTR_RW(rebuild);
2022
consistency_check_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2023 static ssize_t consistency_check_store(struct device *dev,
2024 struct device_attribute *attr, const char *buf, size_t count)
2025 {
2026 struct scsi_device *sdev = to_scsi_device(dev);
2027 struct myrb_hba *cb = shost_priv(sdev->host);
2028 struct myrb_rbld_progress rbld_buf;
2029 struct myrb_cmdblk *cmd_blk;
2030 union myrb_cmd_mbox *mbox;
2031 unsigned short ldev_num = 0xFFFF;
2032 unsigned short status;
2033 int rc, start;
2034 const char *msg;
2035
2036 rc = kstrtoint(buf, 0, &start);
2037 if (rc)
2038 return rc;
2039
2040 if (sdev->channel < myrb_logical_channel(sdev->host))
2041 return -ENXIO;
2042
2043 status = myrb_get_rbld_progress(cb, &rbld_buf);
2044 if (start) {
2045 if (status == MYRB_STATUS_SUCCESS) {
2046 sdev_printk(KERN_INFO, sdev,
2047 "Check Consistency Not Initiated; already in progress\n");
2048 return -EALREADY;
2049 }
2050 mutex_lock(&cb->dcmd_mutex);
2051 cmd_blk = &cb->dcmd_blk;
2052 myrb_reset_cmd(cmd_blk);
2053 mbox = &cmd_blk->mbox;
2054 mbox->type3C.opcode = MYRB_CMD_CHECK_CONSISTENCY_ASYNC;
2055 mbox->type3C.id = MYRB_DCMD_TAG;
2056 mbox->type3C.ldev_num = sdev->id;
2057 mbox->type3C.auto_restore = true;
2058
2059 status = myrb_exec_cmd(cb, cmd_blk);
2060 mutex_unlock(&cb->dcmd_mutex);
2061 } else {
2062 struct pci_dev *pdev = cb->pdev;
2063 unsigned char *rate;
2064 dma_addr_t rate_addr;
2065
2066 if (ldev_num != sdev->id) {
2067 sdev_printk(KERN_INFO, sdev,
2068 "Check Consistency Not Cancelled; not in progress\n");
2069 return 0;
2070 }
2071 rate = dma_alloc_coherent(&pdev->dev, sizeof(char),
2072 &rate_addr, GFP_KERNEL);
2073 if (rate == NULL) {
2074 sdev_printk(KERN_INFO, sdev,
2075 "Cancellation of Check Consistency Failed - Out of Memory\n");
2076 return -ENOMEM;
2077 }
2078 mutex_lock(&cb->dcmd_mutex);
2079 cmd_blk = &cb->dcmd_blk;
2080 myrb_reset_cmd(cmd_blk);
2081 mbox = &cmd_blk->mbox;
2082 mbox->type3R.opcode = MYRB_CMD_REBUILD_CONTROL;
2083 mbox->type3R.id = MYRB_DCMD_TAG;
2084 mbox->type3R.rbld_rate = 0xFF;
2085 mbox->type3R.addr = rate_addr;
2086 status = myrb_exec_cmd(cb, cmd_blk);
2087 dma_free_coherent(&pdev->dev, sizeof(char), rate, rate_addr);
2088 mutex_unlock(&cb->dcmd_mutex);
2089 }
2090 if (status == MYRB_STATUS_SUCCESS) {
2091 sdev_printk(KERN_INFO, sdev, "Check Consistency %s\n",
2092 start ? "Initiated" : "Cancelled");
2093 return count;
2094 }
2095 if (!start) {
2096 sdev_printk(KERN_INFO, sdev,
2097 "Check Consistency Not Cancelled, status 0x%x\n",
2098 status);
2099 return -EIO;
2100 }
2101
2102 switch (status) {
2103 case MYRB_STATUS_ATTEMPT_TO_RBLD_ONLINE_DRIVE:
2104 msg = "Dependent Physical Device is DEAD";
2105 break;
2106 case MYRB_STATUS_RBLD_NEW_DISK_FAILED:
2107 msg = "New Disk Failed During Rebuild";
2108 break;
2109 case MYRB_STATUS_INVALID_ADDRESS:
2110 msg = "Invalid or Nonredundant Logical Drive";
2111 break;
2112 case MYRB_STATUS_RBLD_OR_CHECK_INPROGRESS:
2113 msg = "Already in Progress";
2114 break;
2115 default:
2116 msg = NULL;
2117 break;
2118 }
2119 if (msg)
2120 sdev_printk(KERN_INFO, sdev,
2121 "Check Consistency Failed - %s\n", msg);
2122 else
2123 sdev_printk(KERN_INFO, sdev,
2124 "Check Consistency Failed, status 0x%x\n", status);
2125
2126 return -EIO;
2127 }
2128
consistency_check_show(struct device * dev,struct device_attribute * attr,char * buf)2129 static ssize_t consistency_check_show(struct device *dev,
2130 struct device_attribute *attr, char *buf)
2131 {
2132 return rebuild_show(dev, attr, buf);
2133 }
2134 static DEVICE_ATTR_RW(consistency_check);
2135
ctlr_num_show(struct device * dev,struct device_attribute * attr,char * buf)2136 static ssize_t ctlr_num_show(struct device *dev,
2137 struct device_attribute *attr, char *buf)
2138 {
2139 struct Scsi_Host *shost = class_to_shost(dev);
2140 struct myrb_hba *cb = shost_priv(shost);
2141
2142 return snprintf(buf, 20, "%u\n", cb->ctlr_num);
2143 }
2144 static DEVICE_ATTR_RO(ctlr_num);
2145
firmware_show(struct device * dev,struct device_attribute * attr,char * buf)2146 static ssize_t firmware_show(struct device *dev,
2147 struct device_attribute *attr, char *buf)
2148 {
2149 struct Scsi_Host *shost = class_to_shost(dev);
2150 struct myrb_hba *cb = shost_priv(shost);
2151
2152 return snprintf(buf, 16, "%s\n", cb->fw_version);
2153 }
2154 static DEVICE_ATTR_RO(firmware);
2155
model_show(struct device * dev,struct device_attribute * attr,char * buf)2156 static ssize_t model_show(struct device *dev,
2157 struct device_attribute *attr, char *buf)
2158 {
2159 struct Scsi_Host *shost = class_to_shost(dev);
2160 struct myrb_hba *cb = shost_priv(shost);
2161
2162 return snprintf(buf, 16, "%s\n", cb->model_name);
2163 }
2164 static DEVICE_ATTR_RO(model);
2165
flush_cache_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2166 static ssize_t flush_cache_store(struct device *dev,
2167 struct device_attribute *attr, const char *buf, size_t count)
2168 {
2169 struct Scsi_Host *shost = class_to_shost(dev);
2170 struct myrb_hba *cb = shost_priv(shost);
2171 unsigned short status;
2172
2173 status = myrb_exec_type3(cb, MYRB_CMD_FLUSH, 0);
2174 if (status == MYRB_STATUS_SUCCESS) {
2175 shost_printk(KERN_INFO, shost,
2176 "Cache Flush Completed\n");
2177 return count;
2178 }
2179 shost_printk(KERN_INFO, shost,
2180 "Cache Flush Failed, status %x\n", status);
2181 return -EIO;
2182 }
2183 static DEVICE_ATTR_WO(flush_cache);
2184
2185 static struct attribute *myrb_sdev_attrs[] = {
2186 &dev_attr_rebuild.attr,
2187 &dev_attr_consistency_check.attr,
2188 &dev_attr_raid_state.attr,
2189 &dev_attr_raid_level.attr,
2190 NULL,
2191 };
2192
2193 ATTRIBUTE_GROUPS(myrb_sdev);
2194
2195 static struct attribute *myrb_shost_attrs[] = {
2196 &dev_attr_ctlr_num.attr,
2197 &dev_attr_model.attr,
2198 &dev_attr_firmware.attr,
2199 &dev_attr_flush_cache.attr,
2200 NULL,
2201 };
2202
2203 ATTRIBUTE_GROUPS(myrb_shost);
2204
2205 static const struct scsi_host_template myrb_template = {
2206 .module = THIS_MODULE,
2207 .name = "DAC960",
2208 .proc_name = "myrb",
2209 .queuecommand = myrb_queuecommand,
2210 .eh_host_reset_handler = myrb_host_reset,
2211 .slave_alloc = myrb_slave_alloc,
2212 .slave_configure = myrb_slave_configure,
2213 .slave_destroy = myrb_slave_destroy,
2214 .bios_param = myrb_biosparam,
2215 .cmd_size = sizeof(struct myrb_cmdblk),
2216 .shost_groups = myrb_shost_groups,
2217 .sdev_groups = myrb_sdev_groups,
2218 .this_id = -1,
2219 };
2220
2221 /**
2222 * myrb_is_raid - return boolean indicating device is raid volume
2223 * @dev: the device struct object
2224 */
myrb_is_raid(struct device * dev)2225 static int myrb_is_raid(struct device *dev)
2226 {
2227 struct scsi_device *sdev = to_scsi_device(dev);
2228
2229 return sdev->channel == myrb_logical_channel(sdev->host);
2230 }
2231
2232 /**
2233 * myrb_get_resync - get raid volume resync percent complete
2234 * @dev: the device struct object
2235 */
myrb_get_resync(struct device * dev)2236 static void myrb_get_resync(struct device *dev)
2237 {
2238 struct scsi_device *sdev = to_scsi_device(dev);
2239 struct myrb_hba *cb = shost_priv(sdev->host);
2240 struct myrb_rbld_progress rbld_buf;
2241 unsigned int percent_complete = 0;
2242 unsigned short status;
2243 unsigned int ldev_size = 0, remaining = 0;
2244
2245 if (sdev->channel < myrb_logical_channel(sdev->host))
2246 return;
2247 status = myrb_get_rbld_progress(cb, &rbld_buf);
2248 if (status == MYRB_STATUS_SUCCESS) {
2249 if (rbld_buf.ldev_num == sdev->id) {
2250 ldev_size = rbld_buf.ldev_size;
2251 remaining = rbld_buf.blocks_left;
2252 }
2253 }
2254 if (remaining && ldev_size)
2255 percent_complete = (ldev_size - remaining) * 100 / ldev_size;
2256 raid_set_resync(myrb_raid_template, dev, percent_complete);
2257 }
2258
2259 /**
2260 * myrb_get_state - get raid volume status
2261 * @dev: the device struct object
2262 */
myrb_get_state(struct device * dev)2263 static void myrb_get_state(struct device *dev)
2264 {
2265 struct scsi_device *sdev = to_scsi_device(dev);
2266 struct myrb_hba *cb = shost_priv(sdev->host);
2267 struct myrb_ldev_info *ldev_info = sdev->hostdata;
2268 enum raid_state state = RAID_STATE_UNKNOWN;
2269 unsigned short status;
2270
2271 if (sdev->channel < myrb_logical_channel(sdev->host) || !ldev_info)
2272 state = RAID_STATE_UNKNOWN;
2273 else {
2274 status = myrb_get_rbld_progress(cb, NULL);
2275 if (status == MYRB_STATUS_SUCCESS)
2276 state = RAID_STATE_RESYNCING;
2277 else {
2278 switch (ldev_info->state) {
2279 case MYRB_DEVICE_ONLINE:
2280 state = RAID_STATE_ACTIVE;
2281 break;
2282 case MYRB_DEVICE_WO:
2283 case MYRB_DEVICE_CRITICAL:
2284 state = RAID_STATE_DEGRADED;
2285 break;
2286 default:
2287 state = RAID_STATE_OFFLINE;
2288 }
2289 }
2290 }
2291 raid_set_state(myrb_raid_template, dev, state);
2292 }
2293
2294 static struct raid_function_template myrb_raid_functions = {
2295 .cookie = &myrb_template,
2296 .is_raid = myrb_is_raid,
2297 .get_resync = myrb_get_resync,
2298 .get_state = myrb_get_state,
2299 };
2300
myrb_handle_scsi(struct myrb_hba * cb,struct myrb_cmdblk * cmd_blk,struct scsi_cmnd * scmd)2301 static void myrb_handle_scsi(struct myrb_hba *cb, struct myrb_cmdblk *cmd_blk,
2302 struct scsi_cmnd *scmd)
2303 {
2304 unsigned short status;
2305
2306 if (!cmd_blk)
2307 return;
2308
2309 scsi_dma_unmap(scmd);
2310
2311 if (cmd_blk->dcdb) {
2312 memcpy(scmd->sense_buffer, &cmd_blk->dcdb->sense, 64);
2313 dma_pool_free(cb->dcdb_pool, cmd_blk->dcdb,
2314 cmd_blk->dcdb_addr);
2315 cmd_blk->dcdb = NULL;
2316 }
2317 if (cmd_blk->sgl) {
2318 dma_pool_free(cb->sg_pool, cmd_blk->sgl, cmd_blk->sgl_addr);
2319 cmd_blk->sgl = NULL;
2320 cmd_blk->sgl_addr = 0;
2321 }
2322 status = cmd_blk->status;
2323 switch (status) {
2324 case MYRB_STATUS_SUCCESS:
2325 case MYRB_STATUS_DEVICE_BUSY:
2326 scmd->result = (DID_OK << 16) | status;
2327 break;
2328 case MYRB_STATUS_BAD_DATA:
2329 dev_dbg(&scmd->device->sdev_gendev,
2330 "Bad Data Encountered\n");
2331 if (scmd->sc_data_direction == DMA_FROM_DEVICE)
2332 /* Unrecovered read error */
2333 scsi_build_sense(scmd, 0, MEDIUM_ERROR, 0x11, 0);
2334 else
2335 /* Write error */
2336 scsi_build_sense(scmd, 0, MEDIUM_ERROR, 0x0C, 0);
2337 break;
2338 case MYRB_STATUS_IRRECOVERABLE_DATA_ERROR:
2339 scmd_printk(KERN_ERR, scmd, "Irrecoverable Data Error\n");
2340 if (scmd->sc_data_direction == DMA_FROM_DEVICE)
2341 /* Unrecovered read error, auto-reallocation failed */
2342 scsi_build_sense(scmd, 0, MEDIUM_ERROR, 0x11, 0x04);
2343 else
2344 /* Write error, auto-reallocation failed */
2345 scsi_build_sense(scmd, 0, MEDIUM_ERROR, 0x0C, 0x02);
2346 break;
2347 case MYRB_STATUS_LDRV_NONEXISTENT_OR_OFFLINE:
2348 dev_dbg(&scmd->device->sdev_gendev,
2349 "Logical Drive Nonexistent or Offline");
2350 scmd->result = (DID_BAD_TARGET << 16);
2351 break;
2352 case MYRB_STATUS_ACCESS_BEYOND_END_OF_LDRV:
2353 dev_dbg(&scmd->device->sdev_gendev,
2354 "Attempt to Access Beyond End of Logical Drive");
2355 /* Logical block address out of range */
2356 scsi_build_sense(scmd, 0, NOT_READY, 0x21, 0);
2357 break;
2358 case MYRB_STATUS_DEVICE_NONRESPONSIVE:
2359 dev_dbg(&scmd->device->sdev_gendev, "Device nonresponsive\n");
2360 scmd->result = (DID_BAD_TARGET << 16);
2361 break;
2362 default:
2363 scmd_printk(KERN_ERR, scmd,
2364 "Unexpected Error Status %04X", status);
2365 scmd->result = (DID_ERROR << 16);
2366 break;
2367 }
2368 scsi_done(scmd);
2369 }
2370
myrb_handle_cmdblk(struct myrb_hba * cb,struct myrb_cmdblk * cmd_blk)2371 static void myrb_handle_cmdblk(struct myrb_hba *cb, struct myrb_cmdblk *cmd_blk)
2372 {
2373 if (!cmd_blk)
2374 return;
2375
2376 if (cmd_blk->completion) {
2377 complete(cmd_blk->completion);
2378 cmd_blk->completion = NULL;
2379 }
2380 }
2381
myrb_monitor(struct work_struct * work)2382 static void myrb_monitor(struct work_struct *work)
2383 {
2384 struct myrb_hba *cb = container_of(work,
2385 struct myrb_hba, monitor_work.work);
2386 struct Scsi_Host *shost = cb->host;
2387 unsigned long interval = MYRB_PRIMARY_MONITOR_INTERVAL;
2388
2389 dev_dbg(&shost->shost_gendev, "monitor tick\n");
2390
2391 if (cb->new_ev_seq > cb->old_ev_seq) {
2392 int event = cb->old_ev_seq;
2393
2394 dev_dbg(&shost->shost_gendev,
2395 "get event log no %d/%d\n",
2396 cb->new_ev_seq, event);
2397 myrb_get_event(cb, event);
2398 cb->old_ev_seq = event + 1;
2399 interval = 10;
2400 } else if (cb->need_err_info) {
2401 cb->need_err_info = false;
2402 dev_dbg(&shost->shost_gendev, "get error table\n");
2403 myrb_get_errtable(cb);
2404 interval = 10;
2405 } else if (cb->need_rbld && cb->rbld_first) {
2406 cb->need_rbld = false;
2407 dev_dbg(&shost->shost_gendev,
2408 "get rebuild progress\n");
2409 myrb_update_rbld_progress(cb);
2410 interval = 10;
2411 } else if (cb->need_ldev_info) {
2412 cb->need_ldev_info = false;
2413 dev_dbg(&shost->shost_gendev,
2414 "get logical drive info\n");
2415 myrb_get_ldev_info(cb);
2416 interval = 10;
2417 } else if (cb->need_rbld) {
2418 cb->need_rbld = false;
2419 dev_dbg(&shost->shost_gendev,
2420 "get rebuild progress\n");
2421 myrb_update_rbld_progress(cb);
2422 interval = 10;
2423 } else if (cb->need_cc_status) {
2424 cb->need_cc_status = false;
2425 dev_dbg(&shost->shost_gendev,
2426 "get consistency check progress\n");
2427 myrb_get_cc_progress(cb);
2428 interval = 10;
2429 } else if (cb->need_bgi_status) {
2430 cb->need_bgi_status = false;
2431 dev_dbg(&shost->shost_gendev, "get background init status\n");
2432 myrb_bgi_control(cb);
2433 interval = 10;
2434 } else {
2435 dev_dbg(&shost->shost_gendev, "new enquiry\n");
2436 mutex_lock(&cb->dma_mutex);
2437 myrb_hba_enquiry(cb);
2438 mutex_unlock(&cb->dma_mutex);
2439 if ((cb->new_ev_seq - cb->old_ev_seq > 0) ||
2440 cb->need_err_info || cb->need_rbld ||
2441 cb->need_ldev_info || cb->need_cc_status ||
2442 cb->need_bgi_status) {
2443 dev_dbg(&shost->shost_gendev,
2444 "reschedule monitor\n");
2445 interval = 0;
2446 }
2447 }
2448 if (interval > 1)
2449 cb->primary_monitor_time = jiffies;
2450 queue_delayed_work(cb->work_q, &cb->monitor_work, interval);
2451 }
2452
2453 /*
2454 * myrb_err_status - reports controller BIOS messages
2455 *
2456 * Controller BIOS messages are passed through the Error Status Register
2457 * when the driver performs the BIOS handshaking.
2458 *
2459 * Return: true for fatal errors and false otherwise.
2460 */
myrb_err_status(struct myrb_hba * cb,unsigned char error,unsigned char parm0,unsigned char parm1)2461 static bool myrb_err_status(struct myrb_hba *cb, unsigned char error,
2462 unsigned char parm0, unsigned char parm1)
2463 {
2464 struct pci_dev *pdev = cb->pdev;
2465
2466 switch (error) {
2467 case 0x00:
2468 dev_info(&pdev->dev,
2469 "Physical Device %d:%d Not Responding\n",
2470 parm1, parm0);
2471 break;
2472 case 0x08:
2473 dev_notice(&pdev->dev, "Spinning Up Drives\n");
2474 break;
2475 case 0x30:
2476 dev_notice(&pdev->dev, "Configuration Checksum Error\n");
2477 break;
2478 case 0x60:
2479 dev_notice(&pdev->dev, "Mirror Race Recovery Failed\n");
2480 break;
2481 case 0x70:
2482 dev_notice(&pdev->dev, "Mirror Race Recovery In Progress\n");
2483 break;
2484 case 0x90:
2485 dev_notice(&pdev->dev, "Physical Device %d:%d COD Mismatch\n",
2486 parm1, parm0);
2487 break;
2488 case 0xA0:
2489 dev_notice(&pdev->dev, "Logical Drive Installation Aborted\n");
2490 break;
2491 case 0xB0:
2492 dev_notice(&pdev->dev, "Mirror Race On A Critical Logical Drive\n");
2493 break;
2494 case 0xD0:
2495 dev_notice(&pdev->dev, "New Controller Configuration Found\n");
2496 break;
2497 case 0xF0:
2498 dev_err(&pdev->dev, "Fatal Memory Parity Error\n");
2499 return true;
2500 default:
2501 dev_err(&pdev->dev, "Unknown Initialization Error %02X\n",
2502 error);
2503 return true;
2504 }
2505 return false;
2506 }
2507
2508 /*
2509 * Hardware-specific functions
2510 */
2511
2512 /*
2513 * DAC960 LA Series Controllers
2514 */
2515
DAC960_LA_hw_mbox_new_cmd(void __iomem * base)2516 static inline void DAC960_LA_hw_mbox_new_cmd(void __iomem *base)
2517 {
2518 writeb(DAC960_LA_IDB_HWMBOX_NEW_CMD, base + DAC960_LA_IDB_OFFSET);
2519 }
2520
DAC960_LA_ack_hw_mbox_status(void __iomem * base)2521 static inline void DAC960_LA_ack_hw_mbox_status(void __iomem *base)
2522 {
2523 writeb(DAC960_LA_IDB_HWMBOX_ACK_STS, base + DAC960_LA_IDB_OFFSET);
2524 }
2525
DAC960_LA_reset_ctrl(void __iomem * base)2526 static inline void DAC960_LA_reset_ctrl(void __iomem *base)
2527 {
2528 writeb(DAC960_LA_IDB_CTRL_RESET, base + DAC960_LA_IDB_OFFSET);
2529 }
2530
DAC960_LA_mem_mbox_new_cmd(void __iomem * base)2531 static inline void DAC960_LA_mem_mbox_new_cmd(void __iomem *base)
2532 {
2533 writeb(DAC960_LA_IDB_MMBOX_NEW_CMD, base + DAC960_LA_IDB_OFFSET);
2534 }
2535
DAC960_LA_hw_mbox_is_full(void __iomem * base)2536 static inline bool DAC960_LA_hw_mbox_is_full(void __iomem *base)
2537 {
2538 unsigned char idb = readb(base + DAC960_LA_IDB_OFFSET);
2539
2540 return !(idb & DAC960_LA_IDB_HWMBOX_EMPTY);
2541 }
2542
DAC960_LA_init_in_progress(void __iomem * base)2543 static inline bool DAC960_LA_init_in_progress(void __iomem *base)
2544 {
2545 unsigned char idb = readb(base + DAC960_LA_IDB_OFFSET);
2546
2547 return !(idb & DAC960_LA_IDB_INIT_DONE);
2548 }
2549
DAC960_LA_ack_hw_mbox_intr(void __iomem * base)2550 static inline void DAC960_LA_ack_hw_mbox_intr(void __iomem *base)
2551 {
2552 writeb(DAC960_LA_ODB_HWMBOX_ACK_IRQ, base + DAC960_LA_ODB_OFFSET);
2553 }
2554
DAC960_LA_ack_intr(void __iomem * base)2555 static inline void DAC960_LA_ack_intr(void __iomem *base)
2556 {
2557 writeb(DAC960_LA_ODB_HWMBOX_ACK_IRQ | DAC960_LA_ODB_MMBOX_ACK_IRQ,
2558 base + DAC960_LA_ODB_OFFSET);
2559 }
2560
DAC960_LA_hw_mbox_status_available(void __iomem * base)2561 static inline bool DAC960_LA_hw_mbox_status_available(void __iomem *base)
2562 {
2563 unsigned char odb = readb(base + DAC960_LA_ODB_OFFSET);
2564
2565 return odb & DAC960_LA_ODB_HWMBOX_STS_AVAIL;
2566 }
2567
DAC960_LA_enable_intr(void __iomem * base)2568 static inline void DAC960_LA_enable_intr(void __iomem *base)
2569 {
2570 unsigned char odb = 0xFF;
2571
2572 odb &= ~DAC960_LA_IRQMASK_DISABLE_IRQ;
2573 writeb(odb, base + DAC960_LA_IRQMASK_OFFSET);
2574 }
2575
DAC960_LA_disable_intr(void __iomem * base)2576 static inline void DAC960_LA_disable_intr(void __iomem *base)
2577 {
2578 unsigned char odb = 0xFF;
2579
2580 odb |= DAC960_LA_IRQMASK_DISABLE_IRQ;
2581 writeb(odb, base + DAC960_LA_IRQMASK_OFFSET);
2582 }
2583
DAC960_LA_write_cmd_mbox(union myrb_cmd_mbox * mem_mbox,union myrb_cmd_mbox * mbox)2584 static inline void DAC960_LA_write_cmd_mbox(union myrb_cmd_mbox *mem_mbox,
2585 union myrb_cmd_mbox *mbox)
2586 {
2587 mem_mbox->words[1] = mbox->words[1];
2588 mem_mbox->words[2] = mbox->words[2];
2589 mem_mbox->words[3] = mbox->words[3];
2590 /* Memory barrier to prevent reordering */
2591 wmb();
2592 mem_mbox->words[0] = mbox->words[0];
2593 /* Memory barrier to force PCI access */
2594 mb();
2595 }
2596
DAC960_LA_write_hw_mbox(void __iomem * base,union myrb_cmd_mbox * mbox)2597 static inline void DAC960_LA_write_hw_mbox(void __iomem *base,
2598 union myrb_cmd_mbox *mbox)
2599 {
2600 writel(mbox->words[0], base + DAC960_LA_CMDOP_OFFSET);
2601 writel(mbox->words[1], base + DAC960_LA_MBOX4_OFFSET);
2602 writel(mbox->words[2], base + DAC960_LA_MBOX8_OFFSET);
2603 writeb(mbox->bytes[12], base + DAC960_LA_MBOX12_OFFSET);
2604 }
2605
DAC960_LA_read_status(void __iomem * base)2606 static inline unsigned short DAC960_LA_read_status(void __iomem *base)
2607 {
2608 return readw(base + DAC960_LA_STS_OFFSET);
2609 }
2610
2611 static inline bool
DAC960_LA_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1)2612 DAC960_LA_read_error_status(void __iomem *base, unsigned char *error,
2613 unsigned char *param0, unsigned char *param1)
2614 {
2615 unsigned char errsts = readb(base + DAC960_LA_ERRSTS_OFFSET);
2616
2617 if (!(errsts & DAC960_LA_ERRSTS_PENDING))
2618 return false;
2619 errsts &= ~DAC960_LA_ERRSTS_PENDING;
2620
2621 *error = errsts;
2622 *param0 = readb(base + DAC960_LA_CMDOP_OFFSET);
2623 *param1 = readb(base + DAC960_LA_CMDID_OFFSET);
2624 writeb(0xFF, base + DAC960_LA_ERRSTS_OFFSET);
2625 return true;
2626 }
2627
2628 static inline unsigned short
DAC960_LA_mbox_init(struct pci_dev * pdev,void __iomem * base,union myrb_cmd_mbox * mbox)2629 DAC960_LA_mbox_init(struct pci_dev *pdev, void __iomem *base,
2630 union myrb_cmd_mbox *mbox)
2631 {
2632 unsigned short status;
2633 int timeout = 0;
2634
2635 while (timeout < MYRB_MAILBOX_TIMEOUT) {
2636 if (!DAC960_LA_hw_mbox_is_full(base))
2637 break;
2638 udelay(10);
2639 timeout++;
2640 }
2641 if (DAC960_LA_hw_mbox_is_full(base)) {
2642 dev_err(&pdev->dev,
2643 "Timeout waiting for empty mailbox\n");
2644 return MYRB_STATUS_SUBSYS_TIMEOUT;
2645 }
2646 DAC960_LA_write_hw_mbox(base, mbox);
2647 DAC960_LA_hw_mbox_new_cmd(base);
2648 timeout = 0;
2649 while (timeout < MYRB_MAILBOX_TIMEOUT) {
2650 if (DAC960_LA_hw_mbox_status_available(base))
2651 break;
2652 udelay(10);
2653 timeout++;
2654 }
2655 if (!DAC960_LA_hw_mbox_status_available(base)) {
2656 dev_err(&pdev->dev, "Timeout waiting for mailbox status\n");
2657 return MYRB_STATUS_SUBSYS_TIMEOUT;
2658 }
2659 status = DAC960_LA_read_status(base);
2660 DAC960_LA_ack_hw_mbox_intr(base);
2661 DAC960_LA_ack_hw_mbox_status(base);
2662
2663 return status;
2664 }
2665
DAC960_LA_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base)2666 static int DAC960_LA_hw_init(struct pci_dev *pdev,
2667 struct myrb_hba *cb, void __iomem *base)
2668 {
2669 int timeout = 0;
2670 unsigned char error, parm0, parm1;
2671
2672 DAC960_LA_disable_intr(base);
2673 DAC960_LA_ack_hw_mbox_status(base);
2674 udelay(1000);
2675 while (DAC960_LA_init_in_progress(base) &&
2676 timeout < MYRB_MAILBOX_TIMEOUT) {
2677 if (DAC960_LA_read_error_status(base, &error,
2678 &parm0, &parm1) &&
2679 myrb_err_status(cb, error, parm0, parm1))
2680 return -ENODEV;
2681 udelay(10);
2682 timeout++;
2683 }
2684 if (timeout == MYRB_MAILBOX_TIMEOUT) {
2685 dev_err(&pdev->dev,
2686 "Timeout waiting for Controller Initialisation\n");
2687 return -ETIMEDOUT;
2688 }
2689 if (!myrb_enable_mmio(cb, DAC960_LA_mbox_init)) {
2690 dev_err(&pdev->dev,
2691 "Unable to Enable Memory Mailbox Interface\n");
2692 DAC960_LA_reset_ctrl(base);
2693 return -ENODEV;
2694 }
2695 DAC960_LA_enable_intr(base);
2696 cb->qcmd = myrb_qcmd;
2697 cb->write_cmd_mbox = DAC960_LA_write_cmd_mbox;
2698 if (cb->dual_mode_interface)
2699 cb->get_cmd_mbox = DAC960_LA_mem_mbox_new_cmd;
2700 else
2701 cb->get_cmd_mbox = DAC960_LA_hw_mbox_new_cmd;
2702 cb->disable_intr = DAC960_LA_disable_intr;
2703 cb->reset = DAC960_LA_reset_ctrl;
2704
2705 return 0;
2706 }
2707
DAC960_LA_intr_handler(int irq,void * arg)2708 static irqreturn_t DAC960_LA_intr_handler(int irq, void *arg)
2709 {
2710 struct myrb_hba *cb = arg;
2711 void __iomem *base = cb->io_base;
2712 struct myrb_stat_mbox *next_stat_mbox;
2713 unsigned long flags;
2714
2715 spin_lock_irqsave(&cb->queue_lock, flags);
2716 DAC960_LA_ack_intr(base);
2717 next_stat_mbox = cb->next_stat_mbox;
2718 while (next_stat_mbox->valid) {
2719 unsigned char id = next_stat_mbox->id;
2720 struct scsi_cmnd *scmd = NULL;
2721 struct myrb_cmdblk *cmd_blk = NULL;
2722
2723 if (id == MYRB_DCMD_TAG)
2724 cmd_blk = &cb->dcmd_blk;
2725 else if (id == MYRB_MCMD_TAG)
2726 cmd_blk = &cb->mcmd_blk;
2727 else {
2728 scmd = scsi_host_find_tag(cb->host, id - 3);
2729 if (scmd)
2730 cmd_blk = scsi_cmd_priv(scmd);
2731 }
2732 if (cmd_blk)
2733 cmd_blk->status = next_stat_mbox->status;
2734 else
2735 dev_err(&cb->pdev->dev,
2736 "Unhandled command completion %d\n", id);
2737
2738 memset(next_stat_mbox, 0, sizeof(struct myrb_stat_mbox));
2739 if (++next_stat_mbox > cb->last_stat_mbox)
2740 next_stat_mbox = cb->first_stat_mbox;
2741
2742 if (cmd_blk) {
2743 if (id < 3)
2744 myrb_handle_cmdblk(cb, cmd_blk);
2745 else
2746 myrb_handle_scsi(cb, cmd_blk, scmd);
2747 }
2748 }
2749 cb->next_stat_mbox = next_stat_mbox;
2750 spin_unlock_irqrestore(&cb->queue_lock, flags);
2751 return IRQ_HANDLED;
2752 }
2753
2754 static struct myrb_privdata DAC960_LA_privdata = {
2755 .hw_init = DAC960_LA_hw_init,
2756 .irq_handler = DAC960_LA_intr_handler,
2757 .mmio_size = DAC960_LA_mmio_size,
2758 };
2759
2760 /*
2761 * DAC960 PG Series Controllers
2762 */
DAC960_PG_hw_mbox_new_cmd(void __iomem * base)2763 static inline void DAC960_PG_hw_mbox_new_cmd(void __iomem *base)
2764 {
2765 writel(DAC960_PG_IDB_HWMBOX_NEW_CMD, base + DAC960_PG_IDB_OFFSET);
2766 }
2767
DAC960_PG_ack_hw_mbox_status(void __iomem * base)2768 static inline void DAC960_PG_ack_hw_mbox_status(void __iomem *base)
2769 {
2770 writel(DAC960_PG_IDB_HWMBOX_ACK_STS, base + DAC960_PG_IDB_OFFSET);
2771 }
2772
DAC960_PG_reset_ctrl(void __iomem * base)2773 static inline void DAC960_PG_reset_ctrl(void __iomem *base)
2774 {
2775 writel(DAC960_PG_IDB_CTRL_RESET, base + DAC960_PG_IDB_OFFSET);
2776 }
2777
DAC960_PG_mem_mbox_new_cmd(void __iomem * base)2778 static inline void DAC960_PG_mem_mbox_new_cmd(void __iomem *base)
2779 {
2780 writel(DAC960_PG_IDB_MMBOX_NEW_CMD, base + DAC960_PG_IDB_OFFSET);
2781 }
2782
DAC960_PG_hw_mbox_is_full(void __iomem * base)2783 static inline bool DAC960_PG_hw_mbox_is_full(void __iomem *base)
2784 {
2785 unsigned char idb = readl(base + DAC960_PG_IDB_OFFSET);
2786
2787 return idb & DAC960_PG_IDB_HWMBOX_FULL;
2788 }
2789
DAC960_PG_init_in_progress(void __iomem * base)2790 static inline bool DAC960_PG_init_in_progress(void __iomem *base)
2791 {
2792 unsigned char idb = readl(base + DAC960_PG_IDB_OFFSET);
2793
2794 return idb & DAC960_PG_IDB_INIT_IN_PROGRESS;
2795 }
2796
DAC960_PG_ack_hw_mbox_intr(void __iomem * base)2797 static inline void DAC960_PG_ack_hw_mbox_intr(void __iomem *base)
2798 {
2799 writel(DAC960_PG_ODB_HWMBOX_ACK_IRQ, base + DAC960_PG_ODB_OFFSET);
2800 }
2801
DAC960_PG_ack_intr(void __iomem * base)2802 static inline void DAC960_PG_ack_intr(void __iomem *base)
2803 {
2804 writel(DAC960_PG_ODB_HWMBOX_ACK_IRQ | DAC960_PG_ODB_MMBOX_ACK_IRQ,
2805 base + DAC960_PG_ODB_OFFSET);
2806 }
2807
DAC960_PG_hw_mbox_status_available(void __iomem * base)2808 static inline bool DAC960_PG_hw_mbox_status_available(void __iomem *base)
2809 {
2810 unsigned char odb = readl(base + DAC960_PG_ODB_OFFSET);
2811
2812 return odb & DAC960_PG_ODB_HWMBOX_STS_AVAIL;
2813 }
2814
DAC960_PG_enable_intr(void __iomem * base)2815 static inline void DAC960_PG_enable_intr(void __iomem *base)
2816 {
2817 unsigned int imask = (unsigned int)-1;
2818
2819 imask &= ~DAC960_PG_IRQMASK_DISABLE_IRQ;
2820 writel(imask, base + DAC960_PG_IRQMASK_OFFSET);
2821 }
2822
DAC960_PG_disable_intr(void __iomem * base)2823 static inline void DAC960_PG_disable_intr(void __iomem *base)
2824 {
2825 unsigned int imask = (unsigned int)-1;
2826
2827 writel(imask, base + DAC960_PG_IRQMASK_OFFSET);
2828 }
2829
DAC960_PG_write_cmd_mbox(union myrb_cmd_mbox * mem_mbox,union myrb_cmd_mbox * mbox)2830 static inline void DAC960_PG_write_cmd_mbox(union myrb_cmd_mbox *mem_mbox,
2831 union myrb_cmd_mbox *mbox)
2832 {
2833 mem_mbox->words[1] = mbox->words[1];
2834 mem_mbox->words[2] = mbox->words[2];
2835 mem_mbox->words[3] = mbox->words[3];
2836 /* Memory barrier to prevent reordering */
2837 wmb();
2838 mem_mbox->words[0] = mbox->words[0];
2839 /* Memory barrier to force PCI access */
2840 mb();
2841 }
2842
DAC960_PG_write_hw_mbox(void __iomem * base,union myrb_cmd_mbox * mbox)2843 static inline void DAC960_PG_write_hw_mbox(void __iomem *base,
2844 union myrb_cmd_mbox *mbox)
2845 {
2846 writel(mbox->words[0], base + DAC960_PG_CMDOP_OFFSET);
2847 writel(mbox->words[1], base + DAC960_PG_MBOX4_OFFSET);
2848 writel(mbox->words[2], base + DAC960_PG_MBOX8_OFFSET);
2849 writeb(mbox->bytes[12], base + DAC960_PG_MBOX12_OFFSET);
2850 }
2851
2852 static inline unsigned short
DAC960_PG_read_status(void __iomem * base)2853 DAC960_PG_read_status(void __iomem *base)
2854 {
2855 return readw(base + DAC960_PG_STS_OFFSET);
2856 }
2857
2858 static inline bool
DAC960_PG_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1)2859 DAC960_PG_read_error_status(void __iomem *base, unsigned char *error,
2860 unsigned char *param0, unsigned char *param1)
2861 {
2862 unsigned char errsts = readb(base + DAC960_PG_ERRSTS_OFFSET);
2863
2864 if (!(errsts & DAC960_PG_ERRSTS_PENDING))
2865 return false;
2866 errsts &= ~DAC960_PG_ERRSTS_PENDING;
2867 *error = errsts;
2868 *param0 = readb(base + DAC960_PG_CMDOP_OFFSET);
2869 *param1 = readb(base + DAC960_PG_CMDID_OFFSET);
2870 writeb(0, base + DAC960_PG_ERRSTS_OFFSET);
2871 return true;
2872 }
2873
2874 static inline unsigned short
DAC960_PG_mbox_init(struct pci_dev * pdev,void __iomem * base,union myrb_cmd_mbox * mbox)2875 DAC960_PG_mbox_init(struct pci_dev *pdev, void __iomem *base,
2876 union myrb_cmd_mbox *mbox)
2877 {
2878 unsigned short status;
2879 int timeout = 0;
2880
2881 while (timeout < MYRB_MAILBOX_TIMEOUT) {
2882 if (!DAC960_PG_hw_mbox_is_full(base))
2883 break;
2884 udelay(10);
2885 timeout++;
2886 }
2887 if (DAC960_PG_hw_mbox_is_full(base)) {
2888 dev_err(&pdev->dev,
2889 "Timeout waiting for empty mailbox\n");
2890 return MYRB_STATUS_SUBSYS_TIMEOUT;
2891 }
2892 DAC960_PG_write_hw_mbox(base, mbox);
2893 DAC960_PG_hw_mbox_new_cmd(base);
2894
2895 timeout = 0;
2896 while (timeout < MYRB_MAILBOX_TIMEOUT) {
2897 if (DAC960_PG_hw_mbox_status_available(base))
2898 break;
2899 udelay(10);
2900 timeout++;
2901 }
2902 if (!DAC960_PG_hw_mbox_status_available(base)) {
2903 dev_err(&pdev->dev,
2904 "Timeout waiting for mailbox status\n");
2905 return MYRB_STATUS_SUBSYS_TIMEOUT;
2906 }
2907 status = DAC960_PG_read_status(base);
2908 DAC960_PG_ack_hw_mbox_intr(base);
2909 DAC960_PG_ack_hw_mbox_status(base);
2910
2911 return status;
2912 }
2913
DAC960_PG_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base)2914 static int DAC960_PG_hw_init(struct pci_dev *pdev,
2915 struct myrb_hba *cb, void __iomem *base)
2916 {
2917 int timeout = 0;
2918 unsigned char error, parm0, parm1;
2919
2920 DAC960_PG_disable_intr(base);
2921 DAC960_PG_ack_hw_mbox_status(base);
2922 udelay(1000);
2923 while (DAC960_PG_init_in_progress(base) &&
2924 timeout < MYRB_MAILBOX_TIMEOUT) {
2925 if (DAC960_PG_read_error_status(base, &error,
2926 &parm0, &parm1) &&
2927 myrb_err_status(cb, error, parm0, parm1))
2928 return -EIO;
2929 udelay(10);
2930 timeout++;
2931 }
2932 if (timeout == MYRB_MAILBOX_TIMEOUT) {
2933 dev_err(&pdev->dev,
2934 "Timeout waiting for Controller Initialisation\n");
2935 return -ETIMEDOUT;
2936 }
2937 if (!myrb_enable_mmio(cb, DAC960_PG_mbox_init)) {
2938 dev_err(&pdev->dev,
2939 "Unable to Enable Memory Mailbox Interface\n");
2940 DAC960_PG_reset_ctrl(base);
2941 return -ENODEV;
2942 }
2943 DAC960_PG_enable_intr(base);
2944 cb->qcmd = myrb_qcmd;
2945 cb->write_cmd_mbox = DAC960_PG_write_cmd_mbox;
2946 if (cb->dual_mode_interface)
2947 cb->get_cmd_mbox = DAC960_PG_mem_mbox_new_cmd;
2948 else
2949 cb->get_cmd_mbox = DAC960_PG_hw_mbox_new_cmd;
2950 cb->disable_intr = DAC960_PG_disable_intr;
2951 cb->reset = DAC960_PG_reset_ctrl;
2952
2953 return 0;
2954 }
2955
DAC960_PG_intr_handler(int irq,void * arg)2956 static irqreturn_t DAC960_PG_intr_handler(int irq, void *arg)
2957 {
2958 struct myrb_hba *cb = arg;
2959 void __iomem *base = cb->io_base;
2960 struct myrb_stat_mbox *next_stat_mbox;
2961 unsigned long flags;
2962
2963 spin_lock_irqsave(&cb->queue_lock, flags);
2964 DAC960_PG_ack_intr(base);
2965 next_stat_mbox = cb->next_stat_mbox;
2966 while (next_stat_mbox->valid) {
2967 unsigned char id = next_stat_mbox->id;
2968 struct scsi_cmnd *scmd = NULL;
2969 struct myrb_cmdblk *cmd_blk = NULL;
2970
2971 if (id == MYRB_DCMD_TAG)
2972 cmd_blk = &cb->dcmd_blk;
2973 else if (id == MYRB_MCMD_TAG)
2974 cmd_blk = &cb->mcmd_blk;
2975 else {
2976 scmd = scsi_host_find_tag(cb->host, id - 3);
2977 if (scmd)
2978 cmd_blk = scsi_cmd_priv(scmd);
2979 }
2980 if (cmd_blk)
2981 cmd_blk->status = next_stat_mbox->status;
2982 else
2983 dev_err(&cb->pdev->dev,
2984 "Unhandled command completion %d\n", id);
2985
2986 memset(next_stat_mbox, 0, sizeof(struct myrb_stat_mbox));
2987 if (++next_stat_mbox > cb->last_stat_mbox)
2988 next_stat_mbox = cb->first_stat_mbox;
2989
2990 if (id < 3)
2991 myrb_handle_cmdblk(cb, cmd_blk);
2992 else
2993 myrb_handle_scsi(cb, cmd_blk, scmd);
2994 }
2995 cb->next_stat_mbox = next_stat_mbox;
2996 spin_unlock_irqrestore(&cb->queue_lock, flags);
2997 return IRQ_HANDLED;
2998 }
2999
3000 static struct myrb_privdata DAC960_PG_privdata = {
3001 .hw_init = DAC960_PG_hw_init,
3002 .irq_handler = DAC960_PG_intr_handler,
3003 .mmio_size = DAC960_PG_mmio_size,
3004 };
3005
3006
3007 /*
3008 * DAC960 PD Series Controllers
3009 */
3010
DAC960_PD_hw_mbox_new_cmd(void __iomem * base)3011 static inline void DAC960_PD_hw_mbox_new_cmd(void __iomem *base)
3012 {
3013 writeb(DAC960_PD_IDB_HWMBOX_NEW_CMD, base + DAC960_PD_IDB_OFFSET);
3014 }
3015
DAC960_PD_ack_hw_mbox_status(void __iomem * base)3016 static inline void DAC960_PD_ack_hw_mbox_status(void __iomem *base)
3017 {
3018 writeb(DAC960_PD_IDB_HWMBOX_ACK_STS, base + DAC960_PD_IDB_OFFSET);
3019 }
3020
DAC960_PD_reset_ctrl(void __iomem * base)3021 static inline void DAC960_PD_reset_ctrl(void __iomem *base)
3022 {
3023 writeb(DAC960_PD_IDB_CTRL_RESET, base + DAC960_PD_IDB_OFFSET);
3024 }
3025
DAC960_PD_hw_mbox_is_full(void __iomem * base)3026 static inline bool DAC960_PD_hw_mbox_is_full(void __iomem *base)
3027 {
3028 unsigned char idb = readb(base + DAC960_PD_IDB_OFFSET);
3029
3030 return idb & DAC960_PD_IDB_HWMBOX_FULL;
3031 }
3032
DAC960_PD_init_in_progress(void __iomem * base)3033 static inline bool DAC960_PD_init_in_progress(void __iomem *base)
3034 {
3035 unsigned char idb = readb(base + DAC960_PD_IDB_OFFSET);
3036
3037 return idb & DAC960_PD_IDB_INIT_IN_PROGRESS;
3038 }
3039
DAC960_PD_ack_intr(void __iomem * base)3040 static inline void DAC960_PD_ack_intr(void __iomem *base)
3041 {
3042 writeb(DAC960_PD_ODB_HWMBOX_ACK_IRQ, base + DAC960_PD_ODB_OFFSET);
3043 }
3044
DAC960_PD_hw_mbox_status_available(void __iomem * base)3045 static inline bool DAC960_PD_hw_mbox_status_available(void __iomem *base)
3046 {
3047 unsigned char odb = readb(base + DAC960_PD_ODB_OFFSET);
3048
3049 return odb & DAC960_PD_ODB_HWMBOX_STS_AVAIL;
3050 }
3051
DAC960_PD_enable_intr(void __iomem * base)3052 static inline void DAC960_PD_enable_intr(void __iomem *base)
3053 {
3054 writeb(DAC960_PD_IRQMASK_ENABLE_IRQ, base + DAC960_PD_IRQEN_OFFSET);
3055 }
3056
DAC960_PD_disable_intr(void __iomem * base)3057 static inline void DAC960_PD_disable_intr(void __iomem *base)
3058 {
3059 writeb(0, base + DAC960_PD_IRQEN_OFFSET);
3060 }
3061
DAC960_PD_write_cmd_mbox(void __iomem * base,union myrb_cmd_mbox * mbox)3062 static inline void DAC960_PD_write_cmd_mbox(void __iomem *base,
3063 union myrb_cmd_mbox *mbox)
3064 {
3065 writel(mbox->words[0], base + DAC960_PD_CMDOP_OFFSET);
3066 writel(mbox->words[1], base + DAC960_PD_MBOX4_OFFSET);
3067 writel(mbox->words[2], base + DAC960_PD_MBOX8_OFFSET);
3068 writeb(mbox->bytes[12], base + DAC960_PD_MBOX12_OFFSET);
3069 }
3070
3071 static inline unsigned char
DAC960_PD_read_status_cmd_ident(void __iomem * base)3072 DAC960_PD_read_status_cmd_ident(void __iomem *base)
3073 {
3074 return readb(base + DAC960_PD_STSID_OFFSET);
3075 }
3076
3077 static inline unsigned short
DAC960_PD_read_status(void __iomem * base)3078 DAC960_PD_read_status(void __iomem *base)
3079 {
3080 return readw(base + DAC960_PD_STS_OFFSET);
3081 }
3082
3083 static inline bool
DAC960_PD_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1)3084 DAC960_PD_read_error_status(void __iomem *base, unsigned char *error,
3085 unsigned char *param0, unsigned char *param1)
3086 {
3087 unsigned char errsts = readb(base + DAC960_PD_ERRSTS_OFFSET);
3088
3089 if (!(errsts & DAC960_PD_ERRSTS_PENDING))
3090 return false;
3091 errsts &= ~DAC960_PD_ERRSTS_PENDING;
3092 *error = errsts;
3093 *param0 = readb(base + DAC960_PD_CMDOP_OFFSET);
3094 *param1 = readb(base + DAC960_PD_CMDID_OFFSET);
3095 writeb(0, base + DAC960_PD_ERRSTS_OFFSET);
3096 return true;
3097 }
3098
DAC960_PD_qcmd(struct myrb_hba * cb,struct myrb_cmdblk * cmd_blk)3099 static void DAC960_PD_qcmd(struct myrb_hba *cb, struct myrb_cmdblk *cmd_blk)
3100 {
3101 void __iomem *base = cb->io_base;
3102 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
3103
3104 while (DAC960_PD_hw_mbox_is_full(base))
3105 udelay(1);
3106 DAC960_PD_write_cmd_mbox(base, mbox);
3107 DAC960_PD_hw_mbox_new_cmd(base);
3108 }
3109
DAC960_PD_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base)3110 static int DAC960_PD_hw_init(struct pci_dev *pdev,
3111 struct myrb_hba *cb, void __iomem *base)
3112 {
3113 int timeout = 0;
3114 unsigned char error, parm0, parm1;
3115
3116 if (!request_region(cb->io_addr, 0x80, "myrb")) {
3117 dev_err(&pdev->dev, "IO port 0x%lx busy\n",
3118 (unsigned long)cb->io_addr);
3119 return -EBUSY;
3120 }
3121 DAC960_PD_disable_intr(base);
3122 DAC960_PD_ack_hw_mbox_status(base);
3123 udelay(1000);
3124 while (DAC960_PD_init_in_progress(base) &&
3125 timeout < MYRB_MAILBOX_TIMEOUT) {
3126 if (DAC960_PD_read_error_status(base, &error,
3127 &parm0, &parm1) &&
3128 myrb_err_status(cb, error, parm0, parm1))
3129 return -EIO;
3130 udelay(10);
3131 timeout++;
3132 }
3133 if (timeout == MYRB_MAILBOX_TIMEOUT) {
3134 dev_err(&pdev->dev,
3135 "Timeout waiting for Controller Initialisation\n");
3136 return -ETIMEDOUT;
3137 }
3138 if (!myrb_enable_mmio(cb, NULL)) {
3139 dev_err(&pdev->dev,
3140 "Unable to Enable Memory Mailbox Interface\n");
3141 DAC960_PD_reset_ctrl(base);
3142 return -ENODEV;
3143 }
3144 DAC960_PD_enable_intr(base);
3145 cb->qcmd = DAC960_PD_qcmd;
3146 cb->disable_intr = DAC960_PD_disable_intr;
3147 cb->reset = DAC960_PD_reset_ctrl;
3148
3149 return 0;
3150 }
3151
DAC960_PD_intr_handler(int irq,void * arg)3152 static irqreturn_t DAC960_PD_intr_handler(int irq, void *arg)
3153 {
3154 struct myrb_hba *cb = arg;
3155 void __iomem *base = cb->io_base;
3156 unsigned long flags;
3157
3158 spin_lock_irqsave(&cb->queue_lock, flags);
3159 while (DAC960_PD_hw_mbox_status_available(base)) {
3160 unsigned char id = DAC960_PD_read_status_cmd_ident(base);
3161 struct scsi_cmnd *scmd = NULL;
3162 struct myrb_cmdblk *cmd_blk = NULL;
3163
3164 if (id == MYRB_DCMD_TAG)
3165 cmd_blk = &cb->dcmd_blk;
3166 else if (id == MYRB_MCMD_TAG)
3167 cmd_blk = &cb->mcmd_blk;
3168 else {
3169 scmd = scsi_host_find_tag(cb->host, id - 3);
3170 if (scmd)
3171 cmd_blk = scsi_cmd_priv(scmd);
3172 }
3173 if (cmd_blk)
3174 cmd_blk->status = DAC960_PD_read_status(base);
3175 else
3176 dev_err(&cb->pdev->dev,
3177 "Unhandled command completion %d\n", id);
3178
3179 DAC960_PD_ack_intr(base);
3180 DAC960_PD_ack_hw_mbox_status(base);
3181
3182 if (id < 3)
3183 myrb_handle_cmdblk(cb, cmd_blk);
3184 else
3185 myrb_handle_scsi(cb, cmd_blk, scmd);
3186 }
3187 spin_unlock_irqrestore(&cb->queue_lock, flags);
3188 return IRQ_HANDLED;
3189 }
3190
3191 static struct myrb_privdata DAC960_PD_privdata = {
3192 .hw_init = DAC960_PD_hw_init,
3193 .irq_handler = DAC960_PD_intr_handler,
3194 .mmio_size = DAC960_PD_mmio_size,
3195 };
3196
3197
3198 /*
3199 * DAC960 P Series Controllers
3200 *
3201 * Similar to the DAC960 PD Series Controllers, but some commands have
3202 * to be translated.
3203 */
3204
myrb_translate_enquiry(void * enq)3205 static inline void myrb_translate_enquiry(void *enq)
3206 {
3207 memcpy(enq + 132, enq + 36, 64);
3208 memset(enq + 36, 0, 96);
3209 }
3210
myrb_translate_devstate(void * state)3211 static inline void myrb_translate_devstate(void *state)
3212 {
3213 memcpy(state + 2, state + 3, 1);
3214 memmove(state + 4, state + 5, 2);
3215 memmove(state + 6, state + 8, 4);
3216 }
3217
myrb_translate_to_rw_command(struct myrb_cmdblk * cmd_blk)3218 static inline void myrb_translate_to_rw_command(struct myrb_cmdblk *cmd_blk)
3219 {
3220 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
3221 int ldev_num = mbox->type5.ld.ldev_num;
3222
3223 mbox->bytes[3] &= 0x7;
3224 mbox->bytes[3] |= mbox->bytes[7] << 6;
3225 mbox->bytes[7] = ldev_num;
3226 }
3227
myrb_translate_from_rw_command(struct myrb_cmdblk * cmd_blk)3228 static inline void myrb_translate_from_rw_command(struct myrb_cmdblk *cmd_blk)
3229 {
3230 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
3231 int ldev_num = mbox->bytes[7];
3232
3233 mbox->bytes[7] = mbox->bytes[3] >> 6;
3234 mbox->bytes[3] &= 0x7;
3235 mbox->bytes[3] |= ldev_num << 3;
3236 }
3237
DAC960_P_qcmd(struct myrb_hba * cb,struct myrb_cmdblk * cmd_blk)3238 static void DAC960_P_qcmd(struct myrb_hba *cb, struct myrb_cmdblk *cmd_blk)
3239 {
3240 void __iomem *base = cb->io_base;
3241 union myrb_cmd_mbox *mbox = &cmd_blk->mbox;
3242
3243 switch (mbox->common.opcode) {
3244 case MYRB_CMD_ENQUIRY:
3245 mbox->common.opcode = MYRB_CMD_ENQUIRY_OLD;
3246 break;
3247 case MYRB_CMD_GET_DEVICE_STATE:
3248 mbox->common.opcode = MYRB_CMD_GET_DEVICE_STATE_OLD;
3249 break;
3250 case MYRB_CMD_READ:
3251 mbox->common.opcode = MYRB_CMD_READ_OLD;
3252 myrb_translate_to_rw_command(cmd_blk);
3253 break;
3254 case MYRB_CMD_WRITE:
3255 mbox->common.opcode = MYRB_CMD_WRITE_OLD;
3256 myrb_translate_to_rw_command(cmd_blk);
3257 break;
3258 case MYRB_CMD_READ_SG:
3259 mbox->common.opcode = MYRB_CMD_READ_SG_OLD;
3260 myrb_translate_to_rw_command(cmd_blk);
3261 break;
3262 case MYRB_CMD_WRITE_SG:
3263 mbox->common.opcode = MYRB_CMD_WRITE_SG_OLD;
3264 myrb_translate_to_rw_command(cmd_blk);
3265 break;
3266 default:
3267 break;
3268 }
3269 while (DAC960_PD_hw_mbox_is_full(base))
3270 udelay(1);
3271 DAC960_PD_write_cmd_mbox(base, mbox);
3272 DAC960_PD_hw_mbox_new_cmd(base);
3273 }
3274
3275
DAC960_P_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base)3276 static int DAC960_P_hw_init(struct pci_dev *pdev,
3277 struct myrb_hba *cb, void __iomem *base)
3278 {
3279 int timeout = 0;
3280 unsigned char error, parm0, parm1;
3281
3282 if (!request_region(cb->io_addr, 0x80, "myrb")) {
3283 dev_err(&pdev->dev, "IO port 0x%lx busy\n",
3284 (unsigned long)cb->io_addr);
3285 return -EBUSY;
3286 }
3287 DAC960_PD_disable_intr(base);
3288 DAC960_PD_ack_hw_mbox_status(base);
3289 udelay(1000);
3290 while (DAC960_PD_init_in_progress(base) &&
3291 timeout < MYRB_MAILBOX_TIMEOUT) {
3292 if (DAC960_PD_read_error_status(base, &error,
3293 &parm0, &parm1) &&
3294 myrb_err_status(cb, error, parm0, parm1))
3295 return -EAGAIN;
3296 udelay(10);
3297 timeout++;
3298 }
3299 if (timeout == MYRB_MAILBOX_TIMEOUT) {
3300 dev_err(&pdev->dev,
3301 "Timeout waiting for Controller Initialisation\n");
3302 return -ETIMEDOUT;
3303 }
3304 if (!myrb_enable_mmio(cb, NULL)) {
3305 dev_err(&pdev->dev,
3306 "Unable to allocate DMA mapped memory\n");
3307 DAC960_PD_reset_ctrl(base);
3308 return -ETIMEDOUT;
3309 }
3310 DAC960_PD_enable_intr(base);
3311 cb->qcmd = DAC960_P_qcmd;
3312 cb->disable_intr = DAC960_PD_disable_intr;
3313 cb->reset = DAC960_PD_reset_ctrl;
3314
3315 return 0;
3316 }
3317
DAC960_P_intr_handler(int irq,void * arg)3318 static irqreturn_t DAC960_P_intr_handler(int irq, void *arg)
3319 {
3320 struct myrb_hba *cb = arg;
3321 void __iomem *base = cb->io_base;
3322 unsigned long flags;
3323
3324 spin_lock_irqsave(&cb->queue_lock, flags);
3325 while (DAC960_PD_hw_mbox_status_available(base)) {
3326 unsigned char id = DAC960_PD_read_status_cmd_ident(base);
3327 struct scsi_cmnd *scmd = NULL;
3328 struct myrb_cmdblk *cmd_blk = NULL;
3329 union myrb_cmd_mbox *mbox;
3330 enum myrb_cmd_opcode op;
3331
3332
3333 if (id == MYRB_DCMD_TAG)
3334 cmd_blk = &cb->dcmd_blk;
3335 else if (id == MYRB_MCMD_TAG)
3336 cmd_blk = &cb->mcmd_blk;
3337 else {
3338 scmd = scsi_host_find_tag(cb->host, id - 3);
3339 if (scmd)
3340 cmd_blk = scsi_cmd_priv(scmd);
3341 }
3342 if (cmd_blk)
3343 cmd_blk->status = DAC960_PD_read_status(base);
3344 else
3345 dev_err(&cb->pdev->dev,
3346 "Unhandled command completion %d\n", id);
3347
3348 DAC960_PD_ack_intr(base);
3349 DAC960_PD_ack_hw_mbox_status(base);
3350
3351 if (!cmd_blk)
3352 continue;
3353
3354 mbox = &cmd_blk->mbox;
3355 op = mbox->common.opcode;
3356 switch (op) {
3357 case MYRB_CMD_ENQUIRY_OLD:
3358 mbox->common.opcode = MYRB_CMD_ENQUIRY;
3359 myrb_translate_enquiry(cb->enquiry);
3360 break;
3361 case MYRB_CMD_READ_OLD:
3362 mbox->common.opcode = MYRB_CMD_READ;
3363 myrb_translate_from_rw_command(cmd_blk);
3364 break;
3365 case MYRB_CMD_WRITE_OLD:
3366 mbox->common.opcode = MYRB_CMD_WRITE;
3367 myrb_translate_from_rw_command(cmd_blk);
3368 break;
3369 case MYRB_CMD_READ_SG_OLD:
3370 mbox->common.opcode = MYRB_CMD_READ_SG;
3371 myrb_translate_from_rw_command(cmd_blk);
3372 break;
3373 case MYRB_CMD_WRITE_SG_OLD:
3374 mbox->common.opcode = MYRB_CMD_WRITE_SG;
3375 myrb_translate_from_rw_command(cmd_blk);
3376 break;
3377 default:
3378 break;
3379 }
3380 if (id < 3)
3381 myrb_handle_cmdblk(cb, cmd_blk);
3382 else
3383 myrb_handle_scsi(cb, cmd_blk, scmd);
3384 }
3385 spin_unlock_irqrestore(&cb->queue_lock, flags);
3386 return IRQ_HANDLED;
3387 }
3388
3389 static struct myrb_privdata DAC960_P_privdata = {
3390 .hw_init = DAC960_P_hw_init,
3391 .irq_handler = DAC960_P_intr_handler,
3392 .mmio_size = DAC960_PD_mmio_size,
3393 };
3394
myrb_detect(struct pci_dev * pdev,const struct pci_device_id * entry)3395 static struct myrb_hba *myrb_detect(struct pci_dev *pdev,
3396 const struct pci_device_id *entry)
3397 {
3398 struct myrb_privdata *privdata =
3399 (struct myrb_privdata *)entry->driver_data;
3400 irq_handler_t irq_handler = privdata->irq_handler;
3401 unsigned int mmio_size = privdata->mmio_size;
3402 struct Scsi_Host *shost;
3403 struct myrb_hba *cb = NULL;
3404
3405 shost = scsi_host_alloc(&myrb_template, sizeof(struct myrb_hba));
3406 if (!shost) {
3407 dev_err(&pdev->dev, "Unable to allocate Controller\n");
3408 return NULL;
3409 }
3410 shost->max_cmd_len = 12;
3411 shost->max_lun = 256;
3412 cb = shost_priv(shost);
3413 mutex_init(&cb->dcmd_mutex);
3414 mutex_init(&cb->dma_mutex);
3415 cb->pdev = pdev;
3416 cb->host = shost;
3417
3418 if (pci_enable_device(pdev)) {
3419 dev_err(&pdev->dev, "Failed to enable PCI device\n");
3420 scsi_host_put(shost);
3421 return NULL;
3422 }
3423
3424 if (privdata->hw_init == DAC960_PD_hw_init ||
3425 privdata->hw_init == DAC960_P_hw_init) {
3426 cb->io_addr = pci_resource_start(pdev, 0);
3427 cb->pci_addr = pci_resource_start(pdev, 1);
3428 } else
3429 cb->pci_addr = pci_resource_start(pdev, 0);
3430
3431 pci_set_drvdata(pdev, cb);
3432 spin_lock_init(&cb->queue_lock);
3433 if (mmio_size < PAGE_SIZE)
3434 mmio_size = PAGE_SIZE;
3435 cb->mmio_base = ioremap(cb->pci_addr & PAGE_MASK, mmio_size);
3436 if (cb->mmio_base == NULL) {
3437 dev_err(&pdev->dev,
3438 "Unable to map Controller Register Window\n");
3439 goto failure;
3440 }
3441
3442 cb->io_base = cb->mmio_base + (cb->pci_addr & ~PAGE_MASK);
3443 if (privdata->hw_init(pdev, cb, cb->io_base))
3444 goto failure;
3445
3446 if (request_irq(pdev->irq, irq_handler, IRQF_SHARED, "myrb", cb) < 0) {
3447 dev_err(&pdev->dev,
3448 "Unable to acquire IRQ Channel %d\n", pdev->irq);
3449 goto failure;
3450 }
3451 cb->irq = pdev->irq;
3452 return cb;
3453
3454 failure:
3455 dev_err(&pdev->dev,
3456 "Failed to initialize Controller\n");
3457 myrb_cleanup(cb);
3458 return NULL;
3459 }
3460
myrb_probe(struct pci_dev * dev,const struct pci_device_id * entry)3461 static int myrb_probe(struct pci_dev *dev, const struct pci_device_id *entry)
3462 {
3463 struct myrb_hba *cb;
3464 int ret;
3465
3466 cb = myrb_detect(dev, entry);
3467 if (!cb)
3468 return -ENODEV;
3469
3470 ret = myrb_get_hba_config(cb);
3471 if (ret < 0) {
3472 myrb_cleanup(cb);
3473 return ret;
3474 }
3475
3476 if (!myrb_create_mempools(dev, cb)) {
3477 ret = -ENOMEM;
3478 goto failed;
3479 }
3480
3481 ret = scsi_add_host(cb->host, &dev->dev);
3482 if (ret) {
3483 dev_err(&dev->dev, "scsi_add_host failed with %d\n", ret);
3484 myrb_destroy_mempools(cb);
3485 goto failed;
3486 }
3487 scsi_scan_host(cb->host);
3488 return 0;
3489 failed:
3490 myrb_cleanup(cb);
3491 return ret;
3492 }
3493
3494
myrb_remove(struct pci_dev * pdev)3495 static void myrb_remove(struct pci_dev *pdev)
3496 {
3497 struct myrb_hba *cb = pci_get_drvdata(pdev);
3498
3499 shost_printk(KERN_NOTICE, cb->host, "Flushing Cache...");
3500 myrb_exec_type3(cb, MYRB_CMD_FLUSH, 0);
3501 myrb_cleanup(cb);
3502 myrb_destroy_mempools(cb);
3503 }
3504
3505
3506 static const struct pci_device_id myrb_id_table[] = {
3507 {
3508 PCI_DEVICE_SUB(PCI_VENDOR_ID_DEC,
3509 PCI_DEVICE_ID_DEC_21285,
3510 PCI_VENDOR_ID_MYLEX,
3511 PCI_DEVICE_ID_MYLEX_DAC960_LA),
3512 .driver_data = (unsigned long) &DAC960_LA_privdata,
3513 },
3514 {
3515 PCI_DEVICE_DATA(MYLEX, DAC960_PG, &DAC960_PG_privdata),
3516 },
3517 {
3518 PCI_DEVICE_DATA(MYLEX, DAC960_PD, &DAC960_PD_privdata),
3519 },
3520 {
3521 PCI_DEVICE_DATA(MYLEX, DAC960_P, &DAC960_P_privdata),
3522 },
3523 {0, },
3524 };
3525
3526 MODULE_DEVICE_TABLE(pci, myrb_id_table);
3527
3528 static struct pci_driver myrb_pci_driver = {
3529 .name = "myrb",
3530 .id_table = myrb_id_table,
3531 .probe = myrb_probe,
3532 .remove = myrb_remove,
3533 };
3534
myrb_init_module(void)3535 static int __init myrb_init_module(void)
3536 {
3537 int ret;
3538
3539 myrb_raid_template = raid_class_attach(&myrb_raid_functions);
3540 if (!myrb_raid_template)
3541 return -ENODEV;
3542
3543 ret = pci_register_driver(&myrb_pci_driver);
3544 if (ret)
3545 raid_class_release(myrb_raid_template);
3546
3547 return ret;
3548 }
3549
myrb_cleanup_module(void)3550 static void __exit myrb_cleanup_module(void)
3551 {
3552 pci_unregister_driver(&myrb_pci_driver);
3553 raid_class_release(myrb_raid_template);
3554 }
3555
3556 module_init(myrb_init_module);
3557 module_exit(myrb_cleanup_module);
3558
3559 MODULE_DESCRIPTION("Mylex DAC960/AcceleRAID/eXtremeRAID driver (Block interface)");
3560 MODULE_AUTHOR("Hannes Reinecke <hare@suse.com>");
3561 MODULE_LICENSE("GPL");
3562