xref: /freebsd/sys/contrib/dev/mediatek/mt76/mt792x_usb.c (revision cbb3ec25236ba72f91cbdf23f8b78b9d1af0cedf)
1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2023 MediaTek Inc.
3  *
4  * Author: Lorenzo Bianconi <lorenzo@kernel.org>
5  */
6 
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/usb.h>
10 
11 #include "mt792x.h"
12 #include "mt76_connac2_mac.h"
13 
mt792xu_rr(struct mt76_dev * dev,u32 addr)14 u32 mt792xu_rr(struct mt76_dev *dev, u32 addr)
15 {
16 	u32 ret;
17 
18 	mutex_lock(&dev->usb.usb_ctrl_mtx);
19 	ret = ___mt76u_rr(dev, MT_VEND_READ_EXT,
20 			  USB_DIR_IN | MT_USB_TYPE_VENDOR, addr);
21 	mutex_unlock(&dev->usb.usb_ctrl_mtx);
22 
23 	return ret;
24 }
25 EXPORT_SYMBOL_GPL(mt792xu_rr);
26 
mt792xu_wr(struct mt76_dev * dev,u32 addr,u32 val)27 void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val)
28 {
29 	mutex_lock(&dev->usb.usb_ctrl_mtx);
30 	___mt76u_wr(dev, MT_VEND_WRITE_EXT,
31 		    USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
32 	mutex_unlock(&dev->usb.usb_ctrl_mtx);
33 }
34 EXPORT_SYMBOL_GPL(mt792xu_wr);
35 
mt792xu_rmw(struct mt76_dev * dev,u32 addr,u32 mask,u32 val)36 u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val)
37 {
38 	mutex_lock(&dev->usb.usb_ctrl_mtx);
39 	val |= ___mt76u_rr(dev, MT_VEND_READ_EXT,
40 			   USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask;
41 	___mt76u_wr(dev, MT_VEND_WRITE_EXT,
42 		    USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
43 	mutex_unlock(&dev->usb.usb_ctrl_mtx);
44 
45 	return val;
46 }
47 EXPORT_SYMBOL_GPL(mt792xu_rmw);
48 
mt792xu_copy(struct mt76_dev * dev,u32 offset,const void * data,int len)49 void mt792xu_copy(struct mt76_dev *dev, u32 offset, const void *data, int len)
50 {
51 	struct mt76_usb *usb = &dev->usb;
52 	int ret, i = 0, batch_len;
53 	const u8 *val = data;
54 
55 	len = round_up(len, 4);
56 
57 	mutex_lock(&usb->usb_ctrl_mtx);
58 	while (i < len) {
59 		batch_len = min_t(int, usb->data_len, len - i);
60 		memcpy(usb->data, val + i, batch_len);
61 		ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT,
62 					     USB_DIR_OUT | MT_USB_TYPE_VENDOR,
63 					     (offset + i) >> 16, offset + i,
64 					     usb->data, batch_len);
65 		if (ret < 0)
66 			break;
67 
68 		i += batch_len;
69 	}
70 	mutex_unlock(&usb->usb_ctrl_mtx);
71 }
72 EXPORT_SYMBOL_GPL(mt792xu_copy);
73 
mt792xu_mcu_power_on(struct mt792x_dev * dev)74 int mt792xu_mcu_power_on(struct mt792x_dev *dev)
75 {
76 	int ret;
77 
78 	ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON,
79 				   USB_DIR_OUT | MT_USB_TYPE_VENDOR,
80 				   0x0, 0x1, NULL, 0);
81 	if (ret)
82 		return ret;
83 
84 	if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
85 			    MT_TOP_MISC2_FW_PWR_ON, 500)) {
86 		dev_err(dev->mt76.dev, "Timeout for power on\n");
87 		ret = -EIO;
88 	}
89 
90 	return ret;
91 }
92 EXPORT_SYMBOL_GPL(mt792xu_mcu_power_on);
93 
mt792xu_cleanup(struct mt792x_dev * dev)94 static void mt792xu_cleanup(struct mt792x_dev *dev)
95 {
96 	clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
97 	mt792xu_wfsys_reset(dev);
98 	skb_queue_purge(&dev->mt76.mcu.res_q);
99 	mt76u_queues_deinit(&dev->mt76);
100 }
101 
mt792xu_uhw_rr(struct mt76_dev * dev,u32 addr)102 static u32 mt792xu_uhw_rr(struct mt76_dev *dev, u32 addr)
103 {
104 	u32 ret;
105 
106 	mutex_lock(&dev->usb.usb_ctrl_mtx);
107 	ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE,
108 			  USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr);
109 	mutex_unlock(&dev->usb.usb_ctrl_mtx);
110 
111 	return ret;
112 }
113 
mt792xu_uhw_wr(struct mt76_dev * dev,u32 addr,u32 val)114 static void mt792xu_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val)
115 {
116 	mutex_lock(&dev->usb.usb_ctrl_mtx);
117 	___mt76u_wr(dev, MT_VEND_WRITE,
118 		    USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val);
119 	mutex_unlock(&dev->usb.usb_ctrl_mtx);
120 }
121 
mt792xu_dma_prefetch(struct mt792x_dev * dev)122 static void mt792xu_dma_prefetch(struct mt792x_dev *dev)
123 {
124 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
125 		 MT_WPDMA0_MAX_CNT_MASK, 4);
126 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
127 		 MT_WPDMA0_BASE_PTR_MASK, 0x80);
128 
129 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
130 		 MT_WPDMA0_MAX_CNT_MASK, 4);
131 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
132 		 MT_WPDMA0_BASE_PTR_MASK, 0xc0);
133 
134 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
135 		 MT_WPDMA0_MAX_CNT_MASK, 4);
136 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
137 		 MT_WPDMA0_BASE_PTR_MASK, 0x100);
138 
139 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
140 		 MT_WPDMA0_MAX_CNT_MASK, 4);
141 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
142 		 MT_WPDMA0_BASE_PTR_MASK, 0x140);
143 
144 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
145 		 MT_WPDMA0_MAX_CNT_MASK, 4);
146 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
147 		 MT_WPDMA0_BASE_PTR_MASK, 0x180);
148 
149 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
150 		 MT_WPDMA0_MAX_CNT_MASK, 4);
151 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
152 		 MT_WPDMA0_BASE_PTR_MASK, 0x280);
153 
154 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
155 		 MT_WPDMA0_MAX_CNT_MASK, 4);
156 	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
157 		 MT_WPDMA0_BASE_PTR_MASK,  0x2c0);
158 }
159 
mt792xu_wfdma_init(struct mt792x_dev * dev)160 static void mt792xu_wfdma_init(struct mt792x_dev *dev)
161 {
162 	mt792xu_dma_prefetch(dev);
163 
164 	mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO);
165 	mt76_set(dev, MT_UWFDMA0_GLO_CFG,
166 		 MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
167 		 MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 |
168 		 MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL |
169 		 MT_WFDMA0_GLO_CFG_TX_DMA_EN |
170 		 MT_WFDMA0_GLO_CFG_RX_DMA_EN);
171 
172 	/* disable dmashdl */
173 	mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0,
174 		   MT_WFDMA0_CSR_TX_DMASHDL_ENABLE);
175 	mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);
176 
177 	mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
178 }
179 
mt792xu_dma_rx_evt_ep4(struct mt792x_dev * dev)180 static int mt792xu_dma_rx_evt_ep4(struct mt792x_dev *dev)
181 {
182 	if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG,
183 		       MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000))
184 		return -ETIMEDOUT;
185 
186 	mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
187 	mt76_set(dev, MT_WFDMA_HOST_CONFIG,
188 		 MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN);
189 	mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
190 
191 	return 0;
192 }
193 
mt792xu_epctl_rst_opt(struct mt792x_dev * dev,bool reset)194 static void mt792xu_epctl_rst_opt(struct mt792x_dev *dev, bool reset)
195 {
196 	u32 val;
197 
198 	/* usb endpoint reset opt
199 	 * bits[4,9]: out blk ep 4-9
200 	 * bits[20,21]: in blk ep 4-5
201 	 * bits[22]: in int ep 6
202 	 */
203 	val = mt792xu_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT);
204 	if (reset)
205 		val |= GENMASK(9, 4) | GENMASK(22, 20);
206 	else
207 		val &= ~(GENMASK(9, 4) | GENMASK(22, 20));
208 	mt792xu_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val);
209 }
210 
mt792xu_dma_init(struct mt792x_dev * dev,bool resume)211 int mt792xu_dma_init(struct mt792x_dev *dev, bool resume)
212 {
213 	int err;
214 
215 	mt792xu_wfdma_init(dev);
216 
217 	mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
218 
219 	mt76_set(dev, MT_UDMA_WLCFG_0,
220 		 MT_WL_RX_EN | MT_WL_TX_EN |
221 		 MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN);
222 	mt76_clear(dev, MT_UDMA_WLCFG_0,
223 		   MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT);
224 	mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT);
225 
226 	if (resume)
227 		return 0;
228 
229 	err = mt792xu_dma_rx_evt_ep4(dev);
230 	if (err)
231 		return err;
232 
233 	mt792xu_epctl_rst_opt(dev, false);
234 
235 	return 0;
236 }
237 EXPORT_SYMBOL_GPL(mt792xu_dma_init);
238 
mt792xu_wfsys_reset(struct mt792x_dev * dev)239 int mt792xu_wfsys_reset(struct mt792x_dev *dev)
240 {
241 	u32 val;
242 	int i;
243 
244 	mt792xu_epctl_rst_opt(dev, false);
245 
246 	val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
247 	val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
248 	mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
249 
250 	usleep_range(10, 20);
251 
252 	val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
253 	val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
254 	mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
255 
256 	mt792xu_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0);
257 	for (i = 0; i < MT792x_WFSYS_INIT_RETRY_COUNT; i++) {
258 		val = mt792xu_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS);
259 		if (val & MT_UDMA_CONN_WFSYS_INIT_DONE)
260 			break;
261 
262 		msleep(100);
263 	}
264 
265 	if (i == MT792x_WFSYS_INIT_RETRY_COUNT)
266 		return -ETIMEDOUT;
267 
268 	return 0;
269 }
270 EXPORT_SYMBOL_GPL(mt792xu_wfsys_reset);
271 
mt792xu_init_reset(struct mt792x_dev * dev)272 int mt792xu_init_reset(struct mt792x_dev *dev)
273 {
274 	set_bit(MT76_RESET, &dev->mphy.state);
275 
276 	wake_up(&dev->mt76.mcu.wait);
277 	skb_queue_purge(&dev->mt76.mcu.res_q);
278 
279 	mt76u_stop_rx(&dev->mt76);
280 	mt76u_stop_tx(&dev->mt76);
281 
282 	mt792xu_wfsys_reset(dev);
283 
284 	clear_bit(MT76_RESET, &dev->mphy.state);
285 
286 	return mt76u_resume_rx(&dev->mt76);
287 }
288 EXPORT_SYMBOL_GPL(mt792xu_init_reset);
289 
mt792xu_disconnect(struct usb_interface * usb_intf)290 void mt792xu_disconnect(struct usb_interface *usb_intf)
291 {
292 	struct mt792x_dev *dev = usb_get_intfdata(usb_intf);
293 
294 	cancel_work_sync(&dev->init_work);
295 	if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
296 		return;
297 
298 	mt76_unregister_device(&dev->mt76);
299 	mt792xu_cleanup(dev);
300 
301 	usb_set_intfdata(usb_intf, NULL);
302 	usb_put_dev(interface_to_usbdev(usb_intf));
303 
304 	mt76_free_device(&dev->mt76);
305 }
306 EXPORT_SYMBOL_GPL(mt792xu_disconnect);
307 
308 MODULE_LICENSE("Dual BSD/GPL");
309 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
310