1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #include <linux/etherdevice.h>
5 #include <linux/hwmon.h>
6 #include <linux/hwmon-sysfs.h>
7 #include <linux/of.h>
8 #include <linux/thermal.h>
9 #if defined(__FreeBSD__)
10 #include <linux/delay.h>
11 #endif
12 #include "mt7915.h"
13 #include "mac.h"
14 #include "mcu.h"
15 #include "coredump.h"
16 #include "eeprom.h"
17
18 static const struct ieee80211_iface_limit if_limits[] = {
19 {
20 .max = 1,
21 .types = BIT(NL80211_IFTYPE_ADHOC)
22 }, {
23 .max = 16,
24 .types = BIT(NL80211_IFTYPE_AP)
25 #ifdef CONFIG_MAC80211_MESH
26 | BIT(NL80211_IFTYPE_MESH_POINT)
27 #endif
28 }, {
29 .max = MT7915_MAX_INTERFACES,
30 .types = BIT(NL80211_IFTYPE_STATION)
31 }
32 };
33
34 static const struct ieee80211_iface_combination if_comb[] = {
35 {
36 .limits = if_limits,
37 .n_limits = ARRAY_SIZE(if_limits),
38 .max_interfaces = MT7915_MAX_INTERFACES,
39 .num_different_channels = 1,
40 .beacon_int_infra_match = true,
41 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
42 BIT(NL80211_CHAN_WIDTH_20) |
43 BIT(NL80211_CHAN_WIDTH_40) |
44 BIT(NL80211_CHAN_WIDTH_80) |
45 BIT(NL80211_CHAN_WIDTH_160),
46 }
47 };
48
49 #if defined(__linux__)
mt7915_thermal_temp_show(struct device * dev,struct device_attribute * attr,char * buf)50 static ssize_t mt7915_thermal_temp_show(struct device *dev,
51 struct device_attribute *attr,
52 char *buf)
53 {
54 struct mt7915_phy *phy = dev_get_drvdata(dev);
55 int i = to_sensor_dev_attr(attr)->index;
56 int temperature;
57
58 switch (i) {
59 case 0:
60 temperature = mt7915_mcu_get_temperature(phy);
61 if (temperature < 0)
62 return temperature;
63 /* display in millidegree celcius */
64 return sprintf(buf, "%u\n", temperature * 1000);
65 case 1:
66 case 2:
67 return sprintf(buf, "%u\n",
68 phy->throttle_temp[i - 1] * 1000);
69 case 3:
70 return sprintf(buf, "%hhu\n", phy->throttle_state);
71 default:
72 return -EINVAL;
73 }
74 }
75
mt7915_thermal_temp_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)76 static ssize_t mt7915_thermal_temp_store(struct device *dev,
77 struct device_attribute *attr,
78 const char *buf, size_t count)
79 {
80 struct mt7915_phy *phy = dev_get_drvdata(dev);
81 int ret, i = to_sensor_dev_attr(attr)->index;
82 long val;
83
84 ret = kstrtol(buf, 10, &val);
85 if (ret < 0)
86 return ret;
87
88 mutex_lock(&phy->dev->mt76.mutex);
89 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130);
90
91 if ((i - 1 == MT7915_CRIT_TEMP_IDX &&
92 val > phy->throttle_temp[MT7915_MAX_TEMP_IDX]) ||
93 (i - 1 == MT7915_MAX_TEMP_IDX &&
94 val < phy->throttle_temp[MT7915_CRIT_TEMP_IDX])) {
95 dev_err(phy->dev->mt76.dev,
96 "temp1_max shall be greater than temp1_crit.");
97 mutex_unlock(&phy->dev->mt76.mutex);
98 return -EINVAL;
99 }
100
101 phy->throttle_temp[i - 1] = val;
102 mutex_unlock(&phy->dev->mt76.mutex);
103
104 ret = mt7915_mcu_set_thermal_protect(phy);
105 if (ret)
106 return ret;
107
108 return count;
109 }
110
111 static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0);
112 static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1);
113 static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2);
114 static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3);
115
116 static struct attribute *mt7915_hwmon_attrs[] = {
117 &sensor_dev_attr_temp1_input.dev_attr.attr,
118 &sensor_dev_attr_temp1_crit.dev_attr.attr,
119 &sensor_dev_attr_temp1_max.dev_attr.attr,
120 &sensor_dev_attr_throttle1.dev_attr.attr,
121 NULL,
122 };
123 ATTRIBUTE_GROUPS(mt7915_hwmon);
124
125 static int
mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device * cdev,unsigned long * state)126 mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
127 unsigned long *state)
128 {
129 *state = MT7915_CDEV_THROTTLE_MAX;
130
131 return 0;
132 }
133
134 static int
mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device * cdev,unsigned long * state)135 mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
136 unsigned long *state)
137 {
138 struct mt7915_phy *phy = cdev->devdata;
139
140 *state = phy->cdev_state;
141
142 return 0;
143 }
144
145 static int
mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device * cdev,unsigned long state)146 mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
147 unsigned long state)
148 {
149 struct mt7915_phy *phy = cdev->devdata;
150 u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state;
151 int ret;
152
153 if (state > MT7915_CDEV_THROTTLE_MAX) {
154 dev_err(phy->dev->mt76.dev,
155 "please specify a valid throttling state\n");
156 return -EINVAL;
157 }
158
159 if (state == phy->cdev_state)
160 return 0;
161
162 /*
163 * cooling_device convention: 0 = no cooling, more = more cooling
164 * mcu convention: 1 = max cooling, more = less cooling
165 */
166 ret = mt7915_mcu_set_thermal_throttling(phy, throttling);
167 if (ret)
168 return ret;
169
170 phy->cdev_state = state;
171
172 return 0;
173 }
174
175 static const struct thermal_cooling_device_ops mt7915_thermal_ops = {
176 .get_max_state = mt7915_thermal_get_max_throttle_state,
177 .get_cur_state = mt7915_thermal_get_cur_throttle_state,
178 .set_cur_state = mt7915_thermal_set_cur_throttle_state,
179 };
180
mt7915_unregister_thermal(struct mt7915_phy * phy)181 static void mt7915_unregister_thermal(struct mt7915_phy *phy)
182 {
183 struct wiphy *wiphy = phy->mt76->hw->wiphy;
184
185 if (!phy->cdev)
186 return;
187
188 sysfs_remove_link(&wiphy->dev.kobj, "cooling_device");
189 thermal_cooling_device_unregister(phy->cdev);
190 }
191 #endif
192
mt7915_thermal_init(struct mt7915_phy * phy)193 static int mt7915_thermal_init(struct mt7915_phy *phy)
194 {
195 #if defined(__linux__)
196 struct wiphy *wiphy = phy->mt76->hw->wiphy;
197 struct thermal_cooling_device *cdev;
198 struct device *hwmon;
199 const char *name;
200
201 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s",
202 wiphy_name(wiphy));
203
204 cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops);
205 if (!IS_ERR(cdev)) {
206 if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj,
207 "cooling_device") < 0)
208 thermal_cooling_device_unregister(cdev);
209 else
210 phy->cdev = cdev;
211 }
212
213 /* initialize critical/maximum high temperature */
214 phy->throttle_temp[MT7915_CRIT_TEMP_IDX] = MT7915_CRIT_TEMP;
215 phy->throttle_temp[MT7915_MAX_TEMP_IDX] = MT7915_MAX_TEMP;
216
217 if (!IS_REACHABLE(CONFIG_HWMON))
218 return 0;
219
220 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy,
221 mt7915_hwmon_groups);
222 if (IS_ERR(hwmon))
223 return PTR_ERR(hwmon);
224 #endif
225
226 return 0;
227 }
228
229 #if defined(CONFIG_MT76_LEDS)
mt7915_led_set_config(struct led_classdev * led_cdev,u8 delay_on,u8 delay_off)230 static void mt7915_led_set_config(struct led_classdev *led_cdev,
231 u8 delay_on, u8 delay_off)
232 {
233 struct mt7915_dev *dev;
234 struct mt76_phy *mphy;
235 u32 val;
236
237 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
238 dev = container_of(mphy->dev, struct mt7915_dev, mt76);
239
240 /* set PWM mode */
241 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |
242 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
243 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
244 mt76_wr(dev, MT_LED_STATUS_0(mphy->band_idx), val);
245 mt76_wr(dev, MT_LED_STATUS_1(mphy->band_idx), val);
246
247 /* enable LED */
248 mt76_wr(dev, MT_LED_EN(mphy->band_idx), 1);
249
250 /* control LED */
251 val = MT_LED_CTRL_KICK;
252 if (dev->mphy.leds.al)
253 val |= MT_LED_CTRL_POLARITY;
254 if (mphy->band_idx)
255 val |= MT_LED_CTRL_BAND;
256
257 mt76_wr(dev, MT_LED_CTRL(mphy->band_idx), val);
258 mt76_clear(dev, MT_LED_CTRL(mphy->band_idx), MT_LED_CTRL_KICK);
259 }
260 #endif
261
mt7915_led_set_blink(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)262 static int mt7915_led_set_blink(struct led_classdev *led_cdev,
263 unsigned long *delay_on,
264 unsigned long *delay_off)
265 {
266 #if defined(CONFIG_MT76_LEDS)
267 u16 delta_on = 0, delta_off = 0;
268
269 #define HW_TICK 10
270 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
271
272 if (*delay_on)
273 delta_on = TO_HW_TICK(*delay_on);
274 if (*delay_off)
275 delta_off = TO_HW_TICK(*delay_off);
276
277 mt7915_led_set_config(led_cdev, delta_on, delta_off);
278 #endif
279
280 return 0;
281 }
282
mt7915_led_set_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)283 static void mt7915_led_set_brightness(struct led_classdev *led_cdev,
284 enum led_brightness brightness)
285 {
286 #if defined(CONFIG_MT76_LEDS)
287 if (!brightness)
288 mt7915_led_set_config(led_cdev, 0, 0xff);
289 else
290 mt7915_led_set_config(led_cdev, 0xff, 0);
291 #endif
292 }
293
mt7915_init_txpower(struct mt7915_dev * dev,struct ieee80211_supported_band * sband)294 void mt7915_init_txpower(struct mt7915_dev *dev,
295 struct ieee80211_supported_band *sband)
296 {
297 int i, n_chains = hweight8(dev->mphy.antenna_mask);
298 int nss_delta = mt76_tx_power_nss_delta(n_chains);
299 int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
300 struct mt76_power_limits limits;
301
302 for (i = 0; i < sband->n_channels; i++) {
303 struct ieee80211_channel *chan = &sband->channels[i];
304 u32 target_power = 0;
305 int j;
306
307 for (j = 0; j < n_chains; j++) {
308 u32 val;
309
310 val = mt7915_eeprom_get_target_power(dev, chan, j);
311 target_power = max(target_power, val);
312 }
313
314 target_power += pwr_delta;
315 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
316 &limits,
317 target_power);
318 target_power += nss_delta;
319 target_power = DIV_ROUND_UP(target_power, 2);
320 chan->max_power = min_t(int, chan->max_reg_power,
321 target_power);
322 chan->orig_mpwr = target_power;
323 }
324 }
325
326 static void
mt7915_regd_notifier(struct wiphy * wiphy,struct regulatory_request * request)327 mt7915_regd_notifier(struct wiphy *wiphy,
328 struct regulatory_request *request)
329 {
330 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
331 struct mt7915_dev *dev = mt7915_hw_dev(hw);
332 struct mt76_phy *mphy = hw->priv;
333 struct mt7915_phy *phy = mphy->priv;
334
335 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
336 dev->mt76.region = request->dfs_region;
337
338 if (dev->mt76.region == NL80211_DFS_UNSET)
339 mt7915_mcu_rdd_background_enable(phy, NULL);
340
341 mt7915_init_txpower(dev, &mphy->sband_2g.sband);
342 mt7915_init_txpower(dev, &mphy->sband_5g.sband);
343 mt7915_init_txpower(dev, &mphy->sband_6g.sband);
344
345 mphy->dfs_state = MT_DFS_STATE_UNKNOWN;
346 mt7915_dfs_init_radar_detector(phy);
347 }
348
349 static void
mt7915_init_wiphy(struct mt7915_phy * phy)350 mt7915_init_wiphy(struct mt7915_phy *phy)
351 {
352 struct mt76_phy *mphy = phy->mt76;
353 struct ieee80211_hw *hw = mphy->hw;
354 #if defined(CONFIG_OF)
355 struct mt76_dev *mdev = &phy->dev->mt76;
356 #endif
357 struct wiphy *wiphy = hw->wiphy;
358 struct mt7915_dev *dev = phy->dev;
359
360 hw->queues = 4;
361 hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
362 hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
363 hw->netdev_features = NETIF_F_RXCSUM;
364
365 hw->radiotap_timestamp.units_pos =
366 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
367
368 phy->slottime = 9;
369
370 hw->sta_data_size = sizeof(struct mt7915_sta);
371 hw->vif_data_size = sizeof(struct mt7915_vif);
372
373 wiphy->iface_combinations = if_comb;
374 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
375 wiphy->reg_notifier = mt7915_regd_notifier;
376 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
377 wiphy->mbssid_max_interfaces = 16;
378
379 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
380 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
381 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
382 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
383 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
384 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
385 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
386 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY);
387 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
388 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
389
390 if (!is_mt7915(&dev->mt76))
391 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_STA_TX_PWR);
392
393 #if defined(CONFIG_OF)
394 if (!mdev->dev->of_node ||
395 !of_property_read_bool(mdev->dev->of_node,
396 "mediatek,disable-radar-background"))
397 #endif
398 wiphy_ext_feature_set(wiphy,
399 NL80211_EXT_FEATURE_RADAR_BACKGROUND);
400
401 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
402 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
403 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
404 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
405 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
406
407 hw->max_tx_fragments = 4;
408
409 if (phy->mt76->cap.has_2ghz) {
410 phy->mt76->sband_2g.sband.ht_cap.cap |=
411 IEEE80211_HT_CAP_LDPC_CODING |
412 IEEE80211_HT_CAP_MAX_AMSDU;
413 phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
414 IEEE80211_HT_MPDU_DENSITY_4;
415 }
416
417 if (phy->mt76->cap.has_5ghz) {
418 struct ieee80211_sta_vht_cap *vht_cap;
419
420 vht_cap = &phy->mt76->sband_5g.sband.vht_cap;
421 phy->mt76->sband_5g.sband.ht_cap.cap |=
422 IEEE80211_HT_CAP_LDPC_CODING |
423 IEEE80211_HT_CAP_MAX_AMSDU;
424 phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
425 IEEE80211_HT_MPDU_DENSITY_4;
426
427 if (is_mt7915(&dev->mt76)) {
428 vht_cap->cap |=
429 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
430 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
431
432 if (!dev->dbdc_support)
433 vht_cap->cap |=
434 IEEE80211_VHT_CAP_SHORT_GI_160 |
435 FIELD_PREP(IEEE80211_VHT_CAP_EXT_NSS_BW_MASK, 1);
436 } else {
437 vht_cap->cap |=
438 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
439 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
440
441 /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */
442 vht_cap->cap |=
443 IEEE80211_VHT_CAP_SHORT_GI_160 |
444 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
445 }
446
447 if (!is_mt7915(&dev->mt76) || !dev->dbdc_support)
448 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
449 }
450
451 mt76_set_stream_caps(phy->mt76, true);
452 mt7915_set_stream_vht_txbf_caps(phy);
453 mt7915_set_stream_he_caps(phy);
454
455 wiphy->available_antennas_rx = phy->mt76->antenna_mask;
456 wiphy->available_antennas_tx = phy->mt76->antenna_mask;
457
458 /* init led callbacks */
459 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
460 mphy->leds.cdev.brightness_set = mt7915_led_set_brightness;
461 mphy->leds.cdev.blink_set = mt7915_led_set_blink;
462 }
463 }
464
465 static void
mt7915_mac_init_band(struct mt7915_dev * dev,u8 band)466 mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
467 {
468 u32 mask, set;
469
470 mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
471 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
472 mt76_set(dev, MT_TMAC_CTCR0(band),
473 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
474 MT_TMAC_CTCR0_INS_DDLMT_EN);
475
476 mask = MT_MDP_RCFR0_MCU_RX_MGMT |
477 MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
478 MT_MDP_RCFR0_MCU_RX_CTL_BAR;
479 set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
480 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
481 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
482 mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
483
484 mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
485 MT_MDP_RCFR1_RX_DROPPED_UCAST |
486 MT_MDP_RCFR1_RX_DROPPED_MCAST;
487 set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
488 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
489 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
490 mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
491
492 mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680);
493
494 /* mt7915: disable rx rate report by default due to hw issues */
495 mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
496
497 /* clear estimated value of EIFS for Rx duration & OBSS time */
498 mt76_wr(dev, MT_WF_RMAC_RSVD0(band), MT_WF_RMAC_RSVD0_EIFS_CLR);
499
500 /* clear backoff time for Rx duration */
501 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME1(band),
502 MT_WF_RMAC_MIB_NONQOSD_BACKOFF);
503 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME3(band),
504 MT_WF_RMAC_MIB_QOS01_BACKOFF);
505 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME4(band),
506 MT_WF_RMAC_MIB_QOS23_BACKOFF);
507
508 /* clear backoff time and set software compensation for OBSS time */
509 mask = MT_WF_RMAC_MIB_OBSS_BACKOFF | MT_WF_RMAC_MIB_ED_OFFSET;
510 set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) |
511 FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4);
512 mt76_rmw(dev, MT_WF_RMAC_MIB_AIRTIME0(band), mask, set);
513
514 /* filter out non-resp frames and get instanstaeous signal reporting */
515 mask = MT_WTBLOFF_TOP_RSCR_RCPI_MODE | MT_WTBLOFF_TOP_RSCR_RCPI_PARAM;
516 set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) |
517 FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3);
518 mt76_rmw(dev, MT_WTBLOFF_TOP_RSCR(band), mask, set);
519
520 /* MT_TXD5_TX_STATUS_HOST (MPDU format) has higher priority than
521 * MT_AGG_ACR_PPDU_TXS2H (PPDU format) even though ACR bit is set.
522 */
523 if (mtk_wed_device_active(&dev->mt76.mmio.wed))
524 mt76_set(dev, MT_AGG_ACR4(band), MT_AGG_ACR_PPDU_TXS2H);
525 }
526
527 static void
mt7915_init_led_mux(struct mt7915_dev * dev)528 mt7915_init_led_mux(struct mt7915_dev *dev)
529 {
530 if (!IS_ENABLED(CONFIG_MT76_LEDS))
531 return;
532
533 if (dev->dbdc_support) {
534 switch (mt76_chip(&dev->mt76)) {
535 case 0x7915:
536 mt76_rmw_field(dev, MT_LED_GPIO_MUX2,
537 GENMASK(11, 8), 4);
538 mt76_rmw_field(dev, MT_LED_GPIO_MUX3,
539 GENMASK(11, 8), 4);
540 break;
541 case 0x7986:
542 mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
543 GENMASK(7, 4), 1);
544 mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
545 GENMASK(11, 8), 1);
546 break;
547 case 0x7916:
548 mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
549 GENMASK(27, 24), 3);
550 mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
551 GENMASK(31, 28), 3);
552 break;
553 default:
554 break;
555 }
556 } else if (dev->mphy.leds.pin) {
557 switch (mt76_chip(&dev->mt76)) {
558 case 0x7915:
559 mt76_rmw_field(dev, MT_LED_GPIO_MUX3,
560 GENMASK(11, 8), 4);
561 break;
562 case 0x7986:
563 mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
564 GENMASK(11, 8), 1);
565 break;
566 case 0x7916:
567 mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
568 GENMASK(31, 28), 3);
569 break;
570 default:
571 break;
572 }
573 } else {
574 switch (mt76_chip(&dev->mt76)) {
575 case 0x7915:
576 mt76_rmw_field(dev, MT_LED_GPIO_MUX2,
577 GENMASK(11, 8), 4);
578 break;
579 case 0x7986:
580 mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
581 GENMASK(7, 4), 1);
582 break;
583 case 0x7916:
584 mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
585 GENMASK(27, 24), 3);
586 break;
587 default:
588 break;
589 }
590 }
591 }
592
mt7915_mac_init(struct mt7915_dev * dev)593 void mt7915_mac_init(struct mt7915_dev *dev)
594 {
595 int i;
596 u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680;
597
598 /* config pse qid6 wfdma port selection */
599 if (!is_mt7915(&dev->mt76) && dev->hif2)
600 mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0,
601 MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK);
602
603 mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len);
604
605 if (!is_mt7915(&dev->mt76))
606 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT);
607 else
608 mt76_clear(dev, MT_PLE_HOST_RPT0, MT_PLE_HOST_RPT0_TX_LATENCY);
609
610 /* enable hardware de-agg */
611 mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
612
613 for (i = 0; i < mt7915_wtbl_size(dev); i++)
614 mt7915_mac_wtbl_update(dev, i,
615 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
616 for (i = 0; i < 2; i++)
617 mt7915_mac_init_band(dev, i);
618
619 mt7915_init_led_mux(dev);
620 }
621
mt7915_txbf_init(struct mt7915_dev * dev)622 int mt7915_txbf_init(struct mt7915_dev *dev)
623 {
624 int ret;
625
626 if (dev->dbdc_support) {
627 ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE);
628 if (ret)
629 return ret;
630 }
631
632 /* trigger sounding packets */
633 ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON);
634 if (ret)
635 return ret;
636
637 /* enable eBF */
638 return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
639 }
640
641 static struct mt7915_phy *
mt7915_alloc_ext_phy(struct mt7915_dev * dev)642 mt7915_alloc_ext_phy(struct mt7915_dev *dev)
643 {
644 struct mt7915_phy *phy;
645 struct mt76_phy *mphy;
646
647 if (!dev->dbdc_support)
648 return NULL;
649
650 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops, MT_BAND1);
651 if (!mphy)
652 return ERR_PTR(-ENOMEM);
653
654 phy = mphy->priv;
655 phy->dev = dev;
656 phy->mt76 = mphy;
657
658 /* Bind main phy to band0 and ext_phy to band1 for dbdc case */
659 phy->mt76->band_idx = 1;
660
661 return phy;
662 }
663
664 static int
mt7915_register_ext_phy(struct mt7915_dev * dev,struct mt7915_phy * phy)665 mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
666 {
667 struct mt76_phy *mphy = phy->mt76;
668 int ret;
669
670 INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
671
672 mt7915_eeprom_parse_hw_cap(dev, phy);
673
674 #if defined(__linux__)
675 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
676 #elif defined(__FreeBSD__)
677 memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
678 #endif
679 ETH_ALEN);
680 /* Make the secondary PHY MAC address local without overlapping with
681 * the usual MAC address allocation scheme on multiple virtual interfaces
682 */
683 if (!is_valid_ether_addr(mphy->macaddr)) {
684 #if defined(__linux__)
685 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
686 #elif defined(__FreeBSD__)
687 memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
688 #endif
689 ETH_ALEN);
690 mphy->macaddr[0] |= 2;
691 mphy->macaddr[0] ^= BIT(7);
692 }
693 mt76_eeprom_override(mphy);
694
695 /* init wiphy according to mphy and phy */
696 mt7915_init_wiphy(phy);
697
698 ret = mt76_register_phy(mphy, true, mt76_rates,
699 ARRAY_SIZE(mt76_rates));
700 if (ret)
701 return ret;
702
703 ret = mt7915_thermal_init(phy);
704 if (ret)
705 goto unreg;
706
707 #if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS)
708 mt7915_init_debugfs(phy);
709 #endif
710
711 return 0;
712
713 unreg:
714 mt76_unregister_phy(mphy);
715 return ret;
716 }
717
mt7915_init_work(struct work_struct * work)718 static void mt7915_init_work(struct work_struct *work)
719 {
720 struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
721 init_work);
722
723 mt7915_mcu_set_eeprom(dev);
724 mt7915_mac_init(dev);
725 mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband);
726 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
727 mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband);
728 mt7915_txbf_init(dev);
729 }
730
mt7915_wfsys_reset(struct mt7915_dev * dev)731 void mt7915_wfsys_reset(struct mt7915_dev *dev)
732 {
733 #define MT_MCU_DUMMY_RANDOM GENMASK(15, 0)
734 #define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16)
735
736 if (is_mt7915(&dev->mt76)) {
737 u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON;
738
739 mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM);
740
741 /* change to software control */
742 val |= MT_TOP_PWR_SW_RST;
743 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
744
745 /* reset wfsys */
746 val &= ~MT_TOP_PWR_SW_RST;
747 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
748
749 /* release wfsys then mcu re-executes romcode */
750 val |= MT_TOP_PWR_SW_RST;
751 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
752
753 /* switch to hw control */
754 val &= ~MT_TOP_PWR_SW_RST;
755 val |= MT_TOP_PWR_HW_CTRL;
756 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
757
758 /* check whether mcu resets to default */
759 if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR,
760 MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT,
761 1000)) {
762 dev_err(dev->mt76.dev, "wifi subsystem reset failure\n");
763 return;
764 }
765
766 /* wfsys reset won't clear host registers */
767 mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE);
768
769 msleep(100);
770 } else if (is_mt798x(&dev->mt76)) {
771 mt7986_wmac_disable(dev);
772 msleep(20);
773
774 mt7986_wmac_enable(dev);
775 msleep(20);
776 } else {
777 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
778 msleep(20);
779
780 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
781 msleep(20);
782 }
783 }
784
mt7915_band_config(struct mt7915_dev * dev)785 static bool mt7915_band_config(struct mt7915_dev *dev)
786 {
787 bool ret = true;
788
789 dev->phy.mt76->band_idx = 0;
790
791 if (is_mt798x(&dev->mt76)) {
792 u32 sku = mt7915_check_adie(dev, true);
793
794 /*
795 * for mt7986, dbdc support is determined by the number
796 * of adie chips and the main phy is bound to band1 when
797 * dbdc is disabled.
798 */
799 if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) {
800 dev->phy.mt76->band_idx = 1;
801 ret = false;
802 }
803 } else {
804 ret = is_mt7915(&dev->mt76) ?
805 !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true;
806 }
807
808 return ret;
809 }
810
811 static int
mt7915_init_hardware(struct mt7915_dev * dev,struct mt7915_phy * phy2)812 mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
813 {
814 int ret, idx;
815
816 mt76_wr(dev, MT_INT_MASK_CSR, 0);
817 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
818
819 INIT_WORK(&dev->init_work, mt7915_init_work);
820
821 ret = mt7915_dma_init(dev, phy2);
822 if (ret)
823 return ret;
824
825 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
826
827 ret = mt7915_mcu_init(dev);
828 if (ret)
829 return ret;
830
831 ret = mt7915_eeprom_init(dev);
832 if (ret < 0)
833 return ret;
834
835 if (dev->flash_mode) {
836 ret = mt7915_mcu_apply_group_cal(dev);
837 if (ret)
838 return ret;
839 }
840
841 /* Beacon and mgmt frames should occupy wcid 0 */
842 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
843 if (idx)
844 return -ENOSPC;
845
846 dev->mt76.global_wcid.idx = idx;
847 dev->mt76.global_wcid.hw_key_idx = -1;
848 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
849 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
850
851 return 0;
852 }
853
mt7915_set_stream_vht_txbf_caps(struct mt7915_phy * phy)854 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
855 {
856 int sts;
857 u32 *cap;
858
859 if (!phy->mt76->cap.has_5ghz)
860 return;
861
862 sts = hweight8(phy->mt76->chainmask);
863 cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
864
865 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
866 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
867 FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
868 sts - 1);
869
870 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
871 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
872 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
873
874 if (sts < 2)
875 return;
876
877 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
878 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
879 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
880 sts - 1);
881 }
882
883 static void
mt7915_set_stream_he_txbf_caps(struct mt7915_phy * phy,struct ieee80211_sta_he_cap * he_cap,int vif)884 mt7915_set_stream_he_txbf_caps(struct mt7915_phy *phy,
885 struct ieee80211_sta_he_cap *he_cap, int vif)
886 {
887 struct mt7915_dev *dev = phy->dev;
888 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
889 int sts = hweight8(phy->mt76->chainmask);
890 u8 c, sts_160 = sts;
891
892 /* Can do 1/2 of STS in 160Mhz mode for mt7915 */
893 if (is_mt7915(&dev->mt76)) {
894 if (!dev->dbdc_support)
895 sts_160 /= 2;
896 else
897 sts_160 = 0;
898 }
899
900 #ifdef CONFIG_MAC80211_MESH
901 if (vif == NL80211_IFTYPE_MESH_POINT)
902 return;
903 #endif
904
905 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
906 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
907
908 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK;
909 if (sts_160)
910 c |= IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
911 elem->phy_cap_info[5] &= ~c;
912
913 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
914 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
915 elem->phy_cap_info[6] &= ~c;
916
917 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
918
919 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US;
920 if (!is_mt7915(&dev->mt76))
921 c |= IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
922 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
923 elem->phy_cap_info[2] |= c;
924
925 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
926 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
927 if (sts_160)
928 c |= IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
929 elem->phy_cap_info[4] |= c;
930
931 /* do not support NG16 due to spec D4.0 changes subcarrier idx */
932 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
933 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
934
935 if (vif == NL80211_IFTYPE_STATION)
936 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
937
938 elem->phy_cap_info[6] |= c;
939
940 if (sts < 2)
941 return;
942
943 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
944 elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3;
945
946 if (vif != NL80211_IFTYPE_AP)
947 return;
948
949 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
950 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
951
952 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
953 sts - 1);
954 if (sts_160)
955 c |= FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
956 sts_160 - 1);
957 elem->phy_cap_info[5] |= c;
958
959 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
960 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
961 elem->phy_cap_info[6] |= c;
962
963 if (!is_mt7915(&dev->mt76)) {
964 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
965 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
966 elem->phy_cap_info[7] |= c;
967 }
968 }
969
970 static int
mt7915_init_he_caps(struct mt7915_phy * phy,enum nl80211_band band,struct ieee80211_sband_iftype_data * data)971 mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
972 struct ieee80211_sband_iftype_data *data)
973 {
974 struct mt7915_dev *dev = phy->dev;
975 int i, idx = 0, nss = hweight8(phy->mt76->antenna_mask);
976 u16 mcs_map = 0;
977 u16 mcs_map_160 = 0;
978 u8 nss_160;
979
980 if (!is_mt7915(&dev->mt76))
981 nss_160 = nss;
982 else if (!dev->dbdc_support)
983 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
984 nss_160 = nss / 2;
985 else
986 /* Can't do 160MHz with mt7915 dbdc */
987 nss_160 = 0;
988
989 for (i = 0; i < 8; i++) {
990 if (i < nss)
991 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
992 else
993 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
994
995 if (i < nss_160)
996 mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
997 else
998 mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
999 }
1000
1001 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
1002 struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
1003 struct ieee80211_he_cap_elem *he_cap_elem =
1004 &he_cap->he_cap_elem;
1005 struct ieee80211_he_mcs_nss_supp *he_mcs =
1006 &he_cap->he_mcs_nss_supp;
1007
1008 switch (i) {
1009 case NL80211_IFTYPE_STATION:
1010 case NL80211_IFTYPE_AP:
1011 #ifdef CONFIG_MAC80211_MESH
1012 case NL80211_IFTYPE_MESH_POINT:
1013 #endif
1014 break;
1015 default:
1016 continue;
1017 }
1018
1019 data[idx].types_mask = BIT(i);
1020 he_cap->has_he = true;
1021
1022 he_cap_elem->mac_cap_info[0] =
1023 IEEE80211_HE_MAC_CAP0_HTC_HE;
1024 he_cap_elem->mac_cap_info[3] =
1025 IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
1026 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
1027 he_cap_elem->mac_cap_info[4] =
1028 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
1029
1030 if (band == NL80211_BAND_2GHZ)
1031 he_cap_elem->phy_cap_info[0] =
1032 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
1033 else if (nss_160)
1034 he_cap_elem->phy_cap_info[0] =
1035 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
1036 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
1037 else
1038 he_cap_elem->phy_cap_info[0] =
1039 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
1040
1041 he_cap_elem->phy_cap_info[1] =
1042 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
1043 he_cap_elem->phy_cap_info[2] =
1044 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
1045 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
1046
1047 switch (i) {
1048 case NL80211_IFTYPE_AP:
1049 he_cap_elem->mac_cap_info[0] |=
1050 IEEE80211_HE_MAC_CAP0_TWT_RES;
1051 he_cap_elem->mac_cap_info[2] |=
1052 IEEE80211_HE_MAC_CAP2_BSR;
1053 he_cap_elem->mac_cap_info[4] |=
1054 IEEE80211_HE_MAC_CAP4_BQR;
1055 he_cap_elem->mac_cap_info[5] |=
1056 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
1057 he_cap_elem->phy_cap_info[3] |=
1058 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
1059 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
1060 he_cap_elem->phy_cap_info[6] |=
1061 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
1062 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
1063 he_cap_elem->phy_cap_info[9] |=
1064 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
1065 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
1066 break;
1067 case NL80211_IFTYPE_STATION:
1068 he_cap_elem->mac_cap_info[1] |=
1069 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
1070
1071 if (band == NL80211_BAND_2GHZ)
1072 he_cap_elem->phy_cap_info[0] |=
1073 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
1074 else
1075 he_cap_elem->phy_cap_info[0] |=
1076 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
1077
1078 he_cap_elem->phy_cap_info[1] |=
1079 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
1080 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
1081 he_cap_elem->phy_cap_info[3] |=
1082 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
1083 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
1084 he_cap_elem->phy_cap_info[6] |=
1085 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
1086 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
1087 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
1088 he_cap_elem->phy_cap_info[7] |=
1089 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
1090 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
1091 he_cap_elem->phy_cap_info[8] |=
1092 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
1093 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
1094 if (nss_160)
1095 he_cap_elem->phy_cap_info[8] |=
1096 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
1097 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
1098 he_cap_elem->phy_cap_info[9] |=
1099 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
1100 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
1101 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
1102 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
1103 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
1104 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
1105 break;
1106 }
1107
1108 memset(he_mcs, 0, sizeof(*he_mcs));
1109 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
1110 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
1111 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160);
1112 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160);
1113
1114 mt7915_set_stream_he_txbf_caps(phy, he_cap, i);
1115
1116 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
1117 if (he_cap_elem->phy_cap_info[6] &
1118 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
1119 mt76_connac_gen_ppe_thresh(he_cap->ppe_thres, nss);
1120 } else {
1121 he_cap_elem->phy_cap_info[9] |=
1122 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
1123 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
1124 }
1125
1126 if (band == NL80211_BAND_6GHZ) {
1127 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
1128 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
1129
1130 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2,
1131 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
1132 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
1133 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
1134 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
1135 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
1136
1137 data[idx].he_6ghz_capa.capa = cpu_to_le16(cap);
1138 }
1139
1140 idx++;
1141 }
1142
1143 return idx;
1144 }
1145
mt7915_set_stream_he_caps(struct mt7915_phy * phy)1146 void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
1147 {
1148 struct ieee80211_sband_iftype_data *data;
1149 struct ieee80211_supported_band *band;
1150 int n;
1151
1152 if (phy->mt76->cap.has_2ghz) {
1153 data = phy->iftype[NL80211_BAND_2GHZ];
1154 n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
1155
1156 band = &phy->mt76->sband_2g.sband;
1157 band->iftype_data = data;
1158 band->n_iftype_data = n;
1159 }
1160
1161 if (phy->mt76->cap.has_5ghz) {
1162 data = phy->iftype[NL80211_BAND_5GHZ];
1163 n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
1164
1165 band = &phy->mt76->sband_5g.sband;
1166 band->iftype_data = data;
1167 band->n_iftype_data = n;
1168 }
1169
1170 if (phy->mt76->cap.has_6ghz) {
1171 data = phy->iftype[NL80211_BAND_6GHZ];
1172 n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data);
1173
1174 band = &phy->mt76->sband_6g.sband;
1175 band->iftype_data = data;
1176 band->n_iftype_data = n;
1177 }
1178 }
1179
mt7915_unregister_ext_phy(struct mt7915_dev * dev)1180 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
1181 {
1182 struct mt7915_phy *phy = mt7915_ext_phy(dev);
1183 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
1184
1185 if (!phy)
1186 return;
1187
1188 #if defined(__linux__)
1189 mt7915_unregister_thermal(phy);
1190 #endif
1191 mt76_unregister_phy(mphy);
1192 ieee80211_free_hw(mphy->hw);
1193 }
1194
mt7915_stop_hardware(struct mt7915_dev * dev)1195 static void mt7915_stop_hardware(struct mt7915_dev *dev)
1196 {
1197 mt7915_mcu_exit(dev);
1198 mt76_connac2_tx_token_put(&dev->mt76);
1199 mt7915_dma_cleanup(dev);
1200 tasklet_disable(&dev->mt76.irq_tasklet);
1201
1202 if (is_mt798x(&dev->mt76))
1203 mt7986_wmac_disable(dev);
1204 }
1205
mt7915_register_device(struct mt7915_dev * dev)1206 int mt7915_register_device(struct mt7915_dev *dev)
1207 {
1208 struct mt7915_phy *phy2;
1209 int ret;
1210
1211 dev->phy.dev = dev;
1212 dev->phy.mt76 = &dev->mt76.phy;
1213 dev->mt76.phy.priv = &dev->phy;
1214 INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
1215 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
1216 INIT_LIST_HEAD(&dev->sta_rc_list);
1217 INIT_LIST_HEAD(&dev->twt_list);
1218
1219 init_waitqueue_head(&dev->reset_wait);
1220 INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
1221 INIT_WORK(&dev->dump_work, mt7915_mac_dump_work);
1222 mutex_init(&dev->dump_mutex);
1223
1224 dev->dbdc_support = mt7915_band_config(dev);
1225
1226 phy2 = mt7915_alloc_ext_phy(dev);
1227 if (IS_ERR(phy2))
1228 return PTR_ERR(phy2);
1229
1230 ret = mt7915_init_hardware(dev, phy2);
1231 if (ret)
1232 goto free_phy2;
1233
1234 mt7915_init_wiphy(&dev->phy);
1235
1236 #ifdef CONFIG_NL80211_TESTMODE
1237 dev->mt76.test_ops = &mt7915_testmode_ops;
1238 #endif
1239
1240 ret = mt76_register_device(&dev->mt76, true, mt76_rates,
1241 ARRAY_SIZE(mt76_rates));
1242 if (ret)
1243 goto stop_hw;
1244
1245 ret = mt7915_thermal_init(&dev->phy);
1246 if (ret)
1247 goto unreg_dev;
1248
1249 ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
1250
1251 if (phy2) {
1252 ret = mt7915_register_ext_phy(dev, phy2);
1253 if (ret)
1254 goto unreg_thermal;
1255 }
1256
1257 dev->recovery.hw_init_done = true;
1258
1259 #if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS)
1260 ret = mt7915_init_debugfs(&dev->phy);
1261 if (ret)
1262 goto unreg_thermal;
1263 #endif
1264
1265 ret = mt7915_coredump_register(dev);
1266 if (ret)
1267 goto unreg_thermal;
1268
1269 return 0;
1270
1271 unreg_thermal:
1272 #if defined(__linux__)
1273 mt7915_unregister_thermal(&dev->phy);
1274 #endif
1275 unreg_dev:
1276 mt76_unregister_device(&dev->mt76);
1277 stop_hw:
1278 mt7915_stop_hardware(dev);
1279 free_phy2:
1280 if (phy2)
1281 ieee80211_free_hw(phy2->mt76->hw);
1282 return ret;
1283 }
1284
mt7915_unregister_device(struct mt7915_dev * dev)1285 void mt7915_unregister_device(struct mt7915_dev *dev)
1286 {
1287 mt7915_unregister_ext_phy(dev);
1288 mt7915_coredump_unregister(dev);
1289 #if defined(__linux__)
1290 mt7915_unregister_thermal(&dev->phy);
1291 #endif
1292 mt76_unregister_device(&dev->mt76);
1293 mt7915_stop_hardware(dev);
1294
1295 mt76_free_device(&dev->mt76);
1296 }
1297