1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2019 MediaTek Inc.
3 *
4 * Author: Roy Luo <royluo@google.com>
5 * Ryder Lee <ryder.lee@mediatek.com>
6 * Felix Fietkau <nbd@nbd.name>
7 * Lorenzo Bianconi <lorenzo@kernel.org>
8 */
9
10 #include <linux/etherdevice.h>
11 #include <linux/hwmon.h>
12 #include <linux/hwmon-sysfs.h>
13 #include "mt7615.h"
14 #include "mac.h"
15 #include "mcu.h"
16 #include "eeprom.h"
17
18 #if defined(__linux__)
mt7615_thermal_show_temp(struct device * dev,struct device_attribute * attr,char * buf)19 static ssize_t mt7615_thermal_show_temp(struct device *dev,
20 struct device_attribute *attr,
21 char *buf)
22 {
23 struct mt7615_dev *mdev = dev_get_drvdata(dev);
24 int temperature;
25
26 if (!mt7615_wait_for_mcu_init(mdev))
27 return 0;
28
29 mt7615_mutex_acquire(mdev);
30 temperature = mt7615_mcu_get_temperature(mdev);
31 mt7615_mutex_release(mdev);
32
33 if (temperature < 0)
34 return temperature;
35
36 /* display in millidegree celcius */
37 return sprintf(buf, "%u\n", temperature * 1000);
38 }
39
40 static SENSOR_DEVICE_ATTR(temp1_input, 0444, mt7615_thermal_show_temp,
41 NULL, 0);
42
43 static struct attribute *mt7615_hwmon_attrs[] = {
44 &sensor_dev_attr_temp1_input.dev_attr.attr,
45 NULL,
46 };
47 ATTRIBUTE_GROUPS(mt7615_hwmon);
48
mt7615_thermal_init(struct mt7615_dev * dev)49 int mt7615_thermal_init(struct mt7615_dev *dev)
50 {
51 struct wiphy *wiphy = mt76_hw(dev)->wiphy;
52 struct device *hwmon;
53 const char *name;
54
55 if (!IS_REACHABLE(CONFIG_HWMON))
56 return 0;
57
58 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7615_%s",
59 wiphy_name(wiphy));
60 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, dev,
61 mt7615_hwmon_groups);
62 if (IS_ERR(hwmon))
63 return PTR_ERR(hwmon);
64
65 return 0;
66 }
67 EXPORT_SYMBOL_GPL(mt7615_thermal_init);
68 #endif
69
70 static void
mt7615_phy_init(struct mt7615_dev * dev)71 mt7615_phy_init(struct mt7615_dev *dev)
72 {
73 /* disable rf low power beacon mode */
74 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
75 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
76 }
77
78 static void
mt7615_init_mac_chain(struct mt7615_dev * dev,int chain)79 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
80 {
81 u32 val;
82
83 if (!chain)
84 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
85 else
86 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
87
88 /* enable band 0/1 clk */
89 mt76_set(dev, MT_CFG_CCR, val);
90
91 mt76_rmw(dev, MT_TMAC_TRCR(chain),
92 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
93 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
94 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
95
96 mt76_wr(dev, MT_AGG_ACR(chain),
97 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
98 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
99 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
100
101 mt76_wr(dev, MT_AGG_ARUCR(chain),
102 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
103 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
104 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
105 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
106 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
107 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
108 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
109 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
110
111 mt76_wr(dev, MT_AGG_ARDCR(chain),
112 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
113 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
114 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
115 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
116 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
117 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
118 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
119 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
120
121 mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
122 if (!mt7615_firmware_offload(dev)) {
123 u32 mask, set;
124
125 mask = MT_DMA_RCFR0_MCU_RX_MGMT |
126 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
127 MT_DMA_RCFR0_MCU_RX_CTL_BAR |
128 MT_DMA_RCFR0_MCU_RX_BYPASS |
129 MT_DMA_RCFR0_RX_DROPPED_UCAST |
130 MT_DMA_RCFR0_RX_DROPPED_MCAST;
131 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
132 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
133 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
134 }
135 }
136
137 static void
mt7615_mac_init(struct mt7615_dev * dev)138 mt7615_mac_init(struct mt7615_dev *dev)
139 {
140 int i;
141
142 mt7615_init_mac_chain(dev, 0);
143
144 mt76_rmw_field(dev, MT_TMAC_CTCR0,
145 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
146 mt76_rmw_field(dev, MT_TMAC_CTCR0,
147 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
148 mt76_rmw(dev, MT_TMAC_CTCR0,
149 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
150 MT_TMAC_CTCR0_INS_DDLMT_EN,
151 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
152 MT_TMAC_CTCR0_INS_DDLMT_EN);
153
154 mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0);
155 mt7615_mac_set_scs(&dev->phy, true);
156
157 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
158 MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
159
160 mt76_wr(dev, MT_AGG_ARCR,
161 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
162 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
163 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
164 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
165
166 for (i = 0; i < MT7615_WTBL_SIZE; i++)
167 mt7615_mac_wtbl_update(dev, i,
168 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
169
170 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
171 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
172
173 mt76_wr(dev, MT_DMA_DCR0,
174 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
175 MT_DMA_DCR0_RX_VEC_DROP | MT_DMA_DCR0_DAMSDU_EN |
176 MT_DMA_DCR0_RX_HDR_TRANS_EN);
177 /* disable TDLS filtering */
178 mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
179 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
180 if (is_mt7663(&dev->mt76)) {
181 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
182 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
183 } else {
184 mt7615_init_mac_chain(dev, 1);
185 }
186 mt7615_mcu_set_rx_hdr_trans_blacklist(dev);
187 }
188
189 static void
mt7615_check_offload_capability(struct mt7615_dev * dev)190 mt7615_check_offload_capability(struct mt7615_dev *dev)
191 {
192 struct ieee80211_hw *hw = mt76_hw(dev);
193 struct wiphy *wiphy = hw->wiphy;
194
195 if (mt7615_firmware_offload(dev)) {
196 ieee80211_hw_set(hw, SUPPORTS_PS);
197 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
198
199 wiphy->flags &= ~WIPHY_FLAG_4ADDR_STATION;
200 wiphy->max_remain_on_channel_duration = 5000;
201 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
202 NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
203 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
204 NL80211_FEATURE_P2P_GO_CTWIN |
205 NL80211_FEATURE_P2P_GO_OPPPS;
206 } else {
207 dev->ops->hw_scan = NULL;
208 dev->ops->cancel_hw_scan = NULL;
209 dev->ops->sched_scan_start = NULL;
210 dev->ops->sched_scan_stop = NULL;
211 dev->ops->set_rekey_data = NULL;
212 dev->ops->remain_on_channel = NULL;
213 dev->ops->cancel_remain_on_channel = NULL;
214
215 wiphy->max_sched_scan_plan_interval = 0;
216 wiphy->max_sched_scan_ie_len = 0;
217 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
218 wiphy->max_sched_scan_ssids = 0;
219 wiphy->max_match_sets = 0;
220 wiphy->max_sched_scan_reqs = 0;
221 }
222 }
223
mt7615_wait_for_mcu_init(struct mt7615_dev * dev)224 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
225 {
226 flush_work(&dev->mcu_work);
227
228 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
229 }
230 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
231
232 static const struct ieee80211_iface_limit if_limits[] = {
233 {
234 .max = 1,
235 .types = BIT(NL80211_IFTYPE_ADHOC)
236 }, {
237 .max = MT7615_MAX_INTERFACES,
238 .types = BIT(NL80211_IFTYPE_AP) |
239 #ifdef CONFIG_MAC80211_MESH
240 BIT(NL80211_IFTYPE_MESH_POINT) |
241 #endif
242 BIT(NL80211_IFTYPE_P2P_CLIENT) |
243 BIT(NL80211_IFTYPE_P2P_GO) |
244 BIT(NL80211_IFTYPE_STATION)
245 }
246 };
247
248 static const struct ieee80211_iface_combination if_comb_radar[] = {
249 {
250 .limits = if_limits,
251 .n_limits = ARRAY_SIZE(if_limits),
252 .max_interfaces = MT7615_MAX_INTERFACES,
253 .num_different_channels = 1,
254 .beacon_int_infra_match = true,
255 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
256 BIT(NL80211_CHAN_WIDTH_20) |
257 BIT(NL80211_CHAN_WIDTH_40) |
258 BIT(NL80211_CHAN_WIDTH_80) |
259 BIT(NL80211_CHAN_WIDTH_160) |
260 BIT(NL80211_CHAN_WIDTH_80P80),
261 }
262 };
263
264 static const struct ieee80211_iface_combination if_comb[] = {
265 {
266 .limits = if_limits,
267 .n_limits = ARRAY_SIZE(if_limits),
268 .max_interfaces = MT7615_MAX_INTERFACES,
269 .num_different_channels = 1,
270 .beacon_int_infra_match = true,
271 }
272 };
273
mt7615_init_txpower(struct mt7615_dev * dev,struct ieee80211_supported_band * sband)274 void mt7615_init_txpower(struct mt7615_dev *dev,
275 struct ieee80211_supported_band *sband)
276 {
277 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
278 int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
279 u8 *eep = (u8 *)dev->mt76.eeprom.data;
280 enum nl80211_band band = sband->band;
281 struct mt76_power_limits limits;
282 u8 rate_val;
283
284 delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
285 rate_val = eep[delta_idx];
286 if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
287 (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
288 delta += rate_val & MT_EE_RATE_POWER_MASK;
289
290 if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
291 target_chains = 1;
292 else
293 target_chains = n_chains;
294
295 for (i = 0; i < sband->n_channels; i++) {
296 struct ieee80211_channel *chan = &sband->channels[i];
297 u8 target_power = 0;
298 int j;
299
300 for (j = 0; j < target_chains; j++) {
301 int index;
302
303 index = mt7615_eeprom_get_target_power_index(dev, chan, j);
304 if (index < 0)
305 continue;
306
307 target_power = max(target_power, eep[index]);
308 }
309
310 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
311 &limits,
312 target_power);
313 target_power += delta;
314 target_power = DIV_ROUND_UP(target_power, 2);
315 chan->max_power = min_t(int, chan->max_reg_power,
316 target_power);
317 chan->orig_mpwr = target_power;
318 }
319 }
320 EXPORT_SYMBOL_GPL(mt7615_init_txpower);
321
mt7615_init_work(struct mt7615_dev * dev)322 void mt7615_init_work(struct mt7615_dev *dev)
323 {
324 mt7615_mcu_set_eeprom(dev);
325 mt7615_mac_init(dev);
326 mt7615_phy_init(dev);
327 mt7615_mcu_del_wtbl_all(dev);
328 mt7615_check_offload_capability(dev);
329 }
330 EXPORT_SYMBOL_GPL(mt7615_init_work);
331
332 static void
mt7615_regd_notifier(struct wiphy * wiphy,struct regulatory_request * request)333 mt7615_regd_notifier(struct wiphy *wiphy,
334 struct regulatory_request *request)
335 {
336 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
337 struct mt7615_dev *dev = mt7615_hw_dev(hw);
338 struct mt76_phy *mphy = hw->priv;
339 struct mt7615_phy *phy = mphy->priv;
340 struct cfg80211_chan_def *chandef = &mphy->chandef;
341
342 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
343 dev->mt76.region = request->dfs_region;
344
345 mt7615_init_txpower(dev, &mphy->sband_2g.sband);
346 mt7615_init_txpower(dev, &mphy->sband_5g.sband);
347
348 mt7615_mutex_acquire(dev);
349
350 if (chandef->chan->flags & IEEE80211_CHAN_RADAR)
351 mt7615_dfs_init_radar_detector(phy);
352
353 if (mt7615_firmware_offload(phy->dev)) {
354 mt76_connac_mcu_set_channel_domain(mphy);
355 mt76_connac_mcu_set_rate_txpower(mphy);
356 }
357
358 mt7615_mutex_release(dev);
359 }
360
361 static void
mt7615_init_wiphy(struct ieee80211_hw * hw)362 mt7615_init_wiphy(struct ieee80211_hw *hw)
363 {
364 struct mt7615_phy *phy = mt7615_hw_phy(hw);
365 struct wiphy *wiphy = hw->wiphy;
366
367 hw->queues = 4;
368 hw->max_rates = 3;
369 hw->max_report_rates = 7;
370 hw->max_rate_tries = 11;
371 hw->netdev_features = NETIF_F_RXCSUM;
372
373 hw->radiotap_timestamp.units_pos =
374 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
375
376 phy->slottime = 9;
377
378 hw->sta_data_size = sizeof(struct mt7615_sta);
379 hw->vif_data_size = sizeof(struct mt7615_vif);
380
381 if (is_mt7663(&phy->dev->mt76)) {
382 wiphy->iface_combinations = if_comb;
383 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
384 } else {
385 wiphy->iface_combinations = if_comb_radar;
386 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar);
387 }
388 wiphy->reg_notifier = mt7615_regd_notifier;
389
390 wiphy->max_sched_scan_plan_interval =
391 MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL;
392 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
393 wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
394 wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
395 wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
396 wiphy->max_sched_scan_reqs = 1;
397 wiphy->max_scan_ssids = 4;
398
399 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
400 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
401 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
402 if (!is_mt7622(&phy->dev->mt76))
403 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER);
404
405 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
406 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
407 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
408 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
409 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
410
411 if (is_mt7615(&phy->dev->mt76))
412 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
413 else
414 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
415
416 phy->mt76->sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
417 phy->mt76->sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
418 phy->mt76->sband_5g.sband.vht_cap.cap |=
419 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
420 }
421
422 static void
mt7615_cap_dbdc_enable(struct mt7615_dev * dev)423 mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
424 {
425 dev->mphy.sband_5g.sband.vht_cap.cap &=
426 ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
427 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
428 if (dev->chainmask == 0xf)
429 dev->mphy.antenna_mask = dev->chainmask >> 2;
430 else
431 dev->mphy.antenna_mask = dev->chainmask >> 1;
432 dev->mphy.chainmask = dev->mphy.antenna_mask;
433 dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
434 dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
435 mt76_set_stream_caps(&dev->mphy, true);
436 }
437
438 static void
mt7615_cap_dbdc_disable(struct mt7615_dev * dev)439 mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
440 {
441 dev->mphy.sband_5g.sband.vht_cap.cap |=
442 IEEE80211_VHT_CAP_SHORT_GI_160 |
443 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
444 dev->mphy.antenna_mask = dev->chainmask;
445 dev->mphy.chainmask = dev->chainmask;
446 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
447 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
448 mt76_set_stream_caps(&dev->mphy, true);
449 }
450
mt7615_reg_map(struct mt7615_dev * dev,u32 addr)451 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr)
452 {
453 u32 base, offset;
454
455 if (is_mt7663(&dev->mt76)) {
456 base = addr & MT7663_MCU_PCIE_REMAP_2_BASE;
457 offset = addr & MT7663_MCU_PCIE_REMAP_2_OFFSET;
458 } else {
459 base = addr & MT_MCU_PCIE_REMAP_2_BASE;
460 offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET;
461 }
462 mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base);
463
464 return MT_PCIE_REMAP_BASE_2 + offset;
465 }
466 EXPORT_SYMBOL_GPL(mt7615_reg_map);
467
468 static void
mt7615_led_set_config(struct led_classdev * led_cdev,u8 delay_on,u8 delay_off)469 mt7615_led_set_config(struct led_classdev *led_cdev,
470 u8 delay_on, u8 delay_off)
471 {
472 struct mt7615_dev *dev;
473 struct mt76_phy *mphy;
474 u32 val, addr;
475 u8 index;
476
477 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
478 dev = container_of(mphy->dev, struct mt7615_dev, mt76);
479
480 if (!mt76_connac_pm_ref(mphy, &dev->pm))
481 return;
482
483 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |
484 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
485 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
486
487 index = dev->dbdc_support ? mphy->band_idx : mphy->leds.pin;
488 addr = mt7615_reg_map(dev, MT_LED_STATUS_0(index));
489 mt76_wr(dev, addr, val);
490 addr = mt7615_reg_map(dev, MT_LED_STATUS_1(index));
491 mt76_wr(dev, addr, val);
492
493 val = MT_LED_CTRL_REPLAY(index) | MT_LED_CTRL_KICK(index);
494 if (dev->mphy.leds.al)
495 val |= MT_LED_CTRL_POLARITY(index);
496 if (mphy->band_idx)
497 val |= MT_LED_CTRL_BAND(index);
498
499 addr = mt7615_reg_map(dev, MT_LED_CTRL);
500 mt76_wr(dev, addr, val);
501
502 mt76_connac_pm_unref(mphy, &dev->pm);
503 }
504
mt7615_led_set_blink(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)505 int mt7615_led_set_blink(struct led_classdev *led_cdev,
506 unsigned long *delay_on,
507 unsigned long *delay_off)
508 {
509 u8 delta_on, delta_off;
510
511 delta_off = max_t(u8, *delay_off / 10, 1);
512 delta_on = max_t(u8, *delay_on / 10, 1);
513
514 mt7615_led_set_config(led_cdev, delta_on, delta_off);
515
516 return 0;
517 }
518 EXPORT_SYMBOL_GPL(mt7615_led_set_blink);
519
mt7615_led_set_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)520 void mt7615_led_set_brightness(struct led_classdev *led_cdev,
521 enum led_brightness brightness)
522 {
523 if (!brightness)
524 mt7615_led_set_config(led_cdev, 0, 0xff);
525 else
526 mt7615_led_set_config(led_cdev, 0xff, 0);
527 }
528 EXPORT_SYMBOL_GPL(mt7615_led_set_brightness);
529
mt7615_register_ext_phy(struct mt7615_dev * dev)530 int mt7615_register_ext_phy(struct mt7615_dev *dev)
531 {
532 struct mt7615_phy *phy = mt7615_ext_phy(dev);
533 struct mt76_phy *mphy;
534 int i, ret;
535
536 if (!is_mt7615(&dev->mt76))
537 return -EOPNOTSUPP;
538
539 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
540 return -EINVAL;
541
542 if (phy)
543 return 0;
544
545 mt7615_cap_dbdc_enable(dev);
546 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops, MT_BAND1);
547 if (!mphy)
548 return -ENOMEM;
549
550 phy = mphy->priv;
551 phy->dev = dev;
552 phy->mt76 = mphy;
553 mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
554 mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
555 mt7615_init_wiphy(mphy->hw);
556
557 INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work);
558 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
559 skb_queue_head_init(&phy->scan_event_list);
560
561 INIT_WORK(&phy->roc_work, mt7615_roc_work);
562 timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
563 init_waitqueue_head(&phy->roc_wait);
564
565 mt7615_mac_set_scs(phy, true);
566
567 /*
568 * Make the secondary PHY MAC address local without overlapping with
569 * the usual MAC address allocation scheme on multiple virtual interfaces
570 */
571 #if defined(__linux__)
572 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
573 #elif defined(__FreeBSD__)
574 memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
575 #endif
576 ETH_ALEN);
577 mphy->macaddr[0] |= 2;
578 mphy->macaddr[0] ^= BIT(7);
579 mt76_eeprom_override(mphy);
580
581 /* second phy can only handle 5 GHz */
582 mphy->cap.has_5ghz = true;
583
584 /* mt7615 second phy shares the same hw queues with the primary one */
585 for (i = 0; i <= MT_TXQ_PSD ; i++)
586 mphy->q_tx[i] = dev->mphy.q_tx[i];
587
588 /* init led callbacks */
589 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
590 mphy->leds.cdev.brightness_set = mt7615_led_set_brightness;
591 mphy->leds.cdev.blink_set = mt7615_led_set_blink;
592 }
593
594 ret = mt76_register_phy(mphy, true, mt76_rates,
595 ARRAY_SIZE(mt76_rates));
596 if (ret)
597 ieee80211_free_hw(mphy->hw);
598
599 return ret;
600 }
601 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
602
mt7615_unregister_ext_phy(struct mt7615_dev * dev)603 void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
604 {
605 struct mt7615_phy *phy = mt7615_ext_phy(dev);
606 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
607
608 if (!phy)
609 return;
610
611 mt7615_cap_dbdc_disable(dev);
612 mt76_unregister_phy(mphy);
613 ieee80211_free_hw(mphy->hw);
614 }
615 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
616
mt7615_init_device(struct mt7615_dev * dev)617 void mt7615_init_device(struct mt7615_dev *dev)
618 {
619 struct ieee80211_hw *hw = mt76_hw(dev);
620
621 dev->phy.dev = dev;
622 dev->phy.mt76 = &dev->mt76.phy;
623 dev->mt76.phy.priv = &dev->phy;
624 dev->mt76.tx_worker.fn = mt7615_tx_worker;
625
626 INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work);
627 INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work);
628 spin_lock_init(&dev->pm.wake.lock);
629 mutex_init(&dev->pm.mutex);
630 init_waitqueue_head(&dev->pm.wait);
631 spin_lock_init(&dev->pm.txq_lock);
632 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work);
633 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
634 INIT_DELAYED_WORK(&dev->coredump.work, mt7615_coredump_work);
635 skb_queue_head_init(&dev->phy.scan_event_list);
636 skb_queue_head_init(&dev->coredump.msg_list);
637 init_waitqueue_head(&dev->reset_wait);
638 init_waitqueue_head(&dev->phy.roc_wait);
639
640 INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
641 timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
642
643 mt7615_init_wiphy(hw);
644 dev->pm.idle_timeout = MT7615_PM_TIMEOUT;
645 dev->pm.stats.last_wake_event = jiffies;
646 dev->pm.stats.last_doze_event = jiffies;
647 mt7615_cap_dbdc_disable(dev);
648
649 #ifdef CONFIG_NL80211_TESTMODE
650 dev->mt76.test_ops = &mt7615_testmode_ops;
651 #endif
652 }
653 EXPORT_SYMBOL_GPL(mt7615_init_device);
654