1 /*
2 * Copyright (c) 2015, AVAGO Tech. All rights reserved. Author: Marian Choy
3 * Copyright (c) 2014, LSI Corp. All rights reserved. Author: Marian Choy
4 * Support: freebsdraid@avagotech.com
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer. 2. Redistributions
12 * in binary form must reproduce the above copyright notice, this list of
13 * conditions and the following disclaimer in the documentation and/or other
14 * materials provided with the distribution. 3. Neither the name of the
15 * <ORGANIZATION> nor the names of its contributors may be used to endorse or
16 * promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 *
31 */
32
33 #include <sys/cdefs.h>
34 #include "dev/mrsas/mrsas.h"
35
36 #include <cam/cam.h>
37 #include <cam/cam_ccb.h>
38 #include <cam/cam_sim.h>
39 #include <cam/cam_xpt_sim.h>
40 #include <cam/cam_debug.h>
41 #include <cam/cam_periph.h>
42 #include <cam/cam_xpt_periph.h>
43
44 #include <cam/scsi/scsi_all.h>
45 #include <cam/scsi/scsi_message.h>
46 #include <sys/taskqueue.h>
47 #include <sys/kernel.h>
48
49 #include <sys/time.h> /* XXX for pcpu.h */
50 #include <sys/pcpu.h> /* XXX for PCPU_GET */
51
52 #define smp_processor_id() PCPU_GET(cpuid)
53
54 /*
55 * Function prototypes
56 */
57 int mrsas_cam_attach(struct mrsas_softc *sc);
58 int mrsas_find_io_type(struct cam_sim *sim, union ccb *ccb);
59 int mrsas_bus_scan(struct mrsas_softc *sc);
60 int mrsas_bus_scan_sim(struct mrsas_softc *sc, struct cam_sim *sim);
61 int
62 mrsas_map_request(struct mrsas_softc *sc,
63 struct mrsas_mpt_cmd *cmd, union ccb *ccb);
64 int
65 mrsas_build_ldio_rw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
66 union ccb *ccb);
67 int
68 mrsas_build_ldio_nonrw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
69 union ccb *ccb);
70 int
71 mrsas_build_syspdio(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
72 union ccb *ccb, struct cam_sim *sim, u_int8_t fp_possible);
73 int
74 mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
75 union ccb *ccb, u_int32_t device_id,
76 MRSAS_RAID_SCSI_IO_REQUEST * io_request);
77 void mrsas_xpt_freeze(struct mrsas_softc *sc);
78 void mrsas_xpt_release(struct mrsas_softc *sc);
79 void mrsas_cam_detach(struct mrsas_softc *sc);
80 void mrsas_release_mpt_cmd(struct mrsas_mpt_cmd *cmd);
81 void mrsas_unmap_request(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd);
82 void mrsas_cmd_done(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd);
83 void
84 mrsas_fire_cmd(struct mrsas_softc *sc, u_int32_t req_desc_lo,
85 u_int32_t req_desc_hi);
86 void
87 mrsas_set_pd_lba(MRSAS_RAID_SCSI_IO_REQUEST * io_request,
88 u_int8_t cdb_len, struct IO_REQUEST_INFO *io_info, union ccb *ccb,
89 MR_DRV_RAID_MAP_ALL * local_map_ptr, u_int32_t ref_tag,
90 u_int32_t ld_block_size);
91 static void mrsas_freeze_simq(struct mrsas_mpt_cmd *cmd, struct cam_sim *sim);
92 static void mrsas_cam_poll(struct cam_sim *sim);
93 static void mrsas_action(struct cam_sim *sim, union ccb *ccb);
94 static void mrsas_scsiio_timeout(void *data);
95 static int mrsas_track_scsiio(struct mrsas_softc *sc, target_id_t id, u_int32_t bus_id);
96 static void mrsas_tm_response_code(struct mrsas_softc *sc,
97 MPI2_SCSI_TASK_MANAGE_REPLY *mpi_reply);
98 static int mrsas_issue_tm(struct mrsas_softc *sc,
99 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc);
100 static void
101 mrsas_data_load_cb(void *arg, bus_dma_segment_t *segs,
102 int nseg, int error);
103 static int32_t
104 mrsas_startio(struct mrsas_softc *sc, struct cam_sim *sim,
105 union ccb *ccb);
106
107 static boolean_t mrsas_is_prp_possible(struct mrsas_mpt_cmd *cmd,
108 bus_dma_segment_t *segs, int nsegs);
109 static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd *cmd,
110 bus_dma_segment_t *segs, int nseg);
111 static void mrsas_build_prp_nvme(struct mrsas_mpt_cmd *cmd,
112 bus_dma_segment_t *segs, int nseg);
113
114 struct mrsas_mpt_cmd *mrsas_get_mpt_cmd(struct mrsas_softc *sc);
115 MRSAS_REQUEST_DESCRIPTOR_UNION *
116 mrsas_get_request_desc(struct mrsas_softc *sc, u_int16_t index);
117
118 extern int mrsas_reset_targets(struct mrsas_softc *sc);
119 extern u_int16_t MR_TargetIdToLdGet(u_int32_t ldTgtId, MR_DRV_RAID_MAP_ALL * map);
120 extern u_int32_t
121 MR_LdBlockSizeGet(u_int32_t ldTgtId, MR_DRV_RAID_MAP_ALL * map);
122 extern void mrsas_isr(void *arg);
123 extern void mrsas_aen_handler(struct mrsas_softc *sc);
124 extern u_int8_t
125 MR_BuildRaidContext(struct mrsas_softc *sc,
126 struct IO_REQUEST_INFO *io_info, RAID_CONTEXT * pRAID_Context,
127 MR_DRV_RAID_MAP_ALL * map);
128 extern u_int16_t
129 MR_LdSpanArrayGet(u_int32_t ld, u_int32_t span,
130 MR_DRV_RAID_MAP_ALL * map);
131 extern u_int16_t
132 mrsas_get_updated_dev_handle(struct mrsas_softc *sc,
133 PLD_LOAD_BALANCE_INFO lbInfo, struct IO_REQUEST_INFO *io_info);
134 extern int mrsas_complete_cmd(struct mrsas_softc *sc, u_int32_t MSIxIndex);
135 extern MR_LD_RAID *MR_LdRaidGet(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map);
136 extern void mrsas_disable_intr(struct mrsas_softc *sc);
137 extern void mrsas_enable_intr(struct mrsas_softc *sc);
138 void mrsas_prepare_secondRaid1_IO(struct mrsas_softc *sc,
139 struct mrsas_mpt_cmd *cmd);
140
141 /*
142 * mrsas_cam_attach: Main entry to CAM subsystem
143 * input: Adapter instance soft state
144 *
145 * This function is called from mrsas_attach() during initialization to perform
146 * SIM allocations and XPT bus registration. If the kernel version is 7.4 or
147 * earlier, it would also initiate a bus scan.
148 */
149 int
mrsas_cam_attach(struct mrsas_softc * sc)150 mrsas_cam_attach(struct mrsas_softc *sc)
151 {
152 struct cam_devq *devq;
153 int mrsas_cam_depth;
154
155 mrsas_cam_depth = sc->max_scsi_cmds;
156
157 if ((devq = cam_simq_alloc(mrsas_cam_depth)) == NULL) {
158 device_printf(sc->mrsas_dev, "Cannot allocate SIM queue\n");
159 return (ENOMEM);
160 }
161 /*
162 * Create SIM for bus 0 and register, also create path
163 */
164 sc->sim_0 = cam_sim_alloc(mrsas_action, mrsas_cam_poll, "mrsas", sc,
165 device_get_unit(sc->mrsas_dev), &sc->sim_lock, mrsas_cam_depth,
166 mrsas_cam_depth, devq);
167 if (sc->sim_0 == NULL) {
168 cam_simq_free(devq);
169 device_printf(sc->mrsas_dev, "Cannot register SIM\n");
170 return (ENXIO);
171 }
172 /* Initialize taskqueue for Event Handling */
173 TASK_INIT(&sc->ev_task, 0, (void *)mrsas_aen_handler, sc);
174 sc->ev_tq = taskqueue_create("mrsas_taskq", M_NOWAIT | M_ZERO,
175 taskqueue_thread_enqueue, &sc->ev_tq);
176
177 /* Run the task queue with lowest priority */
178 taskqueue_start_threads(&sc->ev_tq, 1, 255, "%s taskq",
179 device_get_nameunit(sc->mrsas_dev));
180 mtx_lock(&sc->sim_lock);
181 if (xpt_bus_register(sc->sim_0, sc->mrsas_dev, 0) != CAM_SUCCESS) {
182 cam_sim_free(sc->sim_0, TRUE); /* passing true frees the devq */
183 mtx_unlock(&sc->sim_lock);
184 return (ENXIO);
185 }
186 if (xpt_create_path(&sc->path_0, NULL, cam_sim_path(sc->sim_0),
187 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
188 xpt_bus_deregister(cam_sim_path(sc->sim_0));
189 cam_sim_free(sc->sim_0, TRUE); /* passing true will free the
190 * devq */
191 mtx_unlock(&sc->sim_lock);
192 return (ENXIO);
193 }
194 mtx_unlock(&sc->sim_lock);
195
196 /*
197 * Create SIM for bus 1 and register, also create path
198 */
199 sc->sim_1 = cam_sim_alloc(mrsas_action, mrsas_cam_poll, "mrsas", sc,
200 device_get_unit(sc->mrsas_dev), &sc->sim_lock, mrsas_cam_depth,
201 mrsas_cam_depth, devq);
202 if (sc->sim_1 == NULL) {
203 cam_simq_free(devq);
204 device_printf(sc->mrsas_dev, "Cannot register SIM\n");
205 return (ENXIO);
206 }
207 mtx_lock(&sc->sim_lock);
208 if (xpt_bus_register(sc->sim_1, sc->mrsas_dev, 1) != CAM_SUCCESS) {
209 cam_sim_free(sc->sim_1, TRUE); /* passing true frees the devq */
210 mtx_unlock(&sc->sim_lock);
211 return (ENXIO);
212 }
213 if (xpt_create_path(&sc->path_1, NULL, cam_sim_path(sc->sim_1),
214 CAM_TARGET_WILDCARD,
215 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
216 xpt_bus_deregister(cam_sim_path(sc->sim_1));
217 cam_sim_free(sc->sim_1, TRUE);
218 mtx_unlock(&sc->sim_lock);
219 return (ENXIO);
220 }
221 mtx_unlock(&sc->sim_lock);
222
223 return (0);
224 }
225
226 /*
227 * mrsas_cam_detach: De-allocates and teardown CAM
228 * input: Adapter instance soft state
229 *
230 * De-registers and frees the paths and SIMs.
231 */
232 void
mrsas_cam_detach(struct mrsas_softc * sc)233 mrsas_cam_detach(struct mrsas_softc *sc)
234 {
235 if (sc->ev_tq != NULL)
236 taskqueue_free(sc->ev_tq);
237 mtx_lock(&sc->sim_lock);
238 if (sc->path_0)
239 xpt_free_path(sc->path_0);
240 if (sc->sim_0) {
241 xpt_bus_deregister(cam_sim_path(sc->sim_0));
242 cam_sim_free(sc->sim_0, FALSE);
243 }
244 if (sc->path_1)
245 xpt_free_path(sc->path_1);
246 if (sc->sim_1) {
247 xpt_bus_deregister(cam_sim_path(sc->sim_1));
248 cam_sim_free(sc->sim_1, TRUE);
249 }
250 mtx_unlock(&sc->sim_lock);
251 }
252
253 /*
254 * mrsas_action: SIM callback entry point
255 * input: pointer to SIM pointer to CAM Control Block
256 *
257 * This function processes CAM subsystem requests. The type of request is stored
258 * in ccb->ccb_h.func_code. The preprocessor #ifdef is necessary because
259 * ccb->cpi.maxio is not supported for FreeBSD version 7.4 or earlier.
260 */
261 static void
mrsas_action(struct cam_sim * sim,union ccb * ccb)262 mrsas_action(struct cam_sim *sim, union ccb *ccb)
263 {
264 struct mrsas_softc *sc = (struct mrsas_softc *)cam_sim_softc(sim);
265 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
266 u_int32_t device_id;
267
268 /*
269 * Check if the system going down
270 * or the adapter is in unrecoverable critical error
271 */
272 if (sc->remove_in_progress ||
273 (sc->adprecovery == MRSAS_HW_CRITICAL_ERROR)) {
274 ccb->ccb_h.status |= CAM_DEV_NOT_THERE;
275 xpt_done(ccb);
276 return;
277 }
278
279 switch (ccb->ccb_h.func_code) {
280 case XPT_SCSI_IO:
281 {
282 device_id = ccb_h->target_id;
283
284 /*
285 * bus 0 is LD, bus 1 is for system-PD
286 */
287 if (cam_sim_bus(sim) == 1 &&
288 sc->pd_list[device_id].driveState != MR_PD_STATE_SYSTEM) {
289 ccb->ccb_h.status |= CAM_DEV_NOT_THERE;
290 xpt_done(ccb);
291 } else {
292 if (mrsas_startio(sc, sim, ccb)) {
293 ccb->ccb_h.status |= CAM_REQ_INVALID;
294 xpt_done(ccb);
295 }
296 }
297 break;
298 }
299 case XPT_ABORT:
300 {
301 ccb->ccb_h.status = CAM_UA_ABORT;
302 xpt_done(ccb);
303 break;
304 }
305 case XPT_RESET_BUS:
306 {
307 xpt_done(ccb);
308 break;
309 }
310 case XPT_GET_TRAN_SETTINGS:
311 {
312 ccb->cts.protocol = PROTO_SCSI;
313 ccb->cts.protocol_version = SCSI_REV_2;
314 ccb->cts.transport = XPORT_SPI;
315 ccb->cts.transport_version = 2;
316 ccb->cts.xport_specific.spi.valid = CTS_SPI_VALID_DISC;
317 ccb->cts.xport_specific.spi.flags = CTS_SPI_FLAGS_DISC_ENB;
318 ccb->cts.proto_specific.scsi.valid = CTS_SCSI_VALID_TQ;
319 ccb->cts.proto_specific.scsi.flags = CTS_SCSI_FLAGS_TAG_ENB;
320 ccb->ccb_h.status = CAM_REQ_CMP;
321 xpt_done(ccb);
322 break;
323 }
324 case XPT_SET_TRAN_SETTINGS:
325 {
326 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
327 xpt_done(ccb);
328 break;
329 }
330 case XPT_CALC_GEOMETRY:
331 {
332 cam_calc_geometry(&ccb->ccg, 1);
333 xpt_done(ccb);
334 break;
335 }
336 case XPT_PATH_INQ:
337 {
338 ccb->cpi.version_num = 1;
339 ccb->cpi.hba_inquiry = 0;
340 ccb->cpi.target_sprt = 0;
341 ccb->cpi.hba_misc = PIM_UNMAPPED;
342 ccb->cpi.hba_eng_cnt = 0;
343 ccb->cpi.max_lun = MRSAS_SCSI_MAX_LUNS;
344 ccb->cpi.unit_number = cam_sim_unit(sim);
345 ccb->cpi.bus_id = cam_sim_bus(sim);
346 ccb->cpi.initiator_id = MRSAS_SCSI_INITIATOR_ID;
347 ccb->cpi.base_transfer_speed = 150000;
348 strlcpy(ccb->cpi.sim_vid, "FreeBSD", SIM_IDLEN);
349 strlcpy(ccb->cpi.hba_vid, "AVAGO", HBA_IDLEN);
350 strlcpy(ccb->cpi.dev_name, cam_sim_name(sim), DEV_IDLEN);
351 ccb->cpi.transport = XPORT_SPI;
352 ccb->cpi.transport_version = 2;
353 ccb->cpi.protocol = PROTO_SCSI;
354 ccb->cpi.protocol_version = SCSI_REV_2;
355 if (ccb->cpi.bus_id == 0)
356 ccb->cpi.max_target = MRSAS_MAX_PD - 1;
357 else
358 ccb->cpi.max_target = MRSAS_MAX_LD_IDS - 1;
359 ccb->cpi.maxio = sc->max_sectors_per_req * 512;
360 ccb->ccb_h.status = CAM_REQ_CMP;
361 xpt_done(ccb);
362 break;
363 }
364 default:
365 {
366 ccb->ccb_h.status = CAM_REQ_INVALID;
367 xpt_done(ccb);
368 break;
369 }
370 }
371 }
372
373 /*
374 * mrsas_scsiio_timeout: Callback function for IO timed out
375 * input: mpt command context
376 *
377 * This function will execute after timeout value provided by ccb header from
378 * CAM layer, if timer expires. Driver will run timer for all DCDM and LDIO
379 * coming from CAM layer. This function is callback function for IO timeout
380 * and it runs in no-sleep context. Set do_timedout_reset in Adapter context
381 * so that it will execute OCR/Kill adpter from ocr_thread context.
382 */
383 static void
mrsas_scsiio_timeout(void * data)384 mrsas_scsiio_timeout(void *data)
385 {
386 struct mrsas_mpt_cmd *cmd;
387 struct mrsas_softc *sc;
388 u_int32_t target_id;
389
390 if (!data)
391 return;
392
393 cmd = (struct mrsas_mpt_cmd *)data;
394 sc = cmd->sc;
395
396 if (cmd->ccb_ptr == NULL) {
397 printf("command timeout with NULL ccb\n");
398 return;
399 }
400
401 /*
402 * Below callout is dummy entry so that it will be cancelled from
403 * mrsas_cmd_done(). Now Controller will go to OCR/Kill Adapter based
404 * on OCR enable/disable property of Controller from ocr_thread
405 * context.
406 */
407 callout_reset_sbt(&cmd->cm_callout, SBT_1S * 180, 0,
408 mrsas_scsiio_timeout, cmd, 0);
409
410 if (cmd->ccb_ptr->cpi.bus_id == 0)
411 target_id = cmd->ccb_ptr->ccb_h.target_id;
412 else
413 target_id = (cmd->ccb_ptr->ccb_h.target_id + (MRSAS_MAX_PD - 1));
414
415 /* Save the cmd to be processed for TM, if it is not there in the array */
416 if (sc->target_reset_pool[target_id] == NULL) {
417 sc->target_reset_pool[target_id] = cmd;
418 mrsas_atomic_inc(&sc->target_reset_outstanding);
419 }
420
421 return;
422 }
423
424 /*
425 * mrsas_startio: SCSI IO entry point
426 * input: Adapter instance soft state
427 * pointer to CAM Control Block
428 *
429 * This function is the SCSI IO entry point and it initiates IO processing. It
430 * copies the IO and depending if the IO is read/write or inquiry, it would
431 * call mrsas_build_ldio() or mrsas_build_dcdb(), respectively. It returns 0
432 * if the command is sent to firmware successfully, otherwise it returns 1.
433 */
434 static int32_t
mrsas_startio(struct mrsas_softc * sc,struct cam_sim * sim,union ccb * ccb)435 mrsas_startio(struct mrsas_softc *sc, struct cam_sim *sim,
436 union ccb *ccb)
437 {
438 struct mrsas_mpt_cmd *cmd, *r1_cmd = NULL;
439 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
440 struct ccb_scsiio *csio = &(ccb->csio);
441 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc;
442 u_int8_t cmd_type;
443
444 if ((csio->cdb_io.cdb_bytes[0]) == SYNCHRONIZE_CACHE &&
445 (!sc->fw_sync_cache_support)) {
446 ccb->ccb_h.status = CAM_REQ_CMP;
447 xpt_done(ccb);
448 return (0);
449 }
450 ccb_h->status |= CAM_SIM_QUEUED;
451
452 if (mrsas_atomic_inc_return(&sc->fw_outstanding) > sc->max_scsi_cmds) {
453 ccb_h->status |= CAM_REQUEUE_REQ;
454 xpt_done(ccb);
455 mrsas_atomic_dec(&sc->fw_outstanding);
456 return (0);
457 }
458
459 cmd = mrsas_get_mpt_cmd(sc);
460
461 if (!cmd) {
462 ccb_h->status |= CAM_REQUEUE_REQ;
463 xpt_done(ccb);
464 mrsas_atomic_dec(&sc->fw_outstanding);
465 return (0);
466 }
467
468 if ((ccb_h->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
469 if (ccb_h->flags & CAM_DIR_IN)
470 cmd->flags |= MRSAS_DIR_IN;
471 if (ccb_h->flags & CAM_DIR_OUT)
472 cmd->flags |= MRSAS_DIR_OUT;
473 } else
474 cmd->flags = MRSAS_DIR_NONE; /* no data */
475
476 /*
477 * XXX We don't yet support physical addresses here.
478 */
479 switch ((ccb->ccb_h.flags & CAM_DATA_MASK)) {
480 case CAM_DATA_PADDR:
481 case CAM_DATA_SG_PADDR:
482 device_printf(sc->mrsas_dev, "%s: physical addresses not supported\n",
483 __func__);
484 mrsas_release_mpt_cmd(cmd);
485 ccb_h->status = CAM_REQ_INVALID;
486 ccb_h->status &= ~CAM_SIM_QUEUED;
487 goto done;
488 case CAM_DATA_SG:
489 device_printf(sc->mrsas_dev, "%s: scatter gather is not supported\n",
490 __func__);
491 mrsas_release_mpt_cmd(cmd);
492 ccb_h->status = CAM_REQ_INVALID;
493 goto done;
494 case CAM_DATA_VADDR:
495 cmd->length = csio->dxfer_len;
496 if (cmd->length)
497 cmd->data = csio->data_ptr;
498 break;
499 case CAM_DATA_BIO:
500 cmd->length = csio->dxfer_len;
501 if (cmd->length)
502 cmd->data = csio->data_ptr;
503 break;
504 default:
505 ccb->ccb_h.status = CAM_REQ_INVALID;
506 goto done;
507 }
508
509 /* save ccb ptr */
510 cmd->ccb_ptr = ccb;
511
512 req_desc = mrsas_get_request_desc(sc, (cmd->index) - 1);
513 if (!req_desc) {
514 device_printf(sc->mrsas_dev, "Cannot get request_descriptor.\n");
515 return (FAIL);
516 }
517 memset(req_desc, 0, sizeof(MRSAS_REQUEST_DESCRIPTOR_UNION));
518 cmd->request_desc = req_desc;
519
520 if (ccb_h->flags & CAM_CDB_POINTER)
521 bcopy(csio->cdb_io.cdb_ptr, cmd->io_request->CDB.CDB32, csio->cdb_len);
522 else
523 bcopy(csio->cdb_io.cdb_bytes, cmd->io_request->CDB.CDB32, csio->cdb_len);
524 mtx_lock(&sc->raidmap_lock);
525
526 /* Check for IO type READ-WRITE targeted for Logical Volume */
527 cmd_type = mrsas_find_io_type(sim, ccb);
528 switch (cmd_type) {
529 case READ_WRITE_LDIO:
530 /* Build READ-WRITE IO for Logical Volume */
531 if (mrsas_build_ldio_rw(sc, cmd, ccb)) {
532 device_printf(sc->mrsas_dev, "Build RW LDIO failed.\n");
533 mtx_unlock(&sc->raidmap_lock);
534 mrsas_release_mpt_cmd(cmd);
535 return (1);
536 }
537 break;
538 case NON_READ_WRITE_LDIO:
539 /* Build NON READ-WRITE IO for Logical Volume */
540 if (mrsas_build_ldio_nonrw(sc, cmd, ccb)) {
541 device_printf(sc->mrsas_dev, "Build NON-RW LDIO failed.\n");
542 mtx_unlock(&sc->raidmap_lock);
543 mrsas_release_mpt_cmd(cmd);
544 return (1);
545 }
546 break;
547 case READ_WRITE_SYSPDIO:
548 case NON_READ_WRITE_SYSPDIO:
549 if (sc->secure_jbod_support &&
550 (cmd_type == NON_READ_WRITE_SYSPDIO)) {
551 /* Build NON-RW IO for JBOD */
552 if (mrsas_build_syspdio(sc, cmd, ccb, sim, 0)) {
553 device_printf(sc->mrsas_dev,
554 "Build SYSPDIO failed.\n");
555 mtx_unlock(&sc->raidmap_lock);
556 mrsas_release_mpt_cmd(cmd);
557 return (1);
558 }
559 } else {
560 /* Build RW IO for JBOD */
561 if (mrsas_build_syspdio(sc, cmd, ccb, sim, 1)) {
562 device_printf(sc->mrsas_dev,
563 "Build SYSPDIO failed.\n");
564 mtx_unlock(&sc->raidmap_lock);
565 mrsas_release_mpt_cmd(cmd);
566 return (1);
567 }
568 }
569 }
570 mtx_unlock(&sc->raidmap_lock);
571
572 if (cmd->flags == MRSAS_DIR_IN) /* from device */
573 cmd->io_request->Control |= htole32(MPI2_SCSIIO_CONTROL_READ);
574 else if (cmd->flags == MRSAS_DIR_OUT) /* to device */
575 cmd->io_request->Control |= htole32(MPI2_SCSIIO_CONTROL_WRITE);
576
577 cmd->io_request->SGLFlags = htole16(MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
578 cmd->io_request->SGLOffset0 = offsetof(MRSAS_RAID_SCSI_IO_REQUEST, SGL) / 4;
579 cmd->io_request->SenseBufferLowAddress = htole32(cmd->sense_phys_addr & 0xFFFFFFFF);
580 cmd->io_request->SenseBufferLength = MRSAS_SCSI_SENSE_BUFFERSIZE;
581
582 req_desc = cmd->request_desc;
583 req_desc->SCSIIO.SMID = htole16(cmd->index);
584
585 /*
586 * Start timer for IO timeout. Default timeout value is 90 second.
587 */
588 cmd->callout_owner = true;
589 callout_reset_sbt(&cmd->cm_callout, SBT_1S * 180, 0,
590 mrsas_scsiio_timeout, cmd, 0);
591
592 if (mrsas_atomic_read(&sc->fw_outstanding) > sc->io_cmds_highwater)
593 sc->io_cmds_highwater++;
594
595 /*
596 * if it is raid 1/10 fp write capable.
597 * try to get second command from pool and construct it.
598 * From FW, it has confirmed that lba values of two PDs corresponds to
599 * single R1/10 LD are always same
600 *
601 */
602 /*
603 * driver side count always should be less than max_fw_cmds to get
604 * new command
605 */
606 if (cmd->r1_alt_dev_handle != MR_DEVHANDLE_INVALID) {
607 mrsas_prepare_secondRaid1_IO(sc, cmd);
608 mrsas_fire_cmd(sc, req_desc->addr.u.low,
609 req_desc->addr.u.high);
610 r1_cmd = cmd->peer_cmd;
611 mrsas_fire_cmd(sc, r1_cmd->request_desc->addr.u.low,
612 r1_cmd->request_desc->addr.u.high);
613 } else {
614 mrsas_fire_cmd(sc, req_desc->addr.u.low,
615 req_desc->addr.u.high);
616 }
617
618 return (0);
619
620 done:
621 xpt_done(ccb);
622 mrsas_atomic_dec(&sc->fw_outstanding);
623 return (0);
624 }
625
626 /*
627 * mrsas_find_io_type: Determines if IO is read/write or inquiry
628 * input: pointer to CAM Control Block
629 *
630 * This function determines if the IO is read/write or inquiry. It returns a 1
631 * if the IO is read/write and 0 if it is inquiry.
632 */
633 int
mrsas_find_io_type(struct cam_sim * sim,union ccb * ccb)634 mrsas_find_io_type(struct cam_sim *sim, union ccb *ccb)
635 {
636 struct ccb_scsiio *csio = &(ccb->csio);
637
638 switch (csio->cdb_io.cdb_bytes[0]) {
639 case READ_10:
640 case WRITE_10:
641 case READ_12:
642 case WRITE_12:
643 case READ_6:
644 case WRITE_6:
645 case READ_16:
646 case WRITE_16:
647 return (cam_sim_bus(sim) ?
648 READ_WRITE_SYSPDIO : READ_WRITE_LDIO);
649 default:
650 return (cam_sim_bus(sim) ?
651 NON_READ_WRITE_SYSPDIO : NON_READ_WRITE_LDIO);
652 }
653 }
654
655 /*
656 * mrsas_get_mpt_cmd: Get a cmd from free command pool
657 * input: Adapter instance soft state
658 *
659 * This function removes an MPT command from the command free list and
660 * initializes it.
661 */
662 struct mrsas_mpt_cmd *
mrsas_get_mpt_cmd(struct mrsas_softc * sc)663 mrsas_get_mpt_cmd(struct mrsas_softc *sc)
664 {
665 struct mrsas_mpt_cmd *cmd = NULL;
666
667 mtx_lock(&sc->mpt_cmd_pool_lock);
668 if (!TAILQ_EMPTY(&sc->mrsas_mpt_cmd_list_head)) {
669 cmd = TAILQ_FIRST(&sc->mrsas_mpt_cmd_list_head);
670 TAILQ_REMOVE(&sc->mrsas_mpt_cmd_list_head, cmd, next);
671 } else {
672 goto out;
673 }
674
675 memset((uint8_t *)cmd->io_request, 0, MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE);
676 cmd->data = NULL;
677 cmd->length = 0;
678 cmd->flags = 0;
679 cmd->error_code = 0;
680 cmd->load_balance = 0;
681 cmd->ccb_ptr = NULL;
682 out:
683 mtx_unlock(&sc->mpt_cmd_pool_lock);
684 return cmd;
685 }
686
687 /*
688 * mrsas_release_mpt_cmd: Return a cmd to free command pool
689 * input: Command packet for return to free command pool
690 *
691 * This function returns an MPT command to the free command list.
692 */
693 void
mrsas_release_mpt_cmd(struct mrsas_mpt_cmd * cmd)694 mrsas_release_mpt_cmd(struct mrsas_mpt_cmd *cmd)
695 {
696 struct mrsas_softc *sc = cmd->sc;
697
698 mtx_lock(&sc->mpt_cmd_pool_lock);
699 cmd->r1_alt_dev_handle = MR_DEVHANDLE_INVALID;
700 cmd->sync_cmd_idx = (u_int32_t)MRSAS_ULONG_MAX;
701 cmd->peer_cmd = NULL;
702 cmd->cmd_completed = 0;
703 memset((uint8_t *)cmd->io_request, 0,
704 sizeof(MRSAS_RAID_SCSI_IO_REQUEST));
705 TAILQ_INSERT_HEAD(&(sc->mrsas_mpt_cmd_list_head), cmd, next);
706 mtx_unlock(&sc->mpt_cmd_pool_lock);
707
708 return;
709 }
710
711 /*
712 * mrsas_get_request_desc: Get request descriptor from array
713 * input: Adapter instance soft state
714 * SMID index
715 *
716 * This function returns a pointer to the request descriptor.
717 */
718 MRSAS_REQUEST_DESCRIPTOR_UNION *
mrsas_get_request_desc(struct mrsas_softc * sc,u_int16_t index)719 mrsas_get_request_desc(struct mrsas_softc *sc, u_int16_t index)
720 {
721 u_int8_t *p;
722
723 KASSERT(index < sc->max_fw_cmds, ("req_desc is out of range"));
724 p = sc->req_desc + sizeof(MRSAS_REQUEST_DESCRIPTOR_UNION) * index;
725
726 return (MRSAS_REQUEST_DESCRIPTOR_UNION *) p;
727 }
728
729 /* mrsas_prepare_secondRaid1_IO
730 * It prepares the raid 1 second IO
731 */
732 void
mrsas_prepare_secondRaid1_IO(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd)733 mrsas_prepare_secondRaid1_IO(struct mrsas_softc *sc,
734 struct mrsas_mpt_cmd *cmd)
735 {
736 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc, *req_desc2 = NULL;
737 struct mrsas_mpt_cmd *r1_cmd;
738
739 r1_cmd = cmd->peer_cmd;
740 req_desc = cmd->request_desc;
741
742 /*
743 * copy the io request frame as well as 8 SGEs data for r1
744 * command
745 */
746 memcpy(r1_cmd->io_request, cmd->io_request,
747 (sizeof(MRSAS_RAID_SCSI_IO_REQUEST)));
748 memcpy(&r1_cmd->io_request->SGL, &cmd->io_request->SGL,
749 (sc->max_sge_in_main_msg * sizeof(MPI2_SGE_IO_UNION)));
750
751 /* sense buffer is different for r1 command */
752 r1_cmd->io_request->SenseBufferLowAddress = htole32(r1_cmd->sense_phys_addr & 0xFFFFFFFF);
753 r1_cmd->ccb_ptr = cmd->ccb_ptr;
754
755 req_desc2 = mrsas_get_request_desc(sc, r1_cmd->index - 1);
756 req_desc2->addr.Words = 0;
757 r1_cmd->request_desc = req_desc2;
758 req_desc2->SCSIIO.SMID = r1_cmd->index;
759 req_desc2->SCSIIO.RequestFlags = req_desc->SCSIIO.RequestFlags;
760 r1_cmd->request_desc->SCSIIO.DevHandle = cmd->r1_alt_dev_handle;
761 r1_cmd->r1_alt_dev_handle = cmd->io_request->DevHandle;
762 r1_cmd->io_request->DevHandle = cmd->r1_alt_dev_handle;
763 cmd->io_request->RaidContext.raid_context_g35.smid.peerSMID =
764 r1_cmd->index;
765 r1_cmd->io_request->RaidContext.raid_context_g35.smid.peerSMID =
766 cmd->index;
767 /*
768 * MSIxIndex of both commands request descriptors
769 * should be same
770 */
771 r1_cmd->request_desc->SCSIIO.MSIxIndex = cmd->request_desc->SCSIIO.MSIxIndex;
772 /* span arm is different for r1 cmd */
773 r1_cmd->io_request->RaidContext.raid_context_g35.spanArm =
774 cmd->io_request->RaidContext.raid_context_g35.spanArm + 1;
775
776 }
777
778 /*
779 * mrsas_build_ldio_rw: Builds an LDIO command
780 * input: Adapter instance soft state
781 * Pointer to command packet
782 * Pointer to CCB
783 *
784 * This function builds the LDIO command packet. It returns 0 if the command is
785 * built successfully, otherwise it returns a 1.
786 */
787 int
mrsas_build_ldio_rw(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb)788 mrsas_build_ldio_rw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
789 union ccb *ccb)
790 {
791 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
792 struct ccb_scsiio *csio = &(ccb->csio);
793 u_int32_t device_id;
794 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
795
796 device_id = ccb_h->target_id;
797
798 io_request = cmd->io_request;
799 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
800 io_request->RaidContext.raid_context.status = 0;
801 io_request->RaidContext.raid_context.exStatus = 0;
802
803 /* just the cdb len, other flags zero, and ORed-in later for FP */
804 io_request->IoFlags = htole16(csio->cdb_len);
805
806 if (mrsas_setup_io(sc, cmd, ccb, device_id, io_request) != SUCCESS)
807 device_printf(sc->mrsas_dev, "Build ldio or fpio error\n");
808
809 io_request->DataLength = htole32(cmd->length);
810
811 if (mrsas_map_request(sc, cmd, ccb) == SUCCESS) {
812 if (sc->is_ventura || sc->is_aero)
813 io_request->RaidContext.raid_context_g35.numSGE = cmd->sge_count;
814 else {
815 /*
816 * numSGE store lower 8 bit of sge_count. numSGEExt store
817 * higher 8 bit of sge_count
818 */
819 io_request->RaidContext.raid_context.numSGE = cmd->sge_count;
820 io_request->RaidContext.raid_context.numSGEExt = (uint8_t)(cmd->sge_count >> 8);
821 }
822
823 } else {
824 device_printf(sc->mrsas_dev, "Data map/load failed.\n");
825 return (FAIL);
826 }
827 return (0);
828 }
829
830 /* stream detection on read and and write IOs */
831 static void
mrsas_stream_detect(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,struct IO_REQUEST_INFO * io_info)832 mrsas_stream_detect(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
833 struct IO_REQUEST_INFO *io_info)
834 {
835 u_int32_t device_id = io_info->ldTgtId;
836 LD_STREAM_DETECT *current_ld_SD = sc->streamDetectByLD[device_id];
837 u_int32_t *track_stream = ¤t_ld_SD->mruBitMap;
838 u_int32_t streamNum, shiftedValues, unshiftedValues;
839 u_int32_t indexValueMask, shiftedValuesMask;
840 int i;
841 boolean_t isReadAhead = false;
842 STREAM_DETECT *current_SD;
843
844 /* find possible stream */
845 for (i = 0; i < MAX_STREAMS_TRACKED; ++i) {
846 streamNum = (*track_stream >> (i * BITS_PER_INDEX_STREAM)) &
847 STREAM_MASK;
848 current_SD = ¤t_ld_SD->streamTrack[streamNum];
849 /*
850 * if we found a stream, update the raid context and
851 * also update the mruBitMap
852 */
853 if (current_SD->nextSeqLBA &&
854 io_info->ldStartBlock >= current_SD->nextSeqLBA &&
855 (io_info->ldStartBlock <= (current_SD->nextSeqLBA+32)) &&
856 (current_SD->isRead == io_info->isRead)) {
857 if (io_info->ldStartBlock != current_SD->nextSeqLBA &&
858 (!io_info->isRead || !isReadAhead)) {
859 /*
860 * Once the API availible we need to change this.
861 * At this point we are not allowing any gap
862 */
863 continue;
864 }
865 cmd->io_request->RaidContext.raid_context_g35.streamDetected = TRUE;
866 current_SD->nextSeqLBA = io_info->ldStartBlock + io_info->numBlocks;
867 /*
868 * update the mruBitMap LRU
869 */
870 shiftedValuesMask = (1 << i * BITS_PER_INDEX_STREAM) - 1 ;
871 shiftedValues = ((*track_stream & shiftedValuesMask) <<
872 BITS_PER_INDEX_STREAM);
873 indexValueMask = STREAM_MASK << i * BITS_PER_INDEX_STREAM;
874 unshiftedValues = (*track_stream) &
875 (~(shiftedValuesMask | indexValueMask));
876 *track_stream =
877 (unshiftedValues | shiftedValues | streamNum);
878 return;
879 }
880 }
881 /*
882 * if we did not find any stream, create a new one from the least recently used
883 */
884 streamNum = (*track_stream >>
885 ((MAX_STREAMS_TRACKED - 1) * BITS_PER_INDEX_STREAM)) & STREAM_MASK;
886 current_SD = ¤t_ld_SD->streamTrack[streamNum];
887 current_SD->isRead = io_info->isRead;
888 current_SD->nextSeqLBA = io_info->ldStartBlock + io_info->numBlocks;
889 *track_stream = (((*track_stream & ZERO_LAST_STREAM) << 4) | streamNum);
890 return;
891 }
892
893 /*
894 * mrsas_setup_io: Set up data including Fast Path I/O
895 * input: Adapter instance soft state
896 * Pointer to command packet
897 * Pointer to CCB
898 *
899 * This function builds the DCDB inquiry command. It returns 0 if the command
900 * is built successfully, otherwise it returns a 1.
901 */
902 int
mrsas_setup_io(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb,u_int32_t device_id,MRSAS_RAID_SCSI_IO_REQUEST * io_request)903 mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
904 union ccb *ccb, u_int32_t device_id,
905 MRSAS_RAID_SCSI_IO_REQUEST * io_request)
906 {
907 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
908 struct ccb_scsiio *csio = &(ccb->csio);
909 struct IO_REQUEST_INFO io_info;
910 MR_DRV_RAID_MAP_ALL *map_ptr;
911 struct mrsas_mpt_cmd *r1_cmd = NULL;
912
913 MR_LD_RAID *raid;
914 u_int8_t fp_possible;
915 u_int32_t start_lba_hi, start_lba_lo, ld_block_size, ld;
916 u_int32_t datalength = 0;
917
918 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
919
920 start_lba_lo = 0;
921 start_lba_hi = 0;
922 fp_possible = 0;
923
924 /*
925 * READ_6 (0x08) or WRITE_6 (0x0A) cdb
926 */
927 if (csio->cdb_len == 6) {
928 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[4];
929 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[1] << 16) |
930 ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 8) |
931 (u_int32_t)csio->cdb_io.cdb_bytes[3];
932 start_lba_lo &= 0x1FFFFF;
933 }
934 /*
935 * READ_10 (0x28) or WRITE_6 (0x2A) cdb
936 */
937 else if (csio->cdb_len == 10) {
938 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[8] |
939 ((u_int32_t)csio->cdb_io.cdb_bytes[7] << 8);
940 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 24) |
941 ((u_int32_t)csio->cdb_io.cdb_bytes[3] << 16) |
942 (u_int32_t)csio->cdb_io.cdb_bytes[4] << 8 |
943 ((u_int32_t)csio->cdb_io.cdb_bytes[5]);
944 }
945 /*
946 * READ_12 (0xA8) or WRITE_12 (0xAA) cdb
947 */
948 else if (csio->cdb_len == 12) {
949 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[6] << 24 |
950 ((u_int32_t)csio->cdb_io.cdb_bytes[7] << 16) |
951 ((u_int32_t)csio->cdb_io.cdb_bytes[8] << 8) |
952 ((u_int32_t)csio->cdb_io.cdb_bytes[9]);
953 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 24) |
954 ((u_int32_t)csio->cdb_io.cdb_bytes[3] << 16) |
955 (u_int32_t)csio->cdb_io.cdb_bytes[4] << 8 |
956 ((u_int32_t)csio->cdb_io.cdb_bytes[5]);
957 }
958 /*
959 * READ_16 (0x88) or WRITE_16 (0xx8A) cdb
960 */
961 else if (csio->cdb_len == 16) {
962 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[10] << 24 |
963 ((u_int32_t)csio->cdb_io.cdb_bytes[11] << 16) |
964 ((u_int32_t)csio->cdb_io.cdb_bytes[12] << 8) |
965 ((u_int32_t)csio->cdb_io.cdb_bytes[13]);
966 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[6] << 24) |
967 ((u_int32_t)csio->cdb_io.cdb_bytes[7] << 16) |
968 (u_int32_t)csio->cdb_io.cdb_bytes[8] << 8 |
969 ((u_int32_t)csio->cdb_io.cdb_bytes[9]);
970 start_lba_hi = ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 24) |
971 ((u_int32_t)csio->cdb_io.cdb_bytes[3] << 16) |
972 (u_int32_t)csio->cdb_io.cdb_bytes[4] << 8 |
973 ((u_int32_t)csio->cdb_io.cdb_bytes[5]);
974 }
975 memset(&io_info, 0, sizeof(struct IO_REQUEST_INFO));
976 io_info.ldStartBlock = ((u_int64_t)start_lba_hi << 32) | start_lba_lo;
977 io_info.numBlocks = datalength;
978 io_info.ldTgtId = device_id;
979 io_info.r1_alt_dev_handle = MR_DEVHANDLE_INVALID;
980
981 io_request->DataLength = htole32(cmd->length);
982
983 switch (ccb_h->flags & CAM_DIR_MASK) {
984 case CAM_DIR_IN:
985 io_info.isRead = 1;
986 break;
987 case CAM_DIR_OUT:
988 io_info.isRead = 0;
989 break;
990 case CAM_DIR_NONE:
991 default:
992 mrsas_dprint(sc, MRSAS_TRACE, "From %s : DMA Flag is %d \n", __func__, ccb_h->flags & CAM_DIR_MASK);
993 break;
994 }
995
996 map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
997 ld_block_size = MR_LdBlockSizeGet(device_id, map_ptr);
998
999 ld = MR_TargetIdToLdGet(device_id, map_ptr);
1000 if ((ld >= MAX_LOGICAL_DRIVES_EXT) || (!sc->fast_path_io)) {
1001 io_request->RaidContext.raid_context.regLockFlags = 0;
1002 fp_possible = 0;
1003 } else {
1004 if (MR_BuildRaidContext(sc, &io_info, &io_request->RaidContext.raid_context, map_ptr))
1005 fp_possible = io_info.fpOkForIo;
1006 }
1007
1008 raid = MR_LdRaidGet(ld, map_ptr);
1009 /* Store the TM capability value in cmd */
1010 cmd->tmCapable = raid->capability.tmCapable;
1011
1012 cmd->request_desc->SCSIIO.MSIxIndex =
1013 sc->msix_vectors ? smp_processor_id() % sc->msix_vectors : 0;
1014
1015 if (sc->is_ventura || sc->is_aero) {
1016 if (sc->streamDetectByLD) {
1017 mtx_lock(&sc->stream_lock);
1018 mrsas_stream_detect(sc, cmd, &io_info);
1019 mtx_unlock(&sc->stream_lock);
1020 /* In ventura if stream detected for a read and
1021 * it is read ahead capable make this IO as LDIO */
1022 if (io_request->RaidContext.raid_context_g35.streamDetected &&
1023 io_info.isRead && io_info.raCapable)
1024 fp_possible = FALSE;
1025 }
1026
1027 /* Set raid 1/10 fast path write capable bit in io_info.
1028 * Note - reset peer_cmd and r1_alt_dev_handle if fp_possible
1029 * disabled after this point. Try not to add more check for
1030 * fp_possible toggle after this.
1031 */
1032 if (fp_possible &&
1033 (io_info.r1_alt_dev_handle != MR_DEVHANDLE_INVALID) &&
1034 (raid->level == 1) && !io_info.isRead) {
1035 if (mrsas_atomic_inc_return(&sc->fw_outstanding) > sc->max_scsi_cmds) {
1036 fp_possible = FALSE;
1037 mrsas_atomic_dec(&sc->fw_outstanding);
1038 } else {
1039 r1_cmd = mrsas_get_mpt_cmd(sc);
1040 if (!r1_cmd) {
1041 fp_possible = FALSE;
1042 mrsas_atomic_dec(&sc->fw_outstanding);
1043 }
1044 else {
1045 cmd->peer_cmd = r1_cmd;
1046 r1_cmd->peer_cmd = cmd;
1047 }
1048 }
1049 }
1050 }
1051
1052 if (fp_possible) {
1053 mrsas_set_pd_lba(io_request, csio->cdb_len, &io_info, ccb, map_ptr,
1054 start_lba_lo, ld_block_size);
1055 io_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
1056 cmd->request_desc->SCSIIO.RequestFlags =
1057 (MPI2_REQ_DESCRIPT_FLAGS_FP_IO <<
1058 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1059 if (sc->mrsas_gen3_ctrl) {
1060 if (io_request->RaidContext.raid_context.regLockFlags == REGION_TYPE_UNUSED)
1061 cmd->request_desc->SCSIIO.RequestFlags =
1062 (MRSAS_REQ_DESCRIPT_FLAGS_NO_LOCK <<
1063 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1064 io_request->RaidContext.raid_context.Type = MPI2_TYPE_CUDA;
1065 io_request->RaidContext.raid_context.nseg = 0x1;
1066 io_request->IoFlags |= htole16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
1067 io_request->RaidContext.raid_context.regLockFlags |=
1068 (MR_RL_FLAGS_GRANT_DESTINATION_CUDA |
1069 MR_RL_FLAGS_SEQ_NUM_ENABLE);
1070 } else if (sc->is_ventura || sc->is_aero) {
1071 io_request->RaidContext.raid_context_g35.Type = MPI2_TYPE_CUDA;
1072 io_request->RaidContext.raid_context_g35.nseg = 0x1;
1073 io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
1074 io_request->IoFlags |= htole16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
1075 if (io_request->RaidContext.raid_context_g35.routingFlags.bits.sld) {
1076 io_request->RaidContext.raid_context_g35.RAIDFlags =
1077 (MR_RAID_FLAGS_IO_SUB_TYPE_CACHE_BYPASS
1078 << MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT);
1079 }
1080 }
1081 if ((sc->load_balance_info[device_id].loadBalanceFlag) &&
1082 (io_info.isRead)) {
1083 io_info.devHandle =
1084 mrsas_get_updated_dev_handle(sc,
1085 &sc->load_balance_info[device_id], &io_info);
1086 cmd->load_balance = MRSAS_LOAD_BALANCE_FLAG;
1087 cmd->pd_r1_lb = io_info.pd_after_lb;
1088 if (sc->is_ventura || sc->is_aero)
1089 io_request->RaidContext.raid_context_g35.spanArm = io_info.span_arm;
1090 else
1091 io_request->RaidContext.raid_context.spanArm = io_info.span_arm;
1092 } else
1093 cmd->load_balance = 0;
1094
1095 if (sc->is_ventura || sc->is_aero)
1096 cmd->r1_alt_dev_handle = io_info.r1_alt_dev_handle;
1097 else
1098 cmd->r1_alt_dev_handle = MR_DEVHANDLE_INVALID;
1099
1100 cmd->request_desc->SCSIIO.DevHandle = io_info.devHandle;
1101 io_request->DevHandle = io_info.devHandle;
1102 cmd->pdInterface = io_info.pdInterface;
1103 } else {
1104 /* Not FP IO */
1105 io_request->RaidContext.raid_context.timeoutValue = htole16(map_ptr->raidMap.fpPdIoTimeoutSec);
1106 cmd->request_desc->SCSIIO.RequestFlags =
1107 (MRSAS_REQ_DESCRIPT_FLAGS_LD_IO <<
1108 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1109 if (sc->mrsas_gen3_ctrl) {
1110 if (io_request->RaidContext.raid_context.regLockFlags == REGION_TYPE_UNUSED)
1111 cmd->request_desc->SCSIIO.RequestFlags =
1112 (MRSAS_REQ_DESCRIPT_FLAGS_NO_LOCK <<
1113 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1114 io_request->RaidContext.raid_context.Type = MPI2_TYPE_CUDA;
1115 io_request->RaidContext.raid_context.regLockFlags |=
1116 (MR_RL_FLAGS_GRANT_DESTINATION_CPU0 |
1117 MR_RL_FLAGS_SEQ_NUM_ENABLE);
1118 io_request->RaidContext.raid_context.nseg = 0x1;
1119 } else if (sc->is_ventura || sc->is_aero) {
1120 io_request->RaidContext.raid_context_g35.Type = MPI2_TYPE_CUDA;
1121 io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
1122 io_request->RaidContext.raid_context_g35.nseg = 0x1;
1123 }
1124 io_request->Function = MRSAS_MPI2_FUNCTION_LD_IO_REQUEST;
1125 io_request->DevHandle = htole16(device_id);
1126 }
1127 return (0);
1128 }
1129
1130 /*
1131 * mrsas_build_ldio_nonrw: Builds an LDIO command
1132 * input: Adapter instance soft state
1133 * Pointer to command packet
1134 * Pointer to CCB
1135 *
1136 * This function builds the LDIO command packet. It returns 0 if the command is
1137 * built successfully, otherwise it returns a 1.
1138 */
1139 int
mrsas_build_ldio_nonrw(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb)1140 mrsas_build_ldio_nonrw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
1141 union ccb *ccb)
1142 {
1143 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
1144 u_int32_t device_id, ld;
1145 MR_DRV_RAID_MAP_ALL *map_ptr;
1146 MR_LD_RAID *raid;
1147 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
1148
1149 io_request = cmd->io_request;
1150 device_id = ccb_h->target_id;
1151
1152 map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
1153 ld = MR_TargetIdToLdGet(device_id, map_ptr);
1154 raid = MR_LdRaidGet(ld, map_ptr);
1155 /* Store the TM capability value in cmd */
1156 cmd->tmCapable = raid->capability.tmCapable;
1157
1158 /* FW path for LD Non-RW (SCSI management commands) */
1159 io_request->Function = MRSAS_MPI2_FUNCTION_LD_IO_REQUEST;
1160 io_request->DevHandle = device_id;
1161 cmd->request_desc->SCSIIO.RequestFlags =
1162 (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
1163 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1164
1165 io_request->RaidContext.raid_context.VirtualDiskTgtId = device_id;
1166 io_request->LUN[1] = ccb_h->target_lun & 0xF;
1167 io_request->DataLength = cmd->length;
1168
1169 if (mrsas_map_request(sc, cmd, ccb) == SUCCESS) {
1170 if (sc->is_ventura || sc->is_aero)
1171 io_request->RaidContext.raid_context_g35.numSGE = cmd->sge_count;
1172 else {
1173 /*
1174 * numSGE store lower 8 bit of sge_count. numSGEExt store
1175 * higher 8 bit of sge_count
1176 */
1177 io_request->RaidContext.raid_context.numSGE = cmd->sge_count;
1178 io_request->RaidContext.raid_context.numSGEExt = (uint8_t)(cmd->sge_count >> 8);
1179 }
1180 } else {
1181 device_printf(sc->mrsas_dev, "Data map/load failed.\n");
1182 return (1);
1183 }
1184 return (0);
1185 }
1186
1187 /*
1188 * mrsas_build_syspdio: Builds an DCDB command
1189 * input: Adapter instance soft state
1190 * Pointer to command packet
1191 * Pointer to CCB
1192 *
1193 * This function builds the DCDB inquiry command. It returns 0 if the command
1194 * is built successfully, otherwise it returns a 1.
1195 */
1196 int
mrsas_build_syspdio(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb,struct cam_sim * sim,u_int8_t fp_possible)1197 mrsas_build_syspdio(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
1198 union ccb *ccb, struct cam_sim *sim, u_int8_t fp_possible)
1199 {
1200 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
1201 u_int32_t device_id;
1202 MR_DRV_RAID_MAP_ALL *local_map_ptr;
1203 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
1204 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
1205
1206 io_request = cmd->io_request;
1207 device_id = ccb_h->target_id;
1208 local_map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
1209 io_request->RaidContext.raid_context.RAIDFlags = MR_RAID_FLAGS_IO_SUB_TYPE_SYSTEM_PD
1210 << MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT;
1211 io_request->RaidContext.raid_context.regLockFlags = 0;
1212 io_request->RaidContext.raid_context.regLockRowLBA = 0;
1213 io_request->RaidContext.raid_context.regLockLength = 0;
1214
1215 cmd->pdInterface = sc->target_list[device_id].interface_type;
1216
1217 /* If FW supports PD sequence number */
1218 if (sc->use_seqnum_jbod_fp &&
1219 sc->pd_list[device_id].driveType == 0x00) {
1220 //printf("Using Drv seq num\n");
1221 pd_sync = (void *)sc->jbodmap_mem[(sc->pd_seq_map_id - 1) & 1];
1222 cmd->tmCapable = pd_sync->seq[device_id].capability.tmCapable;
1223 /* More than 256 PD/JBOD support for Ventura */
1224 if (sc->support_morethan256jbod)
1225 io_request->RaidContext.raid_context.VirtualDiskTgtId =
1226 pd_sync->seq[device_id].pdTargetId;
1227 else
1228 io_request->RaidContext.raid_context.VirtualDiskTgtId =
1229 htole16(device_id + 255);
1230 io_request->RaidContext.raid_context.configSeqNum = pd_sync->seq[device_id].seqNum;
1231 io_request->DevHandle = pd_sync->seq[device_id].devHandle;
1232 if (sc->is_ventura || sc->is_aero)
1233 io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
1234 else
1235 io_request->RaidContext.raid_context.regLockFlags |=
1236 (MR_RL_FLAGS_SEQ_NUM_ENABLE | MR_RL_FLAGS_GRANT_DESTINATION_CUDA);
1237 /* raid_context.Type = MPI2_TYPE_CUDA is valid only,
1238 * if FW support Jbod Sequence number
1239 */
1240 io_request->RaidContext.raid_context.Type = MPI2_TYPE_CUDA;
1241 io_request->RaidContext.raid_context.nseg = 0x1;
1242 } else if (sc->fast_path_io) {
1243 //printf("Using LD RAID map\n");
1244 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
1245 io_request->RaidContext.raid_context.configSeqNum = 0;
1246 local_map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
1247 io_request->DevHandle =
1248 local_map_ptr->raidMap.devHndlInfo[device_id].curDevHdl;
1249 } else {
1250 //printf("Using FW PATH\n");
1251 /* Want to send all IO via FW path */
1252 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
1253 io_request->RaidContext.raid_context.configSeqNum = 0;
1254 io_request->DevHandle = MR_DEVHANDLE_INVALID;
1255 }
1256
1257 cmd->request_desc->SCSIIO.DevHandle = io_request->DevHandle;
1258 cmd->request_desc->SCSIIO.MSIxIndex =
1259 sc->msix_vectors ? smp_processor_id() % sc->msix_vectors : 0;
1260
1261 if (!fp_possible) {
1262 /* system pd firmware path */
1263 io_request->Function = MRSAS_MPI2_FUNCTION_LD_IO_REQUEST;
1264 cmd->request_desc->SCSIIO.RequestFlags =
1265 (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
1266 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1267 io_request->RaidContext.raid_context.timeoutValue =
1268 htole16(local_map_ptr->raidMap.fpPdIoTimeoutSec);
1269 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
1270 } else {
1271 /* system pd fast path */
1272 io_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
1273 io_request->RaidContext.raid_context.timeoutValue = htole16(local_map_ptr->raidMap.fpPdIoTimeoutSec);
1274
1275 /*
1276 * NOTE - For system pd RW cmds only IoFlags will be FAST_PATH
1277 * Because the NON RW cmds will now go via FW Queue
1278 * and not the Exception queue
1279 */
1280 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero)
1281 io_request->IoFlags |= htole16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
1282
1283 cmd->request_desc->SCSIIO.RequestFlags =
1284 (MPI2_REQ_DESCRIPT_FLAGS_FP_IO <<
1285 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1286 }
1287
1288 io_request->LUN[1] = ccb_h->target_lun & 0xF;
1289 io_request->DataLength = htole32(cmd->length);
1290
1291 if (mrsas_map_request(sc, cmd, ccb) == SUCCESS) {
1292 if (sc->is_ventura || sc->is_aero)
1293 io_request->RaidContext.raid_context_g35.numSGE = cmd->sge_count;
1294 else {
1295 /*
1296 * numSGE store lower 8 bit of sge_count. numSGEExt store
1297 * higher 8 bit of sge_count
1298 */
1299 io_request->RaidContext.raid_context.numSGE = cmd->sge_count;
1300 io_request->RaidContext.raid_context.numSGEExt = (uint8_t)(cmd->sge_count >> 8);
1301 }
1302 } else {
1303 device_printf(sc->mrsas_dev, "Data map/load failed.\n");
1304 return (1);
1305 }
1306 return (0);
1307 }
1308
1309 /*
1310 * mrsas_is_prp_possible: This function will tell whether PRPs should be built or not
1311 * sc: Adapter instance soft state
1312 * cmd: MPT command frame pointer
1313 * nsesg: Number of OS SGEs
1314 *
1315 * This function will check whether IO is qualified to build PRPs
1316 * return: true: if PRP should be built
1317 * false: if IEEE SGLs should be built
1318 */
mrsas_is_prp_possible(struct mrsas_mpt_cmd * cmd,bus_dma_segment_t * segs,int nsegs)1319 static boolean_t mrsas_is_prp_possible(struct mrsas_mpt_cmd *cmd,
1320 bus_dma_segment_t *segs, int nsegs)
1321 {
1322 struct mrsas_softc *sc = cmd->sc;
1323 int i;
1324 u_int32_t data_length = 0;
1325 bool build_prp = false;
1326 u_int32_t mr_nvme_pg_size;
1327
1328 mr_nvme_pg_size = max(sc->nvme_page_size, MR_DEFAULT_NVME_PAGE_SIZE);
1329 data_length = cmd->length;
1330
1331 if (data_length > (mr_nvme_pg_size * 5))
1332 build_prp = true;
1333 else if ((data_length > (mr_nvme_pg_size * 4)) &&
1334 (data_length <= (mr_nvme_pg_size * 5))) {
1335 /* check if 1st SG entry size is < residual beyond 4 pages */
1336 if ((segs[0].ds_len) < (data_length - (mr_nvme_pg_size * 4)))
1337 build_prp = true;
1338 }
1339
1340 /*check for SGE holes here*/
1341 for (i = 0; i < nsegs; i++) {
1342 /* check for mid SGEs */
1343 if ((i != 0) && (i != (nsegs - 1))) {
1344 if ((segs[i].ds_addr % mr_nvme_pg_size) ||
1345 (segs[i].ds_len % mr_nvme_pg_size)) {
1346 build_prp = false;
1347 mrsas_atomic_inc(&sc->sge_holes);
1348 break;
1349 }
1350 }
1351
1352 /* check for first SGE*/
1353 if ((nsegs > 1) && (i == 0)) {
1354 if ((segs[i].ds_addr + segs[i].ds_len) % mr_nvme_pg_size) {
1355 build_prp = false;
1356 mrsas_atomic_inc(&sc->sge_holes);
1357 break;
1358 }
1359 }
1360
1361 /* check for Last SGE*/
1362 if ((nsegs > 1) && (i == (nsegs - 1))) {
1363 if (segs[i].ds_addr % mr_nvme_pg_size) {
1364 build_prp = false;
1365 mrsas_atomic_inc(&sc->sge_holes);
1366 break;
1367 }
1368 }
1369 }
1370
1371 return build_prp;
1372 }
1373
1374 /*
1375 * mrsas_map_request: Map and load data
1376 * input: Adapter instance soft state
1377 * Pointer to command packet
1378 *
1379 * For data from OS, map and load the data buffer into bus space. The SG list
1380 * is built in the callback. If the bus dmamap load is not successful,
1381 * cmd->error_code will contain the error code and a 1 is returned.
1382 */
1383 int
mrsas_map_request(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb)1384 mrsas_map_request(struct mrsas_softc *sc,
1385 struct mrsas_mpt_cmd *cmd, union ccb *ccb)
1386 {
1387 u_int32_t retcode = 0;
1388 struct cam_sim *sim;
1389
1390 sim = xpt_path_sim(cmd->ccb_ptr->ccb_h.path);
1391
1392 if (cmd->data != NULL) {
1393 /* Map data buffer into bus space */
1394 mtx_lock(&sc->io_lock);
1395 retcode = bus_dmamap_load_ccb(sc->data_tag, cmd->data_dmamap, ccb,
1396 mrsas_data_load_cb, cmd, 0);
1397 mtx_unlock(&sc->io_lock);
1398 if (retcode)
1399 device_printf(sc->mrsas_dev, "bus_dmamap_load(): retcode = %d\n", retcode);
1400 if (retcode == EINPROGRESS) {
1401 device_printf(sc->mrsas_dev, "request load in progress\n");
1402 mrsas_freeze_simq(cmd, sim);
1403 }
1404 }
1405 if (cmd->error_code)
1406 return (1);
1407 return (retcode);
1408 }
1409
1410 /*
1411 * mrsas_unmap_request: Unmap and unload data
1412 * input: Adapter instance soft state
1413 * Pointer to command packet
1414 *
1415 * This function unmaps and unloads data from OS.
1416 */
1417 void
mrsas_unmap_request(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd)1418 mrsas_unmap_request(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd)
1419 {
1420 if (cmd->data != NULL) {
1421 if (cmd->flags & MRSAS_DIR_IN)
1422 bus_dmamap_sync(sc->data_tag, cmd->data_dmamap, BUS_DMASYNC_POSTREAD);
1423 if (cmd->flags & MRSAS_DIR_OUT)
1424 bus_dmamap_sync(sc->data_tag, cmd->data_dmamap, BUS_DMASYNC_POSTWRITE);
1425 mtx_lock(&sc->io_lock);
1426 bus_dmamap_unload(sc->data_tag, cmd->data_dmamap);
1427 mtx_unlock(&sc->io_lock);
1428 }
1429 }
1430
1431 /**
1432 * mrsas_build_ieee_sgl - Prepare IEEE SGLs
1433 * @sc: Adapter soft state
1434 * @segs: OS SGEs pointers
1435 * @nseg: Number of OS SGEs
1436 * @cmd: Fusion command frame
1437 * return: void
1438 */
mrsas_build_ieee_sgl(struct mrsas_mpt_cmd * cmd,bus_dma_segment_t * segs,int nseg)1439 static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd *cmd, bus_dma_segment_t *segs, int nseg)
1440 {
1441 struct mrsas_softc *sc = cmd->sc;
1442 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
1443 pMpi25IeeeSgeChain64_t sgl_ptr;
1444 int i = 0, sg_processed = 0;
1445
1446 io_request = cmd->io_request;
1447 sgl_ptr = (pMpi25IeeeSgeChain64_t)&io_request->SGL;
1448
1449 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
1450 pMpi25IeeeSgeChain64_t sgl_ptr_end = sgl_ptr;
1451
1452 sgl_ptr_end += sc->max_sge_in_main_msg - 1;
1453 sgl_ptr_end->Flags = 0;
1454 }
1455 if (nseg != 0) {
1456 for (i = 0; i < nseg; i++) {
1457 sgl_ptr->Address = htole64(segs[i].ds_addr);
1458 sgl_ptr->Length = htole32(segs[i].ds_len);
1459 sgl_ptr->Flags = 0;
1460 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
1461 if (i == nseg - 1)
1462 sgl_ptr->Flags = IEEE_SGE_FLAGS_END_OF_LIST;
1463 }
1464 sgl_ptr++;
1465 sg_processed = i + 1;
1466 if ((sg_processed == (sc->max_sge_in_main_msg - 1)) &&
1467 (nseg > sc->max_sge_in_main_msg)) {
1468 pMpi25IeeeSgeChain64_t sg_chain;
1469
1470 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
1471 if ((cmd->io_request->IoFlags & MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)
1472 != MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)
1473 cmd->io_request->ChainOffset = sc->chain_offset_io_request;
1474 else
1475 cmd->io_request->ChainOffset = 0;
1476 } else
1477 cmd->io_request->ChainOffset = sc->chain_offset_io_request;
1478 sg_chain = sgl_ptr;
1479 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero)
1480 sg_chain->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT;
1481 else
1482 sg_chain->Flags = (IEEE_SGE_FLAGS_CHAIN_ELEMENT | MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR);
1483 sg_chain->Length = htole32((sizeof(MPI2_SGE_IO_UNION) * (nseg - sg_processed)));
1484 sg_chain->Address = htole64(cmd->chain_frame_phys_addr);
1485 sgl_ptr = (pMpi25IeeeSgeChain64_t)cmd->chain_frame;
1486 }
1487 }
1488 }
1489 }
1490
1491 /**
1492 * mrsas_build_prp_nvme - Prepare PRPs(Physical Region Page)- SGLs specific to NVMe drives only
1493 * @sc: Adapter soft state
1494 * @segs: OS SGEs pointers
1495 * @nseg: Number of OS SGEs
1496 * @cmd: Fusion command frame
1497 * return: void
1498 */
mrsas_build_prp_nvme(struct mrsas_mpt_cmd * cmd,bus_dma_segment_t * segs,int nseg)1499 static void mrsas_build_prp_nvme(struct mrsas_mpt_cmd *cmd, bus_dma_segment_t *segs, int nseg)
1500 {
1501 struct mrsas_softc *sc = cmd->sc;
1502 int sge_len, offset, num_prp_in_chain = 0;
1503 pMpi25IeeeSgeChain64_t main_chain_element, ptr_first_sgl, sgl_ptr;
1504 u_int64_t *ptr_sgl;
1505 bus_addr_t ptr_sgl_phys;
1506 u_int64_t sge_addr;
1507 u_int32_t page_mask, page_mask_result, i = 0;
1508 u_int32_t first_prp_len;
1509 int data_len = cmd->length;
1510 u_int32_t mr_nvme_pg_size = max(sc->nvme_page_size,
1511 MR_DEFAULT_NVME_PAGE_SIZE);
1512
1513 sgl_ptr = (pMpi25IeeeSgeChain64_t) &cmd->io_request->SGL;
1514 /*
1515 * NVMe has a very convoluted PRP format. One PRP is required
1516 * for each page or partial page. We need to split up OS SG
1517 * entries if they are longer than one page or cross a page
1518 * boundary. We also have to insert a PRP list pointer entry as
1519 * the last entry in each physical page of the PRP list.
1520 *
1521 * NOTE: The first PRP "entry" is actually placed in the first
1522 * SGL entry in the main message in IEEE 64 format. The 2nd
1523 * entry in the main message is the chain element, and the rest
1524 * of the PRP entries are built in the contiguous PCIe buffer.
1525 */
1526 page_mask = mr_nvme_pg_size - 1;
1527 ptr_sgl = (u_int64_t *) cmd->chain_frame;
1528 ptr_sgl_phys = cmd->chain_frame_phys_addr;
1529 memset(ptr_sgl, 0, sc->max_chain_frame_sz);
1530
1531 /* Build chain frame element which holds all PRPs except first*/
1532 main_chain_element = (pMpi25IeeeSgeChain64_t)
1533 ((u_int8_t *)sgl_ptr + sizeof(MPI25_IEEE_SGE_CHAIN64));
1534
1535 main_chain_element->Address = cmd->chain_frame_phys_addr;
1536 main_chain_element->NextChainOffset = 0;
1537 main_chain_element->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT |
1538 IEEE_SGE_FLAGS_SYSTEM_ADDR |
1539 MPI26_IEEE_SGE_FLAGS_NSF_NVME_PRP;
1540
1541 /* Build first PRP, SGE need not to be PAGE aligned*/
1542 ptr_first_sgl = sgl_ptr;
1543 sge_addr = segs[i].ds_addr;
1544 sge_len = segs[i].ds_len;
1545 i++;
1546
1547 offset = (u_int32_t) (sge_addr & page_mask);
1548 first_prp_len = mr_nvme_pg_size - offset;
1549
1550 ptr_first_sgl->Address = sge_addr;
1551 ptr_first_sgl->Length = first_prp_len;
1552
1553 data_len -= first_prp_len;
1554
1555 if (sge_len > first_prp_len) {
1556 sge_addr += first_prp_len;
1557 sge_len -= first_prp_len;
1558 } else if (sge_len == first_prp_len) {
1559 sge_addr = segs[i].ds_addr;
1560 sge_len = segs[i].ds_len;
1561 i++;
1562 }
1563
1564 for (;;) {
1565 offset = (u_int32_t) (sge_addr & page_mask);
1566
1567 /* Put PRP pointer due to page boundary*/
1568 page_mask_result = (uintptr_t)(ptr_sgl + 1) & page_mask;
1569 if (!page_mask_result) {
1570 device_printf(sc->mrsas_dev, "BRCM: Put prp pointer as we are at page boundary"
1571 " ptr_sgl: 0x%p\n", ptr_sgl);
1572 ptr_sgl_phys++;
1573 *ptr_sgl = (uintptr_t)ptr_sgl_phys;
1574 ptr_sgl++;
1575 num_prp_in_chain++;
1576 }
1577
1578 *ptr_sgl = sge_addr;
1579 ptr_sgl++;
1580 ptr_sgl_phys++;
1581 num_prp_in_chain++;
1582
1583 sge_addr += mr_nvme_pg_size;
1584 sge_len -= mr_nvme_pg_size;
1585 data_len -= mr_nvme_pg_size;
1586
1587 if (data_len <= 0)
1588 break;
1589
1590 if (sge_len > 0)
1591 continue;
1592
1593 sge_addr = segs[i].ds_addr;
1594 sge_len = segs[i].ds_len;
1595 i++;
1596 }
1597
1598 main_chain_element->Length = num_prp_in_chain * sizeof(u_int64_t);
1599 mrsas_atomic_inc(&sc->prp_count);
1600
1601 }
1602
1603 /*
1604 * mrsas_data_load_cb: Callback entry point to build SGLs
1605 * input: Pointer to command packet as argument
1606 * Pointer to segment
1607 * Number of segments Error
1608 *
1609 * This is the callback function of the bus dma map load. It builds SG list
1610 */
1611 static void
mrsas_data_load_cb(void * arg,bus_dma_segment_t * segs,int nseg,int error)1612 mrsas_data_load_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1613 {
1614 struct mrsas_mpt_cmd *cmd = (struct mrsas_mpt_cmd *)arg;
1615 struct mrsas_softc *sc = cmd->sc;
1616 boolean_t build_prp = false;
1617
1618 if (error) {
1619 cmd->error_code = error;
1620 device_printf(sc->mrsas_dev, "mrsas_data_load_cb_prp: error=%d\n", error);
1621 if (error == EFBIG) {
1622 cmd->ccb_ptr->ccb_h.status = CAM_REQ_TOO_BIG;
1623 return;
1624 }
1625 }
1626 if (cmd->flags & MRSAS_DIR_IN)
1627 bus_dmamap_sync(cmd->sc->data_tag, cmd->data_dmamap,
1628 BUS_DMASYNC_PREREAD);
1629 if (cmd->flags & MRSAS_DIR_OUT)
1630 bus_dmamap_sync(cmd->sc->data_tag, cmd->data_dmamap,
1631 BUS_DMASYNC_PREWRITE);
1632
1633 /* Check for whether PRPs should be built or IEEE SGLs*/
1634 if ((cmd->io_request->IoFlags & MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) &&
1635 (cmd->pdInterface == NVME_PD))
1636 build_prp = mrsas_is_prp_possible(cmd, segs, nseg);
1637
1638 if (build_prp == true)
1639 mrsas_build_prp_nvme(cmd, segs, nseg);
1640 else
1641 mrsas_build_ieee_sgl(cmd, segs, nseg);
1642
1643 cmd->sge_count = nseg;
1644 }
1645
1646 /*
1647 * mrsas_freeze_simq: Freeze SIM queue
1648 * input: Pointer to command packet
1649 * Pointer to SIM
1650 *
1651 * This function freezes the sim queue.
1652 */
1653 static void
mrsas_freeze_simq(struct mrsas_mpt_cmd * cmd,struct cam_sim * sim)1654 mrsas_freeze_simq(struct mrsas_mpt_cmd *cmd, struct cam_sim *sim)
1655 {
1656 union ccb *ccb = (union ccb *)(cmd->ccb_ptr);
1657
1658 xpt_freeze_simq(sim, 1);
1659 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1660 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
1661 }
1662
1663 void
mrsas_xpt_freeze(struct mrsas_softc * sc)1664 mrsas_xpt_freeze(struct mrsas_softc *sc)
1665 {
1666 xpt_freeze_simq(sc->sim_0, 1);
1667 xpt_freeze_simq(sc->sim_1, 1);
1668 }
1669
1670 void
mrsas_xpt_release(struct mrsas_softc * sc)1671 mrsas_xpt_release(struct mrsas_softc *sc)
1672 {
1673 xpt_release_simq(sc->sim_0, 1);
1674 xpt_release_simq(sc->sim_1, 1);
1675 }
1676
1677 /*
1678 * mrsas_cmd_done: Perform remaining command completion
1679 * input: Adapter instance soft state Pointer to command packet
1680 *
1681 * This function calls ummap request and releases the MPT command.
1682 */
1683 void
mrsas_cmd_done(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd)1684 mrsas_cmd_done(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd)
1685 {
1686 mrsas_unmap_request(sc, cmd);
1687
1688 mtx_lock(&sc->sim_lock);
1689 if (cmd->callout_owner) {
1690 callout_stop(&cmd->cm_callout);
1691 cmd->callout_owner = false;
1692 }
1693 xpt_done(cmd->ccb_ptr);
1694 cmd->ccb_ptr = NULL;
1695 mtx_unlock(&sc->sim_lock);
1696 mrsas_release_mpt_cmd(cmd);
1697 }
1698
1699 /*
1700 * mrsas_cam_poll: Polling entry point
1701 * input: Pointer to SIM
1702 *
1703 * This is currently a stub function.
1704 */
1705 static void
mrsas_cam_poll(struct cam_sim * sim)1706 mrsas_cam_poll(struct cam_sim *sim)
1707 {
1708 int i;
1709 struct mrsas_softc *sc = (struct mrsas_softc *)cam_sim_softc(sim);
1710
1711 if (sc->msix_vectors != 0){
1712 for (i=0; i<sc->msix_vectors; i++){
1713 mrsas_complete_cmd(sc, i);
1714 }
1715 } else {
1716 mrsas_complete_cmd(sc, 0);
1717 }
1718 }
1719
1720 /*
1721 * mrsas_bus_scan: Perform bus scan
1722 * input: Adapter instance soft state
1723 *
1724 * This mrsas_bus_scan function is needed for FreeBSD 7.x. Also, it should not
1725 * be called in FreeBSD 8.x and later versions, where the bus scan is
1726 * automatic.
1727 */
1728 int
mrsas_bus_scan(struct mrsas_softc * sc)1729 mrsas_bus_scan(struct mrsas_softc *sc)
1730 {
1731 union ccb *ccb_0;
1732 union ccb *ccb_1;
1733
1734 if ((ccb_0 = xpt_alloc_ccb()) == NULL) {
1735 return (ENOMEM);
1736 }
1737 if ((ccb_1 = xpt_alloc_ccb()) == NULL) {
1738 xpt_free_ccb(ccb_0);
1739 return (ENOMEM);
1740 }
1741 mtx_lock(&sc->sim_lock);
1742 if (xpt_create_path(&ccb_0->ccb_h.path, xpt_periph, cam_sim_path(sc->sim_0),
1743 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
1744 xpt_free_ccb(ccb_0);
1745 xpt_free_ccb(ccb_1);
1746 mtx_unlock(&sc->sim_lock);
1747 return (EIO);
1748 }
1749 if (xpt_create_path(&ccb_1->ccb_h.path, xpt_periph, cam_sim_path(sc->sim_1),
1750 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
1751 xpt_free_ccb(ccb_0);
1752 xpt_free_ccb(ccb_1);
1753 mtx_unlock(&sc->sim_lock);
1754 return (EIO);
1755 }
1756 mtx_unlock(&sc->sim_lock);
1757 xpt_rescan(ccb_0);
1758 xpt_rescan(ccb_1);
1759
1760 return (0);
1761 }
1762
1763 /*
1764 * mrsas_bus_scan_sim: Perform bus scan per SIM
1765 * input: adapter instance soft state
1766 *
1767 * This function will be called from Event handler on LD creation/deletion,
1768 * JBOD on/off.
1769 */
1770 int
mrsas_bus_scan_sim(struct mrsas_softc * sc,struct cam_sim * sim)1771 mrsas_bus_scan_sim(struct mrsas_softc *sc, struct cam_sim *sim)
1772 {
1773 union ccb *ccb;
1774
1775 if ((ccb = xpt_alloc_ccb()) == NULL) {
1776 return (ENOMEM);
1777 }
1778 mtx_lock(&sc->sim_lock);
1779 if (xpt_create_path(&ccb->ccb_h.path, xpt_periph, cam_sim_path(sim),
1780 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
1781 xpt_free_ccb(ccb);
1782 mtx_unlock(&sc->sim_lock);
1783 return (EIO);
1784 }
1785 mtx_unlock(&sc->sim_lock);
1786 xpt_rescan(ccb);
1787
1788 return (0);
1789 }
1790
1791 /*
1792 * mrsas_track_scsiio: Track IOs for a given target in the mpt_cmd_list
1793 * input: Adapter instance soft state
1794 * Target ID of target
1795 * Bus ID of the target
1796 *
1797 * This function checks for any pending IO in the whole mpt_cmd_list pool
1798 * with the bus_id and target_id passed in arguments. If some IO is found
1799 * that means target reset is not successfully completed.
1800 *
1801 * Returns FAIL if IOs pending to the target device, else return SUCCESS
1802 */
1803 static int
mrsas_track_scsiio(struct mrsas_softc * sc,target_id_t tgt_id,u_int32_t bus_id)1804 mrsas_track_scsiio(struct mrsas_softc *sc, target_id_t tgt_id, u_int32_t bus_id)
1805 {
1806 int i;
1807 struct mrsas_mpt_cmd *mpt_cmd = NULL;
1808
1809 for (i = 0 ; i < sc->max_fw_cmds; i++) {
1810 mpt_cmd = sc->mpt_cmd_list[i];
1811
1812 /*
1813 * Check if the target_id and bus_id is same as the timeout IO
1814 */
1815 if (mpt_cmd->ccb_ptr) {
1816 /* bus_id = 1 denotes a VD */
1817 if (bus_id == 1)
1818 tgt_id =
1819 (mpt_cmd->ccb_ptr->ccb_h.target_id - (MRSAS_MAX_PD - 1));
1820
1821 if (mpt_cmd->ccb_ptr->cpi.bus_id == bus_id &&
1822 mpt_cmd->ccb_ptr->ccb_h.target_id == tgt_id) {
1823 device_printf(sc->mrsas_dev,
1824 "IO commands pending to target id %d\n", tgt_id);
1825 return FAIL;
1826 }
1827 }
1828 }
1829
1830 return SUCCESS;
1831 }
1832
1833 #if TM_DEBUG
1834 /*
1835 * mrsas_tm_response_code: Prints TM response code received from FW
1836 * input: Adapter instance soft state
1837 * MPI reply returned from firmware
1838 *
1839 * Returns nothing.
1840 */
1841 static void
mrsas_tm_response_code(struct mrsas_softc * sc,MPI2_SCSI_TASK_MANAGE_REPLY * mpi_reply)1842 mrsas_tm_response_code(struct mrsas_softc *sc,
1843 MPI2_SCSI_TASK_MANAGE_REPLY *mpi_reply)
1844 {
1845 char *desc;
1846
1847 switch (mpi_reply->ResponseCode) {
1848 case MPI2_SCSITASKMGMT_RSP_TM_COMPLETE:
1849 desc = "task management request completed";
1850 break;
1851 case MPI2_SCSITASKMGMT_RSP_INVALID_FRAME:
1852 desc = "invalid frame";
1853 break;
1854 case MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED:
1855 desc = "task management request not supported";
1856 break;
1857 case MPI2_SCSITASKMGMT_RSP_TM_FAILED:
1858 desc = "task management request failed";
1859 break;
1860 case MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED:
1861 desc = "task management request succeeded";
1862 break;
1863 case MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN:
1864 desc = "invalid lun";
1865 break;
1866 case 0xA:
1867 desc = "overlapped tag attempted";
1868 break;
1869 case MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC:
1870 desc = "task queued, however not sent to target";
1871 break;
1872 default:
1873 desc = "unknown";
1874 break;
1875 }
1876 device_printf(sc->mrsas_dev, "response_code(%01x): %s\n",
1877 mpi_reply->ResponseCode, desc);
1878 device_printf(sc->mrsas_dev,
1879 "TerminationCount/DevHandle/Function/TaskType/IOCStat/IOCLoginfo\n"
1880 "0x%x/0x%x/0x%x/0x%x/0x%x/0x%x\n",
1881 mpi_reply->TerminationCount, mpi_reply->DevHandle,
1882 mpi_reply->Function, mpi_reply->TaskType,
1883 mpi_reply->IOCStatus, mpi_reply->IOCLogInfo);
1884 }
1885 #endif
1886
1887 /*
1888 * mrsas_issue_tm: Fires the TM command to FW and waits for completion
1889 * input: Adapter instance soft state
1890 * request descriptor compiled by mrsas_reset_targets
1891 *
1892 * Returns FAIL if TM command TIMEDOUT from FW else SUCCESS.
1893 */
1894 static int
mrsas_issue_tm(struct mrsas_softc * sc,MRSAS_REQUEST_DESCRIPTOR_UNION * req_desc)1895 mrsas_issue_tm(struct mrsas_softc *sc,
1896 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc)
1897 {
1898 int sleep_stat;
1899
1900 mrsas_fire_cmd(sc, req_desc->addr.u.low, req_desc->addr.u.high);
1901 sleep_stat = msleep(&sc->ocr_chan, &sc->sim_lock, PRIBIO, "tm_sleep", 50*hz);
1902
1903 if (sleep_stat == EWOULDBLOCK) {
1904 device_printf(sc->mrsas_dev, "tm cmd TIMEDOUT\n");
1905 return FAIL;
1906 }
1907
1908 return SUCCESS;
1909 }
1910
1911 /*
1912 * mrsas_reset_targets : Gathers info to fire a target reset command
1913 * input: Adapter instance soft state
1914 *
1915 * This function compiles data for a target reset command to be fired to the FW
1916 * and then traverse the target_reset_pool to see targets with TIMEDOUT IOs.
1917 *
1918 * Returns SUCCESS or FAIL
1919 */
mrsas_reset_targets(struct mrsas_softc * sc)1920 int mrsas_reset_targets(struct mrsas_softc *sc)
1921 {
1922 struct mrsas_mpt_cmd *tm_mpt_cmd = NULL;
1923 struct mrsas_mpt_cmd *tgt_mpt_cmd = NULL;
1924 MR_TASK_MANAGE_REQUEST *mr_request;
1925 MPI2_SCSI_TASK_MANAGE_REQUEST *tm_mpi_request;
1926 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc;
1927 int retCode = FAIL, count, i, outstanding;
1928 u_int32_t MSIxIndex, bus_id;
1929 target_id_t tgt_id;
1930 #if TM_DEBUG
1931 MPI2_SCSI_TASK_MANAGE_REPLY *mpi_reply;
1932 #endif
1933
1934 outstanding = mrsas_atomic_read(&sc->fw_outstanding);
1935
1936 if (!outstanding) {
1937 device_printf(sc->mrsas_dev, "NO IOs pending...\n");
1938 mrsas_atomic_set(&sc->target_reset_outstanding, 0);
1939 retCode = SUCCESS;
1940 goto return_status;
1941 } else if (sc->adprecovery != MRSAS_HBA_OPERATIONAL) {
1942 device_printf(sc->mrsas_dev, "Controller is not operational\n");
1943 goto return_status;
1944 } else {
1945 /* Some more error checks will be added in future */
1946 }
1947
1948 /* Get an mpt frame and an index to fire the TM cmd */
1949 tm_mpt_cmd = mrsas_get_mpt_cmd(sc);
1950 if (!tm_mpt_cmd) {
1951 retCode = FAIL;
1952 goto return_status;
1953 }
1954
1955 req_desc = mrsas_get_request_desc(sc, (tm_mpt_cmd->index) - 1);
1956 if (!req_desc) {
1957 device_printf(sc->mrsas_dev, "Cannot get request_descriptor for tm.\n");
1958 retCode = FAIL;
1959 goto release_mpt;
1960 }
1961 memset(req_desc, 0, sizeof(MRSAS_REQUEST_DESCRIPTOR_UNION));
1962
1963 req_desc->HighPriority.SMID = tm_mpt_cmd->index;
1964 req_desc->HighPriority.RequestFlags =
1965 (MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY <<
1966 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1967 req_desc->HighPriority.MSIxIndex = 0;
1968 req_desc->HighPriority.LMID = 0;
1969 req_desc->HighPriority.Reserved1 = 0;
1970 tm_mpt_cmd->request_desc = req_desc;
1971
1972 mr_request = (MR_TASK_MANAGE_REQUEST *) tm_mpt_cmd->io_request;
1973 memset(mr_request, 0, sizeof(MR_TASK_MANAGE_REQUEST));
1974
1975 tm_mpi_request = (MPI2_SCSI_TASK_MANAGE_REQUEST *) &mr_request->TmRequest;
1976 tm_mpi_request->Function = MPI2_FUNCTION_SCSI_TASK_MGMT;
1977 tm_mpi_request->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET;
1978 tm_mpi_request->TaskMID = 0; /* smid task */
1979 tm_mpi_request->LUN[1] = 0;
1980
1981 /* Traverse the tm_mpt pool to get valid entries */
1982 for (i = 0 ; i < MRSAS_MAX_TM_TARGETS; i++) {
1983 if(!sc->target_reset_pool[i]) {
1984 continue;
1985 } else {
1986 tgt_mpt_cmd = sc->target_reset_pool[i];
1987 }
1988
1989 tgt_id = i;
1990
1991 /* See if the target is tm capable or NOT */
1992 if (!tgt_mpt_cmd->tmCapable) {
1993 device_printf(sc->mrsas_dev, "Task management NOT SUPPORTED for "
1994 "CAM target:%d\n", tgt_id);
1995
1996 retCode = FAIL;
1997 goto release_mpt;
1998 }
1999
2000 tm_mpi_request->DevHandle = tgt_mpt_cmd->io_request->DevHandle;
2001
2002 if (i < (MRSAS_MAX_PD - 1)) {
2003 mr_request->uTmReqReply.tmReqFlags.isTMForPD = 1;
2004 bus_id = 0;
2005 } else {
2006 mr_request->uTmReqReply.tmReqFlags.isTMForLD = 1;
2007 bus_id = 1;
2008 }
2009
2010 device_printf(sc->mrsas_dev, "TM will be fired for "
2011 "CAM target:%d and bus_id %d\n", tgt_id, bus_id);
2012
2013 sc->ocr_chan = (void *)&tm_mpt_cmd;
2014 retCode = mrsas_issue_tm(sc, req_desc);
2015 if (retCode == FAIL)
2016 goto release_mpt;
2017
2018 #if TM_DEBUG
2019 mpi_reply =
2020 (MPI2_SCSI_TASK_MANAGE_REPLY *) &mr_request->uTmReqReply.TMReply;
2021 mrsas_tm_response_code(sc, mpi_reply);
2022 #endif
2023 mrsas_atomic_dec(&sc->target_reset_outstanding);
2024 sc->target_reset_pool[i] = NULL;
2025
2026 /* Check for pending cmds in the mpt_cmd_pool with the tgt_id */
2027 mrsas_disable_intr(sc);
2028 /* Wait for 1 second to complete parallel ISR calling same
2029 * mrsas_complete_cmd()
2030 */
2031 msleep(&sc->ocr_chan, &sc->sim_lock, PRIBIO, "mrsas_reset_wakeup",
2032 1 * hz);
2033 count = sc->msix_vectors > 0 ? sc->msix_vectors : 1;
2034 mtx_unlock(&sc->sim_lock);
2035 for (MSIxIndex = 0; MSIxIndex < count; MSIxIndex++)
2036 mrsas_complete_cmd(sc, MSIxIndex);
2037 mtx_lock(&sc->sim_lock);
2038 retCode = mrsas_track_scsiio(sc, tgt_id, bus_id);
2039 mrsas_enable_intr(sc);
2040
2041 if (retCode == FAIL)
2042 goto release_mpt;
2043 }
2044
2045 device_printf(sc->mrsas_dev, "Number of targets outstanding "
2046 "after reset: %d\n", mrsas_atomic_read(&sc->target_reset_outstanding));
2047
2048 release_mpt:
2049 mrsas_release_mpt_cmd(tm_mpt_cmd);
2050 return_status:
2051 device_printf(sc->mrsas_dev, "target reset %s!!\n",
2052 (retCode == SUCCESS) ? "SUCCESS" : "FAIL");
2053
2054 return retCode;
2055 }
2056