1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2009 Yahoo! Inc.
5 * Copyright (c) 2011-2015 LSI Corp.
6 * Copyright (c) 2013-2015 Avago Technologies
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31 */
32
33 #include <sys/cdefs.h>
34 /* Communications core for Avago Technologies (LSI) MPT2 */
35
36 /* TODO Move headers to mpsvar */
37 #include <sys/types.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/selinfo.h>
42 #include <sys/lock.h>
43 #include <sys/mutex.h>
44 #include <sys/module.h>
45 #include <sys/bus.h>
46 #include <sys/conf.h>
47 #include <sys/bio.h>
48 #include <sys/malloc.h>
49 #include <sys/uio.h>
50 #include <sys/sysctl.h>
51 #include <sys/smp.h>
52 #include <sys/queue.h>
53 #include <sys/kthread.h>
54 #include <sys/taskqueue.h>
55 #include <sys/endian.h>
56 #include <sys/eventhandler.h>
57 #include <sys/sbuf.h>
58 #include <sys/priv.h>
59
60 #include <machine/bus.h>
61 #include <machine/resource.h>
62 #include <sys/rman.h>
63 #include <sys/proc.h>
64
65 #include <dev/pci/pcivar.h>
66
67 #include <cam/cam.h>
68 #include <cam/scsi/scsi_all.h>
69
70 #include <dev/mps/mpi/mpi2_type.h>
71 #include <dev/mps/mpi/mpi2.h>
72 #include <dev/mps/mpi/mpi2_ioc.h>
73 #include <dev/mps/mpi/mpi2_sas.h>
74 #include <dev/mps/mpi/mpi2_cnfg.h>
75 #include <dev/mps/mpi/mpi2_init.h>
76 #include <dev/mps/mpi/mpi2_tool.h>
77 #include <dev/mps/mps_ioctl.h>
78 #include <dev/mps/mpsvar.h>
79 #include <dev/mps/mps_table.h>
80
81 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag);
82 static int mps_init_queues(struct mps_softc *sc);
83 static void mps_resize_queues(struct mps_softc *sc);
84 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag);
85 static int mps_transition_operational(struct mps_softc *sc);
86 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching);
87 static void mps_iocfacts_free(struct mps_softc *sc);
88 static void mps_startup(void *arg);
89 static int mps_send_iocinit(struct mps_softc *sc);
90 static int mps_alloc_queues(struct mps_softc *sc);
91 static int mps_alloc_hw_queues(struct mps_softc *sc);
92 static int mps_alloc_replies(struct mps_softc *sc);
93 static int mps_alloc_requests(struct mps_softc *sc);
94 static int mps_attach_log(struct mps_softc *sc);
95 static __inline void mps_complete_command(struct mps_softc *sc,
96 struct mps_command *cm);
97 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
98 MPI2_EVENT_NOTIFICATION_REPLY *reply);
99 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm);
100 static void mps_periodic(void *);
101 static int mps_reregister_events(struct mps_softc *sc);
102 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm);
103 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts);
104 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag);
105 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS);
106 static int mps_dump_reqs(SYSCTL_HANDLER_ARGS);
107 static void mps_parse_debug(struct mps_softc *sc, char *list);
108
109 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
110 "MPS Driver Parameters");
111
112 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory");
113 MALLOC_DECLARE(M_MPSUSER);
114
115 /*
116 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
117 * any state and back to its initialization state machine.
118 */
119 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
120
121 /* Added this union to smoothly convert le64toh cm->cm_desc.Words.
122 * Compiler only support unint64_t to be passed as argument.
123 * Otherwise it will throw below error
124 * "aggregate value used where an integer was expected"
125 */
126
127 typedef union {
128 u64 word;
129 struct {
130 u32 low;
131 u32 high;
132 } u;
133 } request_descriptor_t;
134
135 /* Rate limit chain-fail messages to 1 per minute */
136 static struct timeval mps_chainfail_interval = { 60, 0 };
137
138 /*
139 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
140 * If this function is called from process context, it can sleep
141 * and there is no harm to sleep, in case if this fuction is called
142 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
143 * based on sleep flags driver will call either msleep, pause or DELAY.
144 * msleep and pause are of same variant, but pause is used when mps_mtx
145 * is not hold by driver.
146 *
147 */
148 static int
mps_diag_reset(struct mps_softc * sc,int sleep_flag)149 mps_diag_reset(struct mps_softc *sc,int sleep_flag)
150 {
151 uint32_t reg;
152 int i, error, tries = 0;
153 uint8_t first_wait_done = FALSE;
154
155 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
156
157 /* Clear any pending interrupts */
158 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
159
160 /*
161 * Force NO_SLEEP for threads prohibited to sleep
162 * e.a Thread from interrupt handler are prohibited to sleep.
163 */
164 if (curthread->td_no_sleeping != 0)
165 sleep_flag = NO_SLEEP;
166
167 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag);
168
169 /* Push the magic sequence */
170 error = ETIMEDOUT;
171 while (tries++ < 20) {
172 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
173 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
174 mpt2_reset_magic[i]);
175 /* wait 100 msec */
176 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
177 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
178 "mpsdiag", hz/10);
179 else if (sleep_flag == CAN_SLEEP)
180 pause("mpsdiag", hz/10);
181 else
182 DELAY(100 * 1000);
183
184 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
185 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
186 error = 0;
187 break;
188 }
189 }
190 if (error) {
191 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n",
192 error);
193 return (error);
194 }
195
196 /* Send the actual reset. XXX need to refresh the reg? */
197 reg |= MPI2_DIAG_RESET_ADAPTER;
198 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n",
199 reg);
200 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg);
201
202 /* Wait up to 300 seconds in 50ms intervals */
203 error = ETIMEDOUT;
204 for (i = 0; i < 6000; i++) {
205 /*
206 * Wait 50 msec. If this is the first time through, wait 256
207 * msec to satisfy Diag Reset timing requirements.
208 */
209 if (first_wait_done) {
210 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
211 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
212 "mpsdiag", hz/20);
213 else if (sleep_flag == CAN_SLEEP)
214 pause("mpsdiag", hz/20);
215 else
216 DELAY(50 * 1000);
217 } else {
218 DELAY(256 * 1000);
219 first_wait_done = TRUE;
220 }
221 /*
222 * Check for the RESET_ADAPTER bit to be cleared first, then
223 * wait for the RESET state to be cleared, which takes a little
224 * longer.
225 */
226 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
227 if (reg & MPI2_DIAG_RESET_ADAPTER) {
228 continue;
229 }
230 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
231 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
232 error = 0;
233 break;
234 }
235 }
236 if (error) {
237 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n",
238 error);
239 return (error);
240 }
241
242 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
243 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n");
244
245 return (0);
246 }
247
248 static int
mps_message_unit_reset(struct mps_softc * sc,int sleep_flag)249 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag)
250 {
251 int error;
252
253 MPS_FUNCTRACE(sc);
254
255 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
256
257 error = 0;
258 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
259 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
260 MPI2_DOORBELL_FUNCTION_SHIFT);
261
262 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) {
263 mps_dprint(sc, MPS_INIT|MPS_FAULT,
264 "Doorbell handshake failed\n");
265 error = ETIMEDOUT;
266 }
267
268 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
269 return (error);
270 }
271
272 static int
mps_transition_ready(struct mps_softc * sc)273 mps_transition_ready(struct mps_softc *sc)
274 {
275 uint32_t reg, state;
276 int error, tries = 0;
277 int sleep_flags;
278
279 MPS_FUNCTRACE(sc);
280 /* If we are in attach call, do not sleep */
281 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE)
282 ? CAN_SLEEP:NO_SLEEP;
283 error = 0;
284
285 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n",
286 __func__, sleep_flags);
287
288 while (tries++ < 1200) {
289 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
290 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg);
291
292 /*
293 * Ensure the IOC is ready to talk. If it's not, try
294 * resetting it.
295 */
296 if (reg & MPI2_DOORBELL_USED) {
297 mps_dprint(sc, MPS_INIT, " Not ready, sending diag "
298 "reset\n");
299 mps_diag_reset(sc, sleep_flags);
300 DELAY(50000);
301 continue;
302 }
303
304 /* Is the adapter owned by another peer? */
305 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
306 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
307 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the "
308 "control of another peer host, aborting "
309 "initialization.\n");
310 error = ENXIO;
311 break;
312 }
313
314 state = reg & MPI2_IOC_STATE_MASK;
315 if (state == MPI2_IOC_STATE_READY) {
316 /* Ready to go! */
317 error = 0;
318 break;
319 } else if (state == MPI2_IOC_STATE_FAULT) {
320 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault "
321 "state 0x%x, resetting\n",
322 state & MPI2_DOORBELL_FAULT_CODE_MASK);
323 mps_diag_reset(sc, sleep_flags);
324 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
325 /* Need to take ownership */
326 mps_message_unit_reset(sc, sleep_flags);
327 } else if (state == MPI2_IOC_STATE_RESET) {
328 /* Wait a bit, IOC might be in transition */
329 mps_dprint(sc, MPS_INIT|MPS_FAULT,
330 "IOC in unexpected reset state\n");
331 } else {
332 mps_dprint(sc, MPS_INIT|MPS_FAULT,
333 "IOC in unknown state 0x%x\n", state);
334 error = EINVAL;
335 break;
336 }
337
338 /* Wait 50ms for things to settle down. */
339 DELAY(50000);
340 }
341
342 if (error)
343 mps_dprint(sc, MPS_INIT|MPS_FAULT,
344 "Cannot transition IOC to ready\n");
345 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
346
347 return (error);
348 }
349
350 static int
mps_transition_operational(struct mps_softc * sc)351 mps_transition_operational(struct mps_softc *sc)
352 {
353 uint32_t reg, state;
354 int error;
355
356 MPS_FUNCTRACE(sc);
357
358 error = 0;
359 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
360 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg);
361
362 state = reg & MPI2_IOC_STATE_MASK;
363 if (state != MPI2_IOC_STATE_READY) {
364 mps_dprint(sc, MPS_INIT, "IOC not ready\n");
365 if ((error = mps_transition_ready(sc)) != 0) {
366 mps_dprint(sc, MPS_INIT|MPS_FAULT,
367 "failed to transition ready, exit\n");
368 return (error);
369 }
370 }
371
372 error = mps_send_iocinit(sc);
373 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
374
375 return (error);
376 }
377
378 static void
mps_resize_queues(struct mps_softc * sc)379 mps_resize_queues(struct mps_softc *sc)
380 {
381 u_int reqcr, prireqcr, maxio, sges_per_frame;
382
383 /*
384 * Size the queues. Since the reply queues always need one free
385 * entry, we'll deduct one reply message here. The LSI documents
386 * suggest instead to add a count to the request queue, but I think
387 * that it's better to deduct from reply queue.
388 */
389 prireqcr = MAX(1, sc->max_prireqframes);
390 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit);
391
392 reqcr = MAX(2, sc->max_reqframes);
393 reqcr = MIN(reqcr, sc->facts->RequestCredit);
394
395 sc->num_reqs = prireqcr + reqcr;
396 sc->num_prireqs = prireqcr;
397 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes,
398 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
399
400 /* Store the request frame size in bytes rather than as 32bit words */
401 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4;
402
403 /*
404 * Max IO Size is Page Size * the following:
405 * ((SGEs per frame - 1 for chain element) * Max Chain Depth)
406 * + 1 for no chain needed in last frame
407 *
408 * If user suggests a Max IO size to use, use the smaller of the
409 * user's value and the calculated value as long as the user's
410 * value is larger than 0. The user's value is in pages.
411 */
412 sges_per_frame = sc->reqframesz / sizeof(MPI2_SGE_SIMPLE64) - 1;
413 maxio = (sges_per_frame * sc->facts->MaxChainDepth + 1) * PAGE_SIZE;
414
415 /*
416 * If I/O size limitation requested, then use it and pass up to CAM.
417 * If not, use maxphys as an optimization hint, but report HW limit.
418 */
419 if (sc->max_io_pages > 0) {
420 maxio = min(maxio, sc->max_io_pages * PAGE_SIZE);
421 sc->maxio = maxio;
422 } else {
423 sc->maxio = maxio;
424 maxio = min(maxio, maxphys);
425 }
426
427 sc->num_chains = (maxio / PAGE_SIZE + sges_per_frame - 2) /
428 sges_per_frame * reqcr;
429 if (sc->max_chains > 0 && sc->max_chains < sc->num_chains)
430 sc->num_chains = sc->max_chains;
431
432 /*
433 * Figure out the number of MSIx-based queues. If the firmware or
434 * user has done something crazy and not allowed enough credit for
435 * the queues to be useful then don't enable multi-queue.
436 */
437 if (sc->facts->MaxMSIxVectors < 2)
438 sc->msi_msgs = 1;
439
440 if (sc->msi_msgs > 1) {
441 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus);
442 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors);
443 if (sc->num_reqs / sc->msi_msgs < 2)
444 sc->msi_msgs = 1;
445 }
446
447 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n",
448 sc->msi_msgs, sc->num_reqs, sc->num_replies);
449 }
450
451 /*
452 * This is called during attach and when re-initializing due to a Diag Reset.
453 * IOC Facts is used to allocate many of the structures needed by the driver.
454 * If called from attach, de-allocation is not required because the driver has
455 * not allocated any structures yet, but if called from a Diag Reset, previously
456 * allocated structures based on IOC Facts will need to be freed and re-
457 * allocated bases on the latest IOC Facts.
458 */
459 static int
mps_iocfacts_allocate(struct mps_softc * sc,uint8_t attaching)460 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching)
461 {
462 int error;
463 Mpi2IOCFactsReply_t saved_facts;
464 uint8_t saved_mode, reallocating;
465
466 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__);
467
468 /* Save old IOC Facts and then only reallocate if Facts have changed */
469 if (!attaching) {
470 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
471 }
472
473 /*
474 * Get IOC Facts. In all cases throughout this function, panic if doing
475 * a re-initialization and only return the error if attaching so the OS
476 * can handle it.
477 */
478 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) {
479 if (attaching) {
480 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get "
481 "IOC Facts with error %d, exit\n", error);
482 return (error);
483 } else {
484 panic("%s failed to get IOC Facts with error %d\n",
485 __func__, error);
486 }
487 }
488
489 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts);
490
491 snprintf(sc->fw_version, sizeof(sc->fw_version),
492 "%02d.%02d.%02d.%02d",
493 sc->facts->FWVersion.Struct.Major,
494 sc->facts->FWVersion.Struct.Minor,
495 sc->facts->FWVersion.Struct.Unit,
496 sc->facts->FWVersion.Struct.Dev);
497
498 snprintf(sc->msg_version, sizeof(sc->msg_version), "%d.%d",
499 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK) >>
500 MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT,
501 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MINOR_MASK) >>
502 MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT);
503
504 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version,
505 MPS_DRIVER_VERSION);
506 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n",
507 sc->facts->IOCCapabilities,
508 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
509 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
510 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
511
512 /*
513 * If the chip doesn't support event replay then a hard reset will be
514 * required to trigger a full discovery. Do the reset here then
515 * retransition to Ready. A hard reset might have already been done,
516 * but it doesn't hurt to do it again. Only do this if attaching, not
517 * for a Diag Reset.
518 */
519 if (attaching && ((sc->facts->IOCCapabilities &
520 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) {
521 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n");
522 mps_diag_reset(sc, NO_SLEEP);
523 if ((error = mps_transition_ready(sc)) != 0) {
524 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to "
525 "transition to ready with error %d, exit\n",
526 error);
527 return (error);
528 }
529 }
530
531 /*
532 * Set flag if IR Firmware is loaded. If the RAID Capability has
533 * changed from the previous IOC Facts, log a warning, but only if
534 * checking this after a Diag Reset and not during attach.
535 */
536 saved_mode = sc->ir_firmware;
537 if (sc->facts->IOCCapabilities &
538 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
539 sc->ir_firmware = 1;
540 if (!attaching) {
541 if (sc->ir_firmware != saved_mode) {
542 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode "
543 "in IOC Facts does not match previous mode\n");
544 }
545 }
546
547 /* Only deallocate and reallocate if relevant IOC Facts have changed */
548 reallocating = FALSE;
549 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED;
550
551 if ((!attaching) &&
552 ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
553 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
554 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
555 (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
556 (saved_facts.ProductID != sc->facts->ProductID) ||
557 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
558 (saved_facts.IOCRequestFrameSize !=
559 sc->facts->IOCRequestFrameSize) ||
560 (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
561 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
562 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
563 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
564 (saved_facts.MaxReplyDescriptorPostQueueDepth !=
565 sc->facts->MaxReplyDescriptorPostQueueDepth) ||
566 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
567 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
568 (saved_facts.MaxPersistentEntries !=
569 sc->facts->MaxPersistentEntries))) {
570 reallocating = TRUE;
571
572 /* Record that we reallocated everything */
573 sc->mps_flags |= MPS_FLAGS_REALLOCATED;
574 }
575
576 /*
577 * Some things should be done if attaching or re-allocating after a Diag
578 * Reset, but are not needed after a Diag Reset if the FW has not
579 * changed.
580 */
581 if (attaching || reallocating) {
582 /*
583 * Check if controller supports FW diag buffers and set flag to
584 * enable each type.
585 */
586 if (sc->facts->IOCCapabilities &
587 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
588 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
589 enabled = TRUE;
590 if (sc->facts->IOCCapabilities &
591 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
592 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
593 enabled = TRUE;
594 if (sc->facts->IOCCapabilities &
595 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
596 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
597 enabled = TRUE;
598
599 /*
600 * Set flag if EEDP is supported and if TLR is supported.
601 */
602 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
603 sc->eedp_enabled = TRUE;
604 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
605 sc->control_TLR = TRUE;
606
607 mps_resize_queues(sc);
608
609 /*
610 * Initialize all Tail Queues
611 */
612 TAILQ_INIT(&sc->req_list);
613 TAILQ_INIT(&sc->high_priority_req_list);
614 TAILQ_INIT(&sc->chain_list);
615 TAILQ_INIT(&sc->tm_list);
616 }
617
618 /*
619 * If doing a Diag Reset and the FW is significantly different
620 * (reallocating will be set above in IOC Facts comparison), then all
621 * buffers based on the IOC Facts will need to be freed before they are
622 * reallocated.
623 */
624 if (reallocating) {
625 mps_iocfacts_free(sc);
626 mpssas_realloc_targets(sc, saved_facts.MaxTargets +
627 saved_facts.MaxVolumes);
628 }
629
630 /*
631 * Any deallocation has been completed. Now start reallocating
632 * if needed. Will only need to reallocate if attaching or if the new
633 * IOC Facts are different from the previous IOC Facts after a Diag
634 * Reset. Targets have already been allocated above if needed.
635 */
636 error = 0;
637 while (attaching || reallocating) {
638 if ((error = mps_alloc_hw_queues(sc)) != 0)
639 break;
640 if ((error = mps_alloc_replies(sc)) != 0)
641 break;
642 if ((error = mps_alloc_requests(sc)) != 0)
643 break;
644 if ((error = mps_alloc_queues(sc)) != 0)
645 break;
646
647 break;
648 }
649 if (error) {
650 mps_dprint(sc, MPS_INIT|MPS_FAULT,
651 "Failed to alloc queues with error %d\n", error);
652 mps_free(sc);
653 return (error);
654 }
655
656 /* Always initialize the queues */
657 bzero(sc->free_queue, sc->fqdepth * 4);
658 mps_init_queues(sc);
659
660 /*
661 * Always get the chip out of the reset state, but only panic if not
662 * attaching. If attaching and there is an error, that is handled by
663 * the OS.
664 */
665 error = mps_transition_operational(sc);
666 if (error != 0) {
667 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to "
668 "transition to operational with error %d\n", error);
669 mps_free(sc);
670 return (error);
671 }
672
673 /*
674 * Finish the queue initialization.
675 * These are set here instead of in mps_init_queues() because the
676 * IOC resets these values during the state transition in
677 * mps_transition_operational(). The free index is set to 1
678 * because the corresponding index in the IOC is set to 0, and the
679 * IOC treats the queues as full if both are set to the same value.
680 * Hence the reason that the queue can't hold all of the possible
681 * replies.
682 */
683 sc->replypostindex = 0;
684 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
685 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
686
687 /*
688 * Attach the subsystems so they can prepare their event masks.
689 * XXX Should be dynamic so that IM/IR and user modules can attach
690 */
691 error = 0;
692 while (attaching) {
693 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n");
694 if ((error = mps_attach_log(sc)) != 0)
695 break;
696 if ((error = mps_attach_sas(sc)) != 0)
697 break;
698 if ((error = mps_attach_user(sc)) != 0)
699 break;
700 break;
701 }
702 if (error) {
703 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all "
704 "subsystems: error %d\n", error);
705 mps_free(sc);
706 return (error);
707 }
708
709 /*
710 * XXX If the number of MSI-X vectors changes during re-init, this
711 * won't see it and adjust.
712 */
713 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) {
714 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup "
715 "interrupts\n");
716 mps_free(sc);
717 return (error);
718 }
719
720 /*
721 * Set flag if this is a WD controller. This shouldn't ever change, but
722 * reset it after a Diag Reset, just in case.
723 */
724 sc->WD_available = FALSE;
725 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200)
726 sc->WD_available = TRUE;
727
728 return (error);
729 }
730
731 /*
732 * This is called if memory is being free (during detach for example) and when
733 * buffers need to be reallocated due to a Diag Reset.
734 */
735 static void
mps_iocfacts_free(struct mps_softc * sc)736 mps_iocfacts_free(struct mps_softc *sc)
737 {
738 struct mps_command *cm;
739 int i;
740
741 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
742
743 if (sc->free_busaddr != 0)
744 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
745 if (sc->free_queue != NULL)
746 bus_dmamem_free(sc->queues_dmat, sc->free_queue,
747 sc->queues_map);
748 if (sc->queues_dmat != NULL)
749 bus_dma_tag_destroy(sc->queues_dmat);
750
751 if (sc->chain_frames != NULL) {
752 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
753 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
754 sc->chain_map);
755 }
756 if (sc->chain_dmat != NULL)
757 bus_dma_tag_destroy(sc->chain_dmat);
758
759 if (sc->sense_busaddr != 0)
760 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
761 if (sc->sense_frames != NULL)
762 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
763 sc->sense_map);
764 if (sc->sense_dmat != NULL)
765 bus_dma_tag_destroy(sc->sense_dmat);
766
767 if (sc->reply_busaddr != 0)
768 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
769 if (sc->reply_frames != NULL)
770 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
771 sc->reply_map);
772 if (sc->reply_dmat != NULL)
773 bus_dma_tag_destroy(sc->reply_dmat);
774
775 if (sc->req_busaddr != 0)
776 bus_dmamap_unload(sc->req_dmat, sc->req_map);
777 if (sc->req_frames != NULL)
778 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
779 if (sc->req_dmat != NULL)
780 bus_dma_tag_destroy(sc->req_dmat);
781
782 if (sc->chains != NULL)
783 free(sc->chains, M_MPT2);
784 if (sc->commands != NULL) {
785 for (i = 1; i < sc->num_reqs; i++) {
786 cm = &sc->commands[i];
787 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
788 }
789 free(sc->commands, M_MPT2);
790 }
791 if (sc->buffer_dmat != NULL)
792 bus_dma_tag_destroy(sc->buffer_dmat);
793
794 mps_pci_free_interrupts(sc);
795 free(sc->queues, M_MPT2);
796 sc->queues = NULL;
797 }
798
799 /*
800 * The terms diag reset and hard reset are used interchangeably in the MPI
801 * docs to mean resetting the controller chip. In this code diag reset
802 * cleans everything up, and the hard reset function just sends the reset
803 * sequence to the chip. This should probably be refactored so that every
804 * subsystem gets a reset notification of some sort, and can clean up
805 * appropriately.
806 */
807 int
mps_reinit(struct mps_softc * sc)808 mps_reinit(struct mps_softc *sc)
809 {
810 int error;
811 struct mpssas_softc *sassc;
812
813 sassc = sc->sassc;
814
815 MPS_FUNCTRACE(sc);
816
817 mtx_assert(&sc->mps_mtx, MA_OWNED);
818
819 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n");
820 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) {
821 mps_dprint(sc, MPS_INIT, "Reset already in progress\n");
822 return 0;
823 }
824
825 /* make sure the completion callbacks can recognize they're getting
826 * a NULL cm_reply due to a reset.
827 */
828 sc->mps_flags |= MPS_FLAGS_DIAGRESET;
829
830 /*
831 * Mask interrupts here.
832 */
833 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n");
834 mps_mask_intr(sc);
835
836 error = mps_diag_reset(sc, CAN_SLEEP);
837 if (error != 0) {
838 /* XXXSL No need to panic here */
839 panic("%s hard reset failed with error %d\n",
840 __func__, error);
841 }
842
843 /* Restore the PCI state, including the MSI-X registers */
844 mps_pci_restore(sc);
845
846 /* Give the I/O subsystem special priority to get itself prepared */
847 mpssas_handle_reinit(sc);
848
849 /*
850 * Get IOC Facts and allocate all structures based on this information.
851 * The attach function will also call mps_iocfacts_allocate at startup.
852 * If relevant values have changed in IOC Facts, this function will free
853 * all of the memory based on IOC Facts and reallocate that memory.
854 */
855 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) {
856 panic("%s IOC Facts based allocation failed with error %d\n",
857 __func__, error);
858 }
859
860 /*
861 * Mapping structures will be re-allocated after getting IOC Page8, so
862 * free these structures here.
863 */
864 mps_mapping_exit(sc);
865
866 /*
867 * The static page function currently read is IOC Page8. Others can be
868 * added in future. It's possible that the values in IOC Page8 have
869 * changed after a Diag Reset due to user modification, so always read
870 * these. Interrupts are masked, so unmask them before getting config
871 * pages.
872 */
873 mps_unmask_intr(sc);
874 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET;
875 mps_base_static_config_pages(sc);
876
877 /*
878 * Some mapping info is based in IOC Page8 data, so re-initialize the
879 * mapping tables.
880 */
881 mps_mapping_initialize(sc);
882
883 /*
884 * Restart will reload the event masks clobbered by the reset, and
885 * then enable the port.
886 */
887 mps_reregister_events(sc);
888
889 /* the end of discovery will release the simq, so we're done. */
890 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n",
891 sc, sc->replypostindex, sc->replyfreeindex);
892
893 mpssas_release_simq_reinit(sassc);
894 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
895
896 return 0;
897 }
898
899 /* Wait for the chip to ACK a word that we've put into its FIFO
900 * Wait for <timeout> seconds. In single loop wait for busy loop
901 * for 500 microseconds.
902 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
903 * */
904 static int
mps_wait_db_ack(struct mps_softc * sc,int timeout,int sleep_flag)905 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag)
906 {
907
908 u32 cntdn, count;
909 u32 int_status;
910 u32 doorbell;
911
912 count = 0;
913 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
914 do {
915 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
916 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
917 mps_dprint(sc, MPS_TRACE,
918 "%s: successful count(%d), timeout(%d)\n",
919 __func__, count, timeout);
920 return 0;
921 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
922 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET);
923 if ((doorbell & MPI2_IOC_STATE_MASK) ==
924 MPI2_IOC_STATE_FAULT) {
925 mps_dprint(sc, MPS_FAULT,
926 "fault_state(0x%04x)!\n", doorbell);
927 return (EFAULT);
928 }
929 } else if (int_status == 0xFFFFFFFF)
930 goto out;
931
932 /* If it can sleep, sleep for 1 milisecond, else busy loop for
933 * 0.5 milisecond */
934 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
935 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
936 "mpsdba", hz/1000);
937 else if (sleep_flag == CAN_SLEEP)
938 pause("mpsdba", hz/1000);
939 else
940 DELAY(500);
941 count++;
942 } while (--cntdn);
943
944 out:
945 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), "
946 "int_status(%x)!\n", __func__, count, int_status);
947 return (ETIMEDOUT);
948
949 }
950
951 /* Wait for the chip to signal that the next word in its FIFO can be fetched */
952 static int
mps_wait_db_int(struct mps_softc * sc)953 mps_wait_db_int(struct mps_softc *sc)
954 {
955 int retry;
956
957 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
958 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
959 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
960 return (0);
961 DELAY(2000);
962 }
963 return (ETIMEDOUT);
964 }
965
966 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */
967 static int
mps_request_sync(struct mps_softc * sc,void * req,MPI2_DEFAULT_REPLY * reply,int req_sz,int reply_sz,int timeout)968 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
969 int req_sz, int reply_sz, int timeout)
970 {
971 uint32_t *data32;
972 uint16_t *data16;
973 int i, count, ioc_sz, residual;
974 int sleep_flags = CAN_SLEEP;
975
976 if (curthread->td_no_sleeping != 0)
977 sleep_flags = NO_SLEEP;
978
979 /* Step 1 */
980 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
981
982 /* Step 2 */
983 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
984 return (EBUSY);
985
986 /* Step 3
987 * Announce that a message is coming through the doorbell. Messages
988 * are pushed at 32bit words, so round up if needed.
989 */
990 count = (req_sz + 3) / 4;
991 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
992 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
993 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
994
995 /* Step 4 */
996 if (mps_wait_db_int(sc) ||
997 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
998 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n");
999 return (ENXIO);
1000 }
1001 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1002 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
1003 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n");
1004 return (ENXIO);
1005 }
1006
1007 /* Step 5 */
1008 /* Clock out the message data synchronously in 32-bit dwords*/
1009 data32 = (uint32_t *)req;
1010 for (i = 0; i < count; i++) {
1011 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
1012 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
1013 mps_dprint(sc, MPS_FAULT,
1014 "Timeout while writing doorbell\n");
1015 return (ENXIO);
1016 }
1017 }
1018
1019 /* Step 6 */
1020 /* Clock in the reply in 16-bit words. The total length of the
1021 * message is always in the 4th byte, so clock out the first 2 words
1022 * manually, then loop the rest.
1023 */
1024 data16 = (uint16_t *)reply;
1025 if (mps_wait_db_int(sc) != 0) {
1026 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n");
1027 return (ENXIO);
1028 }
1029 data16[0] =
1030 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
1031 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1032 if (mps_wait_db_int(sc) != 0) {
1033 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n");
1034 return (ENXIO);
1035 }
1036 data16[1] =
1037 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
1038 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1039
1040 /* Number of 32bit words in the message */
1041 ioc_sz = reply->MsgLength;
1042
1043 /*
1044 * Figure out how many 16bit words to clock in without overrunning.
1045 * The precision loss with dividing reply_sz can safely be
1046 * ignored because the messages can only be multiples of 32bits.
1047 */
1048 residual = 0;
1049 count = MIN((reply_sz / 4), ioc_sz) * 2;
1050 if (count < ioc_sz * 2) {
1051 residual = ioc_sz * 2 - count;
1052 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d "
1053 "residual message words\n", residual);
1054 }
1055
1056 for (i = 2; i < count; i++) {
1057 if (mps_wait_db_int(sc) != 0) {
1058 mps_dprint(sc, MPS_FAULT,
1059 "Timeout reading doorbell %d\n", i);
1060 return (ENXIO);
1061 }
1062 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) &
1063 MPI2_DOORBELL_DATA_MASK;
1064 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1065 }
1066
1067 /*
1068 * Pull out residual words that won't fit into the provided buffer.
1069 * This keeps the chip from hanging due to a driver programming
1070 * error.
1071 */
1072 while (residual--) {
1073 if (mps_wait_db_int(sc) != 0) {
1074 mps_dprint(sc, MPS_FAULT,
1075 "Timeout reading doorbell\n");
1076 return (ENXIO);
1077 }
1078 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET);
1079 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1080 }
1081
1082 /* Step 7 */
1083 if (mps_wait_db_int(sc) != 0) {
1084 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n");
1085 return (ENXIO);
1086 }
1087 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
1088 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n");
1089 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1090
1091 return (0);
1092 }
1093
1094 static void
mps_enqueue_request(struct mps_softc * sc,struct mps_command * cm)1095 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm)
1096 {
1097 request_descriptor_t rd;
1098 MPS_FUNCTRACE(sc);
1099 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n",
1100 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
1101
1102 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN))
1103 mtx_assert(&sc->mps_mtx, MA_OWNED);
1104
1105 if (++sc->io_cmds_active > sc->io_cmds_highwater)
1106 sc->io_cmds_highwater++;
1107 rd.u.low = cm->cm_desc.Words.Low;
1108 rd.u.high = cm->cm_desc.Words.High;
1109 rd.word = htole64(rd.word);
1110
1111 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY,
1112 ("command not busy, state = %u\n", cm->cm_state));
1113 cm->cm_state = MPS_CM_STATE_INQUEUE;
1114
1115 /* TODO-We may need to make below regwrite atomic */
1116 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
1117 rd.u.low);
1118 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
1119 rd.u.high);
1120 }
1121
1122 /*
1123 * Just the FACTS, ma'am.
1124 */
1125 static int
mps_get_iocfacts(struct mps_softc * sc,MPI2_IOC_FACTS_REPLY * facts)1126 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
1127 {
1128 MPI2_DEFAULT_REPLY *reply;
1129 MPI2_IOC_FACTS_REQUEST request;
1130 int error, req_sz, reply_sz, retry = 0;
1131
1132 MPS_FUNCTRACE(sc);
1133 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
1134
1135 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
1136 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
1137 reply = (MPI2_DEFAULT_REPLY *)facts;
1138
1139 /*
1140 * Retry sending the initialization sequence. Sometimes, especially with
1141 * older firmware, the initialization process fails. Retrying allows the
1142 * error to clear in the firmware.
1143 */
1144 bzero(&request, req_sz);
1145 request.Function = MPI2_FUNCTION_IOC_FACTS;
1146 while (retry < 5) {
1147 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1148 if (error == 0)
1149 break;
1150 mps_dprint(sc, MPS_FAULT, "%s failed retry %d\n", __func__, retry);
1151 DELAY(1000);
1152 retry++;
1153 }
1154
1155 return (error);
1156 }
1157
1158 static int
mps_send_iocinit(struct mps_softc * sc)1159 mps_send_iocinit(struct mps_softc *sc)
1160 {
1161 MPI2_IOC_INIT_REQUEST init;
1162 MPI2_DEFAULT_REPLY reply;
1163 int req_sz, reply_sz, error, retry = 0;
1164 struct timeval now;
1165 uint64_t time_in_msec;
1166
1167 MPS_FUNCTRACE(sc);
1168 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
1169
1170 /* Do a quick sanity check on proper initialization */
1171 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0)
1172 || (sc->replyframesz == 0)) {
1173 mps_dprint(sc, MPS_INIT|MPS_ERROR,
1174 "Driver not fully initialized for IOCInit\n");
1175 return (EINVAL);
1176 }
1177
1178 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1179 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1180 bzero(&init, req_sz);
1181 bzero(&reply, reply_sz);
1182
1183 /*
1184 * Fill in the init block. Note that most addresses are
1185 * deliberately in the lower 32bits of memory. This is a micro-
1186 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1187 */
1188 init.Function = MPI2_FUNCTION_IOC_INIT;
1189 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1190 init.MsgVersion = htole16(MPI2_VERSION);
1191 init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1192 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4));
1193 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1194 init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1195 init.SenseBufferAddressHigh = 0;
1196 init.SystemReplyAddressHigh = 0;
1197 init.SystemRequestFrameBaseAddress.High = 0;
1198 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr);
1199 init.ReplyDescriptorPostQueueAddress.High = 0;
1200 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr);
1201 init.ReplyFreeQueueAddress.High = 0;
1202 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1203 getmicrotime(&now);
1204 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1205 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1206 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1207 /*
1208 * Retry sending the initialization sequence. Sometimes, especially with
1209 * older firmware, the initialization process fails. Retrying allows the
1210 * error to clear in the firmware.
1211 */
1212 while (retry < 5) {
1213 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1214 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1215 error = ENXIO;
1216 if (error == 0)
1217 break;
1218 mps_dprint(sc, MPS_FAULT, "%s failed retry %d\n", __func__, retry);
1219 DELAY(1000);
1220 retry++;
1221 }
1222
1223 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1224 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
1225 return (error);
1226 }
1227
1228 void
mps_memaddr_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)1229 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1230 {
1231 bus_addr_t *addr;
1232
1233 addr = arg;
1234 *addr = segs[0].ds_addr;
1235 }
1236
1237 void
mps_memaddr_wait_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)1238 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1239 {
1240 struct mps_busdma_context *ctx;
1241 int need_unload, need_free;
1242
1243 ctx = (struct mps_busdma_context *)arg;
1244 need_unload = 0;
1245 need_free = 0;
1246
1247 mps_lock(ctx->softc);
1248 ctx->error = error;
1249 ctx->completed = 1;
1250 if ((error == 0) && (ctx->abandoned == 0)) {
1251 *ctx->addr = segs[0].ds_addr;
1252 } else {
1253 if (nsegs != 0)
1254 need_unload = 1;
1255 if (ctx->abandoned != 0)
1256 need_free = 1;
1257 }
1258 if (need_free == 0)
1259 wakeup(ctx);
1260
1261 mps_unlock(ctx->softc);
1262
1263 if (need_unload != 0) {
1264 bus_dmamap_unload(ctx->buffer_dmat,
1265 ctx->buffer_dmamap);
1266 *ctx->addr = 0;
1267 }
1268
1269 if (need_free != 0)
1270 free(ctx, M_MPSUSER);
1271 }
1272
1273 static int
mps_alloc_queues(struct mps_softc * sc)1274 mps_alloc_queues(struct mps_softc *sc)
1275 {
1276 struct mps_queue *q;
1277 u_int nq, i;
1278
1279 nq = sc->msi_msgs;
1280 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq);
1281
1282 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2,
1283 M_NOWAIT|M_ZERO);
1284 if (sc->queues == NULL)
1285 return (ENOMEM);
1286
1287 for (i = 0; i < nq; i++) {
1288 q = &sc->queues[i];
1289 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q);
1290 q->sc = sc;
1291 q->qnum = i;
1292 }
1293
1294 return (0);
1295 }
1296
1297 static int
mps_alloc_hw_queues(struct mps_softc * sc)1298 mps_alloc_hw_queues(struct mps_softc *sc)
1299 {
1300 bus_dma_template_t t;
1301 bus_addr_t queues_busaddr;
1302 uint8_t *queues;
1303 int qsize, fqsize, pqsize;
1304
1305 /*
1306 * The reply free queue contains 4 byte entries in multiples of 16 and
1307 * aligned on a 16 byte boundary. There must always be an unused entry.
1308 * This queue supplies fresh reply frames for the firmware to use.
1309 *
1310 * The reply descriptor post queue contains 8 byte entries in
1311 * multiples of 16 and aligned on a 16 byte boundary. This queue
1312 * contains filled-in reply frames sent from the firmware to the host.
1313 *
1314 * These two queues are allocated together for simplicity.
1315 */
1316 sc->fqdepth = roundup2(sc->num_replies + 1, 16);
1317 sc->pqdepth = roundup2(sc->num_replies + 1, 16);
1318 fqsize= sc->fqdepth * 4;
1319 pqsize = sc->pqdepth * 8;
1320 qsize = fqsize + pqsize;
1321
1322 bus_dma_template_init(&t, sc->mps_parent_dmat);
1323 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(16), BD_MAXSIZE(qsize),
1324 BD_MAXSEGSIZE(qsize), BD_NSEGMENTS(1),
1325 BD_LOWADDR(BUS_SPACE_MAXADDR_32BIT));
1326 if (bus_dma_template_tag(&t, &sc->queues_dmat)) {
1327 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n");
1328 return (ENOMEM);
1329 }
1330 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1331 &sc->queues_map)) {
1332 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n");
1333 return (ENOMEM);
1334 }
1335 bzero(queues, qsize);
1336 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1337 mps_memaddr_cb, &queues_busaddr, 0);
1338
1339 sc->free_queue = (uint32_t *)queues;
1340 sc->free_busaddr = queues_busaddr;
1341 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1342 sc->post_busaddr = queues_busaddr + fqsize;
1343 mps_dprint(sc, MPS_INIT, "free queue busaddr= %#016jx size= %d\n",
1344 (uintmax_t)sc->free_busaddr, fqsize);
1345 mps_dprint(sc, MPS_INIT, "reply queue busaddr= %#016jx size= %d\n",
1346 (uintmax_t)sc->post_busaddr, pqsize);
1347
1348 return (0);
1349 }
1350
1351 static int
mps_alloc_replies(struct mps_softc * sc)1352 mps_alloc_replies(struct mps_softc *sc)
1353 {
1354 bus_dma_template_t t;
1355 int rsize, num_replies;
1356
1357 /* Store the reply frame size in bytes rather than as 32bit words */
1358 sc->replyframesz = sc->facts->ReplyFrameSize * 4;
1359
1360 /*
1361 * sc->num_replies should be one less than sc->fqdepth. We need to
1362 * allocate space for sc->fqdepth replies, but only sc->num_replies
1363 * replies can be used at once.
1364 */
1365 num_replies = max(sc->fqdepth, sc->num_replies);
1366
1367 rsize = sc->replyframesz * num_replies;
1368 bus_dma_template_init(&t, sc->mps_parent_dmat);
1369 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(4), BD_MAXSIZE(rsize),
1370 BD_MAXSEGSIZE(rsize), BD_NSEGMENTS(1),
1371 BD_LOWADDR(BUS_SPACE_MAXADDR_32BIT));
1372 if (bus_dma_template_tag(&t, &sc->reply_dmat)) {
1373 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n");
1374 return (ENOMEM);
1375 }
1376 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1377 BUS_DMA_NOWAIT, &sc->reply_map)) {
1378 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n");
1379 return (ENOMEM);
1380 }
1381 bzero(sc->reply_frames, rsize);
1382 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1383 mps_memaddr_cb, &sc->reply_busaddr, 0);
1384
1385 mps_dprint(sc, MPS_INIT, "reply frames busaddr= %#016jx size= %d\n",
1386 (uintmax_t)sc->reply_busaddr, rsize);
1387
1388 return (0);
1389 }
1390
1391 static void
mps_load_chains_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)1392 mps_load_chains_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1393 {
1394 struct mps_softc *sc = arg;
1395 struct mps_chain *chain;
1396 bus_size_t bo;
1397 int i, o, s;
1398
1399 if (error != 0)
1400 return;
1401
1402 for (i = 0, o = 0, s = 0; s < nsegs; s++) {
1403 KASSERT(segs[s].ds_addr + segs[s].ds_len - 1 <= BUS_SPACE_MAXADDR_32BIT,
1404 ("mps: Bad segment address %#jx len %#jx\n", (uintmax_t)segs[s].ds_addr,
1405 (uintmax_t)segs[s].ds_len));
1406 for (bo = 0; bo + sc->reqframesz <= segs[s].ds_len;
1407 bo += sc->reqframesz) {
1408 chain = &sc->chains[i++];
1409 chain->chain =(MPI2_SGE_IO_UNION *)(sc->chain_frames+o);
1410 chain->chain_busaddr = segs[s].ds_addr + bo;
1411 o += sc->reqframesz;
1412 mps_free_chain(sc, chain);
1413 }
1414 if (bo != segs[s].ds_len)
1415 o += segs[s].ds_len - bo;
1416 }
1417 sc->chain_free_lowwater = i;
1418 }
1419
1420 static int
mps_alloc_requests(struct mps_softc * sc)1421 mps_alloc_requests(struct mps_softc *sc)
1422 {
1423 bus_dma_template_t t;
1424 struct mps_command *cm;
1425 int i, rsize, nsegs;
1426
1427 rsize = sc->reqframesz * sc->num_reqs;
1428 bus_dma_template_init(&t, sc->mps_parent_dmat);
1429 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(16), BD_MAXSIZE(rsize),
1430 BD_MAXSEGSIZE(rsize), BD_NSEGMENTS(1),
1431 BD_LOWADDR(BUS_SPACE_MAXADDR_32BIT));
1432 if (bus_dma_template_tag(&t, &sc->req_dmat)) {
1433 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n");
1434 return (ENOMEM);
1435 }
1436 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1437 BUS_DMA_NOWAIT, &sc->req_map)) {
1438 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n");
1439 return (ENOMEM);
1440 }
1441 bzero(sc->req_frames, rsize);
1442 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1443 mps_memaddr_cb, &sc->req_busaddr, 0);
1444 mps_dprint(sc, MPS_INIT, "request frames busaddr= %#016jx size= %d\n",
1445 (uintmax_t)sc->req_busaddr, rsize);
1446
1447 sc->chains = malloc(sizeof(struct mps_chain) * sc->num_chains, M_MPT2,
1448 M_NOWAIT | M_ZERO);
1449 if (!sc->chains) {
1450 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n");
1451 return (ENOMEM);
1452 }
1453 rsize = sc->reqframesz * sc->num_chains;
1454 bus_dma_template_clone(&t, sc->req_dmat);
1455 BUS_DMA_TEMPLATE_FILL(&t, BD_MAXSIZE(rsize), BD_MAXSEGSIZE(rsize),
1456 BD_NSEGMENTS(howmany(rsize, PAGE_SIZE)),
1457 BD_BOUNDARY(BUS_SPACE_MAXSIZE_32BIT+1));
1458 if (bus_dma_template_tag(&t, &sc->chain_dmat)) {
1459 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n");
1460 return (ENOMEM);
1461 }
1462 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1463 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->chain_map)) {
1464 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n");
1465 return (ENOMEM);
1466 }
1467 if (bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames,
1468 rsize, mps_load_chains_cb, sc, BUS_DMA_NOWAIT)) {
1469 mps_dprint(sc, MPS_ERROR, "Cannot load chain memory\n");
1470 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
1471 sc->chain_map);
1472 return (ENOMEM);
1473 }
1474
1475 rsize = MPS_SENSE_LEN * sc->num_reqs;
1476 bus_dma_template_clone(&t, sc->req_dmat);
1477 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(1), BD_MAXSIZE(rsize),
1478 BD_MAXSEGSIZE(rsize));
1479 if (bus_dma_template_tag(&t, &sc->sense_dmat)) {
1480 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n");
1481 return (ENOMEM);
1482 }
1483 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1484 BUS_DMA_NOWAIT, &sc->sense_map)) {
1485 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n");
1486 return (ENOMEM);
1487 }
1488 bzero(sc->sense_frames, rsize);
1489 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1490 mps_memaddr_cb, &sc->sense_busaddr, 0);
1491 mps_dprint(sc, MPS_INIT, "sense frames busaddr= %#016jx size= %d\n",
1492 (uintmax_t)sc->sense_busaddr, rsize);
1493
1494 nsegs = (sc->maxio / PAGE_SIZE) + 1;
1495 bus_dma_template_init(&t, sc->mps_parent_dmat);
1496 BUS_DMA_TEMPLATE_FILL(&t, BD_MAXSIZE(BUS_SPACE_MAXSIZE_32BIT),
1497 BD_NSEGMENTS(nsegs), BD_MAXSEGSIZE(BUS_SPACE_MAXSIZE_24BIT),
1498 BD_FLAGS(BUS_DMA_ALLOCNOW), BD_LOCKFUNC(busdma_lock_mutex),
1499 BD_LOCKFUNCARG(&sc->mps_mtx),
1500 BD_BOUNDARY(BUS_SPACE_MAXSIZE_32BIT+1));
1501 if (bus_dma_template_tag(&t, &sc->buffer_dmat)) {
1502 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n");
1503 return (ENOMEM);
1504 }
1505
1506 /*
1507 * SMID 0 cannot be used as a free command per the firmware spec.
1508 * Just drop that command instead of risking accounting bugs.
1509 */
1510 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs,
1511 M_MPT2, M_WAITOK | M_ZERO);
1512 for (i = 1; i < sc->num_reqs; i++) {
1513 cm = &sc->commands[i];
1514 cm->cm_req = sc->req_frames + i * sc->reqframesz;
1515 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz;
1516 cm->cm_sense = &sc->sense_frames[i];
1517 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN;
1518 cm->cm_desc.Default.SMID = i;
1519 cm->cm_sc = sc;
1520 cm->cm_state = MPS_CM_STATE_BUSY;
1521 TAILQ_INIT(&cm->cm_chain_list);
1522 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0);
1523
1524 /* XXX Is a failure here a critical problem? */
1525 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1526 if (i <= sc->num_prireqs)
1527 mps_free_high_priority_command(sc, cm);
1528 else
1529 mps_free_command(sc, cm);
1530 else {
1531 panic("failed to allocate command %d\n", i);
1532 sc->num_reqs = i;
1533 break;
1534 }
1535 }
1536
1537 return (0);
1538 }
1539
1540 static int
mps_init_queues(struct mps_softc * sc)1541 mps_init_queues(struct mps_softc *sc)
1542 {
1543 int i;
1544
1545 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1546
1547 /*
1548 * According to the spec, we need to use one less reply than we
1549 * have space for on the queue. So sc->num_replies (the number we
1550 * use) should be less than sc->fqdepth (allocated size).
1551 */
1552 if (sc->num_replies >= sc->fqdepth)
1553 return (EINVAL);
1554
1555 /*
1556 * Initialize all of the free queue entries.
1557 */
1558 for (i = 0; i < sc->fqdepth; i++)
1559 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz);
1560 sc->replyfreeindex = sc->num_replies;
1561
1562 return (0);
1563 }
1564
1565 /* Get the driver parameter tunables. Lowest priority are the driver defaults.
1566 * Next are the global settings, if they exist. Highest are the per-unit
1567 * settings, if they exist.
1568 */
1569 void
mps_get_tunables(struct mps_softc * sc)1570 mps_get_tunables(struct mps_softc *sc)
1571 {
1572 char tmpstr[80], mps_debug[80];
1573
1574 /* XXX default to some debugging for now */
1575 sc->mps_debug = MPS_INFO|MPS_FAULT;
1576 sc->disable_msix = 0;
1577 sc->disable_msi = 0;
1578 sc->max_msix = MPS_MSIX_MAX;
1579 sc->max_chains = MPS_CHAIN_FRAMES;
1580 sc->max_io_pages = MPS_MAXIO_PAGES;
1581 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD;
1582 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT;
1583 sc->use_phynum = 1;
1584 sc->max_reqframes = MPS_REQ_FRAMES;
1585 sc->max_prireqframes = MPS_PRI_REQ_FRAMES;
1586 sc->max_replyframes = MPS_REPLY_FRAMES;
1587 sc->max_evtframes = MPS_EVT_REPLY_FRAMES;
1588
1589 /*
1590 * Grab the global variables.
1591 */
1592 bzero(mps_debug, 80);
1593 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0)
1594 mps_parse_debug(sc, mps_debug);
1595 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix);
1596 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi);
1597 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix);
1598 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains);
1599 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages);
1600 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu);
1601 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time);
1602 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum);
1603 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes);
1604 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes);
1605 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes);
1606 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes);
1607
1608 /* Grab the unit-instance variables */
1609 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level",
1610 device_get_unit(sc->mps_dev));
1611 bzero(mps_debug, 80);
1612 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0)
1613 mps_parse_debug(sc, mps_debug);
1614
1615 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix",
1616 device_get_unit(sc->mps_dev));
1617 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1618
1619 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi",
1620 device_get_unit(sc->mps_dev));
1621 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1622
1623 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix",
1624 device_get_unit(sc->mps_dev));
1625 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix);
1626
1627 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains",
1628 device_get_unit(sc->mps_dev));
1629 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1630
1631 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages",
1632 device_get_unit(sc->mps_dev));
1633 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages);
1634
1635 bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1636 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids",
1637 device_get_unit(sc->mps_dev));
1638 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1639
1640 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu",
1641 device_get_unit(sc->mps_dev));
1642 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu);
1643
1644 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time",
1645 device_get_unit(sc->mps_dev));
1646 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time);
1647
1648 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num",
1649 device_get_unit(sc->mps_dev));
1650 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum);
1651
1652 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes",
1653 device_get_unit(sc->mps_dev));
1654 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes);
1655
1656 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes",
1657 device_get_unit(sc->mps_dev));
1658 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes);
1659
1660 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes",
1661 device_get_unit(sc->mps_dev));
1662 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes);
1663
1664 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes",
1665 device_get_unit(sc->mps_dev));
1666 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes);
1667
1668 }
1669
1670 static void
mps_setup_sysctl(struct mps_softc * sc)1671 mps_setup_sysctl(struct mps_softc *sc)
1672 {
1673 struct sysctl_ctx_list *sysctl_ctx = NULL;
1674 struct sysctl_oid *sysctl_tree = NULL;
1675 char tmpstr[80], tmpstr2[80];
1676
1677 /*
1678 * Setup the sysctl variable so the user can change the debug level
1679 * on the fly.
1680 */
1681 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d",
1682 device_get_unit(sc->mps_dev));
1683 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev));
1684
1685 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev);
1686 if (sysctl_ctx != NULL)
1687 sysctl_tree = device_get_sysctl_tree(sc->mps_dev);
1688
1689 if (sysctl_tree == NULL) {
1690 sysctl_ctx_init(&sc->sysctl_ctx);
1691 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1692 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2,
1693 CTLFLAG_RD | CTLFLAG_MPSAFE, 0, tmpstr);
1694 if (sc->sysctl_tree == NULL)
1695 return;
1696 sysctl_ctx = &sc->sysctl_ctx;
1697 sysctl_tree = sc->sysctl_tree;
1698 }
1699
1700 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1701 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE,
1702 sc, 0, mps_debug_sysctl, "A", "mps debug level");
1703
1704 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1705 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1706 "Disable the use of MSI-X interrupts");
1707
1708 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1709 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1710 "Disable the use of MSI interrupts");
1711
1712 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1713 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0,
1714 "User-defined maximum number of MSIX queues");
1715
1716 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1717 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0,
1718 "Negotiated number of MSIX queues");
1719
1720 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1721 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0,
1722 "Total number of allocated request frames");
1723
1724 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1725 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0,
1726 "Total number of allocated high priority request frames");
1727
1728 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1729 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0,
1730 "Total number of allocated reply frames");
1731
1732 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1733 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0,
1734 "Total number of event frames allocated");
1735
1736 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1737 OID_AUTO, "firmware_version", CTLFLAG_RD, sc->fw_version,
1738 strlen(sc->fw_version), "firmware version");
1739
1740 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1741 OID_AUTO, "driver_version", CTLFLAG_RD, MPS_DRIVER_VERSION,
1742 strlen(MPS_DRIVER_VERSION), "driver version");
1743
1744 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1745 OID_AUTO, "msg_version", CTLFLAG_RD, sc->msg_version,
1746 strlen(sc->msg_version), "message interface version (deprecated)");
1747
1748 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1749 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1750 &sc->io_cmds_active, 0, "number of currently active commands");
1751
1752 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1753 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1754 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1755
1756 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1757 OID_AUTO, "chain_free", CTLFLAG_RD,
1758 &sc->chain_free, 0, "number of free chain elements");
1759
1760 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1761 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1762 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1763
1764 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1765 OID_AUTO, "max_chains", CTLFLAG_RD,
1766 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1767
1768 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1769 OID_AUTO, "max_io_pages", CTLFLAG_RD,
1770 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use "
1771 "IOCFacts)");
1772
1773 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1774 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0,
1775 "enable SSU to SATA SSD/HDD at shutdown");
1776
1777 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1778 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1779 &sc->chain_alloc_fail, "chain allocation failures");
1780
1781 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1782 OID_AUTO, "spinup_wait_time", CTLFLAG_RD,
1783 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for "
1784 "spinup after SATA ID error");
1785
1786 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1787 OID_AUTO, "mapping_table_dump",
1788 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
1789 mps_mapping_dump, "A", "Mapping Table Dump");
1790
1791 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1792 OID_AUTO, "encl_table_dump",
1793 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
1794 mps_mapping_encl_dump, "A", "Enclosure Table Dump");
1795
1796 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1797 OID_AUTO, "dump_reqs",
1798 CTLTYPE_OPAQUE | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_MPSAFE,
1799 sc, 0, mps_dump_reqs, "I", "Dump Active Requests");
1800
1801 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1802 OID_AUTO, "dump_reqs_alltypes", CTLFLAG_RW,
1803 &sc->dump_reqs_alltypes, 0,
1804 "dump all request types not just inqueue");
1805
1806 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1807 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0,
1808 "Use the phy number for enumeration");
1809 }
1810
1811 static struct mps_debug_string {
1812 char *name;
1813 int flag;
1814 } mps_debug_strings[] = {
1815 {"info", MPS_INFO},
1816 {"fault", MPS_FAULT},
1817 {"event", MPS_EVENT},
1818 {"log", MPS_LOG},
1819 {"recovery", MPS_RECOVERY},
1820 {"error", MPS_ERROR},
1821 {"init", MPS_INIT},
1822 {"xinfo", MPS_XINFO},
1823 {"user", MPS_USER},
1824 {"mapping", MPS_MAPPING},
1825 {"trace", MPS_TRACE}
1826 };
1827
1828 enum mps_debug_level_combiner {
1829 COMB_NONE,
1830 COMB_ADD,
1831 COMB_SUB
1832 };
1833
1834 static int
mps_debug_sysctl(SYSCTL_HANDLER_ARGS)1835 mps_debug_sysctl(SYSCTL_HANDLER_ARGS)
1836 {
1837 struct mps_softc *sc;
1838 struct mps_debug_string *string;
1839 struct sbuf *sbuf;
1840 char *buffer;
1841 size_t sz;
1842 int i, len, debug, error;
1843
1844 sc = (struct mps_softc *)arg1;
1845
1846 error = sysctl_wire_old_buffer(req, 0);
1847 if (error != 0)
1848 return (error);
1849
1850 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
1851 debug = sc->mps_debug;
1852
1853 sbuf_printf(sbuf, "%#x", debug);
1854
1855 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]);
1856 for (i = 0; i < sz; i++) {
1857 string = &mps_debug_strings[i];
1858 if (debug & string->flag)
1859 sbuf_printf(sbuf, ",%s", string->name);
1860 }
1861
1862 error = sbuf_finish(sbuf);
1863 sbuf_delete(sbuf);
1864
1865 if (error || req->newptr == NULL)
1866 return (error);
1867
1868 len = req->newlen - req->newidx;
1869 if (len == 0)
1870 return (0);
1871
1872 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK);
1873 error = SYSCTL_IN(req, buffer, len);
1874
1875 mps_parse_debug(sc, buffer);
1876
1877 free(buffer, M_MPT2);
1878 return (error);
1879 }
1880
1881 static void
mps_parse_debug(struct mps_softc * sc,char * list)1882 mps_parse_debug(struct mps_softc *sc, char *list)
1883 {
1884 struct mps_debug_string *string;
1885 enum mps_debug_level_combiner op;
1886 char *token, *endtoken;
1887 size_t sz;
1888 int flags, i;
1889
1890 if (list == NULL || *list == '\0')
1891 return;
1892
1893 if (*list == '+') {
1894 op = COMB_ADD;
1895 list++;
1896 } else if (*list == '-') {
1897 op = COMB_SUB;
1898 list++;
1899 } else
1900 op = COMB_NONE;
1901 if (*list == '\0')
1902 return;
1903
1904 flags = 0;
1905 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]);
1906 while ((token = strsep(&list, ":,")) != NULL) {
1907 /* Handle integer flags */
1908 flags |= strtol(token, &endtoken, 0);
1909 if (token != endtoken)
1910 continue;
1911
1912 /* Handle text flags */
1913 for (i = 0; i < sz; i++) {
1914 string = &mps_debug_strings[i];
1915 if (strcasecmp(token, string->name) == 0) {
1916 flags |= string->flag;
1917 break;
1918 }
1919 }
1920 }
1921
1922 switch (op) {
1923 case COMB_NONE:
1924 sc->mps_debug = flags;
1925 break;
1926 case COMB_ADD:
1927 sc->mps_debug |= flags;
1928 break;
1929 case COMB_SUB:
1930 sc->mps_debug &= (~flags);
1931 break;
1932 }
1933
1934 return;
1935 }
1936
1937 struct mps_dumpreq_hdr {
1938 uint32_t smid;
1939 uint32_t state;
1940 uint32_t numframes;
1941 uint32_t deschi;
1942 uint32_t desclo;
1943 };
1944
1945 static int
mps_dump_reqs(SYSCTL_HANDLER_ARGS)1946 mps_dump_reqs(SYSCTL_HANDLER_ARGS)
1947 {
1948 struct mps_softc *sc;
1949 struct mps_chain *chain, *chain1;
1950 struct mps_command *cm;
1951 struct mps_dumpreq_hdr hdr;
1952 struct sbuf *sb;
1953 uint32_t smid, state;
1954 int i, numreqs, error = 0;
1955
1956 sc = (struct mps_softc *)arg1;
1957
1958 if ((error = priv_check(curthread, PRIV_DRIVER)) != 0) {
1959 printf("priv check error %d\n", error);
1960 return (error);
1961 }
1962
1963 state = MPS_CM_STATE_INQUEUE;
1964 smid = 1;
1965 numreqs = sc->num_reqs;
1966
1967 if (req->newptr != NULL)
1968 return (EINVAL);
1969
1970 if (smid == 0 || smid > sc->num_reqs)
1971 return (EINVAL);
1972 if (numreqs <= 0 || (numreqs + smid > sc->num_reqs))
1973 numreqs = sc->num_reqs;
1974 sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req);
1975
1976 /* Best effort, no locking */
1977 for (i = smid; i < numreqs; i++) {
1978 cm = &sc->commands[i];
1979 if ((sc->dump_reqs_alltypes == 0) && (cm->cm_state != state))
1980 continue;
1981 hdr.smid = i;
1982 hdr.state = cm->cm_state;
1983 hdr.numframes = 1;
1984 hdr.deschi = cm->cm_desc.Words.High;
1985 hdr.desclo = cm->cm_desc.Words.Low;
1986 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link,
1987 chain1)
1988 hdr.numframes++;
1989 sbuf_bcat(sb, &hdr, sizeof(hdr));
1990 sbuf_bcat(sb, cm->cm_req, 128);
1991 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link,
1992 chain1)
1993 sbuf_bcat(sb, chain->chain, 128);
1994 }
1995
1996 error = sbuf_finish(sb);
1997 sbuf_delete(sb);
1998 return (error);
1999 }
2000
2001 int
mps_attach(struct mps_softc * sc)2002 mps_attach(struct mps_softc *sc)
2003 {
2004 int error;
2005
2006 MPS_FUNCTRACE(sc);
2007 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
2008
2009 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF);
2010 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0);
2011 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0);
2012 TAILQ_INIT(&sc->event_list);
2013 timevalclear(&sc->lastfail);
2014
2015 if ((error = mps_transition_ready(sc)) != 0) {
2016 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition "
2017 "ready\n");
2018 return (error);
2019 }
2020
2021 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2,
2022 M_ZERO|M_NOWAIT);
2023 if(!sc->facts) {
2024 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, "
2025 "exit\n");
2026 return (ENOMEM);
2027 }
2028
2029 /*
2030 * Get IOC Facts and allocate all structures based on this information.
2031 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC
2032 * Facts. If relevant values have changed in IOC Facts, this function
2033 * will free all of the memory based on IOC Facts and reallocate that
2034 * memory. If this fails, any allocated memory should already be freed.
2035 */
2036 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) {
2037 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation "
2038 "failed with error %d, exit\n", error);
2039 return (error);
2040 }
2041
2042 /* Start the periodic watchdog check on the IOC Doorbell */
2043 mps_periodic(sc);
2044
2045 /*
2046 * The portenable will kick off discovery events that will drive the
2047 * rest of the initialization process. The CAM/SAS module will
2048 * hold up the boot sequence until discovery is complete.
2049 */
2050 sc->mps_ich.ich_func = mps_startup;
2051 sc->mps_ich.ich_arg = sc;
2052 if (config_intrhook_establish(&sc->mps_ich) != 0) {
2053 mps_dprint(sc, MPS_INIT|MPS_ERROR,
2054 "Cannot establish MPS config hook\n");
2055 error = EINVAL;
2056 }
2057
2058 /*
2059 * Allow IR to shutdown gracefully when shutdown occurs.
2060 */
2061 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
2062 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
2063
2064 if (sc->shutdown_eh == NULL)
2065 mps_dprint(sc, MPS_INIT|MPS_ERROR,
2066 "shutdown event registration failed\n");
2067
2068 mps_setup_sysctl(sc);
2069
2070 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE;
2071 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error);
2072
2073 return (error);
2074 }
2075
2076 /* Run through any late-start handlers. */
2077 static void
mps_startup(void * arg)2078 mps_startup(void *arg)
2079 {
2080 struct mps_softc *sc;
2081
2082 sc = (struct mps_softc *)arg;
2083 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
2084
2085 mps_lock(sc);
2086 mps_unmask_intr(sc);
2087
2088 /* initialize device mapping tables */
2089 mps_base_static_config_pages(sc);
2090 mps_mapping_initialize(sc);
2091 mpssas_startup(sc);
2092 mps_unlock(sc);
2093
2094 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n");
2095 config_intrhook_disestablish(&sc->mps_ich);
2096 sc->mps_ich.ich_arg = NULL;
2097
2098 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
2099 }
2100
2101 /* Periodic watchdog. Is called with the driver lock already held. */
2102 static void
mps_periodic(void * arg)2103 mps_periodic(void *arg)
2104 {
2105 struct mps_softc *sc;
2106 uint32_t db;
2107
2108 sc = (struct mps_softc *)arg;
2109 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN)
2110 return;
2111
2112 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
2113 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
2114 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
2115 mps_reinit(sc);
2116 }
2117
2118 callout_reset_sbt(&sc->periodic, MPS_PERIODIC_DELAY * SBT_1S, 0,
2119 mps_periodic, sc, C_PREL(1));
2120 }
2121
2122 static void
mps_log_evt_handler(struct mps_softc * sc,uintptr_t data,MPI2_EVENT_NOTIFICATION_REPLY * event)2123 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data,
2124 MPI2_EVENT_NOTIFICATION_REPLY *event)
2125 {
2126 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
2127
2128 MPS_DPRINT_EVENT(sc, generic, event);
2129
2130 switch (event->Event) {
2131 case MPI2_EVENT_LOG_DATA:
2132 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n");
2133 if (sc->mps_debug & MPS_EVENT)
2134 hexdump(event->EventData, event->EventDataLength, NULL, 0);
2135 break;
2136 case MPI2_EVENT_LOG_ENTRY_ADDED:
2137 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
2138 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
2139 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
2140 entry->LogSequence);
2141 break;
2142 default:
2143 break;
2144 }
2145 return;
2146 }
2147
2148 static int
mps_attach_log(struct mps_softc * sc)2149 mps_attach_log(struct mps_softc *sc)
2150 {
2151 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
2152
2153 bzero(events, 16);
2154 setbit(events, MPI2_EVENT_LOG_DATA);
2155 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
2156
2157 mps_register_events(sc, events, mps_log_evt_handler, NULL,
2158 &sc->mps_log_eh);
2159
2160 return (0);
2161 }
2162
2163 static int
mps_detach_log(struct mps_softc * sc)2164 mps_detach_log(struct mps_softc *sc)
2165 {
2166
2167 if (sc->mps_log_eh != NULL)
2168 mps_deregister_events(sc, sc->mps_log_eh);
2169 return (0);
2170 }
2171
2172 /*
2173 * Free all of the driver resources and detach submodules. Should be called
2174 * without the lock held.
2175 */
2176 int
mps_free(struct mps_softc * sc)2177 mps_free(struct mps_softc *sc)
2178 {
2179 int error;
2180
2181 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
2182 /* Turn off the watchdog */
2183 mps_lock(sc);
2184 sc->mps_flags |= MPS_FLAGS_SHUTDOWN;
2185 mps_unlock(sc);
2186 /* Lock must not be held for this */
2187 callout_drain(&sc->periodic);
2188 callout_drain(&sc->device_check_callout);
2189
2190 if (((error = mps_detach_log(sc)) != 0) ||
2191 ((error = mps_detach_sas(sc)) != 0)) {
2192 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach "
2193 "subsystems, exit\n");
2194 return (error);
2195 }
2196
2197 mps_detach_user(sc);
2198
2199 /* Put the IOC back in the READY state. */
2200 mps_lock(sc);
2201 if ((error = mps_transition_ready(sc)) != 0) {
2202 mps_unlock(sc);
2203 return (error);
2204 }
2205 mps_unlock(sc);
2206
2207 if (sc->facts != NULL)
2208 free(sc->facts, M_MPT2);
2209
2210 /*
2211 * Free all buffers that are based on IOC Facts. A Diag Reset may need
2212 * to free these buffers too.
2213 */
2214 mps_iocfacts_free(sc);
2215
2216 if (sc->sysctl_tree != NULL)
2217 sysctl_ctx_free(&sc->sysctl_ctx);
2218
2219 /* Deregister the shutdown function */
2220 if (sc->shutdown_eh != NULL)
2221 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
2222
2223 mtx_destroy(&sc->mps_mtx);
2224 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
2225
2226 return (0);
2227 }
2228
2229 static __inline void
mps_complete_command(struct mps_softc * sc,struct mps_command * cm)2230 mps_complete_command(struct mps_softc *sc, struct mps_command *cm)
2231 {
2232 MPS_FUNCTRACE(sc);
2233
2234 if (cm == NULL) {
2235 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n");
2236 return;
2237 }
2238
2239 KASSERT(cm->cm_state == MPS_CM_STATE_INQUEUE,
2240 ("command not inqueue, state = %u\n", cm->cm_state));
2241 cm->cm_state = MPS_CM_STATE_BUSY;
2242 if (cm->cm_flags & MPS_CM_FLAGS_POLLED)
2243 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE;
2244
2245 if (cm->cm_complete != NULL) {
2246 mps_dprint(sc, MPS_TRACE,
2247 "%s cm %p calling cm_complete %p data %p reply %p\n",
2248 __func__, cm, cm->cm_complete, cm->cm_complete_data,
2249 cm->cm_reply);
2250 cm->cm_complete(sc, cm);
2251 }
2252
2253 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) {
2254 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm);
2255 wakeup(cm);
2256 }
2257
2258 if (cm->cm_sc->io_cmds_active != 0) {
2259 cm->cm_sc->io_cmds_active--;
2260 } else {
2261 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is "
2262 "out of sync - resynching to 0\n");
2263 }
2264 }
2265
2266 static void
mps_sas_log_info(struct mps_softc * sc,u32 log_info)2267 mps_sas_log_info(struct mps_softc *sc , u32 log_info)
2268 {
2269 union loginfo_type {
2270 u32 loginfo;
2271 struct {
2272 u32 subcode:16;
2273 u32 code:8;
2274 u32 originator:4;
2275 u32 bus_type:4;
2276 } dw;
2277 };
2278 union loginfo_type sas_loginfo;
2279 char *originator_str = NULL;
2280
2281 sas_loginfo.loginfo = log_info;
2282 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
2283 return;
2284
2285 /* each nexus loss loginfo */
2286 if (log_info == 0x31170000)
2287 return;
2288
2289 /* eat the loginfos associated with task aborts */
2290 if ((log_info == 30050000 || log_info ==
2291 0x31140000 || log_info == 0x31130000))
2292 return;
2293
2294 switch (sas_loginfo.dw.originator) {
2295 case 0:
2296 originator_str = "IOP";
2297 break;
2298 case 1:
2299 originator_str = "PL";
2300 break;
2301 case 2:
2302 originator_str = "IR";
2303 break;
2304 }
2305
2306 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), "
2307 "code(0x%02x), sub_code(0x%04x)\n", log_info,
2308 originator_str, sas_loginfo.dw.code,
2309 sas_loginfo.dw.subcode);
2310 }
2311
2312 static void
mps_display_reply_info(struct mps_softc * sc,uint8_t * reply)2313 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply)
2314 {
2315 MPI2DefaultReply_t *mpi_reply;
2316 u16 sc_status;
2317
2318 mpi_reply = (MPI2DefaultReply_t*)reply;
2319 sc_status = le16toh(mpi_reply->IOCStatus);
2320 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
2321 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
2322 }
2323 void
mps_intr(void * data)2324 mps_intr(void *data)
2325 {
2326 struct mps_softc *sc;
2327 uint32_t status;
2328
2329 sc = (struct mps_softc *)data;
2330 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2331
2332 /*
2333 * Check interrupt status register to flush the bus. This is
2334 * needed for both INTx interrupts and driver-driven polling
2335 */
2336 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
2337 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
2338 return;
2339
2340 mps_lock(sc);
2341 mps_intr_locked(data);
2342 mps_unlock(sc);
2343 return;
2344 }
2345
2346 /*
2347 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
2348 * chip. Hopefully this theory is correct.
2349 */
2350 void
mps_intr_msi(void * data)2351 mps_intr_msi(void *data)
2352 {
2353 struct mps_softc *sc;
2354
2355 sc = (struct mps_softc *)data;
2356 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2357 mps_lock(sc);
2358 mps_intr_locked(data);
2359 mps_unlock(sc);
2360 return;
2361 }
2362
2363 /*
2364 * The locking is overly broad and simplistic, but easy to deal with for now.
2365 */
2366 void
mps_intr_locked(void * data)2367 mps_intr_locked(void *data)
2368 {
2369 MPI2_REPLY_DESCRIPTORS_UNION *desc;
2370 MPI2_DIAG_RELEASE_REPLY *rel_rep;
2371 mps_fw_diagnostic_buffer_t *pBuffer;
2372 struct mps_softc *sc;
2373 struct mps_command *cm = NULL;
2374 uint64_t tdesc;
2375 uint8_t flags;
2376 u_int pq;
2377
2378 sc = (struct mps_softc *)data;
2379
2380 pq = sc->replypostindex;
2381 mps_dprint(sc, MPS_TRACE,
2382 "%s sc %p starting with replypostindex %u\n",
2383 __func__, sc, sc->replypostindex);
2384
2385 for ( ;; ) {
2386 cm = NULL;
2387 desc = &sc->post_queue[sc->replypostindex];
2388
2389 /*
2390 * Copy and clear out the descriptor so that any reentry will
2391 * immediately know that this descriptor has already been
2392 * looked at. There is unfortunate casting magic because the
2393 * MPI API doesn't have a cardinal 64bit type.
2394 */
2395 tdesc = 0xffffffffffffffff;
2396 tdesc = atomic_swap_64((uint64_t *)desc, tdesc);
2397 desc = (MPI2_REPLY_DESCRIPTORS_UNION *)&tdesc;
2398
2399 flags = desc->Default.ReplyFlags &
2400 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
2401 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
2402 || (le32toh(desc->Words.High) == 0xffffffff))
2403 break;
2404
2405 /* increment the replypostindex now, so that event handlers
2406 * and cm completion handlers which decide to do a diag
2407 * reset can zero it without it getting incremented again
2408 * afterwards, and we break out of this loop on the next
2409 * iteration since the reply post queue has been cleared to
2410 * 0xFF and all descriptors look unused (which they are).
2411 */
2412 if (++sc->replypostindex >= sc->pqdepth)
2413 sc->replypostindex = 0;
2414
2415 switch (flags) {
2416 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
2417 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
2418 cm->cm_reply = NULL;
2419 break;
2420 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
2421 {
2422 uint32_t baddr;
2423 uint8_t *reply;
2424
2425 /*
2426 * Re-compose the reply address from the address
2427 * sent back from the chip. The ReplyFrameAddress
2428 * is the lower 32 bits of the physical address of
2429 * particular reply frame. Convert that address to
2430 * host format, and then use that to provide the
2431 * offset against the virtual address base
2432 * (sc->reply_frames).
2433 */
2434 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
2435 reply = sc->reply_frames +
2436 (baddr - ((uint32_t)sc->reply_busaddr));
2437 /*
2438 * Make sure the reply we got back is in a valid
2439 * range. If not, go ahead and panic here, since
2440 * we'll probably panic as soon as we deference the
2441 * reply pointer anyway.
2442 */
2443 if ((reply < sc->reply_frames)
2444 || (reply > (sc->reply_frames +
2445 (sc->fqdepth * sc->replyframesz)))) {
2446 printf("%s: WARNING: reply %p out of range!\n",
2447 __func__, reply);
2448 printf("%s: reply_frames %p, fqdepth %d, "
2449 "frame size %d\n", __func__,
2450 sc->reply_frames, sc->fqdepth,
2451 sc->replyframesz);
2452 printf("%s: baddr %#x,\n", __func__, baddr);
2453 /* LSI-TODO. See Linux Code for Graceful exit */
2454 panic("Reply address out of range");
2455 }
2456 if (le16toh(desc->AddressReply.SMID) == 0) {
2457 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
2458 MPI2_FUNCTION_DIAG_BUFFER_POST) {
2459 /*
2460 * If SMID is 0 for Diag Buffer Post,
2461 * this implies that the reply is due to
2462 * a release function with a status that
2463 * the buffer has been released. Set
2464 * the buffer flags accordingly.
2465 */
2466 rel_rep =
2467 (MPI2_DIAG_RELEASE_REPLY *)reply;
2468 if ((le16toh(rel_rep->IOCStatus) &
2469 MPI2_IOCSTATUS_MASK) ==
2470 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
2471 {
2472 pBuffer =
2473 &sc->fw_diag_buffer_list[
2474 rel_rep->BufferType];
2475 pBuffer->valid_data = TRUE;
2476 pBuffer->owned_by_firmware =
2477 FALSE;
2478 pBuffer->immediate = FALSE;
2479 }
2480 } else
2481 mps_dispatch_event(sc, baddr,
2482 (MPI2_EVENT_NOTIFICATION_REPLY *)
2483 reply);
2484 } else {
2485 /*
2486 * Ignore commands not in INQUEUE state
2487 * since they've already been completed
2488 * via another path.
2489 */
2490 cm = &sc->commands[
2491 le16toh(desc->AddressReply.SMID)];
2492 if (cm->cm_state == MPS_CM_STATE_INQUEUE) {
2493 cm->cm_reply = reply;
2494 cm->cm_reply_data = le32toh(
2495 desc->AddressReply.ReplyFrameAddress);
2496 } else {
2497 mps_dprint(sc, MPS_RECOVERY,
2498 "Bad state for ADDRESS_REPLY status,"
2499 " ignoring state %d cm %p\n",
2500 cm->cm_state, cm);
2501 }
2502 }
2503 break;
2504 }
2505 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
2506 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
2507 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
2508 default:
2509 /* Unhandled */
2510 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n",
2511 desc->Default.ReplyFlags);
2512 cm = NULL;
2513 break;
2514 }
2515
2516
2517 if (cm != NULL) {
2518 // Print Error reply frame
2519 if (cm->cm_reply)
2520 mps_display_reply_info(sc,cm->cm_reply);
2521 mps_complete_command(sc, cm);
2522 }
2523 }
2524
2525 if (pq != sc->replypostindex) {
2526 mps_dprint(sc, MPS_TRACE, "%s sc %p writing postindex %d\n",
2527 __func__, sc, sc->replypostindex);
2528 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET,
2529 sc->replypostindex);
2530 }
2531
2532 return;
2533 }
2534
2535 static void
mps_dispatch_event(struct mps_softc * sc,uintptr_t data,MPI2_EVENT_NOTIFICATION_REPLY * reply)2536 mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
2537 MPI2_EVENT_NOTIFICATION_REPLY *reply)
2538 {
2539 struct mps_event_handle *eh;
2540 int event, handled = 0;
2541
2542 event = le16toh(reply->Event);
2543 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2544 if (isset(eh->mask, event)) {
2545 eh->callback(sc, data, reply);
2546 handled++;
2547 }
2548 }
2549
2550 if (handled == 0)
2551 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event));
2552
2553 /*
2554 * This is the only place that the event/reply should be freed.
2555 * Anything wanting to hold onto the event data should have
2556 * already copied it into their own storage.
2557 */
2558 mps_free_reply(sc, data);
2559 }
2560
2561 static void
mps_reregister_events_complete(struct mps_softc * sc,struct mps_command * cm)2562 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm)
2563 {
2564 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2565
2566 if (cm->cm_reply)
2567 MPS_DPRINT_EVENT(sc, generic,
2568 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2569
2570 mps_free_command(sc, cm);
2571
2572 /* next, send a port enable */
2573 mpssas_startup(sc);
2574 }
2575
2576 /*
2577 * For both register_events and update_events, the caller supplies a bitmap
2578 * of events that it _wants_. These functions then turn that into a bitmask
2579 * suitable for the controller.
2580 */
2581 int
mps_register_events(struct mps_softc * sc,u32 * mask,mps_evt_callback_t * cb,void * data,struct mps_event_handle ** handle)2582 mps_register_events(struct mps_softc *sc, u32 *mask,
2583 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle)
2584 {
2585 struct mps_event_handle *eh;
2586 int error = 0;
2587
2588 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO);
2589 eh->callback = cb;
2590 eh->data = data;
2591 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2592 if (mask != NULL)
2593 error = mps_update_events(sc, eh, mask);
2594 *handle = eh;
2595
2596 return (error);
2597 }
2598
2599 int
mps_update_events(struct mps_softc * sc,struct mps_event_handle * handle,u32 * mask)2600 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle,
2601 u32 *mask)
2602 {
2603 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2604 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL;
2605 struct mps_command *cm;
2606 int error, i;
2607
2608 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2609
2610 if ((mask != NULL) && (handle != NULL))
2611 bcopy(mask, &handle->mask[0], sizeof(u32) *
2612 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2613
2614 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2615 sc->event_mask[i] = -1;
2616
2617 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2618 sc->event_mask[i] &= ~handle->mask[i];
2619
2620 if ((cm = mps_alloc_command(sc)) == NULL)
2621 return (EBUSY);
2622 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2623 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2624 evtreq->MsgFlags = 0;
2625 evtreq->SASBroadcastPrimitiveMasks = 0;
2626 #ifdef MPS_DEBUG_ALL_EVENTS
2627 {
2628 u_char fullmask[16];
2629 memset(fullmask, 0x00, 16);
2630 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2631 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2632 }
2633 #else
2634 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2635 evtreq->EventMasks[i] =
2636 htole32(sc->event_mask[i]);
2637 #endif
2638 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2639 cm->cm_data = NULL;
2640
2641 error = mps_wait_command(sc, &cm, 60, 0);
2642 if (cm != NULL)
2643 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2644 if ((reply == NULL) ||
2645 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2646 error = ENXIO;
2647
2648 if (reply)
2649 MPS_DPRINT_EVENT(sc, generic, reply);
2650
2651 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error);
2652
2653 if (cm != NULL)
2654 mps_free_command(sc, cm);
2655 return (error);
2656 }
2657
2658 static int
mps_reregister_events(struct mps_softc * sc)2659 mps_reregister_events(struct mps_softc *sc)
2660 {
2661 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2662 struct mps_command *cm;
2663 struct mps_event_handle *eh;
2664 int error, i;
2665
2666 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2667
2668 /* first, reregister events */
2669
2670 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2671 sc->event_mask[i] = -1;
2672
2673 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2674 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2675 sc->event_mask[i] &= ~eh->mask[i];
2676 }
2677
2678 if ((cm = mps_alloc_command(sc)) == NULL)
2679 return (EBUSY);
2680 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2681 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2682 evtreq->MsgFlags = 0;
2683 evtreq->SASBroadcastPrimitiveMasks = 0;
2684 #ifdef MPS_DEBUG_ALL_EVENTS
2685 {
2686 u_char fullmask[16];
2687 memset(fullmask, 0x00, 16);
2688 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2689 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2690 }
2691 #else
2692 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2693 evtreq->EventMasks[i] =
2694 htole32(sc->event_mask[i]);
2695 #endif
2696 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2697 cm->cm_data = NULL;
2698 cm->cm_complete = mps_reregister_events_complete;
2699
2700 error = mps_map_command(sc, cm);
2701
2702 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__,
2703 error);
2704 return (error);
2705 }
2706
2707 void
mps_deregister_events(struct mps_softc * sc,struct mps_event_handle * handle)2708 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle)
2709 {
2710
2711 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2712 free(handle, M_MPT2);
2713 }
2714
2715 /*
2716 * Add a chain element as the next SGE for the specified command.
2717 * Reset cm_sge and cm_sgesize to indicate all the available space.
2718 */
2719 static int
mps_add_chain(struct mps_command * cm)2720 mps_add_chain(struct mps_command *cm)
2721 {
2722 MPI2_SGE_CHAIN64 *sgc;
2723 struct mps_chain *chain;
2724 u_int space;
2725
2726 if (cm->cm_sglsize < MPS_SGC_SIZE)
2727 panic("MPS: Need SGE Error Code\n");
2728
2729 chain = mps_alloc_chain(cm->cm_sc);
2730 if (chain == NULL)
2731 return (ENOBUFS);
2732
2733 space = cm->cm_sc->reqframesz;
2734
2735 /*
2736 * Note: a double-linked list is used to make it easier to
2737 * walk for debugging.
2738 */
2739 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2740
2741 sgc = (MPI2_SGE_CHAIN64 *)&cm->cm_sge->MpiChain;
2742 sgc->Length = htole16(space);
2743 sgc->NextChainOffset = 0;
2744 /* TODO Looks like bug in Setting sgc->Flags.
2745 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2746 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT
2747 * This is fine.. because we are not using simple element. In case of
2748 * MPI2_SGE_CHAIN64, we have separate Length and Flags field.
2749 */
2750 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2751 sgc->Address.High = htole32(chain->chain_busaddr >> 32);
2752 sgc->Address.Low = htole32(chain->chain_busaddr);
2753
2754 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple;
2755 cm->cm_sglsize = space;
2756 return (0);
2757 }
2758
2759 /*
2760 * Add one scatter-gather element (chain, simple, transaction context)
2761 * to the scatter-gather list for a command. Maintain cm_sglsize and
2762 * cm_sge as the remaining size and pointer to the next SGE to fill
2763 * in, respectively.
2764 */
2765 int
mps_push_sge(struct mps_command * cm,void * sgep,size_t len,int segsleft)2766 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft)
2767 {
2768 MPI2_SGE_TRANSACTION_UNION *tc = sgep;
2769 MPI2_SGE_SIMPLE64 *sge = sgep;
2770 int error, type;
2771 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2772
2773 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK);
2774
2775 #ifdef INVARIANTS
2776 switch (type) {
2777 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: {
2778 if (len != tc->DetailsLength + 4)
2779 panic("TC %p length %u or %zu?", tc,
2780 tc->DetailsLength + 4, len);
2781 }
2782 break;
2783 case MPI2_SGE_FLAGS_CHAIN_ELEMENT:
2784 /* Driver only uses 64-bit chain elements */
2785 if (len != MPS_SGC_SIZE)
2786 panic("CHAIN %p length %u or %zu?", sgep,
2787 MPS_SGC_SIZE, len);
2788 break;
2789 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT:
2790 /* Driver only uses 64-bit SGE simple elements */
2791 if (len != MPS_SGE64_SIZE)
2792 panic("SGE simple %p length %u or %zu?", sge,
2793 MPS_SGE64_SIZE, len);
2794 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) &
2795 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0)
2796 panic("SGE simple %p not marked 64-bit?", sge);
2797
2798 break;
2799 default:
2800 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags);
2801 }
2802 #endif
2803
2804 /*
2805 * case 1: 1 more segment, enough room for it
2806 * case 2: 2 more segments, enough room for both
2807 * case 3: >=2 more segments, only enough room for 1 and a chain
2808 * case 4: >=1 more segment, enough room for only a chain
2809 * case 5: >=1 more segment, no room for anything (error)
2810 */
2811
2812 /*
2813 * There should be room for at least a chain element, or this
2814 * code is buggy. Case (5).
2815 */
2816 if (cm->cm_sglsize < MPS_SGC_SIZE)
2817 panic("MPS: Need SGE Error Code\n");
2818
2819 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) {
2820 /*
2821 * 1 or more segment, enough room for only a chain.
2822 * Hope the previous element wasn't a Simple entry
2823 * that needed to be marked with
2824 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4).
2825 */
2826 if ((error = mps_add_chain(cm)) != 0)
2827 return (error);
2828 }
2829
2830 if (segsleft >= 2 &&
2831 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) {
2832 /*
2833 * There are 2 or more segments left to add, and only
2834 * enough room for 1 and a chain. Case (3).
2835 *
2836 * Mark as last element in this chain if necessary.
2837 */
2838 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2839 sge->FlagsLength |= htole32(
2840 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT);
2841 }
2842
2843 /*
2844 * Add the item then a chain. Do the chain now,
2845 * rather than on the next iteration, to simplify
2846 * understanding the code.
2847 */
2848 cm->cm_sglsize -= len;
2849 bcopy(sgep, cm->cm_sge, len);
2850 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2851 return (mps_add_chain(cm));
2852 }
2853
2854 #ifdef INVARIANTS
2855 /* Case 1: 1 more segment, enough room for it. */
2856 if (segsleft == 1 && cm->cm_sglsize < len)
2857 panic("1 seg left and no room? %u versus %zu",
2858 cm->cm_sglsize, len);
2859
2860 /* Case 2: 2 more segments, enough room for both */
2861 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE)
2862 panic("2 segs left and no room? %u versus %zu",
2863 cm->cm_sglsize, len);
2864 #endif
2865
2866 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2867 /*
2868 * If this is a bi-directional request, need to account for that
2869 * here. Save the pre-filled sge values. These will be used
2870 * either for the 2nd SGL or for a single direction SGL. If
2871 * cm_out_len is non-zero, this is a bi-directional request, so
2872 * fill in the OUT SGL first, then the IN SGL, otherwise just
2873 * fill in the IN SGL. Note that at this time, when filling in
2874 * 2 SGL's for a bi-directional request, they both use the same
2875 * DMA buffer (same cm command).
2876 */
2877 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF;
2878 saved_address_low = sge->Address.Low;
2879 saved_address_high = sge->Address.High;
2880 if (cm->cm_out_len) {
2881 sge->FlagsLength = htole32(cm->cm_out_len |
2882 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2883 MPI2_SGE_FLAGS_END_OF_BUFFER |
2884 MPI2_SGE_FLAGS_HOST_TO_IOC |
2885 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2886 MPI2_SGE_FLAGS_SHIFT));
2887 cm->cm_sglsize -= len;
2888 bcopy(sgep, cm->cm_sge, len);
2889 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge
2890 + len);
2891 }
2892 saved_buf_len |=
2893 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2894 MPI2_SGE_FLAGS_END_OF_BUFFER |
2895 MPI2_SGE_FLAGS_LAST_ELEMENT |
2896 MPI2_SGE_FLAGS_END_OF_LIST |
2897 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2898 MPI2_SGE_FLAGS_SHIFT);
2899 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) {
2900 saved_buf_len |=
2901 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2902 MPI2_SGE_FLAGS_SHIFT);
2903 } else {
2904 saved_buf_len |=
2905 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2906 MPI2_SGE_FLAGS_SHIFT);
2907 }
2908 sge->FlagsLength = htole32(saved_buf_len);
2909 sge->Address.Low = saved_address_low;
2910 sge->Address.High = saved_address_high;
2911 }
2912
2913 cm->cm_sglsize -= len;
2914 bcopy(sgep, cm->cm_sge, len);
2915 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2916 return (0);
2917 }
2918
2919 /*
2920 * Add one dma segment to the scatter-gather list for a command.
2921 */
2922 int
mps_add_dmaseg(struct mps_command * cm,vm_paddr_t pa,size_t len,u_int flags,int segsleft)2923 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2924 int segsleft)
2925 {
2926 MPI2_SGE_SIMPLE64 sge;
2927
2928 /*
2929 * This driver always uses 64-bit address elements for simplicity.
2930 */
2931 bzero(&sge, sizeof(sge));
2932 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2933 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2934 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT));
2935 mps_from_u64(pa, &sge.Address);
2936
2937 return (mps_push_sge(cm, &sge, sizeof sge, segsleft));
2938 }
2939
2940 static void
mps_data_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)2941 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2942 {
2943 struct mps_softc *sc;
2944 struct mps_command *cm;
2945 u_int i, dir, sflags;
2946
2947 cm = (struct mps_command *)arg;
2948 sc = cm->cm_sc;
2949
2950 /*
2951 * In this case, just print out a warning and let the chip tell the
2952 * user they did the wrong thing.
2953 */
2954 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2955 mps_dprint(sc, MPS_ERROR,
2956 "%s: warning: busdma returned %d segments, "
2957 "more than the %d allowed\n", __func__, nsegs,
2958 cm->cm_max_segs);
2959 }
2960
2961 /*
2962 * Set up DMA direction flags. Bi-directional requests are also handled
2963 * here. In that case, both direction flags will be set.
2964 */
2965 sflags = 0;
2966 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) {
2967 /*
2968 * We have to add a special case for SMP passthrough, there
2969 * is no easy way to generically handle it. The first
2970 * S/G element is used for the command (therefore the
2971 * direction bit needs to be set). The second one is used
2972 * for the reply. We'll leave it to the caller to make
2973 * sure we only have two buffers.
2974 */
2975 /*
2976 * Even though the busdma man page says it doesn't make
2977 * sense to have both direction flags, it does in this case.
2978 * We have one s/g element being accessed in each direction.
2979 */
2980 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2981
2982 /*
2983 * Set the direction flag on the first buffer in the SMP
2984 * passthrough request. We'll clear it for the second one.
2985 */
2986 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2987 MPI2_SGE_FLAGS_END_OF_BUFFER;
2988 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) {
2989 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2990 dir = BUS_DMASYNC_PREWRITE;
2991 } else
2992 dir = BUS_DMASYNC_PREREAD;
2993
2994 for (i = 0; i < nsegs; i++) {
2995 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) {
2996 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2997 }
2998 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2999 sflags, nsegs - i);
3000 if (error != 0) {
3001 /* Resource shortage, roll back! */
3002 if (ratecheck(&sc->lastfail, &mps_chainfail_interval))
3003 mps_dprint(sc, MPS_INFO, "Out of chain frames, "
3004 "consider increasing hw.mps.max_chains.\n");
3005 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED;
3006 /*
3007 * mpr_complete_command can only be called on commands
3008 * that are in the queue. Since this is an error path
3009 * which gets called before we enqueue, update the state
3010 * to meet this requirement before we complete it.
3011 */
3012 cm->cm_state = MPS_CM_STATE_INQUEUE;
3013 mps_complete_command(sc, cm);
3014 return;
3015 }
3016 }
3017
3018 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
3019 mps_enqueue_request(sc, cm);
3020
3021 return;
3022 }
3023
3024 static void
mps_data_cb2(void * arg,bus_dma_segment_t * segs,int nsegs,bus_size_t mapsize,int error)3025 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
3026 int error)
3027 {
3028 mps_data_cb(arg, segs, nsegs, error);
3029 }
3030
3031 /*
3032 * This is the routine to enqueue commands ansynchronously.
3033 * Note that the only error path here is from bus_dmamap_load(), which can
3034 * return EINPROGRESS if it is waiting for resources. Other than this, it's
3035 * assumed that if you have a command in-hand, then you have enough credits
3036 * to use it.
3037 */
3038 int
mps_map_command(struct mps_softc * sc,struct mps_command * cm)3039 mps_map_command(struct mps_softc *sc, struct mps_command *cm)
3040 {
3041 int error = 0;
3042
3043 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) {
3044 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
3045 &cm->cm_uio, mps_data_cb2, cm, 0);
3046 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) {
3047 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
3048 cm->cm_data, mps_data_cb, cm, 0);
3049 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
3050 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
3051 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0);
3052 } else {
3053 /* Add a zero-length element as needed */
3054 if (cm->cm_sge != NULL)
3055 mps_add_dmaseg(cm, 0, 0, 0, 1);
3056 mps_enqueue_request(sc, cm);
3057 }
3058
3059 return (error);
3060 }
3061
3062 /*
3063 * This is the routine to enqueue commands synchronously. An error of
3064 * EINPROGRESS from mps_map_command() is ignored since the command will
3065 * be executed and enqueued automatically. Other errors come from msleep().
3066 */
3067 int
mps_wait_command(struct mps_softc * sc,struct mps_command ** cmp,int timeout,int sleep_flag)3068 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout,
3069 int sleep_flag)
3070 {
3071 int error, rc;
3072 struct timeval cur_time, start_time;
3073 struct mps_command *cm = *cmp;
3074
3075 if (sc->mps_flags & MPS_FLAGS_DIAGRESET)
3076 return EBUSY;
3077
3078 cm->cm_complete = NULL;
3079 cm->cm_flags |= MPS_CM_FLAGS_POLLED;
3080 error = mps_map_command(sc, cm);
3081 if ((error != 0) && (error != EINPROGRESS))
3082 return (error);
3083
3084 /*
3085 * Check for context and wait for 50 mSec at a time until time has
3086 * expired or the command has finished. If msleep can't be used, need
3087 * to poll.
3088 */
3089 if (curthread->td_no_sleeping != 0)
3090 sleep_flag = NO_SLEEP;
3091 getmicrouptime(&start_time);
3092 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) {
3093 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP;
3094 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz);
3095 if (error == EWOULDBLOCK) {
3096 /*
3097 * Record the actual elapsed time in the case of a
3098 * timeout for the message below.
3099 */
3100 getmicrouptime(&cur_time);
3101 timevalsub(&cur_time, &start_time);
3102 }
3103 } else {
3104 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
3105 mps_intr_locked(sc);
3106 if (sleep_flag == CAN_SLEEP)
3107 pause("mpswait", hz/20);
3108 else
3109 DELAY(50000);
3110
3111 getmicrouptime(&cur_time);
3112 timevalsub(&cur_time, &start_time);
3113 if (cur_time.tv_sec > timeout) {
3114 error = EWOULDBLOCK;
3115 break;
3116 }
3117 }
3118 }
3119
3120 if (error == EWOULDBLOCK) {
3121 if (cm->cm_timeout_handler == NULL) {
3122 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d,"
3123 " elapsed=%jd\n", __func__, timeout,
3124 (intmax_t)cur_time.tv_sec);
3125 rc = mps_reinit(sc);
3126 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
3127 "failed");
3128 } else
3129 cm->cm_timeout_handler(sc, cm);
3130 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) {
3131 /*
3132 * Tell the caller that we freed the command in a
3133 * reinit.
3134 */
3135 *cmp = NULL;
3136 }
3137 error = ETIMEDOUT;
3138 }
3139 return (error);
3140 }
3141
3142 /*
3143 * The MPT driver had a verbose interface for config pages. In this driver,
3144 * reduce it to much simpler terms, similar to the Linux driver.
3145 */
3146 int
mps_read_config_page(struct mps_softc * sc,struct mps_config_params * params)3147 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params)
3148 {
3149 MPI2_CONFIG_REQUEST *req;
3150 struct mps_command *cm;
3151 int error;
3152
3153 if (sc->mps_flags & MPS_FLAGS_BUSY) {
3154 return (EBUSY);
3155 }
3156
3157 cm = mps_alloc_command(sc);
3158 if (cm == NULL) {
3159 return (EBUSY);
3160 }
3161
3162 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
3163 req->Function = MPI2_FUNCTION_CONFIG;
3164 req->Action = params->action;
3165 req->SGLFlags = 0;
3166 req->ChainOffset = 0;
3167 req->PageAddress = params->page_address;
3168 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
3169 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
3170
3171 hdr = ¶ms->hdr.Ext;
3172 req->ExtPageType = hdr->ExtPageType;
3173 req->ExtPageLength = hdr->ExtPageLength;
3174 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
3175 req->Header.PageLength = 0; /* Must be set to zero */
3176 req->Header.PageNumber = hdr->PageNumber;
3177 req->Header.PageVersion = hdr->PageVersion;
3178 } else {
3179 MPI2_CONFIG_PAGE_HEADER *hdr;
3180
3181 hdr = ¶ms->hdr.Struct;
3182 req->Header.PageType = hdr->PageType;
3183 req->Header.PageNumber = hdr->PageNumber;
3184 req->Header.PageLength = hdr->PageLength;
3185 req->Header.PageVersion = hdr->PageVersion;
3186 }
3187
3188 cm->cm_data = params->buffer;
3189 cm->cm_length = params->length;
3190 if (cm->cm_data != NULL) {
3191 cm->cm_sge = &req->PageBufferSGE;
3192 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
3193 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN;
3194 } else
3195 cm->cm_sge = NULL;
3196 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
3197
3198 cm->cm_complete_data = params;
3199 if (params->callback != NULL) {
3200 cm->cm_complete = mps_config_complete;
3201 return (mps_map_command(sc, cm));
3202 } else {
3203 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP);
3204 if (error) {
3205 mps_dprint(sc, MPS_FAULT,
3206 "Error %d reading config page\n", error);
3207 if (cm != NULL)
3208 mps_free_command(sc, cm);
3209 return (error);
3210 }
3211 mps_config_complete(sc, cm);
3212 }
3213
3214 return (0);
3215 }
3216
3217 int
mps_write_config_page(struct mps_softc * sc,struct mps_config_params * params)3218 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params)
3219 {
3220 return (EINVAL);
3221 }
3222
3223 static void
mps_config_complete(struct mps_softc * sc,struct mps_command * cm)3224 mps_config_complete(struct mps_softc *sc, struct mps_command *cm)
3225 {
3226 MPI2_CONFIG_REPLY *reply;
3227 struct mps_config_params *params;
3228
3229 MPS_FUNCTRACE(sc);
3230 params = cm->cm_complete_data;
3231
3232 if (cm->cm_data != NULL) {
3233 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
3234 BUS_DMASYNC_POSTREAD);
3235 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
3236 }
3237
3238 /*
3239 * XXX KDM need to do more error recovery? This results in the
3240 * device in question not getting probed.
3241 */
3242 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) {
3243 params->status = MPI2_IOCSTATUS_BUSY;
3244 goto done;
3245 }
3246
3247 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
3248 if (reply == NULL) {
3249 params->status = MPI2_IOCSTATUS_BUSY;
3250 goto done;
3251 }
3252 params->status = reply->IOCStatus;
3253 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
3254 params->hdr.Ext.ExtPageType = reply->ExtPageType;
3255 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
3256 params->hdr.Ext.PageType = reply->Header.PageType;
3257 params->hdr.Ext.PageNumber = reply->Header.PageNumber;
3258 params->hdr.Ext.PageVersion = reply->Header.PageVersion;
3259 } else {
3260 params->hdr.Struct.PageType = reply->Header.PageType;
3261 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
3262 params->hdr.Struct.PageLength = reply->Header.PageLength;
3263 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
3264 }
3265
3266 done:
3267 mps_free_command(sc, cm);
3268 if (params->callback != NULL)
3269 params->callback(sc, params);
3270
3271 return;
3272 }
3273