xref: /freebsd/sys/powerpc/ps3/mmu_ps3.c (revision fdafd315ad0d0f28a11b9fb4476a9ab059c62b92)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (C) 2010 Nathan Whitehorn
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/param.h>
29 #include <sys/kernel.h>
30 #include <sys/ktr.h>
31 #include <sys/lock.h>
32 #include <sys/msgbuf.h>
33 #include <sys/mutex.h>
34 #include <sys/proc.h>
35 #include <sys/sysctl.h>
36 #include <sys/systm.h>
37 #include <sys/vmmeter.h>
38 
39 #include <vm/vm.h>
40 #include <vm/vm_param.h>
41 #include <vm/vm_kern.h>
42 #include <vm/vm_page.h>
43 #include <vm/vm_map.h>
44 #include <vm/vm_object.h>
45 #include <vm/vm_extern.h>
46 #include <vm/vm_pageout.h>
47 #include <vm/uma.h>
48 
49 #include <powerpc/aim/mmu_oea64.h>
50 
51 #include "ps3-hvcall.h"
52 
53 #define VSID_HASH_MASK		0x0000007fffffffffUL
54 #define PTESYNC()		__asm __volatile("ptesync")
55 
56 extern int ps3fb_remap(void);
57 
58 static uint64_t mps3_vas_id;
59 
60 /*
61  * Kernel MMU interface
62  */
63 
64 static void	mps3_install(void);
65 static void	mps3_bootstrap(vm_offset_t kernelstart,
66 		    vm_offset_t kernelend);
67 static void	mps3_cpu_bootstrap(int ap);
68 static int64_t	mps3_pte_synch(struct pvo_entry *);
69 static int64_t	mps3_pte_clear(struct pvo_entry *, uint64_t ptebit);
70 static int64_t	mps3_pte_unset(struct pvo_entry *);
71 static int64_t	mps3_pte_insert(struct pvo_entry *);
72 
73 static struct pmap_funcs mps3_methods = {
74 	.install = mps3_install,
75         .bootstrap = mps3_bootstrap,
76         .cpu_bootstrap = mps3_cpu_bootstrap,
77 };
78 
79 static struct moea64_funcs mps3_funcs = {
80 	.pte_synch = mps3_pte_synch,
81 	.pte_clear = mps3_pte_clear,
82 	.pte_unset = mps3_pte_unset,
83 	.pte_insert = mps3_pte_insert,
84 };
85 
86 MMU_DEF_INHERIT(ps3_mmu, "mmu_ps3", mps3_methods, oea64_mmu);
87 
88 static struct mtx mps3_table_lock;
89 
90 static void
mps3_install(void)91 mps3_install(void)
92 {
93 	moea64_ops = &mps3_funcs;
94 	moea64_install();
95 }
96 
97 static void
mps3_bootstrap(vm_offset_t kernelstart,vm_offset_t kernelend)98 mps3_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend)
99 {
100 	uint64_t final_pteg_count;
101 
102 	mtx_init(&mps3_table_lock, "page table", NULL, MTX_DEF);
103 
104 	moea64_early_bootstrap(kernelstart, kernelend);
105 
106 	/* In case we had a page table already */
107 	lv1_destruct_virtual_address_space(0);
108 
109 	/* Allocate new hardware page table */
110 	lv1_construct_virtual_address_space(
111 	    20 /* log_2(moea64_pteg_count) */, 2 /* n page sizes */,
112 	    (24UL << 56) | (16UL << 48) /* page sizes 16 MB + 64 KB */,
113 	    &mps3_vas_id, &final_pteg_count
114 	);
115 
116 	lv1_select_virtual_address_space(mps3_vas_id);
117 
118 	moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
119 
120 	moea64_mid_bootstrap(kernelstart, kernelend);
121 	moea64_late_bootstrap(kernelstart, kernelend);
122 }
123 
124 static void
mps3_cpu_bootstrap(int ap)125 mps3_cpu_bootstrap(int ap)
126 {
127 	struct slb *slb = PCPU_GET(aim.slb);
128 	register_t seg0;
129 	int i;
130 
131 	mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR);
132 
133 	/*
134 	 * Select the page table we configured above and set up the FB mapping
135 	 * so we can have a console.
136 	 */
137 	lv1_select_virtual_address_space(mps3_vas_id);
138 
139 	if (!ap)
140 		ps3fb_remap();
141 
142 	/*
143 	 * Install kernel SLB entries
144 	 */
145 
146         __asm __volatile ("slbia");
147         __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0));
148 	for (i = 0; i < 64; i++) {
149 		if (!(slb[i].slbe & SLBE_VALID))
150 			continue;
151 
152 		__asm __volatile ("slbmte %0, %1" ::
153 		    "r"(slb[i].slbv), "r"(slb[i].slbe));
154 	}
155 }
156 
157 static int64_t
mps3_pte_synch_locked(struct pvo_entry * pvo)158 mps3_pte_synch_locked(struct pvo_entry *pvo)
159 {
160 	uint64_t halfbucket[4], rcbits;
161 
162 	PTESYNC();
163 	lv1_read_htab_entries(mps3_vas_id, pvo->pvo_pte.slot & ~0x3UL,
164 	    &halfbucket[0], &halfbucket[1], &halfbucket[2], &halfbucket[3],
165 	    &rcbits);
166 
167 	/* Check if present in page table */
168 	if ((halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_AVPN_MASK) !=
169 	    ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) &
170 	    LPTE_AVPN_MASK))
171 		return (-1);
172 	if (!(halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_VALID))
173 		return (-1);
174 
175 	/*
176 	 * rcbits contains the low 12 bits of each PTE's 2nd part,
177 	 * spaced at 16-bit intervals
178 	 */
179 
180 	return ((rcbits >> ((3 - (pvo->pvo_pte.slot & 0x3))*16)) &
181 	    (LPTE_CHG | LPTE_REF));
182 }
183 
184 static int64_t
mps3_pte_synch(struct pvo_entry * pvo)185 mps3_pte_synch(struct pvo_entry *pvo)
186 {
187 	int64_t retval;
188 
189 	mtx_lock(&mps3_table_lock);
190 	retval = mps3_pte_synch_locked(pvo);
191 	mtx_unlock(&mps3_table_lock);
192 
193 	return (retval);
194 }
195 
196 static int64_t
mps3_pte_clear(struct pvo_entry * pvo,uint64_t ptebit)197 mps3_pte_clear(struct pvo_entry *pvo, uint64_t ptebit)
198 {
199 	int64_t refchg;
200 	struct lpte pte;
201 
202 	mtx_lock(&mps3_table_lock);
203 
204 	refchg = mps3_pte_synch_locked(pvo);
205 	if (refchg < 0) {
206 		mtx_unlock(&mps3_table_lock);
207 		return (refchg);
208 	}
209 
210 	moea64_pte_from_pvo(pvo, &pte);
211 
212 	pte.pte_lo |= refchg;
213 	pte.pte_lo &= ~ptebit;
214 	/* XXX: race on RC bits between write and sync. Anything to do? */
215 	lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, pte.pte_hi,
216 	    pte.pte_lo);
217 	mtx_unlock(&mps3_table_lock);
218 
219 	return (refchg);
220 }
221 
222 static int64_t
mps3_pte_unset(struct pvo_entry * pvo)223 mps3_pte_unset(struct pvo_entry *pvo)
224 {
225 	int64_t refchg;
226 
227 	mtx_lock(&mps3_table_lock);
228 	refchg = mps3_pte_synch_locked(pvo);
229 	if (refchg < 0) {
230 		STAT_MOEA64(moea64_pte_overflow--);
231 		mtx_unlock(&mps3_table_lock);
232 		return (-1);
233 	}
234 	/* XXX: race on RC bits between unset and sync. Anything to do? */
235 	lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, 0, 0);
236 	mtx_unlock(&mps3_table_lock);
237 	STAT_MOEA64(moea64_pte_valid--);
238 
239 	return (refchg & (LPTE_REF | LPTE_CHG));
240 }
241 
242 static int64_t
mps3_pte_insert(struct pvo_entry * pvo)243 mps3_pte_insert(struct pvo_entry *pvo)
244 {
245 	int result;
246 	struct lpte pte, evicted;
247 	uint64_t index;
248 
249 	if (pvo->pvo_vaddr & PVO_HID) {
250 		/* Hypercall needs primary PTEG */
251 		pvo->pvo_vaddr &= ~PVO_HID;
252 		pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3);
253 	}
254 
255 	pvo->pvo_pte.slot &= ~7UL;
256 	moea64_pte_from_pvo(pvo, &pte);
257 	evicted.pte_hi = 0;
258 	PTESYNC();
259 	mtx_lock(&mps3_table_lock);
260 	result = lv1_insert_htab_entry(mps3_vas_id, pvo->pvo_pte.slot,
261 	    pte.pte_hi, pte.pte_lo, LPTE_LOCKED | LPTE_WIRED, 0,
262 	    &index, &evicted.pte_hi, &evicted.pte_lo);
263 	mtx_unlock(&mps3_table_lock);
264 
265 	if (result != 0) {
266 		/* No freeable slots in either PTEG? We're hosed. */
267 		panic("mps3_pte_insert: overflow (%d)", result);
268 		return (-1);
269 	}
270 
271 	/*
272 	 * See where we ended up.
273 	 */
274 	if ((index & ~7UL) != pvo->pvo_pte.slot)
275 		pvo->pvo_vaddr |= PVO_HID;
276 	pvo->pvo_pte.slot = index;
277 
278 	STAT_MOEA64(moea64_pte_valid++);
279 
280 	if (evicted.pte_hi) {
281 		KASSERT((evicted.pte_hi & (LPTE_WIRED | LPTE_LOCKED)) == 0,
282 		    ("Evicted a wired PTE"));
283 		STAT_MOEA64(moea64_pte_valid--);
284 		STAT_MOEA64(moea64_pte_overflow++);
285 	}
286 
287 	return (0);
288 }
289