1 /*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */
29
30 /* TODO Move headers to mprvar */
31 #include <sys/types.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/malloc.h>
39 #include <sys/sysctl.h>
40 #include <sys/uio.h>
41
42 #include <machine/bus.h>
43 #include <machine/resource.h>
44 #include <sys/rman.h>
45
46 #include <dev/pci/pcireg.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pci_private.h>
49
50 #include <dev/mpr/mpi/mpi2_type.h>
51 #include <dev/mpr/mpi/mpi2.h>
52 #include <dev/mpr/mpi/mpi2_ioc.h>
53 #include <dev/mpr/mpi/mpi2_cnfg.h>
54 #include <dev/mpr/mpi/mpi2_tool.h>
55 #include <dev/mpr/mpi/mpi2_pci.h>
56
57 #include <sys/queue.h>
58 #include <sys/kthread.h>
59 #include <dev/mpr/mpr_ioctl.h>
60 #include <dev/mpr/mprvar.h>
61
62 static int mpr_pci_probe(device_t);
63 static int mpr_pci_attach(device_t);
64 static int mpr_pci_detach(device_t);
65 static int mpr_pci_suspend(device_t);
66 static int mpr_pci_resume(device_t);
67 static void mpr_pci_free(struct mpr_softc *);
68 static int mpr_alloc_msix(struct mpr_softc *sc, int msgs);
69 static int mpr_alloc_msi(struct mpr_softc *sc, int msgs);
70 static int mpr_pci_alloc_interrupts(struct mpr_softc *sc);
71
72 static device_method_t mpr_methods[] = {
73 DEVMETHOD(device_probe, mpr_pci_probe),
74 DEVMETHOD(device_attach, mpr_pci_attach),
75 DEVMETHOD(device_detach, mpr_pci_detach),
76 DEVMETHOD(device_suspend, mpr_pci_suspend),
77 DEVMETHOD(device_resume, mpr_pci_resume),
78 DEVMETHOD(bus_print_child, bus_generic_print_child),
79 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
80 { 0, 0 }
81 };
82
83 static driver_t mpr_pci_driver = {
84 "mpr",
85 mpr_methods,
86 sizeof(struct mpr_softc)
87 };
88
89 struct mpr_ident {
90 uint16_t vendor;
91 uint16_t device;
92 uint16_t subvendor;
93 uint16_t subdevice;
94 u_int flags;
95 const char *desc;
96 } mpr_identifiers[] = {
97 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004,
98 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" },
99 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008,
100 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" },
101 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1,
102 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" },
103 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2,
104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" },
105 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5,
106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" },
107 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6,
108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" },
109 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216,
110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" },
111 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224,
112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" },
113 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1,
114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" },
115 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2,
116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" },
117 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1,
118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" },
119 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2,
120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" },
121 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408,
122 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
123 "Avago Technologies (LSI) SAS3408" },
124 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416,
125 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
126 "Avago Technologies (LSI) SAS3416" },
127 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508,
128 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
129 "Avago Technologies (LSI) SAS3508" },
130 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1,
131 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
132 "Avago Technologies (LSI) SAS3508_1" },
133 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516,
134 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
135 "Avago Technologies (LSI) SAS3516" },
136 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1,
137 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
138 "Avago Technologies (LSI) SAS3516_1" },
139 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616,
140 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
141 "Avago Technologies (LSI) SAS3616" },
142 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708,
143 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
144 "Avago Technologies (LSI) SAS3708" },
145 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716,
146 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
147 "Avago Technologies (LSI) SAS3716" },
148 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3816,
149 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
150 "Broadcom Inc. (LSI) INVALID0 SAS3816" },
151 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816,
152 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
153 "Broadcom Inc. (LSI) CFG SEC SAS3816" },
154 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3816,
155 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
156 "Broadcom Inc. (LSI) HARD SEC SAS3816" },
157 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3816,
158 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
159 "Broadcom Inc. (LSI) INVALID1 SAS3816" },
160 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3916,
161 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
162 "Broadcom Inc. (LSI) INVALID0 SAS3916" },
163 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916,
164 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
165 "Broadcom Inc. (LSI) CFG SEC SAS3916" },
166 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3916,
167 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
168 "Broadcom Inc. (LSI) HARD SEC SAS3916" },
169 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3916,
170 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
171 "Broadcom Inc. (LSI) INVALID1 SAS3916" },
172 { 0, 0, 0, 0, 0, NULL }
173 };
174
175 DRIVER_MODULE(mpr, pci, mpr_pci_driver, 0, 0);
176 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice;D:#", pci,
177 mpr, mpr_identifiers, nitems(mpr_identifiers) - 1);
178
179 MODULE_DEPEND(mpr, cam, 1, 1, 1);
180
181 static struct mpr_ident *
mpr_find_ident(device_t dev)182 mpr_find_ident(device_t dev)
183 {
184 struct mpr_ident *m;
185
186 for (m = mpr_identifiers; m->vendor != 0; m++) {
187 if (m->vendor != pci_get_vendor(dev))
188 continue;
189 if (m->device != pci_get_device(dev))
190 continue;
191 if ((m->subvendor != 0xffff) &&
192 (m->subvendor != pci_get_subvendor(dev)))
193 continue;
194 if ((m->subdevice != 0xffff) &&
195 (m->subdevice != pci_get_subdevice(dev)))
196 continue;
197 return (m);
198 }
199
200 return (NULL);
201 }
202
203 static int
mpr_pci_probe(device_t dev)204 mpr_pci_probe(device_t dev)
205 {
206 struct mpr_ident *id;
207
208 if ((id = mpr_find_ident(dev)) != NULL) {
209 device_set_desc(dev, id->desc);
210 return (BUS_PROBE_DEFAULT);
211 }
212 return (ENXIO);
213 }
214
215 static int
mpr_pci_attach(device_t dev)216 mpr_pci_attach(device_t dev)
217 {
218 bus_dma_template_t t;
219 struct mpr_softc *sc;
220 struct mpr_ident *m;
221 int error, i;
222
223 sc = device_get_softc(dev);
224 bzero(sc, sizeof(*sc));
225 sc->mpr_dev = dev;
226 m = mpr_find_ident(dev);
227 sc->mpr_flags = m->flags;
228
229 switch (m->device) {
230 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3816:
231 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3816:
232 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3916:
233 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3916:
234 mpr_printf(sc, "HBA is in Non Secure mode\n");
235 return (ENXIO);
236 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816:
237 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916:
238 mpr_printf(sc, "HBA is in Configurable Secure mode\n");
239 break;
240 default:
241 break;
242 }
243
244 mpr_get_tunables(sc);
245
246 /* Twiddle basic PCI config bits for a sanity check */
247 pci_enable_busmaster(dev);
248
249 for (i = 0; i < PCI_MAXMAPS_0; i++) {
250 sc->mpr_regs_rid = PCIR_BAR(i);
251
252 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev,
253 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL)
254 break;
255 }
256
257 if (sc->mpr_regs_resource == NULL) {
258 mpr_printf(sc, "Cannot allocate PCI registers\n");
259 return (ENXIO);
260 }
261
262 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource);
263 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource);
264
265 /* Allocate the parent DMA tag */
266 bus_dma_template_init(&t, bus_get_dma_tag(dev));
267 if (bus_dma_template_tag(&t, &sc->mpr_parent_dmat)) {
268 mpr_printf(sc, "Cannot allocate parent DMA tag\n");
269 mpr_pci_free(sc);
270 return (ENOMEM);
271 }
272
273 if (((error = mpr_pci_alloc_interrupts(sc)) != 0) ||
274 ((error = mpr_attach(sc)) != 0))
275 mpr_pci_free(sc);
276
277 return (error);
278 }
279
280 /*
281 * Allocate, but don't assign interrupts early. Doing it before requesting
282 * the IOCFacts message informs the firmware that we want to do MSI-X
283 * multiqueue. We might not use all of the available messages, but there's
284 * no reason to re-alloc if we don't.
285 */
286 int
mpr_pci_alloc_interrupts(struct mpr_softc * sc)287 mpr_pci_alloc_interrupts(struct mpr_softc *sc)
288 {
289 device_t dev;
290 int error, msgs;
291
292 dev = sc->mpr_dev;
293 error = 0;
294 msgs = 0;
295
296 if (sc->disable_msix == 0) {
297 msgs = pci_msix_count(dev);
298 mpr_dprint(sc, MPR_INIT, "Counted %d MSI-X messages\n", msgs);
299 msgs = min(msgs, sc->max_msix);
300 msgs = min(msgs, MPR_MSIX_MAX);
301 msgs = min(msgs, 1); /* XXX */
302 if (msgs != 0) {
303 mpr_dprint(sc, MPR_INIT, "Attempting to allocate %d "
304 "MSI-X messages\n", msgs);
305 error = mpr_alloc_msix(sc, msgs);
306 }
307 }
308 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) {
309 msgs = pci_msi_count(dev);
310 mpr_dprint(sc, MPR_INIT, "Counted %d MSI messages\n", msgs);
311 msgs = min(msgs, MPR_MSI_MAX);
312 if (msgs != 0) {
313 mpr_dprint(sc, MPR_INIT, "Attempting to allocated %d "
314 "MSI messages\n", MPR_MSI_MAX);
315 error = mpr_alloc_msi(sc, MPR_MSI_MAX);
316 }
317 }
318 if ((error != 0) || (msgs == 0)) {
319 /*
320 * If neither MSI or MSI-X are available, assume legacy INTx.
321 * This also implies that there will be only 1 queue.
322 */
323 mpr_dprint(sc, MPR_INIT, "Falling back to legacy INTx\n");
324 sc->mpr_flags |= MPR_FLAGS_INTX;
325 msgs = 1;
326 } else
327 sc->mpr_flags |= MPR_FLAGS_MSI;
328
329 sc->msi_msgs = msgs;
330 mpr_dprint(sc, MPR_INIT, "Allocated %d interrupts\n", msgs);
331
332 return (error);
333 }
334
335 int
mpr_pci_setup_interrupts(struct mpr_softc * sc)336 mpr_pci_setup_interrupts(struct mpr_softc *sc)
337 {
338 device_t dev;
339 struct mpr_queue *q;
340 void *ihandler;
341 int i, error, rid, initial_rid;
342
343 dev = sc->mpr_dev;
344 error = ENXIO;
345
346 if (sc->mpr_flags & MPR_FLAGS_INTX) {
347 initial_rid = 0;
348 ihandler = mpr_intr;
349 } else if (sc->mpr_flags & MPR_FLAGS_MSI) {
350 initial_rid = 1;
351 ihandler = mpr_intr_msi;
352 } else {
353 mpr_dprint(sc, MPR_ERROR|MPR_INIT,
354 "Unable to set up interrupts\n");
355 return (EINVAL);
356 }
357
358 for (i = 0; i < sc->msi_msgs; i++) {
359 q = &sc->queues[i];
360 rid = i + initial_rid;
361 q->irq_rid = rid;
362 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
363 &q->irq_rid, RF_ACTIVE);
364 if (q->irq == NULL) {
365 mpr_dprint(sc, MPR_ERROR|MPR_INIT,
366 "Cannot allocate interrupt RID %d\n", rid);
367 sc->msi_msgs = i;
368 break;
369 }
370 error = bus_setup_intr(dev, q->irq,
371 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler,
372 sc, &q->intrhand);
373 if (error) {
374 mpr_dprint(sc, MPR_ERROR|MPR_INIT,
375 "Cannot setup interrupt RID %d\n", rid);
376 sc->msi_msgs = i;
377 break;
378 }
379 }
380
381 mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs);
382 return (error);
383 }
384
385 static int
mpr_pci_detach(device_t dev)386 mpr_pci_detach(device_t dev)
387 {
388 struct mpr_softc *sc;
389 int error;
390
391 sc = device_get_softc(dev);
392
393 if ((error = mpr_free(sc)) != 0)
394 return (error);
395
396 mpr_pci_free(sc);
397 return (0);
398 }
399
400 void
mpr_pci_free_interrupts(struct mpr_softc * sc)401 mpr_pci_free_interrupts(struct mpr_softc *sc)
402 {
403 struct mpr_queue *q;
404 int i;
405
406 if (sc->queues == NULL)
407 return;
408
409 for (i = 0; i < sc->msi_msgs; i++) {
410 q = &sc->queues[i];
411 if (q->irq != NULL) {
412 bus_teardown_intr(sc->mpr_dev, q->irq,
413 q->intrhand);
414 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ,
415 q->irq_rid, q->irq);
416 }
417 }
418 }
419
420 static void
mpr_pci_free(struct mpr_softc * sc)421 mpr_pci_free(struct mpr_softc *sc)
422 {
423
424 if (sc->mpr_parent_dmat != NULL) {
425 bus_dma_tag_destroy(sc->mpr_parent_dmat);
426 }
427
428 mpr_pci_free_interrupts(sc);
429
430 if (sc->mpr_flags & MPR_FLAGS_MSI)
431 pci_release_msi(sc->mpr_dev);
432
433 if (sc->mpr_regs_resource != NULL) {
434 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY,
435 sc->mpr_regs_rid, sc->mpr_regs_resource);
436 }
437
438 return;
439 }
440
441 static int
mpr_pci_suspend(device_t dev)442 mpr_pci_suspend(device_t dev)
443 {
444 return (EINVAL);
445 }
446
447 static int
mpr_pci_resume(device_t dev)448 mpr_pci_resume(device_t dev)
449 {
450 return (EINVAL);
451 }
452
453 static int
mpr_alloc_msix(struct mpr_softc * sc,int msgs)454 mpr_alloc_msix(struct mpr_softc *sc, int msgs)
455 {
456 int error;
457
458 error = pci_alloc_msix(sc->mpr_dev, &msgs);
459 return (error);
460 }
461
462 static int
mpr_alloc_msi(struct mpr_softc * sc,int msgs)463 mpr_alloc_msi(struct mpr_softc *sc, int msgs)
464 {
465 int error;
466
467 error = pci_alloc_msi(sc->mpr_dev, &msgs);
468 return (error);
469 }
470
471 int
mpr_pci_restore(struct mpr_softc * sc)472 mpr_pci_restore(struct mpr_softc *sc)
473 {
474 struct pci_devinfo *dinfo;
475
476 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
477
478 dinfo = device_get_ivars(sc->mpr_dev);
479 if (dinfo == NULL) {
480 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__);
481 return (EINVAL);
482 }
483
484 pci_cfg_restore(sc->mpr_dev, dinfo);
485 return (0);
486 }
487