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Searched defs:mode_offset (Results 1 – 6 of 6) sorted by relevance

/linux/arch/arm/mach-omap1/
H A Dmux.h27 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ argument
41 #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \ argument
53 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ argument
64 #define MUX_REG_7XX(reg, mode_offset, mode) \ argument
75 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ argument
94 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ argument
/linux/arch/arm/mach-davinci/
H A Dmux.h259 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
270 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
281 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
/linux/drivers/media/cec/core/
H A Dcec-pin.c184 static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in rx_error_inj()
246 static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in tx_error_inj()
/linux/drivers/net/wireless/ath/ath5k/
H A Deeprom.c470 u32 mode_offset[3]; in ath5k_eeprom_init_modes() local
/linux/drivers/clk/rockchip/
H A Dclk-pll.c1059 int lock_shift, int mode_offset, int mode_shift, in rockchip_clk_register_pll()
H A Dclk.h624 int mode_offset; member