xref: /freebsd/sys/dev/mmc/mmc.c (revision 07da3bb5d56c85325252cd1a9ae32fb5d3536dea)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2006 Bernd Walter.  All rights reserved.
5  * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
6  * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * Portions of this software may have been developed with reference to
29  * the SD Simplified Specification.  The following disclaimer may apply:
30  *
31  * The following conditions apply to the release of the simplified
32  * specification ("Simplified Specification") by the SD Card Association and
33  * the SD Group. The Simplified Specification is a subset of the complete SD
34  * Specification which is owned by the SD Card Association and the SD
35  * Group. This Simplified Specification is provided on a non-confidential
36  * basis subject to the disclaimers below. Any implementation of the
37  * Simplified Specification may require a license from the SD Card
38  * Association, SD Group, SD-3C LLC or other third parties.
39  *
40  * Disclaimers:
41  *
42  * The information contained in the Simplified Specification is presented only
43  * as a standard specification for SD Cards and SD Host/Ancillary products and
44  * is provided "AS-IS" without any representations or warranties of any
45  * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
46  * Card Association for any damages, any infringements of patents or other
47  * right of the SD Group, SD-3C LLC, the SD Card Association or any third
48  * parties, which may result from its use. No license is granted by
49  * implication, estoppel or otherwise under any patent or other rights of the
50  * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
51  * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
52  * or the SD Card Association to disclose or distribute any technical
53  * information, know-how or other confidential information to any third party.
54  */
55 
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/kernel.h>
59 #include <sys/malloc.h>
60 #include <sys/lock.h>
61 #include <sys/module.h>
62 #include <sys/mutex.h>
63 #include <sys/bus.h>
64 #include <sys/endian.h>
65 #include <sys/sbuf.h>
66 #include <sys/sysctl.h>
67 #include <sys/time.h>
68 
69 #include <dev/mmc/bridge.h>
70 #include <dev/mmc/mmc_private.h>
71 #include <dev/mmc/mmc_subr.h>
72 #include <dev/mmc/mmcreg.h>
73 #include <dev/mmc/mmcbrvar.h>
74 #include <dev/mmc/mmcvar.h>
75 
76 #include "mmcbr_if.h"
77 #include "mmcbus_if.h"
78 
79 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY);
80 
81 /*
82  * Per-card data
83  */
84 struct mmc_ivars {
85 	uint32_t raw_cid[4];	/* Raw bits of the CID */
86 	uint32_t raw_csd[4];	/* Raw bits of the CSD */
87 	uint32_t raw_scr[2];	/* Raw bits of the SCR */
88 	uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */
89 	uint32_t raw_sd_status[16];	/* Raw bits of the SD_STATUS */
90 	uint16_t rca;
91 	u_char read_only;	/* True when the device is read-only */
92 	u_char high_cap;	/* High Capacity device (block addressed) */
93 	enum mmc_card_mode mode;
94 	enum mmc_bus_width bus_width;	/* Bus width to use */
95 	struct mmc_cid cid;	/* cid decoded */
96 	struct mmc_csd csd;	/* csd decoded */
97 	struct mmc_scr scr;	/* scr decoded */
98 	struct mmc_sd_status sd_status;	/* SD_STATUS decoded */
99 	uint32_t sec_count;	/* Card capacity in 512byte blocks */
100 	uint32_t timings;	/* Mask of bus timings supported */
101 	uint32_t vccq_120;	/* Mask of bus timings at VCCQ of 1.2 V */
102 	uint32_t vccq_180;	/* Mask of bus timings at VCCQ of 1.8 V */
103 	uint32_t tran_speed;	/* Max speed in normal mode */
104 	uint32_t hs_tran_speed;	/* Max speed in high speed mode */
105 	uint32_t erase_sector;	/* Card native erase sector size */
106 	uint32_t cmd6_time;	/* Generic switch timeout [us] */
107 	uint32_t quirks;	/* Quirks as per mmc_quirk->quirks */
108 	char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
109 	char card_sn_string[16];/* Formatted serial # for disk->d_ident */
110 };
111 
112 #define	CMD_RETRIES	3
113 
114 static const struct mmc_quirk mmc_quirks[] = {
115 	/*
116 	 * For some SanDisk iNAND devices, the CMD38 argument needs to be
117 	 * provided in EXT_CSD[113].
118 	 */
119 	{ 0x2, 0x100,	 		"SEM02G", MMC_QUIRK_INAND_CMD38 },
120 	{ 0x2, 0x100,			"SEM04G", MMC_QUIRK_INAND_CMD38 },
121 	{ 0x2, 0x100,			"SEM08G", MMC_QUIRK_INAND_CMD38 },
122 	{ 0x2, 0x100,			"SEM16G", MMC_QUIRK_INAND_CMD38 },
123 	{ 0x2, 0x100,			"SEM32G", MMC_QUIRK_INAND_CMD38 },
124 
125 	/*
126 	 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to
127 	 * unrecoverable data corruption.
128 	 */
129 	{ 0x70, MMC_QUIRK_OID_ANY,	"V10008", MMC_QUIRK_BROKEN_TRIM },
130 	{ 0x70, MMC_QUIRK_OID_ANY,	"V10016", MMC_QUIRK_BROKEN_TRIM },
131 	{ 0x0, 0x0, NULL, 0x0 }
132 };
133 
134 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
135     "mmc driver");
136 
137 static int mmc_debug;
138 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
139     "Debug level");
140 
141 /* bus entry points */
142 static int mmc_acquire_bus(device_t busdev, device_t dev);
143 static int mmc_attach(device_t dev);
144 static int mmc_child_location(device_t dev, device_t child, struct sbuf *sb);
145 static int mmc_detach(device_t dev);
146 static int mmc_probe(device_t dev);
147 static int mmc_read_ivar(device_t bus, device_t child, int which,
148     uintptr_t *result);
149 static int mmc_release_bus(device_t busdev, device_t dev);
150 static int mmc_resume(device_t dev);
151 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune);
152 static void mmc_retune_unpause(device_t busdev, device_t dev);
153 static int mmc_suspend(device_t dev);
154 static int mmc_wait_for_request(device_t busdev, device_t dev,
155     struct mmc_request *req);
156 static int mmc_write_ivar(device_t bus, device_t child, int which,
157     uintptr_t value);
158 
159 #define	MMC_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
160 #define	MMC_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
161 #define	MMC_LOCK_INIT(_sc)						\
162 	mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev),	\
163 	    "mmc", MTX_DEF)
164 #define	MMC_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_mtx);
165 #define	MMC_ASSERT_LOCKED(_sc)	mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
166 #define	MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
167 
168 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid);
169 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
170 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status,
171     struct mmc_sd_status *sd_status);
172 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca,
173     uint32_t *rawsdstatus);
174 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca,
175     uint32_t *rawscr);
176 static int mmc_calculate_clock(struct mmc_softc *sc);
177 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid,
178     bool is_4_41p);
179 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid);
180 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd);
181 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd);
182 static void mmc_delayed_attach(void *xsc);
183 static int mmc_delete_cards(struct mmc_softc *sc, bool final);
184 static void mmc_discover_cards(struct mmc_softc *sc);
185 static void mmc_format_card_id_string(struct mmc_ivars *ivar);
186 static void mmc_go_discovery(struct mmc_softc *sc);
187 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start,
188     int size);
189 static int mmc_highest_voltage(uint32_t ocr);
190 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing);
191 static void mmc_idle_cards(struct mmc_softc *sc);
192 static void mmc_ms_delay(int ms);
193 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard);
194 static void mmc_power_down(struct mmc_softc *sc);
195 static void mmc_power_up(struct mmc_softc *sc);
196 static void mmc_rescan_cards(struct mmc_softc *sc);
197 static int mmc_retune(device_t busdev, device_t dev, bool reset);
198 static void mmc_scan(struct mmc_softc *sc);
199 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp,
200     uint8_t value, uint8_t *res);
201 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
202 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr);
203 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr,
204     uint32_t *rocr);
205 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd);
206 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs);
207 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr,
208     uint32_t *rocr);
209 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp);
210 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len);
211 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
212     enum mmc_bus_timing timing);
213 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar);
214 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp);
215 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
216     enum mmc_bus_timing timing);
217 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
218     enum mmc_bus_timing timing);
219 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
220     uint32_t clock);
221 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
222     uint32_t max_dtr, enum mmc_bus_timing max_timing);
223 static int mmc_test_bus_width(struct mmc_softc *sc);
224 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar,
225     enum mmc_bus_timing timing);
226 static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
227 static void mmc_update_child_list(struct mmc_softc *sc);
228 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
229     uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
230 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req);
231 static void mmc_wakeup(struct mmc_request *req);
232 
233 static void
mmc_ms_delay(int ms)234 mmc_ms_delay(int ms)
235 {
236 
237 	DELAY(1000 * ms);	/* XXX BAD */
238 }
239 
240 static int
mmc_probe(device_t dev)241 mmc_probe(device_t dev)
242 {
243 
244 	device_set_desc(dev, "MMC/SD bus");
245 	return (0);
246 }
247 
248 static int
mmc_attach(device_t dev)249 mmc_attach(device_t dev)
250 {
251 	struct mmc_softc *sc;
252 
253 	sc = device_get_softc(dev);
254 	sc->dev = dev;
255 	MMC_LOCK_INIT(sc);
256 
257 	/* We'll probe and attach our children later, but before / mount */
258 	sc->config_intrhook.ich_func = mmc_delayed_attach;
259 	sc->config_intrhook.ich_arg = sc;
260 	if (config_intrhook_establish(&sc->config_intrhook) != 0)
261 		device_printf(dev, "config_intrhook_establish failed\n");
262 	return (0);
263 }
264 
265 static int
mmc_detach(device_t dev)266 mmc_detach(device_t dev)
267 {
268 	struct mmc_softc *sc = device_get_softc(dev);
269 	int err;
270 
271 	config_intrhook_drain(&sc->config_intrhook);
272 	err = mmc_delete_cards(sc, true);
273 	if (err != 0)
274 		return (err);
275 	mmc_power_down(sc);
276 	MMC_LOCK_DESTROY(sc);
277 
278 	return (0);
279 }
280 
281 static int
mmc_suspend(device_t dev)282 mmc_suspend(device_t dev)
283 {
284 	struct mmc_softc *sc = device_get_softc(dev);
285 	int err;
286 
287 	err = bus_generic_suspend(dev);
288 	if (err != 0)
289 		return (err);
290 	/*
291 	 * We power down with the bus acquired here, mainly so that no device
292 	 * is selected any longer and sc->last_rca gets set to 0.  Otherwise,
293 	 * the deselect as part of the bus acquisition in mmc_scan() may fail
294 	 * during resume, as the bus isn't powered up again before later in
295 	 * mmc_go_discovery().
296 	 */
297 	err = mmc_acquire_bus(dev, dev);
298 	if (err != 0)
299 		return (err);
300 	mmc_power_down(sc);
301 	err = mmc_release_bus(dev, dev);
302 	return (err);
303 }
304 
305 static int
mmc_resume(device_t dev)306 mmc_resume(device_t dev)
307 {
308 	struct mmc_softc *sc = device_get_softc(dev);
309 
310 	mmc_scan(sc);
311 	return (bus_generic_resume(dev));
312 }
313 
314 static int
mmc_acquire_bus(device_t busdev,device_t dev)315 mmc_acquire_bus(device_t busdev, device_t dev)
316 {
317 	struct mmc_softc *sc;
318 	struct mmc_ivars *ivar;
319 	int err;
320 	uint16_t rca;
321 	enum mmc_bus_timing timing;
322 
323 	err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
324 	if (err)
325 		return (err);
326 	sc = device_get_softc(busdev);
327 	MMC_LOCK(sc);
328 	if (sc->owner)
329 		panic("mmc: host bridge didn't serialize us.");
330 	sc->owner = dev;
331 	MMC_UNLOCK(sc);
332 
333 	if (busdev != dev) {
334 		/*
335 		 * Keep track of the last rca that we've selected.  If
336 		 * we're asked to do it again, don't.  We never
337 		 * unselect unless the bus code itself wants the mmc
338 		 * bus, and constantly reselecting causes problems.
339 		 */
340 		ivar = device_get_ivars(dev);
341 		rca = ivar->rca;
342 		if (sc->last_rca != rca) {
343 			if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
344 				device_printf(busdev, "Card at relative "
345 				    "address %d failed to select\n", rca);
346 				return (ENXIO);
347 			}
348 			sc->last_rca = rca;
349 			timing = mmcbr_get_timing(busdev);
350 			/*
351 			 * For eMMC modes, setting/updating bus width and VCCQ
352 			 * only really is necessary if there actually is more
353 			 * than one device on the bus as generally that already
354 			 * had to be done by mmc_calculate_clock() or one of
355 			 * its calees.  Moreover, setting the bus width anew
356 			 * can trigger re-tuning (via a CRC error on the next
357 			 * CMD), even if not switching between devices an the
358 			 * previously selected one is still tuned.  Obviously,
359 			 * we need to re-tune the host controller if devices
360 			 * are actually switched, though.
361 			 */
362 			if (timing >= bus_timing_mmc_ddr52 &&
363 			    sc->child_count == 1)
364 				return (0);
365 			/* Prepare bus width for the new card. */
366 			if (bootverbose || mmc_debug) {
367 				device_printf(busdev,
368 				    "setting bus width to %d bits %s timing\n",
369 				    (ivar->bus_width == bus_width_4) ? 4 :
370 				    (ivar->bus_width == bus_width_8) ? 8 : 1,
371 				    mmc_timing_to_string(timing));
372 			}
373 			if (mmc_set_card_bus_width(sc, ivar, timing) !=
374 			    MMC_ERR_NONE) {
375 				device_printf(busdev, "Card at relative "
376 				    "address %d failed to set bus width\n",
377 				    rca);
378 				return (ENXIO);
379 			}
380 			mmcbr_set_bus_width(busdev, ivar->bus_width);
381 			mmcbr_update_ios(busdev);
382 			if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
383 				device_printf(busdev, "Failed to set VCCQ "
384 				    "for card at relative address %d\n", rca);
385 				return (ENXIO);
386 			}
387 			if (timing >= bus_timing_mmc_hs200 &&
388 			    mmc_retune(busdev, dev, true) != 0) {
389 				device_printf(busdev, "Card at relative "
390 				    "address %d failed to re-tune\n", rca);
391 				return (ENXIO);
392 			}
393 		}
394 	} else {
395 		/*
396 		 * If there's a card selected, stand down.
397 		 */
398 		if (sc->last_rca != 0) {
399 			if (mmc_select_card(sc, 0) != MMC_ERR_NONE)
400 				return (ENXIO);
401 			sc->last_rca = 0;
402 		}
403 	}
404 
405 	return (0);
406 }
407 
408 static int
mmc_release_bus(device_t busdev,device_t dev)409 mmc_release_bus(device_t busdev, device_t dev)
410 {
411 	struct mmc_softc *sc;
412 
413 	sc = device_get_softc(busdev);
414 
415 	MMC_LOCK(sc);
416 	if (!sc->owner)
417 		panic("mmc: releasing unowned bus.");
418 	if (sc->owner != dev)
419 		panic("mmc: you don't own the bus.  game over.");
420 	sc->owner = NULL;
421 	MMC_UNLOCK(sc);
422 	return (MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev));
423 }
424 
425 static uint32_t
mmc_select_vdd(struct mmc_softc * sc,uint32_t ocr)426 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
427 {
428 
429 	return (ocr & MMC_OCR_VOLTAGE);
430 }
431 
432 static int
mmc_highest_voltage(uint32_t ocr)433 mmc_highest_voltage(uint32_t ocr)
434 {
435 	int i;
436 
437 	for (i = MMC_OCR_MAX_VOLTAGE_SHIFT;
438 	    i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--)
439 		if (ocr & (1 << i))
440 			return (i);
441 	return (-1);
442 }
443 
444 static void
mmc_wakeup(struct mmc_request * req)445 mmc_wakeup(struct mmc_request *req)
446 {
447 	struct mmc_softc *sc;
448 
449 	sc = (struct mmc_softc *)req->done_data;
450 	MMC_LOCK(sc);
451 	req->flags |= MMC_REQ_DONE;
452 	MMC_UNLOCK(sc);
453 	wakeup(req);
454 }
455 
456 static int
mmc_wait_for_req(struct mmc_softc * sc,struct mmc_request * req)457 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
458 {
459 
460 	req->done = mmc_wakeup;
461 	req->done_data = sc;
462 	if (__predict_false(mmc_debug > 1)) {
463 		device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
464 		    req->cmd->opcode, req->cmd->arg, req->cmd->flags);
465 		if (req->cmd->data) {
466 			printf(" data %d\n", (int)req->cmd->data->len);
467 		} else
468 			printf("\n");
469 	}
470 	MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
471 	MMC_LOCK(sc);
472 	while ((req->flags & MMC_REQ_DONE) == 0)
473 		msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
474 	MMC_UNLOCK(sc);
475 	if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 &&
476 	    req->cmd->error != MMC_ERR_NONE)))
477 		device_printf(sc->dev, "CMD%d RESULT: %d\n",
478 		    req->cmd->opcode, req->cmd->error);
479 	return (0);
480 }
481 
482 static int
mmc_wait_for_request(device_t busdev,device_t dev,struct mmc_request * req)483 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req)
484 {
485 	struct mmc_softc *sc;
486 	struct mmc_ivars *ivar;
487 	int err, i;
488 	enum mmc_retune_req retune_req;
489 
490 	sc = device_get_softc(busdev);
491 	KASSERT(sc->owner != NULL,
492 	    ("%s: Request from %s without bus being acquired.", __func__,
493 	    device_get_nameunit(dev)));
494 
495 	/*
496 	 * Unless no device is selected or re-tuning is already ongoing,
497 	 * execute re-tuning if a) the bridge is requesting to do so and
498 	 * re-tuning hasn't been otherwise paused, or b) if a child asked
499 	 * to be re-tuned prior to pausing (see also mmc_retune_pause()).
500 	 */
501 	if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 &&
502 	    (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none &&
503 	    sc->retune_paused == 0) || sc->retune_needed == 1))) {
504 		if (__predict_false(mmc_debug > 1)) {
505 			device_printf(busdev,
506 			    "Re-tuning with%s circuit reset required\n",
507 			    retune_req == retune_req_reset ? "" : "out");
508 		}
509 		if (device_get_parent(dev) == busdev)
510 			ivar = device_get_ivars(dev);
511 		else {
512 			for (i = 0; i < sc->child_count; i++) {
513 				ivar = device_get_ivars(sc->child_list[i]);
514 				if (ivar->rca == sc->last_rca)
515 					break;
516 			}
517 			if (ivar->rca != sc->last_rca)
518 				return (EINVAL);
519 		}
520 		sc->retune_ongoing = 1;
521 		err = mmc_retune(busdev, dev, retune_req == retune_req_reset);
522 		sc->retune_ongoing = 0;
523 		switch (err) {
524 		case MMC_ERR_NONE:
525 		case MMC_ERR_FAILED:	/* Re-tune error but still might work */
526 			break;
527 		case MMC_ERR_BADCRC:	/* Switch failure on HS400 recovery */
528 			return (ENXIO);
529 		case MMC_ERR_INVALID:	/* Driver implementation b0rken */
530 		default:		/* Unknown error, should not happen */
531 			return (EINVAL);
532 		}
533 		sc->retune_needed = 0;
534 	}
535 	return (mmc_wait_for_req(sc, req));
536 }
537 
538 static int
mmc_wait_for_command(struct mmc_softc * sc,uint32_t opcode,uint32_t arg,uint32_t flags,uint32_t * resp,int retries)539 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
540     uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
541 {
542 	struct mmc_command cmd;
543 	int err;
544 
545 	memset(&cmd, 0, sizeof(cmd));
546 	cmd.opcode = opcode;
547 	cmd.arg = arg;
548 	cmd.flags = flags;
549 	cmd.data = NULL;
550 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries);
551 	if (err)
552 		return (err);
553 	if (resp) {
554 		if (flags & MMC_RSP_136)
555 			memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
556 		else
557 			*resp = cmd.resp[0];
558 	}
559 	return (0);
560 }
561 
562 static void
mmc_idle_cards(struct mmc_softc * sc)563 mmc_idle_cards(struct mmc_softc *sc)
564 {
565 	device_t dev;
566 	struct mmc_command cmd;
567 
568 	dev = sc->dev;
569 	mmcbr_set_chip_select(dev, cs_high);
570 	mmcbr_update_ios(dev);
571 	mmc_ms_delay(1);
572 
573 	memset(&cmd, 0, sizeof(cmd));
574 	cmd.opcode = MMC_GO_IDLE_STATE;
575 	cmd.arg = 0;
576 	cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
577 	cmd.data = NULL;
578 	mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
579 	mmc_ms_delay(1);
580 
581 	mmcbr_set_chip_select(dev, cs_dontcare);
582 	mmcbr_update_ios(dev);
583 	mmc_ms_delay(1);
584 }
585 
586 static int
mmc_send_app_op_cond(struct mmc_softc * sc,uint32_t ocr,uint32_t * rocr)587 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
588 {
589 	struct mmc_command cmd;
590 	int err = MMC_ERR_NONE, i;
591 
592 	memset(&cmd, 0, sizeof(cmd));
593 	cmd.opcode = ACMD_SD_SEND_OP_COND;
594 	cmd.arg = ocr;
595 	cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
596 	cmd.data = NULL;
597 
598 	for (i = 0; i < 1000; i++) {
599 		err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd,
600 		    CMD_RETRIES);
601 		if (err != MMC_ERR_NONE)
602 			break;
603 		if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
604 		    (ocr & MMC_OCR_VOLTAGE) == 0)
605 			break;
606 		err = MMC_ERR_TIMEOUT;
607 		mmc_ms_delay(10);
608 	}
609 	if (rocr && err == MMC_ERR_NONE)
610 		*rocr = cmd.resp[0];
611 	return (err);
612 }
613 
614 static int
mmc_send_op_cond(struct mmc_softc * sc,uint32_t ocr,uint32_t * rocr)615 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
616 {
617 	struct mmc_command cmd;
618 	int err = MMC_ERR_NONE, i;
619 
620 	memset(&cmd, 0, sizeof(cmd));
621 	cmd.opcode = MMC_SEND_OP_COND;
622 	cmd.arg = ocr;
623 	cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
624 	cmd.data = NULL;
625 
626 	for (i = 0; i < 1000; i++) {
627 		err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
628 		if (err != MMC_ERR_NONE)
629 			break;
630 		if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
631 		    (ocr & MMC_OCR_VOLTAGE) == 0)
632 			break;
633 		err = MMC_ERR_TIMEOUT;
634 		mmc_ms_delay(10);
635 	}
636 	if (rocr && err == MMC_ERR_NONE)
637 		*rocr = cmd.resp[0];
638 	return (err);
639 }
640 
641 static int
mmc_send_if_cond(struct mmc_softc * sc,uint8_t vhs)642 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
643 {
644 	struct mmc_command cmd;
645 	int err;
646 
647 	memset(&cmd, 0, sizeof(cmd));
648 	cmd.opcode = SD_SEND_IF_COND;
649 	cmd.arg = (vhs << 8) + 0xAA;
650 	cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
651 	cmd.data = NULL;
652 
653 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
654 	return (err);
655 }
656 
657 static void
mmc_power_up(struct mmc_softc * sc)658 mmc_power_up(struct mmc_softc *sc)
659 {
660 	device_t dev;
661 	enum mmc_vccq vccq;
662 
663 	dev = sc->dev;
664 	mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
665 	mmcbr_set_bus_mode(dev, opendrain);
666 	mmcbr_set_chip_select(dev, cs_dontcare);
667 	mmcbr_set_bus_width(dev, bus_width_1);
668 	mmcbr_set_power_mode(dev, power_up);
669 	mmcbr_set_clock(dev, 0);
670 	mmcbr_update_ios(dev);
671 	for (vccq = vccq_330; ; vccq--) {
672 		mmcbr_set_vccq(dev, vccq);
673 		if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120)
674 			break;
675 	}
676 	mmc_ms_delay(1);
677 
678 	mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
679 	mmcbr_set_timing(dev, bus_timing_normal);
680 	mmcbr_set_power_mode(dev, power_on);
681 	mmcbr_update_ios(dev);
682 	mmc_ms_delay(2);
683 }
684 
685 static void
mmc_power_down(struct mmc_softc * sc)686 mmc_power_down(struct mmc_softc *sc)
687 {
688 	device_t dev = sc->dev;
689 
690 	mmcbr_set_bus_mode(dev, opendrain);
691 	mmcbr_set_chip_select(dev, cs_dontcare);
692 	mmcbr_set_bus_width(dev, bus_width_1);
693 	mmcbr_set_power_mode(dev, power_off);
694 	mmcbr_set_clock(dev, 0);
695 	mmcbr_set_timing(dev, bus_timing_normal);
696 	mmcbr_update_ios(dev);
697 }
698 
699 static int
mmc_select_card(struct mmc_softc * sc,uint16_t rca)700 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
701 {
702 	int err, flags;
703 
704 	/* No card selection in SPI mode. */
705 	if (mmcbr_get_bus_type(sc->dev) == bus_type_spi)
706 		return (MMC_ERR_NONE);
707 
708 	flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
709 	sc->retune_paused++;
710 	err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
711 	    flags, NULL, CMD_RETRIES);
712 	sc->retune_paused--;
713 	return (err);
714 }
715 
716 static int
mmc_sd_switch(struct mmc_softc * sc,uint8_t mode,uint8_t grp,uint8_t value,uint8_t * res)717 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
718     uint8_t *res)
719 {
720 	int err;
721 	struct mmc_command cmd;
722 	struct mmc_data data;
723 
724 	memset(&cmd, 0, sizeof(cmd));
725 	memset(&data, 0, sizeof(data));
726 	memset(res, 0, 64);
727 
728 	cmd.opcode = SD_SWITCH_FUNC;
729 	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
730 	cmd.arg = mode << 31;			/* 0 - check, 1 - set */
731 	cmd.arg |= 0x00FFFFFF;
732 	cmd.arg &= ~(0xF << (grp * 4));
733 	cmd.arg |= value << (grp * 4);
734 	cmd.data = &data;
735 
736 	data.data = res;
737 	data.len = 64;
738 	data.flags = MMC_DATA_READ;
739 
740 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
741 	return (err);
742 }
743 
744 static int
mmc_set_card_bus_width(struct mmc_softc * sc,struct mmc_ivars * ivar,enum mmc_bus_timing timing)745 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
746     enum mmc_bus_timing timing)
747 {
748 	struct mmc_command cmd;
749 	int err;
750 	uint8_t	value;
751 
752 	if (mmcbr_get_mode(sc->dev) == mode_sd) {
753 		memset(&cmd, 0, sizeof(cmd));
754 		cmd.opcode = ACMD_SET_CLR_CARD_DETECT;
755 		cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
756 		cmd.arg = SD_CLR_CARD_DETECT;
757 		err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
758 		    CMD_RETRIES);
759 		if (err != 0)
760 			return (err);
761 		memset(&cmd, 0, sizeof(cmd));
762 		cmd.opcode = ACMD_SET_BUS_WIDTH;
763 		cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
764 		switch (ivar->bus_width) {
765 		case bus_width_1:
766 			cmd.arg = SD_BUS_WIDTH_1;
767 			break;
768 		case bus_width_4:
769 			cmd.arg = SD_BUS_WIDTH_4;
770 			break;
771 		default:
772 			return (MMC_ERR_INVALID);
773 		}
774 		err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
775 		    CMD_RETRIES);
776 	} else {
777 		switch (ivar->bus_width) {
778 		case bus_width_1:
779 			if (timing == bus_timing_mmc_hs400 ||
780 			    timing == bus_timing_mmc_hs400es)
781 				return (MMC_ERR_INVALID);
782 			value = EXT_CSD_BUS_WIDTH_1;
783 			break;
784 		case bus_width_4:
785 			switch (timing) {
786 			case bus_timing_mmc_ddr52:
787 				value = EXT_CSD_BUS_WIDTH_4_DDR;
788 				break;
789 			case bus_timing_mmc_hs400:
790 			case bus_timing_mmc_hs400es:
791 				return (MMC_ERR_INVALID);
792 			default:
793 				value = EXT_CSD_BUS_WIDTH_4;
794 				break;
795 			}
796 			break;
797 		case bus_width_8:
798 			value = 0;
799 			switch (timing) {
800 			case bus_timing_mmc_hs400es:
801 				value = EXT_CSD_BUS_WIDTH_ES;
802 				/* FALLTHROUGH */
803 			case bus_timing_mmc_ddr52:
804 			case bus_timing_mmc_hs400:
805 				value |= EXT_CSD_BUS_WIDTH_8_DDR;
806 				break;
807 			default:
808 				value = EXT_CSD_BUS_WIDTH_8;
809 				break;
810 			}
811 			break;
812 		default:
813 			return (MMC_ERR_INVALID);
814 		}
815 		err = mmc_switch(sc->dev, sc->dev, ivar->rca,
816 		    EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,
817 		    ivar->cmd6_time, true);
818 	}
819 	return (err);
820 }
821 
822 static int
mmc_set_power_class(struct mmc_softc * sc,struct mmc_ivars * ivar)823 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar)
824 {
825 	device_t dev;
826 	const uint8_t *ext_csd;
827 	uint32_t clock;
828 	uint8_t value;
829 	enum mmc_bus_timing timing;
830 	enum mmc_bus_width bus_width;
831 
832 	dev = sc->dev;
833 	timing = mmcbr_get_timing(dev);
834 	bus_width = ivar->bus_width;
835 	if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 ||
836 	    timing == bus_timing_normal || bus_width == bus_width_1)
837 		return (MMC_ERR_NONE);
838 
839 	value = 0;
840 	ext_csd = ivar->raw_ext_csd;
841 	clock = mmcbr_get_clock(dev);
842 	switch (1 << mmcbr_get_vdd(dev)) {
843 	case MMC_OCR_LOW_VOLTAGE:
844 		if (clock <= MMC_TYPE_HS_26_MAX)
845 			value = ext_csd[EXT_CSD_PWR_CL_26_195];
846 		else if (clock <= MMC_TYPE_HS_52_MAX) {
847 			if (timing >= bus_timing_mmc_ddr52 &&
848 			    bus_width >= bus_width_4)
849 				value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];
850 			else
851 				value = ext_csd[EXT_CSD_PWR_CL_52_195];
852 		} else if (clock <= MMC_TYPE_HS200_HS400ES_MAX)
853 			value = ext_csd[EXT_CSD_PWR_CL_200_195];
854 		break;
855 	case MMC_OCR_270_280:
856 	case MMC_OCR_280_290:
857 	case MMC_OCR_290_300:
858 	case MMC_OCR_300_310:
859 	case MMC_OCR_310_320:
860 	case MMC_OCR_320_330:
861 	case MMC_OCR_330_340:
862 	case MMC_OCR_340_350:
863 	case MMC_OCR_350_360:
864 		if (clock <= MMC_TYPE_HS_26_MAX)
865 			value = ext_csd[EXT_CSD_PWR_CL_26_360];
866 		else if (clock <= MMC_TYPE_HS_52_MAX) {
867 			if (timing == bus_timing_mmc_ddr52 &&
868 			    bus_width >= bus_width_4)
869 				value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];
870 			else
871 				value = ext_csd[EXT_CSD_PWR_CL_52_360];
872 		} else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) {
873 			if (bus_width == bus_width_8)
874 				value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];
875 			else
876 				value = ext_csd[EXT_CSD_PWR_CL_200_360];
877 		}
878 		break;
879 	default:
880 		device_printf(dev, "No power class support for VDD 0x%x\n",
881 			1 << mmcbr_get_vdd(dev));
882 		return (MMC_ERR_INVALID);
883 	}
884 
885 	if (bus_width == bus_width_8)
886 		value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>
887 		    EXT_CSD_POWER_CLASS_8BIT_SHIFT;
888 	else
889 		value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>
890 		    EXT_CSD_POWER_CLASS_4BIT_SHIFT;
891 
892 	if (value == 0)
893 		return (MMC_ERR_NONE);
894 
895 	return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL,
896 	    EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));
897 }
898 
899 static int
mmc_set_timing(struct mmc_softc * sc,struct mmc_ivars * ivar,enum mmc_bus_timing timing)900 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
901     enum mmc_bus_timing timing)
902 {
903 	u_char switch_res[64];
904 	uint8_t	value;
905 	int err;
906 
907 	/* No timings in SPI mode. */
908 	if (mmcbr_get_bus_type(sc->dev) == bus_type_spi)
909 		return (MMC_ERR_NONE);
910 
911 	if (mmcbr_get_mode(sc->dev) == mode_sd) {
912 		switch (timing) {
913 		case bus_timing_normal:
914 			value = SD_SWITCH_NORMAL_MODE;
915 			break;
916 		case bus_timing_hs:
917 			value = SD_SWITCH_HS_MODE;
918 			break;
919 		default:
920 			return (MMC_ERR_INVALID);
921 		}
922 		err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
923 		    value, switch_res);
924 		if (err != MMC_ERR_NONE)
925 			return (err);
926 		if ((switch_res[16] & 0xf) != value)
927 			return (MMC_ERR_FAILED);
928 		mmcbr_set_timing(sc->dev, timing);
929 		mmcbr_update_ios(sc->dev);
930 	} else {
931 		switch (timing) {
932 		case bus_timing_normal:
933 			value = EXT_CSD_HS_TIMING_BC;
934 			break;
935 		case bus_timing_hs:
936 		case bus_timing_mmc_ddr52:
937 			value = EXT_CSD_HS_TIMING_HS;
938 			break;
939 		case bus_timing_mmc_hs200:
940 			value = EXT_CSD_HS_TIMING_HS200;
941 			break;
942 		case bus_timing_mmc_hs400:
943 		case bus_timing_mmc_hs400es:
944 			value = EXT_CSD_HS_TIMING_HS400;
945 			break;
946 		default:
947 			return (MMC_ERR_INVALID);
948 		}
949 		err = mmc_switch(sc->dev, sc->dev, ivar->rca,
950 		    EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,
951 		    ivar->cmd6_time, false);
952 		if (err != MMC_ERR_NONE)
953 			return (err);
954 		mmcbr_set_timing(sc->dev, timing);
955 		mmcbr_update_ios(sc->dev);
956 		err = mmc_switch_status(sc->dev, sc->dev, ivar->rca,
957 		    ivar->cmd6_time);
958 	}
959 	return (err);
960 }
961 
962 static int
mmc_set_vccq(struct mmc_softc * sc,struct mmc_ivars * ivar,enum mmc_bus_timing timing)963 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
964     enum mmc_bus_timing timing)
965 {
966 
967 	if (isset(&ivar->vccq_120, timing))
968 		mmcbr_set_vccq(sc->dev, vccq_120);
969 	else if (isset(&ivar->vccq_180, timing))
970 		mmcbr_set_vccq(sc->dev, vccq_180);
971 	else
972 		mmcbr_set_vccq(sc->dev, vccq_330);
973 	if (mmcbr_switch_vccq(sc->dev) != 0)
974 		return (MMC_ERR_INVALID);
975 	else
976 		return (MMC_ERR_NONE);
977 }
978 
979 static const uint8_t p8[8] = {
980 	0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
981 };
982 
983 static const uint8_t p8ok[8] = {
984 	0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
985 };
986 
987 static const uint8_t p4[4] = {
988 	0x5A, 0x00, 0x00, 0x00
989 };
990 
991 static const uint8_t p4ok[4] = {
992 	0xA5, 0x00, 0x00, 0x00
993 };
994 
995 static int
mmc_test_bus_width(struct mmc_softc * sc)996 mmc_test_bus_width(struct mmc_softc *sc)
997 {
998 	struct mmc_command cmd;
999 	struct mmc_data data;
1000 	uint8_t buf[8];
1001 	int err;
1002 
1003 	if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
1004 		mmcbr_set_bus_width(sc->dev, bus_width_8);
1005 		mmcbr_update_ios(sc->dev);
1006 
1007 		sc->squelched++; /* Errors are expected, squelch reporting. */
1008 		memset(&cmd, 0, sizeof(cmd));
1009 		memset(&data, 0, sizeof(data));
1010 		cmd.opcode = MMC_BUSTEST_W;
1011 		cmd.arg = 0;
1012 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1013 		cmd.data = &data;
1014 
1015 		data.data = __DECONST(void *, p8);
1016 		data.len = 8;
1017 		data.flags = MMC_DATA_WRITE;
1018 		mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1019 
1020 		memset(&cmd, 0, sizeof(cmd));
1021 		memset(&data, 0, sizeof(data));
1022 		cmd.opcode = MMC_BUSTEST_R;
1023 		cmd.arg = 0;
1024 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1025 		cmd.data = &data;
1026 
1027 		data.data = buf;
1028 		data.len = 8;
1029 		data.flags = MMC_DATA_READ;
1030 		err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1031 		sc->squelched--;
1032 
1033 		mmcbr_set_bus_width(sc->dev, bus_width_1);
1034 		mmcbr_update_ios(sc->dev);
1035 
1036 		if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
1037 			return (bus_width_8);
1038 	}
1039 
1040 	if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
1041 		mmcbr_set_bus_width(sc->dev, bus_width_4);
1042 		mmcbr_update_ios(sc->dev);
1043 
1044 		sc->squelched++; /* Errors are expected, squelch reporting. */
1045 		memset(&cmd, 0, sizeof(cmd));
1046 		memset(&data, 0, sizeof(data));
1047 		cmd.opcode = MMC_BUSTEST_W;
1048 		cmd.arg = 0;
1049 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1050 		cmd.data = &data;
1051 
1052 		data.data = __DECONST(void *, p4);
1053 		data.len = 4;
1054 		data.flags = MMC_DATA_WRITE;
1055 		mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1056 
1057 		memset(&cmd, 0, sizeof(cmd));
1058 		memset(&data, 0, sizeof(data));
1059 		cmd.opcode = MMC_BUSTEST_R;
1060 		cmd.arg = 0;
1061 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1062 		cmd.data = &data;
1063 
1064 		data.data = buf;
1065 		data.len = 4;
1066 		data.flags = MMC_DATA_READ;
1067 		err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1068 		sc->squelched--;
1069 
1070 		mmcbr_set_bus_width(sc->dev, bus_width_1);
1071 		mmcbr_update_ios(sc->dev);
1072 
1073 		if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
1074 			return (bus_width_4);
1075 	}
1076 	return (bus_width_1);
1077 }
1078 
1079 static uint32_t
mmc_get_bits(uint32_t * bits,int bit_len,int start,int size)1080 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
1081 {
1082 	const int i = (bit_len / 32) - (start / 32) - 1;
1083 	const int shift = start & 31;
1084 	uint32_t retval = bits[i] >> shift;
1085 
1086 	if (size + shift > 32)
1087 		retval |= bits[i - 1] << (32 - shift);
1088 	return (retval & ((1llu << size) - 1));
1089 }
1090 
1091 static void
mmc_decode_cid_sd(uint32_t * raw_cid,struct mmc_cid * cid)1092 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
1093 {
1094 	int i;
1095 
1096 	/* There's no version info, so we take it on faith */
1097 	memset(cid, 0, sizeof(*cid));
1098 	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1099 	cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
1100 	for (i = 0; i < 5; i++)
1101 		cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1102 	cid->pnm[5] = 0;
1103 	cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
1104 	cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
1105 	cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
1106 	cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
1107 }
1108 
1109 static void
mmc_decode_cid_mmc(uint32_t * raw_cid,struct mmc_cid * cid,bool is_4_41p)1110 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p)
1111 {
1112 	int i;
1113 
1114 	/* There's no version info, so we take it on faith */
1115 	memset(cid, 0, sizeof(*cid));
1116 	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1117 	cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
1118 	for (i = 0; i < 6; i++)
1119 		cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1120 	cid->pnm[6] = 0;
1121 	cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
1122 	cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
1123 	cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
1124 	cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4);
1125 	if (is_4_41p)
1126 		cid->mdt_year += 2013;
1127 	else
1128 		cid->mdt_year += 1997;
1129 }
1130 
1131 static void
mmc_format_card_id_string(struct mmc_ivars * ivar)1132 mmc_format_card_id_string(struct mmc_ivars *ivar)
1133 {
1134 	char oidstr[8];
1135 	uint8_t c1;
1136 	uint8_t c2;
1137 
1138 	/*
1139 	 * Format a card ID string for use by the mmcsd driver, it's what
1140 	 * appears between the <> in the following:
1141 	 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0
1142 	 * 22.5MHz/4bit/128-block
1143 	 *
1144 	 * Also format just the card serial number, which the mmcsd driver will
1145 	 * use as the disk->d_ident string.
1146 	 *
1147 	 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
1148 	 * and our max formatted length is currently 55 bytes if every field
1149 	 * contains the largest value.
1150 	 *
1151 	 * Sometimes the oid is two printable ascii chars; when it's not,
1152 	 * format it as 0xnnnn instead.
1153 	 */
1154 	c1 = (ivar->cid.oid >> 8) & 0x0ff;
1155 	c2 = ivar->cid.oid & 0x0ff;
1156 	if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
1157 		snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
1158 	else
1159 		snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid);
1160 	snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string),
1161 	    "%08X", ivar->cid.psn);
1162 	snprintf(ivar->card_id_string, sizeof(ivar->card_id_string),
1163 	    "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
1164 	    ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "",
1165 	    ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1166 	    ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year,
1167 	    ivar->cid.mid, oidstr);
1168 }
1169 
1170 static const int exp[8] = {
1171 	1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
1172 };
1173 
1174 static const int mant[16] = {
1175 	0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
1176 };
1177 
1178 static const int cur_min[8] = {
1179 	500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
1180 };
1181 
1182 static const int cur_max[8] = {
1183 	1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
1184 };
1185 
1186 static int
mmc_decode_csd_sd(uint32_t * raw_csd,struct mmc_csd * csd)1187 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
1188 {
1189 	int v;
1190 	int m;
1191 	int e;
1192 
1193 	memset(csd, 0, sizeof(*csd));
1194 	csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
1195 	if (v == 0) {
1196 		m = mmc_get_bits(raw_csd, 128, 115, 4);
1197 		e = mmc_get_bits(raw_csd, 128, 112, 3);
1198 		csd->tacc = (exp[e] * mant[m] + 9) / 10;
1199 		csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1200 		m = mmc_get_bits(raw_csd, 128, 99, 4);
1201 		e = mmc_get_bits(raw_csd, 128, 96, 3);
1202 		csd->tran_speed = exp[e] * 10000 * mant[m];
1203 		csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1204 		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1205 		csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1206 		csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1207 		csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1208 		csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1209 		csd->vdd_r_curr_min =
1210 		    cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1211 		csd->vdd_r_curr_max =
1212 		    cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1213 		csd->vdd_w_curr_min =
1214 		    cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1215 		csd->vdd_w_curr_max =
1216 		    cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1217 		m = mmc_get_bits(raw_csd, 128, 62, 12);
1218 		e = mmc_get_bits(raw_csd, 128, 47, 3);
1219 		csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1220 		csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1221 		csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1222 		csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1223 		csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1224 		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1225 		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1226 		csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1227 		return (MMC_ERR_NONE);
1228 	} else if (v == 1) {
1229 		m = mmc_get_bits(raw_csd, 128, 115, 4);
1230 		e = mmc_get_bits(raw_csd, 128, 112, 3);
1231 		csd->tacc = (exp[e] * mant[m] + 9) / 10;
1232 		csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1233 		m = mmc_get_bits(raw_csd, 128, 99, 4);
1234 		e = mmc_get_bits(raw_csd, 128, 96, 3);
1235 		csd->tran_speed = exp[e] * 10000 * mant[m];
1236 		csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1237 		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1238 		csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1239 		csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1240 		csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1241 		csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1242 		csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1243 		    1) * 512 * 1024;
1244 		csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1245 		csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1246 		csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1247 		csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1248 		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1249 		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1250 		csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1251 		return (MMC_ERR_NONE);
1252 	}
1253 	return (MMC_ERR_INVALID);
1254 }
1255 
1256 static void
mmc_decode_csd_mmc(uint32_t * raw_csd,struct mmc_csd * csd)1257 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
1258 {
1259 	int m;
1260 	int e;
1261 
1262 	memset(csd, 0, sizeof(*csd));
1263 	csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
1264 	csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
1265 	m = mmc_get_bits(raw_csd, 128, 115, 4);
1266 	e = mmc_get_bits(raw_csd, 128, 112, 3);
1267 	csd->tacc = exp[e] * mant[m] + 9 / 10;
1268 	csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1269 	m = mmc_get_bits(raw_csd, 128, 99, 4);
1270 	e = mmc_get_bits(raw_csd, 128, 96, 3);
1271 	csd->tran_speed = exp[e] * 10000 * mant[m];
1272 	csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1273 	csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1274 	csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1275 	csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1276 	csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1277 	csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1278 	csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1279 	csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1280 	csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1281 	csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1282 	m = mmc_get_bits(raw_csd, 128, 62, 12);
1283 	e = mmc_get_bits(raw_csd, 128, 47, 3);
1284 	csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1285 	csd->erase_blk_en = 0;
1286 	csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
1287 	    (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
1288 	csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
1289 	csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1290 	csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1291 	csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1292 	csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1293 }
1294 
1295 static void
mmc_app_decode_scr(uint32_t * raw_scr,struct mmc_scr * scr)1296 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
1297 {
1298 	unsigned int scr_struct;
1299 
1300 	memset(scr, 0, sizeof(*scr));
1301 
1302 	scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
1303 	if (scr_struct != 0) {
1304 		printf("Unrecognised SCR structure version %d\n",
1305 		    scr_struct);
1306 		return;
1307 	}
1308 	scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
1309 	scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
1310 }
1311 
1312 static void
mmc_app_decode_sd_status(uint32_t * raw_sd_status,struct mmc_sd_status * sd_status)1313 mmc_app_decode_sd_status(uint32_t *raw_sd_status,
1314     struct mmc_sd_status *sd_status)
1315 {
1316 
1317 	memset(sd_status, 0, sizeof(*sd_status));
1318 
1319 	sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
1320 	sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
1321 	sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
1322 	sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
1323 	sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
1324 	sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
1325 	sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
1326 	sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
1327 	sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
1328 	sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
1329 }
1330 
1331 static int
mmc_all_send_cid(struct mmc_softc * sc,uint32_t * rawcid)1332 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
1333 {
1334 	struct mmc_command cmd;
1335 	int err;
1336 
1337 	memset(&cmd, 0, sizeof(cmd));
1338 	cmd.opcode = MMC_ALL_SEND_CID;
1339 	cmd.arg = 0;
1340 	cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1341 	cmd.data = NULL;
1342 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1343 	memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
1344 	return (err);
1345 }
1346 
1347 static int
mmc_send_csd(struct mmc_softc * sc,uint16_t rca,uint32_t * rawcsd)1348 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd)
1349 {
1350 	struct mmc_command cmd;
1351 	int err;
1352 
1353 	memset(&cmd, 0, sizeof(cmd));
1354 	cmd.opcode = MMC_SEND_CSD;
1355 	cmd.arg = rca << 16;
1356 	cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1357 	cmd.data = NULL;
1358 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1359 	memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t));
1360 	return (err);
1361 }
1362 
1363 static int
mmc_app_send_scr(struct mmc_softc * sc,uint16_t rca,uint32_t * rawscr)1364 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
1365 {
1366 	int err;
1367 	struct mmc_command cmd;
1368 	struct mmc_data data;
1369 
1370 	memset(&cmd, 0, sizeof(cmd));
1371 	memset(&data, 0, sizeof(data));
1372 
1373 	memset(rawscr, 0, 8);
1374 	cmd.opcode = ACMD_SEND_SCR;
1375 	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1376 	cmd.arg = 0;
1377 	cmd.data = &data;
1378 
1379 	data.data = rawscr;
1380 	data.len = 8;
1381 	data.flags = MMC_DATA_READ;
1382 
1383 	err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1384 	rawscr[0] = be32toh(rawscr[0]);
1385 	rawscr[1] = be32toh(rawscr[1]);
1386 	return (err);
1387 }
1388 
1389 static int
mmc_app_sd_status(struct mmc_softc * sc,uint16_t rca,uint32_t * rawsdstatus)1390 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1391 {
1392 	struct mmc_command cmd;
1393 	struct mmc_data data;
1394 	int err, i;
1395 
1396 	memset(&cmd, 0, sizeof(cmd));
1397 	memset(&data, 0, sizeof(data));
1398 
1399 	memset(rawsdstatus, 0, 64);
1400 	cmd.opcode = ACMD_SD_STATUS;
1401 	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1402 	cmd.arg = 0;
1403 	cmd.data = &data;
1404 
1405 	data.data = rawsdstatus;
1406 	data.len = 64;
1407 	data.flags = MMC_DATA_READ;
1408 
1409 	err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1410 	for (i = 0; i < 16; i++)
1411 	    rawsdstatus[i] = be32toh(rawsdstatus[i]);
1412 	return (err);
1413 }
1414 
1415 static int
mmc_set_relative_addr(struct mmc_softc * sc,uint16_t resp)1416 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1417 {
1418 	struct mmc_command cmd;
1419 	int err;
1420 
1421 	memset(&cmd, 0, sizeof(cmd));
1422 	cmd.opcode = MMC_SET_RELATIVE_ADDR;
1423 	cmd.arg = resp << 16;
1424 	cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1425 	cmd.data = NULL;
1426 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1427 	return (err);
1428 }
1429 
1430 static int
mmc_send_relative_addr(struct mmc_softc * sc,uint32_t * resp)1431 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1432 {
1433 	struct mmc_command cmd;
1434 	int err;
1435 
1436 	memset(&cmd, 0, sizeof(cmd));
1437 	cmd.opcode = SD_SEND_RELATIVE_ADDR;
1438 	cmd.arg = 0;
1439 	cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1440 	cmd.data = NULL;
1441 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1442 	*resp = cmd.resp[0];
1443 	return (err);
1444 }
1445 
1446 static int
mmc_set_blocklen(struct mmc_softc * sc,uint32_t len)1447 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len)
1448 {
1449 	struct mmc_command cmd;
1450 	int err;
1451 
1452 	memset(&cmd, 0, sizeof(cmd));
1453 	cmd.opcode = MMC_SET_BLOCKLEN;
1454 	cmd.arg = len;
1455 	cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1456 	cmd.data = NULL;
1457 	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1458 	return (err);
1459 }
1460 
1461 static uint32_t
mmc_timing_to_dtr(struct mmc_ivars * ivar,enum mmc_bus_timing timing)1462 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1463 {
1464 
1465 	switch (timing) {
1466 	case bus_timing_normal:
1467 		return (ivar->tran_speed);
1468 	case bus_timing_hs:
1469 		return (ivar->hs_tran_speed);
1470 	case bus_timing_uhs_sdr12:
1471 		return (SD_SDR12_MAX);
1472 	case bus_timing_uhs_sdr25:
1473 		return (SD_SDR25_MAX);
1474 	case bus_timing_uhs_ddr50:
1475 		return (SD_DDR50_MAX);
1476 	case bus_timing_uhs_sdr50:
1477 		return (SD_SDR50_MAX);
1478 	case bus_timing_uhs_sdr104:
1479 		return (SD_SDR104_MAX);
1480 	case bus_timing_mmc_ddr52:
1481 		return (MMC_TYPE_DDR52_MAX);
1482 	case bus_timing_mmc_hs200:
1483 	case bus_timing_mmc_hs400:
1484 	case bus_timing_mmc_hs400es:
1485 		return (MMC_TYPE_HS200_HS400ES_MAX);
1486 	}
1487 	return (0);
1488 }
1489 
1490 static const char *
mmc_timing_to_string(enum mmc_bus_timing timing)1491 mmc_timing_to_string(enum mmc_bus_timing timing)
1492 {
1493 
1494 	switch (timing) {
1495 	case bus_timing_normal:
1496 		return ("normal speed");
1497 	case bus_timing_hs:
1498 		return ("high speed");
1499 	case bus_timing_uhs_sdr12:
1500 	case bus_timing_uhs_sdr25:
1501 	case bus_timing_uhs_sdr50:
1502 	case bus_timing_uhs_sdr104:
1503 		return ("single data rate");
1504 	case bus_timing_uhs_ddr50:
1505 	case bus_timing_mmc_ddr52:
1506 		return ("dual data rate");
1507 	case bus_timing_mmc_hs200:
1508 		return ("HS200");
1509 	case bus_timing_mmc_hs400:
1510 		return ("HS400");
1511 	case bus_timing_mmc_hs400es:
1512 		return ("HS400 with enhanced strobe");
1513 	}
1514 	return ("");
1515 }
1516 
1517 static bool
mmc_host_timing(device_t dev,enum mmc_bus_timing timing)1518 mmc_host_timing(device_t dev, enum mmc_bus_timing timing)
1519 {
1520 	int host_caps;
1521 
1522 	host_caps = mmcbr_get_caps(dev);
1523 
1524 #define	HOST_TIMING_CAP(host_caps, cap) ({				\
1525 	bool retval;							\
1526 	if (((host_caps) & (cap)) == (cap))				\
1527 		retval = true;						\
1528 	else								\
1529 		retval = false;						\
1530 	retval;								\
1531 })
1532 
1533 	switch (timing) {
1534 	case bus_timing_normal:
1535 		return (true);
1536 	case bus_timing_hs:
1537 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED));
1538 	case bus_timing_uhs_sdr12:
1539 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12));
1540 	case bus_timing_uhs_sdr25:
1541 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25));
1542 	case bus_timing_uhs_ddr50:
1543 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50));
1544 	case bus_timing_uhs_sdr50:
1545 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50));
1546 	case bus_timing_uhs_sdr104:
1547 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104));
1548 	case bus_timing_mmc_ddr52:
1549 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52));
1550 	case bus_timing_mmc_hs200:
1551 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200_120) ||
1552 			HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200_180));
1553 	case bus_timing_mmc_hs400:
1554 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400_120) ||
1555 			HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400_180));
1556 	case bus_timing_mmc_hs400es:
1557 		return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 |
1558 		    MMC_CAP_MMC_ENH_STROBE));
1559 	}
1560 
1561 #undef HOST_TIMING_CAP
1562 
1563 	return (false);
1564 }
1565 
1566 static void
mmc_log_card(device_t dev,struct mmc_ivars * ivar,int newcard)1567 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1568 {
1569 	enum mmc_bus_timing timing;
1570 
1571 	device_printf(dev, "Card at relative address 0x%04x%s:\n",
1572 	    ivar->rca, newcard ? " added" : "");
1573 	device_printf(dev, " card: %s\n", ivar->card_id_string);
1574 	for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1575 		if (isset(&ivar->timings, timing))
1576 			break;
1577 	}
1578 	device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT);
1579 	device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1580 	    (ivar->bus_width == bus_width_1 ? 1 :
1581 	    (ivar->bus_width == bus_width_4 ? 4 : 8)),
1582 	    mmc_timing_to_dtr(ivar, timing) / 1000000,
1583 	    mmc_timing_to_string(timing));
1584 	device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1585 	    ivar->sec_count, ivar->erase_sector,
1586 	    ivar->read_only ? ", read-only" : "");
1587 }
1588 
1589 static void
mmc_discover_cards(struct mmc_softc * sc)1590 mmc_discover_cards(struct mmc_softc *sc)
1591 {
1592 	u_char switch_res[64];
1593 	uint32_t raw_cid[4];
1594 	struct mmc_ivars *ivar = NULL;
1595 	const struct mmc_quirk *quirk;
1596 	const uint8_t *ext_csd;
1597 	device_t child;
1598 	int err, host_caps, i, newcard;
1599 	uint32_t resp, sec_count, status;
1600 	uint16_t rca = 2;
1601 	int16_t rev;
1602 	uint8_t card_type;
1603 
1604 	host_caps = mmcbr_get_caps(sc->dev);
1605 	if (bootverbose || mmc_debug)
1606 		device_printf(sc->dev, "Probing cards\n");
1607 	while (1) {
1608 		child = NULL;
1609 		sc->squelched++; /* Errors are expected, squelch reporting. */
1610 		err = mmc_all_send_cid(sc, raw_cid);
1611 		sc->squelched--;
1612 		if (err == MMC_ERR_TIMEOUT)
1613 			break;
1614 		if (err != MMC_ERR_NONE) {
1615 			device_printf(sc->dev, "Error reading CID %d\n", err);
1616 			break;
1617 		}
1618 		newcard = 1;
1619 		for (i = 0; i < sc->child_count; i++) {
1620 			ivar = device_get_ivars(sc->child_list[i]);
1621 			if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
1622 			    0) {
1623 				newcard = 0;
1624 				break;
1625 			}
1626 		}
1627 		if (bootverbose || mmc_debug) {
1628 			device_printf(sc->dev,
1629 			    "%sard detected (CID %08x%08x%08x%08x)\n",
1630 			    newcard ? "New c" : "C",
1631 			    raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1632 		}
1633 		if (newcard) {
1634 			ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1635 			    M_WAITOK | M_ZERO);
1636 			memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1637 		}
1638 		if (mmcbr_get_ro(sc->dev))
1639 			ivar->read_only = 1;
1640 		ivar->bus_width = bus_width_1;
1641 		setbit(&ivar->timings, bus_timing_normal);
1642 		ivar->mode = mmcbr_get_mode(sc->dev);
1643 		if (ivar->mode == mode_sd) {
1644 			mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1645 			err = mmc_send_relative_addr(sc, &resp);
1646 			if (err != MMC_ERR_NONE) {
1647 				device_printf(sc->dev,
1648 				    "Error getting RCA %d\n", err);
1649 				goto free_ivar;
1650 			}
1651 			ivar->rca = resp >> 16;
1652 			/* Get card CSD. */
1653 			err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1654 			if (err != MMC_ERR_NONE) {
1655 				device_printf(sc->dev,
1656 				    "Error getting CSD %d\n", err);
1657 				goto free_ivar;
1658 			}
1659 			if (bootverbose || mmc_debug)
1660 				device_printf(sc->dev,
1661 				    "%sard detected (CSD %08x%08x%08x%08x)\n",
1662 				    newcard ? "New c" : "C", ivar->raw_csd[0],
1663 				    ivar->raw_csd[1], ivar->raw_csd[2],
1664 				    ivar->raw_csd[3]);
1665 			err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1666 			if (err != MMC_ERR_NONE) {
1667 				device_printf(sc->dev, "Error decoding CSD\n");
1668 				goto free_ivar;
1669 			}
1670 			ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1671 			if (ivar->csd.csd_structure > 0)
1672 				ivar->high_cap = 1;
1673 			ivar->tran_speed = ivar->csd.tran_speed;
1674 			ivar->erase_sector = ivar->csd.erase_sector *
1675 			    ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1676 
1677 			err = mmc_send_status(sc->dev, sc->dev, ivar->rca,
1678 			    &status);
1679 			if (err != MMC_ERR_NONE) {
1680 				device_printf(sc->dev,
1681 				    "Error reading card status %d\n", err);
1682 				goto free_ivar;
1683 			}
1684 			if ((status & R1_CARD_IS_LOCKED) != 0) {
1685 				device_printf(sc->dev,
1686 				    "Card is password protected, skipping\n");
1687 				goto free_ivar;
1688 			}
1689 
1690 			/* Get card SCR.  Card must be selected to fetch it. */
1691 			err = mmc_select_card(sc, ivar->rca);
1692 			if (err != MMC_ERR_NONE) {
1693 				device_printf(sc->dev,
1694 				    "Error selecting card %d\n", err);
1695 				goto free_ivar;
1696 			}
1697 			err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1698 			if (err != MMC_ERR_NONE) {
1699 				device_printf(sc->dev,
1700 				    "Error reading SCR %d\n", err);
1701 				goto free_ivar;
1702 			}
1703 			mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1704 			/* Get card switch capabilities (command class 10). */
1705 			if ((ivar->scr.sda_vsn >= 1) &&
1706 			    (ivar->csd.ccc & (1 << 10))) {
1707 				err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1708 				    SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1709 				    switch_res);
1710 				if (err == MMC_ERR_NONE &&
1711 				    switch_res[13] & (1 << SD_SWITCH_HS_MODE)) {
1712 					setbit(&ivar->timings, bus_timing_hs);
1713 					ivar->hs_tran_speed = SD_HS_MAX;
1714 				}
1715 			}
1716 
1717 			/*
1718 			 * We deselect then reselect the card here.  Some cards
1719 			 * become unselected and timeout with the above two
1720 			 * commands, although the state tables / diagrams in the
1721 			 * standard suggest they go back to the transfer state.
1722 			 * Other cards don't become deselected, and if we
1723 			 * attempt to blindly re-select them, we get timeout
1724 			 * errors from some controllers.  So we deselect then
1725 			 * reselect to handle all situations.  The only thing we
1726 			 * use from the sd_status is the erase sector size, but
1727 			 * it is still nice to get that right.
1728 			 */
1729 			(void)mmc_select_card(sc, 0);
1730 			(void)mmc_select_card(sc, ivar->rca);
1731 			(void)mmc_app_sd_status(sc, ivar->rca,
1732 			    ivar->raw_sd_status);
1733 			mmc_app_decode_sd_status(ivar->raw_sd_status,
1734 			    &ivar->sd_status);
1735 			if (ivar->sd_status.au_size != 0) {
1736 				ivar->erase_sector =
1737 				    16 << ivar->sd_status.au_size;
1738 			}
1739 			/* Find maximum supported bus width. */
1740 			if ((host_caps & MMC_CAP_4_BIT_DATA) &&
1741 			    (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1742 				ivar->bus_width = bus_width_4;
1743 
1744 			goto child_common;
1745 		}
1746 		ivar->rca = rca++;
1747 		err = mmc_set_relative_addr(sc, ivar->rca);
1748 		if (err != MMC_ERR_NONE) {
1749 			device_printf(sc->dev, "Error setting RCA %d\n", err);
1750 			goto free_ivar;
1751 		}
1752 		/* Get card CSD. */
1753 		err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1754 		if (err != MMC_ERR_NONE) {
1755 			device_printf(sc->dev, "Error getting CSD %d\n", err);
1756 			goto free_ivar;
1757 		}
1758 		if (bootverbose || mmc_debug)
1759 			device_printf(sc->dev,
1760 			    "%sard detected (CSD %08x%08x%08x%08x)\n",
1761 			    newcard ? "New c" : "C", ivar->raw_csd[0],
1762 			    ivar->raw_csd[1], ivar->raw_csd[2],
1763 			    ivar->raw_csd[3]);
1764 
1765 		mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1766 		ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1767 		ivar->tran_speed = ivar->csd.tran_speed;
1768 		ivar->erase_sector = ivar->csd.erase_sector *
1769 		    ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1770 
1771 		err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status);
1772 		if (err != MMC_ERR_NONE) {
1773 			device_printf(sc->dev,
1774 			    "Error reading card status %d\n", err);
1775 			goto free_ivar;
1776 		}
1777 		if ((status & R1_CARD_IS_LOCKED) != 0) {
1778 			device_printf(sc->dev,
1779 			    "Card is password protected, skipping\n");
1780 			goto free_ivar;
1781 		}
1782 
1783 		err = mmc_select_card(sc, ivar->rca);
1784 		if (err != MMC_ERR_NONE) {
1785 			device_printf(sc->dev, "Error selecting card %d\n",
1786 			    err);
1787 			goto free_ivar;
1788 		}
1789 
1790 		rev = -1;
1791 		/* Only MMC >= 4.x devices support EXT_CSD. */
1792 		if (ivar->csd.spec_vers >= 4) {
1793 			err = mmc_send_ext_csd(sc->dev, sc->dev,
1794 			    ivar->raw_ext_csd);
1795 			if (err != MMC_ERR_NONE) {
1796 				device_printf(sc->dev,
1797 				    "Error reading EXT_CSD %d\n", err);
1798 				goto free_ivar;
1799 			}
1800 			ext_csd = ivar->raw_ext_csd;
1801 			rev = ext_csd[EXT_CSD_REV];
1802 			/* Handle extended capacity from EXT_CSD */
1803 			sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]);
1804 			if (sec_count != 0) {
1805 				ivar->sec_count = sec_count;
1806 				ivar->high_cap = 1;
1807 			}
1808 			/* Find maximum supported bus width. */
1809 			ivar->bus_width = mmc_test_bus_width(sc);
1810 			/* Get device speeds beyond normal mode. */
1811 			card_type = ext_csd[EXT_CSD_CARD_TYPE];
1812 			if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) {
1813 				setbit(&ivar->timings, bus_timing_hs);
1814 				ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX;
1815 			} else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) {
1816 				setbit(&ivar->timings, bus_timing_hs);
1817 				ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX;
1818 			}
1819 			if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1820 			    (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1821 				setbit(&ivar->timings, bus_timing_mmc_ddr52);
1822 				setbit(&ivar->vccq_120, bus_timing_mmc_ddr52);
1823 			}
1824 			if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1825 			    (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1826 				setbit(&ivar->timings, bus_timing_mmc_ddr52);
1827 				setbit(&ivar->vccq_180, bus_timing_mmc_ddr52);
1828 			}
1829 			if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 &&
1830 			    (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1831 				setbit(&ivar->timings, bus_timing_mmc_hs200);
1832 				setbit(&ivar->vccq_120, bus_timing_mmc_hs200);
1833 			}
1834 			if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 &&
1835 			    (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1836 				setbit(&ivar->timings, bus_timing_mmc_hs200);
1837 				setbit(&ivar->vccq_180, bus_timing_mmc_hs200);
1838 			}
1839 			if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1840 			    (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1841 			    ivar->bus_width == bus_width_8) {
1842 				setbit(&ivar->timings, bus_timing_mmc_hs400);
1843 				setbit(&ivar->vccq_120, bus_timing_mmc_hs400);
1844 			}
1845 			if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1846 			    (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1847 			    ivar->bus_width == bus_width_8) {
1848 				setbit(&ivar->timings, bus_timing_mmc_hs400);
1849 				setbit(&ivar->vccq_180, bus_timing_mmc_hs400);
1850 			}
1851 			if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1852 			    (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1853 			    EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1854 			    (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1855 			    ivar->bus_width == bus_width_8) {
1856 				setbit(&ivar->timings, bus_timing_mmc_hs400es);
1857 				setbit(&ivar->vccq_120, bus_timing_mmc_hs400es);
1858 			}
1859 			if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1860 			    (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1861 			    EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1862 			    (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1863 			    ivar->bus_width == bus_width_8) {
1864 				setbit(&ivar->timings, bus_timing_mmc_hs400es);
1865 				setbit(&ivar->vccq_180, bus_timing_mmc_hs400es);
1866 			}
1867 			/*
1868 			 * Determine generic switch timeout (provided in
1869 			 * units of 10 ms), defaulting to 500 ms.
1870 			 */
1871 			ivar->cmd6_time = 500 * 1000;
1872 			if (rev >= 6)
1873 				ivar->cmd6_time = 10 *
1874 				    ext_csd[EXT_CSD_GEN_CMD6_TIME];
1875 			/* Handle HC erase sector size. */
1876 			if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1877 				ivar->erase_sector = 1024 *
1878 				    ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1879 				err = mmc_switch(sc->dev, sc->dev, ivar->rca,
1880 				    EXT_CSD_CMD_SET_NORMAL,
1881 				    EXT_CSD_ERASE_GRP_DEF,
1882 				    EXT_CSD_ERASE_GRP_DEF_EN,
1883 				    ivar->cmd6_time, true);
1884 				if (err != MMC_ERR_NONE) {
1885 					device_printf(sc->dev,
1886 					    "Error setting erase group %d\n",
1887 					    err);
1888 					goto free_ivar;
1889 				}
1890 			}
1891 		}
1892 
1893 		mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5);
1894 
1895 child_common:
1896 		for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) {
1897 			if ((quirk->mid == MMC_QUIRK_MID_ANY ||
1898 			    quirk->mid == ivar->cid.mid) &&
1899 			    (quirk->oid == MMC_QUIRK_OID_ANY ||
1900 			    quirk->oid == ivar->cid.oid) &&
1901 			    strncmp(quirk->pnm, ivar->cid.pnm,
1902 			    sizeof(ivar->cid.pnm)) == 0) {
1903 				ivar->quirks = quirk->quirks;
1904 				break;
1905 			}
1906 		}
1907 
1908 		/*
1909 		 * Some cards that report maximum I/O block sizes greater
1910 		 * than 512 require the block length to be set to 512, even
1911 		 * though that is supposed to be the default.  Example:
1912 		 *
1913 		 * Transcend 2GB SDSC card, CID:
1914 		 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1915 		 */
1916 		if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE ||
1917 		    ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1918 			mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1919 
1920 		mmc_format_card_id_string(ivar);
1921 
1922 		if (bootverbose || mmc_debug)
1923 			mmc_log_card(sc->dev, ivar, newcard);
1924 		if (newcard) {
1925 			/* Add device. */
1926 			child = device_add_child(sc->dev, NULL, DEVICE_UNIT_ANY);
1927 			if (child != NULL) {
1928 				device_set_ivars(child, ivar);
1929 				sc->child_list = realloc(sc->child_list,
1930 				    sizeof(device_t) * (sc->child_count + 1),
1931 				    M_DEVBUF, M_WAITOK);
1932 				sc->child_list[sc->child_count++] = child;
1933 			} else
1934 				device_printf(sc->dev, "Error adding child\n");
1935 		}
1936 
1937 free_ivar:
1938 		if (newcard && child == NULL)
1939 			free(ivar, M_DEVBUF);
1940 		(void)mmc_select_card(sc, 0);
1941 		/*
1942 		 * Not returning here when one MMC device could no be added
1943 		 * potentially would mean looping forever when that device
1944 		 * is broken (in which case it also may impact the remainder
1945 		 * of the bus anyway, though).
1946 		 */
1947 		if ((newcard && child == NULL) ||
1948 		    mmcbr_get_mode(sc->dev) == mode_sd)
1949 			return;
1950 	}
1951 }
1952 
1953 static void
mmc_update_child_list(struct mmc_softc * sc)1954 mmc_update_child_list(struct mmc_softc *sc)
1955 {
1956 	device_t child;
1957 	int i, j;
1958 
1959 	if (sc->child_count == 0) {
1960 		free(sc->child_list, M_DEVBUF);
1961 		return;
1962 	}
1963 	for (i = j = 0; i < sc->child_count; i++) {
1964 		for (;;) {
1965 			child = sc->child_list[j++];
1966 			if (child != NULL)
1967 				break;
1968 		}
1969 		if (i != j)
1970 			sc->child_list[i] = child;
1971 	}
1972 	sc->child_list = realloc(sc->child_list, sizeof(device_t) *
1973 	    sc->child_count, M_DEVBUF, M_WAITOK);
1974 }
1975 
1976 static void
mmc_rescan_cards(struct mmc_softc * sc)1977 mmc_rescan_cards(struct mmc_softc *sc)
1978 {
1979 	struct mmc_ivars *ivar;
1980 	int err, i, j;
1981 
1982 	for (i = j = 0; i < sc->child_count; i++) {
1983 		ivar = device_get_ivars(sc->child_list[i]);
1984 		if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) {
1985 			if (bootverbose || mmc_debug)
1986 				device_printf(sc->dev,
1987 				    "Card at relative address %d lost\n",
1988 				    ivar->rca);
1989 			err = device_delete_child(sc->dev, sc->child_list[i]);
1990 			if (err != 0) {
1991 				j++;
1992 				continue;
1993 			}
1994 			free(ivar, M_DEVBUF);
1995 		} else
1996 			j++;
1997 	}
1998 	if (sc->child_count == j)
1999 		goto out;
2000 	sc->child_count = j;
2001 	mmc_update_child_list(sc);
2002 out:
2003 	(void)mmc_select_card(sc, 0);
2004 }
2005 
2006 static int
mmc_delete_cards(struct mmc_softc * sc,bool final)2007 mmc_delete_cards(struct mmc_softc *sc, bool final)
2008 {
2009 	struct mmc_ivars *ivar;
2010 	int err, i, j;
2011 
2012 	err = 0;
2013 	for (i = j = 0; i < sc->child_count; i++) {
2014 		ivar = device_get_ivars(sc->child_list[i]);
2015 		if (bootverbose || mmc_debug)
2016 			device_printf(sc->dev,
2017 			    "Card at relative address %d deleted\n",
2018 			    ivar->rca);
2019 		err = device_delete_child(sc->dev, sc->child_list[i]);
2020 		if (err != 0) {
2021 			j++;
2022 			if (final == false)
2023 				continue;
2024 			else
2025 				break;
2026 		}
2027 		free(ivar, M_DEVBUF);
2028 	}
2029 	sc->child_count = j;
2030 	mmc_update_child_list(sc);
2031 	return (err);
2032 }
2033 
2034 static void
mmc_go_discovery(struct mmc_softc * sc)2035 mmc_go_discovery(struct mmc_softc *sc)
2036 {
2037 	uint32_t ocr;
2038 	device_t dev;
2039 	int err;
2040 
2041 	dev = sc->dev;
2042 	if (mmcbr_get_power_mode(dev) != power_on) {
2043 		/*
2044 		 * First, try SD modes
2045 		 */
2046 		sc->squelched++; /* Errors are expected, squelch reporting. */
2047 		mmcbr_set_mode(dev, mode_sd);
2048 		mmc_power_up(sc);
2049 		mmcbr_set_bus_mode(dev, pushpull);
2050 		if (bootverbose || mmc_debug)
2051 			device_printf(sc->dev, "Probing bus\n");
2052 		mmc_idle_cards(sc);
2053 		err = mmc_send_if_cond(sc, 1);
2054 		if ((bootverbose || mmc_debug) && err == 0)
2055 			device_printf(sc->dev,
2056 			    "SD 2.0 interface conditions: OK\n");
2057 		if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2058 			if (bootverbose || mmc_debug)
2059 				device_printf(sc->dev, "SD probe: failed\n");
2060 			/*
2061 			 * Failed, try MMC
2062 			 */
2063 			mmcbr_set_mode(dev, mode_mmc);
2064 			if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2065 				if (bootverbose || mmc_debug)
2066 					device_printf(sc->dev,
2067 					    "MMC probe: failed\n");
2068 				ocr = 0; /* Failed both, powerdown. */
2069 			} else if (bootverbose || mmc_debug)
2070 				device_printf(sc->dev,
2071 				    "MMC probe: OK (OCR: 0x%08x)\n", ocr);
2072 		} else if (bootverbose || mmc_debug)
2073 			device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
2074 			    ocr);
2075 		sc->squelched--;
2076 
2077 		mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
2078 		if (mmcbr_get_ocr(dev) != 0)
2079 			mmc_idle_cards(sc);
2080 	} else {
2081 		mmcbr_set_bus_mode(dev, opendrain);
2082 		mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
2083 		mmcbr_update_ios(dev);
2084 		/* XXX recompute vdd based on new cards? */
2085 	}
2086 	/*
2087 	 * Make sure that we have a mutually agreeable voltage to at least
2088 	 * one card on the bus.
2089 	 */
2090 	if (bootverbose || mmc_debug)
2091 		device_printf(sc->dev, "Current OCR: 0x%08x\n",
2092 		    mmcbr_get_ocr(dev));
2093 	if (mmcbr_get_ocr(dev) == 0) {
2094 		device_printf(sc->dev, "No compatible cards found on bus\n");
2095 		(void)mmc_delete_cards(sc, false);
2096 		mmc_power_down(sc);
2097 		return;
2098 	}
2099 	/*
2100 	 * Reselect the cards after we've idled them above.
2101 	 */
2102 	if (mmcbr_get_mode(dev) == mode_sd) {
2103 		err = mmc_send_if_cond(sc, 1);
2104 		mmc_send_app_op_cond(sc,
2105 		    (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
2106 	} else
2107 		mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL);
2108 	mmc_discover_cards(sc);
2109 	mmc_rescan_cards(sc);
2110 
2111 	mmcbr_set_bus_mode(dev, pushpull);
2112 	mmcbr_update_ios(dev);
2113 	mmc_calculate_clock(sc);
2114 }
2115 
2116 static int
mmc_calculate_clock(struct mmc_softc * sc)2117 mmc_calculate_clock(struct mmc_softc *sc)
2118 {
2119 	device_t dev;
2120 	struct mmc_ivars *ivar;
2121 	int i;
2122 	uint32_t dtr, max_dtr;
2123 	uint16_t rca;
2124 	enum mmc_bus_timing max_timing, timing;
2125 	bool changed, hs400;
2126 
2127 	dev = sc->dev;
2128 	max_dtr = mmcbr_get_f_max(dev);
2129 	max_timing = bus_timing_max;
2130 	do {
2131 		changed = false;
2132 		for (i = 0; i < sc->child_count; i++) {
2133 			ivar = device_get_ivars(sc->child_list[i]);
2134 			if (isclr(&ivar->timings, max_timing) ||
2135 			    !mmc_host_timing(dev, max_timing)) {
2136 				for (timing = max_timing - 1; timing >=
2137 				    bus_timing_normal; timing--) {
2138 					if (isset(&ivar->timings, timing) &&
2139 					    mmc_host_timing(dev, timing)) {
2140 						max_timing = timing;
2141 						break;
2142 					}
2143 				}
2144 				changed = true;
2145 			}
2146 			dtr = mmc_timing_to_dtr(ivar, max_timing);
2147 			if (dtr < max_dtr) {
2148 				max_dtr = dtr;
2149 				changed = true;
2150 			}
2151 		}
2152 	} while (changed == true);
2153 
2154 	if (bootverbose || mmc_debug) {
2155 		device_printf(dev,
2156 		    "setting transfer rate to %d.%03dMHz (%s timing)\n",
2157 		    max_dtr / 1000000, (max_dtr / 1000) % 1000,
2158 		    mmc_timing_to_string(max_timing));
2159 	}
2160 
2161 	/*
2162 	 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin
2163 	 * with HS200 following the sequence as described in "6.6.2.2 HS200
2164 	 * timing mode selection" of the eMMC specification v5.1, too, and
2165 	 * switch to max_timing later.  HS400ES requires no tuning and, thus,
2166 	 * can be switch to directly, but requires the same detour via high
2167 	 * speed mode as does HS400 (see mmc_switch_to_hs400()).
2168 	 */
2169 	hs400 = max_timing == bus_timing_mmc_hs400;
2170 	timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing;
2171 	for (i = 0; i < sc->child_count; i++) {
2172 		ivar = device_get_ivars(sc->child_list[i]);
2173 		if ((ivar->timings & ~(1 << bus_timing_normal)) == 0)
2174 			goto clock;
2175 
2176 		rca = ivar->rca;
2177 		if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
2178 			device_printf(dev, "Card at relative address %d "
2179 			    "failed to select\n", rca);
2180 			continue;
2181 		}
2182 
2183 		if (timing == bus_timing_mmc_hs200 ||	/* includes HS400 */
2184 		    timing == bus_timing_mmc_hs400es) {
2185 			if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2186 				device_printf(dev, "Failed to set VCCQ for "
2187 				    "card at relative address %d\n", rca);
2188 				continue;
2189 			}
2190 		}
2191 
2192 		if (timing == bus_timing_mmc_hs200) {	/* includes HS400 */
2193 			/* Set bus width (required for initial tuning). */
2194 			if (mmc_set_card_bus_width(sc, ivar, timing) !=
2195 			    MMC_ERR_NONE) {
2196 				device_printf(dev, "Card at relative address "
2197 				    "%d failed to set bus width\n", rca);
2198 				continue;
2199 			}
2200 			mmcbr_set_bus_width(dev, ivar->bus_width);
2201 			mmcbr_update_ios(dev);
2202 		} else if (timing == bus_timing_mmc_hs400es) {
2203 			if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) !=
2204 			    MMC_ERR_NONE) {
2205 				device_printf(dev, "Card at relative address "
2206 				    "%d failed to set %s timing\n", rca,
2207 				    mmc_timing_to_string(timing));
2208 				continue;
2209 			}
2210 			goto power_class;
2211 		}
2212 
2213 		if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) {
2214 			device_printf(dev, "Card at relative address %d "
2215 			    "failed to set %s timing\n", rca,
2216 			    mmc_timing_to_string(timing));
2217 			continue;
2218 		}
2219 
2220 		if (timing == bus_timing_mmc_ddr52) {
2221 			/*
2222 			 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH
2223 			 * (must be done after switching to EXT_CSD_HS_TIMING).
2224 			 */
2225 			if (mmc_set_card_bus_width(sc, ivar, timing) !=
2226 			    MMC_ERR_NONE) {
2227 				device_printf(dev, "Card at relative address "
2228 				    "%d failed to set bus width\n", rca);
2229 				continue;
2230 			}
2231 			mmcbr_set_bus_width(dev, ivar->bus_width);
2232 			mmcbr_update_ios(dev);
2233 			if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2234 				device_printf(dev, "Failed to set VCCQ for "
2235 				    "card at relative address %d\n", rca);
2236 				continue;
2237 			}
2238 		}
2239 
2240 clock:
2241 		/* Set clock (must be done before initial tuning). */
2242 		mmcbr_set_clock(dev, max_dtr);
2243 		mmcbr_update_ios(dev);
2244 
2245 		/*
2246 		 * Don't call into the bridge driver for timings definitely
2247 		 * not requiring tuning.  Note that it's up to the upper
2248 		 * layer to actually execute tuning otherwise.
2249 		 */
2250 		if (timing <= bus_timing_uhs_sdr25 ||
2251 		    timing == bus_timing_mmc_ddr52)
2252 			goto power_class;
2253 
2254 		if (mmcbr_tune(dev, hs400) != 0) {
2255 			device_printf(dev, "Card at relative address %d "
2256 			    "failed to execute initial tuning\n", rca);
2257 			continue;
2258 		}
2259 
2260 		if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr,
2261 		    max_timing) != MMC_ERR_NONE) {
2262 			device_printf(dev, "Card at relative address %d "
2263 			    "failed to set %s timing\n", rca,
2264 			    mmc_timing_to_string(max_timing));
2265 			continue;
2266 		}
2267 
2268 power_class:
2269 		if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) {
2270 			device_printf(dev, "Card at relative address %d "
2271 			    "failed to set power class\n", rca);
2272 		}
2273 	}
2274 	(void)mmc_select_card(sc, 0);
2275 	return (max_dtr);
2276 }
2277 
2278 /*
2279  * Switch from HS200 to HS400 (either initially or for re-tuning) or directly
2280  * to HS400ES.  This follows the sequences described in "6.6.2.3 HS400 timing
2281  * mode selection" of the eMMC specification v5.1.
2282  */
2283 static int
mmc_switch_to_hs400(struct mmc_softc * sc,struct mmc_ivars * ivar,uint32_t clock,enum mmc_bus_timing max_timing)2284 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
2285     uint32_t clock, enum mmc_bus_timing max_timing)
2286 {
2287 	device_t dev;
2288 	int err;
2289 
2290 	dev = sc->dev;
2291 
2292 	/*
2293 	 * Both clock and timing must be set as appropriate for high speed
2294 	 * before eventually switching to HS400/HS400ES; mmc_set_timing()
2295 	 * will issue mmcbr_update_ios().
2296 	 */
2297 	mmcbr_set_clock(dev, ivar->hs_tran_speed);
2298 	err = mmc_set_timing(sc, ivar, bus_timing_hs);
2299 	if (err != MMC_ERR_NONE)
2300 		return (err);
2301 
2302 	/*
2303 	 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally
2304 	 * EXT_CSD_BUS_WIDTH_ES for HS400ES).
2305 	 */
2306 	err = mmc_set_card_bus_width(sc, ivar, max_timing);
2307 	if (err != MMC_ERR_NONE)
2308 		return (err);
2309 	mmcbr_set_bus_width(dev, ivar->bus_width);
2310 	mmcbr_update_ios(dev);
2311 
2312 	/* Finally, switch to HS400/HS400ES mode. */
2313 	err = mmc_set_timing(sc, ivar, max_timing);
2314 	if (err != MMC_ERR_NONE)
2315 		return (err);
2316 	mmcbr_set_clock(dev, clock);
2317 	mmcbr_update_ios(dev);
2318 	return (MMC_ERR_NONE);
2319 }
2320 
2321 /*
2322  * Switch from HS400 to HS200 (for re-tuning).
2323  */
2324 static int
mmc_switch_to_hs200(struct mmc_softc * sc,struct mmc_ivars * ivar,uint32_t clock)2325 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
2326     uint32_t clock)
2327 {
2328 	device_t dev;
2329 	int err;
2330 
2331 	dev = sc->dev;
2332 
2333 	/*
2334 	 * Both clock and timing must initially be set as appropriate for
2335 	 * DDR52 before eventually switching to HS200; mmc_set_timing()
2336 	 * will issue mmcbr_update_ios().
2337 	 */
2338 	mmcbr_set_clock(dev, ivar->hs_tran_speed);
2339 	err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52);
2340 	if (err != MMC_ERR_NONE)
2341 		return (err);
2342 
2343 	/*
2344 	 * Next, switch to high speed.  Thus, clear EXT_CSD_BUS_WIDTH_n_DDR
2345 	 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios.
2346 	 */
2347 	err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs);
2348 	if (err != MMC_ERR_NONE)
2349 		return (err);
2350 	mmcbr_set_bus_width(dev, ivar->bus_width);
2351 	mmcbr_set_timing(sc->dev, bus_timing_hs);
2352 	mmcbr_update_ios(dev);
2353 
2354 	/* Finally, switch to HS200 mode. */
2355 	err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200);
2356 	if (err != MMC_ERR_NONE)
2357 		return (err);
2358 	mmcbr_set_clock(dev, clock);
2359 	mmcbr_update_ios(dev);
2360 	return (MMC_ERR_NONE);
2361 }
2362 
2363 static int
mmc_retune(device_t busdev,device_t dev,bool reset)2364 mmc_retune(device_t busdev, device_t dev, bool reset)
2365 {
2366 	struct mmc_softc *sc;
2367 	struct mmc_ivars *ivar;
2368 	int err;
2369 	uint32_t clock;
2370 	enum mmc_bus_timing timing;
2371 
2372 	if (device_get_parent(dev) != busdev)
2373 		return (MMC_ERR_INVALID);
2374 
2375 	sc = device_get_softc(busdev);
2376 	if (sc->retune_needed != 1 && sc->retune_paused != 0)
2377 		return (MMC_ERR_INVALID);
2378 
2379 	timing = mmcbr_get_timing(busdev);
2380 	if (timing == bus_timing_mmc_hs400) {
2381 		/*
2382 		 * Controllers use the data strobe line to latch data from
2383 		 * the devices in HS400 mode so periodic re-tuning isn't
2384 		 * expected to be required, i. e. only if a CRC or tuning
2385 		 * error is signaled to the bridge.  In these latter cases
2386 		 * we are asked to reset the tuning circuit and need to do
2387 		 * the switch timing dance.
2388 		 */
2389 		if (reset == false)
2390 			return (0);
2391 		ivar = device_get_ivars(dev);
2392 		clock = mmcbr_get_clock(busdev);
2393 		if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE)
2394 			return (MMC_ERR_BADCRC);
2395 	}
2396 	err = mmcbr_retune(busdev, reset);
2397 	if (err != 0 && timing == bus_timing_mmc_hs400)
2398 		return (MMC_ERR_BADCRC);
2399 	switch (err) {
2400 	case 0:
2401 		break;
2402 	case EIO:
2403 		return (MMC_ERR_FAILED);
2404 	default:
2405 		return (MMC_ERR_INVALID);
2406 	}
2407 	if (timing == bus_timing_mmc_hs400) {
2408 		if (mmc_switch_to_hs400(sc, ivar, clock, timing) !=
2409 		    MMC_ERR_NONE)
2410 			return (MMC_ERR_BADCRC);
2411 	}
2412 	return (MMC_ERR_NONE);
2413 }
2414 
2415 static void
mmc_retune_pause(device_t busdev,device_t dev,bool retune)2416 mmc_retune_pause(device_t busdev, device_t dev, bool retune)
2417 {
2418 	struct mmc_softc *sc;
2419 
2420 	sc = device_get_softc(busdev);
2421 	KASSERT(device_get_parent(dev) == busdev,
2422 	    ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2423 	    device_get_nameunit(busdev)));
2424 	KASSERT(sc->owner != NULL,
2425 	    ("%s: Request from %s without bus being acquired.", __func__,
2426 	    device_get_nameunit(dev)));
2427 
2428 	if (retune == true && sc->retune_paused == 0)
2429 		sc->retune_needed = 1;
2430 	sc->retune_paused++;
2431 }
2432 
2433 static void
mmc_retune_unpause(device_t busdev,device_t dev)2434 mmc_retune_unpause(device_t busdev, device_t dev)
2435 {
2436 	struct mmc_softc *sc;
2437 
2438 	sc = device_get_softc(busdev);
2439 	KASSERT(device_get_parent(dev) == busdev,
2440 	    ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2441 	    device_get_nameunit(busdev)));
2442 	KASSERT(sc->owner != NULL,
2443 	    ("%s: Request from %s without bus being acquired.", __func__,
2444 	    device_get_nameunit(dev)));
2445 	KASSERT(sc->retune_paused != 0,
2446 	    ("%s: Re-tune pause count already at 0", __func__));
2447 
2448 	sc->retune_paused--;
2449 }
2450 
2451 static void
mmc_scan(struct mmc_softc * sc)2452 mmc_scan(struct mmc_softc *sc)
2453 {
2454 	device_t dev = sc->dev;
2455 	int err;
2456 
2457 	err = mmc_acquire_bus(dev, dev);
2458 	if (err != 0) {
2459 		device_printf(dev, "Failed to acquire bus for scanning\n");
2460 		return;
2461 	}
2462 	mmc_go_discovery(sc);
2463 	err = mmc_release_bus(dev, dev);
2464 	if (err != 0) {
2465 		device_printf(dev, "Failed to release bus after scanning\n");
2466 		return;
2467 	}
2468 	bus_attach_children(dev);
2469 }
2470 
2471 static int
mmc_read_ivar(device_t bus,device_t child,int which,uintptr_t * result)2472 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
2473 {
2474 	struct mmc_ivars *ivar = device_get_ivars(child);
2475 
2476 	switch (which) {
2477 	default:
2478 		return (EINVAL);
2479 	case MMC_IVAR_SPEC_VERS:
2480 		*result = ivar->csd.spec_vers;
2481 		break;
2482 	case MMC_IVAR_DSR_IMP:
2483 		*result = ivar->csd.dsr_imp;
2484 		break;
2485 	case MMC_IVAR_MEDIA_SIZE:
2486 		*result = ivar->sec_count;
2487 		break;
2488 	case MMC_IVAR_RCA:
2489 		*result = ivar->rca;
2490 		break;
2491 	case MMC_IVAR_SECTOR_SIZE:
2492 		*result = MMC_SECTOR_SIZE;
2493 		break;
2494 	case MMC_IVAR_TRAN_SPEED:
2495 		*result = mmcbr_get_clock(bus);
2496 		break;
2497 	case MMC_IVAR_READ_ONLY:
2498 		*result = ivar->read_only;
2499 		break;
2500 	case MMC_IVAR_HIGH_CAP:
2501 		*result = ivar->high_cap;
2502 		break;
2503 	case MMC_IVAR_CARD_TYPE:
2504 		*result = ivar->mode;
2505 		break;
2506 	case MMC_IVAR_BUS_WIDTH:
2507 		*result = ivar->bus_width;
2508 		break;
2509 	case MMC_IVAR_ERASE_SECTOR:
2510 		*result = ivar->erase_sector;
2511 		break;
2512 	case MMC_IVAR_MAX_DATA:
2513 		*result = mmcbr_get_max_data(bus);
2514 		break;
2515 	case MMC_IVAR_CMD6_TIMEOUT:
2516 		*result = ivar->cmd6_time;
2517 		break;
2518 	case MMC_IVAR_QUIRKS:
2519 		*result = ivar->quirks;
2520 		break;
2521 	case MMC_IVAR_CARD_ID_STRING:
2522 		*(char **)result = ivar->card_id_string;
2523 		break;
2524 	case MMC_IVAR_CARD_SN_STRING:
2525 		*(char **)result = ivar->card_sn_string;
2526 		break;
2527 	}
2528 	return (0);
2529 }
2530 
2531 static int
mmc_write_ivar(device_t bus,device_t child,int which,uintptr_t value)2532 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
2533 {
2534 
2535 	/*
2536 	 * None are writable ATM
2537 	 */
2538 	return (EINVAL);
2539 }
2540 
2541 static void
mmc_delayed_attach(void * xsc)2542 mmc_delayed_attach(void *xsc)
2543 {
2544 	struct mmc_softc *sc = xsc;
2545 
2546 	mmc_scan(sc);
2547 	config_intrhook_disestablish(&sc->config_intrhook);
2548 }
2549 
2550 static int
mmc_child_location(device_t dev,device_t child,struct sbuf * sb)2551 mmc_child_location(device_t dev, device_t child, struct sbuf *sb)
2552 {
2553 
2554 	sbuf_printf(sb, "rca=0x%04x", mmc_get_rca(child));
2555 	return (0);
2556 }
2557 
2558 static device_method_t mmc_methods[] = {
2559 	/* device_if */
2560 	DEVMETHOD(device_probe, mmc_probe),
2561 	DEVMETHOD(device_attach, mmc_attach),
2562 	DEVMETHOD(device_detach, mmc_detach),
2563 	DEVMETHOD(device_suspend, mmc_suspend),
2564 	DEVMETHOD(device_resume, mmc_resume),
2565 
2566 	/* Bus interface */
2567 	DEVMETHOD(bus_read_ivar, mmc_read_ivar),
2568 	DEVMETHOD(bus_write_ivar, mmc_write_ivar),
2569 	DEVMETHOD(bus_child_location, mmc_child_location),
2570 
2571 	/* MMC Bus interface */
2572 	DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause),
2573 	DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause),
2574 	DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
2575 	DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
2576 	DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
2577 
2578 	DEVMETHOD_END
2579 };
2580 
2581 driver_t mmc_driver = {
2582 	"mmc",
2583 	mmc_methods,
2584 	sizeof(struct mmc_softc),
2585 };
2586 
2587 MODULE_VERSION(mmc, MMC_VERSION);
2588