1 /*- 2 * Copyright (c) 2019-2021, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include "opt_rss.h" 27 #include "opt_ratelimit.h" 28 29 #include <linux/kernel.h> 30 #include <linux/module.h> 31 #include <dev/mlx5/driver.h> 32 #include <dev/mlx5/tls.h> 33 #include <dev/mlx5/mlx5_core/mlx5_core.h> 34 #include <dev/mlx5/mlx5_core/transobj.h> 35 36 int mlx5_tls_open_tis(struct mlx5_core_dev *mdev, int tc, int tdn, int pdn, u32 *p_tisn) 37 { 38 u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {}; 39 void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 40 int err; 41 42 MLX5_SET(tisc, tisc, prio, tc); 43 MLX5_SET(tisc, tisc, transport_domain, tdn); 44 MLX5_SET(tisc, tisc, tls_en, 1); 45 MLX5_SET(tisc, tisc, pd, pdn); 46 47 err = mlx5_core_create_tis(mdev, in, sizeof(in), p_tisn); 48 if (err) 49 return (err); 50 else if (*p_tisn == 0) 51 return (-EINVAL); 52 else 53 return (0); /* success */ 54 } 55 56 void mlx5_tls_close_tis(struct mlx5_core_dev *mdev, u32 tisn) 57 { 58 59 mlx5_core_destroy_tis(mdev, tisn, 0); 60 } 61 62 int mlx5_tls_open_tir(struct mlx5_core_dev *mdev, int tdn, int rqtn, u32 *p_tirn) 63 { 64 u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {}; 65 void *tirc = MLX5_ADDR_OF(create_tir_in, in, tir_context); 66 int err; 67 68 MLX5_SET(tirc, tirc, transport_domain, tdn); 69 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); 70 MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_TIRC_RX_HASH_FN_HASH_INVERTED_XOR8); 71 MLX5_SET(tirc, tirc, indirect_table, rqtn); 72 MLX5_SET(tirc, tirc, tls_en, 1); 73 MLX5_SET(tirc, tirc, self_lb_en, 74 MLX5_TIRC_SELF_LB_EN_ENABLE_UNICAST | 75 MLX5_TIRC_SELF_LB_EN_ENABLE_MULTICAST); 76 77 err = mlx5_core_create_tir(mdev, in, sizeof(in), p_tirn); 78 if (err) 79 return (err); 80 else if (*p_tirn == 0) 81 return (-EINVAL); 82 else 83 return (0); /* success */ 84 } 85 86 void mlx5_tls_close_tir(struct mlx5_core_dev *mdev, u32 tirn) 87 { 88 mlx5_core_destroy_tir(mdev, tirn, 0); 89 } 90