1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2020 Mellanox Technologies Ltd. */
3
4 #include <linux/mlx5/driver.h>
5 #include "eswitch.h"
6
7 static void
mlx5_esw_get_port_parent_id(struct mlx5_core_dev * dev,struct netdev_phys_item_id * ppid)8 mlx5_esw_get_port_parent_id(struct mlx5_core_dev *dev, struct netdev_phys_item_id *ppid)
9 {
10 u64 parent_id;
11
12 parent_id = mlx5_query_nic_system_image_guid(dev);
13 ppid->id_len = sizeof(parent_id);
14 memcpy(ppid->id, &parent_id, sizeof(parent_id));
15 }
16
mlx5_esw_devlink_port_supported(struct mlx5_eswitch * esw,u16 vport_num)17 static bool mlx5_esw_devlink_port_supported(struct mlx5_eswitch *esw, u16 vport_num)
18 {
19 return (mlx5_core_is_ecpf(esw->dev) && vport_num == MLX5_VPORT_PF) ||
20 mlx5_eswitch_is_vf_vport(esw, vport_num) ||
21 mlx5_core_is_ec_vf_vport(esw->dev, vport_num);
22 }
23
mlx5_esw_offloads_pf_vf_devlink_port_attrs_set(struct mlx5_eswitch * esw,u16 vport_num,struct devlink_port * dl_port)24 static void mlx5_esw_offloads_pf_vf_devlink_port_attrs_set(struct mlx5_eswitch *esw,
25 u16 vport_num,
26 struct devlink_port *dl_port)
27 {
28 struct mlx5_core_dev *dev = esw->dev;
29 struct netdev_phys_item_id ppid = {};
30 u32 controller_num = 0;
31 bool external;
32 u16 pfnum;
33
34 mlx5_esw_get_port_parent_id(dev, &ppid);
35 pfnum = PCI_FUNC(dev->pdev->devfn);
36 external = mlx5_core_is_ecpf_esw_manager(dev);
37 if (external)
38 controller_num = dev->priv.eswitch->offloads.host_number + 1;
39
40 if (vport_num == MLX5_VPORT_PF) {
41 memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len);
42 dl_port->attrs.switch_id.id_len = ppid.id_len;
43 devlink_port_attrs_pci_pf_set(dl_port, controller_num, pfnum, external);
44 } else if (mlx5_eswitch_is_vf_vport(esw, vport_num)) {
45 memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len);
46 dl_port->attrs.switch_id.id_len = ppid.id_len;
47 devlink_port_attrs_pci_vf_set(dl_port, controller_num, pfnum,
48 vport_num - 1, external);
49 } else if (mlx5_core_is_ec_vf_vport(esw->dev, vport_num)) {
50 u16 base_vport = mlx5_core_ec_vf_vport_base(dev);
51
52 memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len);
53 dl_port->attrs.switch_id.id_len = ppid.id_len;
54 devlink_port_attrs_pci_vf_set(dl_port, 0, pfnum,
55 vport_num - base_vport, false);
56 }
57 }
58
mlx5_esw_offloads_pf_vf_devlink_port_init(struct mlx5_eswitch * esw,struct mlx5_vport * vport)59 int mlx5_esw_offloads_pf_vf_devlink_port_init(struct mlx5_eswitch *esw,
60 struct mlx5_vport *vport)
61 {
62 struct mlx5_devlink_port *dl_port;
63 u16 vport_num = vport->vport;
64
65 if (!mlx5_esw_devlink_port_supported(esw, vport_num))
66 return 0;
67
68 dl_port = kzalloc(sizeof(*dl_port), GFP_KERNEL);
69 if (!dl_port)
70 return -ENOMEM;
71
72 mlx5_esw_offloads_pf_vf_devlink_port_attrs_set(esw, vport_num,
73 &dl_port->dl_port);
74
75 vport->dl_port = dl_port;
76 mlx5_devlink_port_init(dl_port, vport);
77 return 0;
78 }
79
mlx5_esw_offloads_pf_vf_devlink_port_cleanup(struct mlx5_eswitch * esw,struct mlx5_vport * vport)80 void mlx5_esw_offloads_pf_vf_devlink_port_cleanup(struct mlx5_eswitch *esw,
81 struct mlx5_vport *vport)
82 {
83 if (!vport->dl_port)
84 return;
85
86 kfree(vport->dl_port);
87 vport->dl_port = NULL;
88 }
89
90 static const struct devlink_port_ops mlx5_esw_pf_vf_dl_port_ops = {
91 .port_fn_hw_addr_get = mlx5_devlink_port_fn_hw_addr_get,
92 .port_fn_hw_addr_set = mlx5_devlink_port_fn_hw_addr_set,
93 .port_fn_roce_get = mlx5_devlink_port_fn_roce_get,
94 .port_fn_roce_set = mlx5_devlink_port_fn_roce_set,
95 .port_fn_migratable_get = mlx5_devlink_port_fn_migratable_get,
96 .port_fn_migratable_set = mlx5_devlink_port_fn_migratable_set,
97 #ifdef CONFIG_XFRM_OFFLOAD
98 .port_fn_ipsec_crypto_get = mlx5_devlink_port_fn_ipsec_crypto_get,
99 .port_fn_ipsec_crypto_set = mlx5_devlink_port_fn_ipsec_crypto_set,
100 .port_fn_ipsec_packet_get = mlx5_devlink_port_fn_ipsec_packet_get,
101 .port_fn_ipsec_packet_set = mlx5_devlink_port_fn_ipsec_packet_set,
102 #endif /* CONFIG_XFRM_OFFLOAD */
103 .port_fn_max_io_eqs_get = mlx5_devlink_port_fn_max_io_eqs_get,
104 .port_fn_max_io_eqs_set = mlx5_devlink_port_fn_max_io_eqs_set,
105 };
106
mlx5_esw_offloads_sf_devlink_port_attrs_set(struct mlx5_eswitch * esw,struct devlink_port * dl_port,u32 controller,u32 sfnum)107 static void mlx5_esw_offloads_sf_devlink_port_attrs_set(struct mlx5_eswitch *esw,
108 struct devlink_port *dl_port,
109 u32 controller, u32 sfnum)
110 {
111 struct mlx5_core_dev *dev = esw->dev;
112 struct netdev_phys_item_id ppid = {};
113 u16 pfnum;
114
115 pfnum = PCI_FUNC(dev->pdev->devfn);
116 mlx5_esw_get_port_parent_id(dev, &ppid);
117 memcpy(dl_port->attrs.switch_id.id, &ppid.id[0], ppid.id_len);
118 dl_port->attrs.switch_id.id_len = ppid.id_len;
119 devlink_port_attrs_pci_sf_set(dl_port, controller, pfnum, sfnum, !!controller);
120 }
121
mlx5_esw_offloads_sf_devlink_port_init(struct mlx5_eswitch * esw,struct mlx5_vport * vport,struct mlx5_devlink_port * dl_port,u32 controller,u32 sfnum)122 int mlx5_esw_offloads_sf_devlink_port_init(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
123 struct mlx5_devlink_port *dl_port,
124 u32 controller, u32 sfnum)
125 {
126 mlx5_esw_offloads_sf_devlink_port_attrs_set(esw, &dl_port->dl_port, controller, sfnum);
127
128 vport->dl_port = dl_port;
129 mlx5_devlink_port_init(dl_port, vport);
130 return 0;
131 }
132
mlx5_esw_offloads_sf_devlink_port_cleanup(struct mlx5_eswitch * esw,struct mlx5_vport * vport)133 void mlx5_esw_offloads_sf_devlink_port_cleanup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
134 {
135 vport->dl_port = NULL;
136 }
137
138 static const struct devlink_port_ops mlx5_esw_dl_sf_port_ops = {
139 #ifdef CONFIG_MLX5_SF_MANAGER
140 .port_del = mlx5_devlink_sf_port_del,
141 #endif
142 .port_fn_hw_addr_get = mlx5_devlink_port_fn_hw_addr_get,
143 .port_fn_hw_addr_set = mlx5_devlink_port_fn_hw_addr_set,
144 .port_fn_roce_get = mlx5_devlink_port_fn_roce_get,
145 .port_fn_roce_set = mlx5_devlink_port_fn_roce_set,
146 #ifdef CONFIG_MLX5_SF_MANAGER
147 .port_fn_state_get = mlx5_devlink_sf_port_fn_state_get,
148 .port_fn_state_set = mlx5_devlink_sf_port_fn_state_set,
149 #endif
150 .port_fn_max_io_eqs_get = mlx5_devlink_port_fn_max_io_eqs_get,
151 .port_fn_max_io_eqs_set = mlx5_devlink_port_fn_max_io_eqs_set,
152 };
153
mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch * esw,struct mlx5_vport * vport)154 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
155 {
156 struct mlx5_core_dev *dev = esw->dev;
157 const struct devlink_port_ops *ops;
158 struct mlx5_devlink_port *dl_port;
159 u16 vport_num = vport->vport;
160 unsigned int dl_port_index;
161 struct devlink *devlink;
162 int err;
163
164 dl_port = vport->dl_port;
165 if (!dl_port)
166 return 0;
167
168 if (mlx5_esw_is_sf_vport(esw, vport_num))
169 ops = &mlx5_esw_dl_sf_port_ops;
170 else if (mlx5_eswitch_is_pf_vf_vport(esw, vport_num))
171 ops = &mlx5_esw_pf_vf_dl_port_ops;
172 else
173 ops = NULL;
174
175 devlink = priv_to_devlink(dev);
176 dl_port_index = mlx5_esw_vport_to_devlink_port_index(dev, vport_num);
177 err = devl_port_register_with_ops(devlink, &dl_port->dl_port, dl_port_index, ops);
178 if (err)
179 return err;
180
181 err = devl_rate_leaf_create(&dl_port->dl_port, vport, NULL);
182 if (err)
183 goto rate_err;
184
185 return 0;
186
187 rate_err:
188 devl_port_unregister(&dl_port->dl_port);
189 return err;
190 }
191
mlx5_esw_offloads_devlink_port_unregister(struct mlx5_vport * vport)192 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_vport *vport)
193 {
194 struct mlx5_devlink_port *dl_port;
195
196 if (!vport->dl_port)
197 return;
198 dl_port = vport->dl_port;
199
200 mlx5_esw_qos_vport_update_parent(vport, NULL, NULL);
201 devl_rate_leaf_destroy(&dl_port->dl_port);
202
203 devl_port_unregister(&dl_port->dl_port);
204 }
205
mlx5_esw_offloads_devlink_port(struct mlx5_eswitch * esw,u16 vport_num)206 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num)
207 {
208 struct mlx5_vport *vport;
209
210 vport = mlx5_eswitch_get_vport(esw, vport_num);
211 return IS_ERR(vport) ? ERR_CAST(vport) : &vport->dl_port->dl_port;
212 }
213