1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2019 Andriy Gapon
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/bus.h>
31 #include <sys/conf.h>
32 #include <sys/kernel.h>
33 #include <sys/lock.h>
34 #include <sys/mutex.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
37 #include <sys/proc.h>
38 #include <sys/rman.h>
39 #include <sys/sbuf.h>
40 #include <sys/stdarg.h>
41 #include <sys/time.h>
42
43 #include <machine/bus.h>
44 #include <machine/resource.h>
45
46 #include <isa/isavar.h>
47
48 #include <dev/superio/superio.h>
49 #include <dev/superio/superio_io.h>
50
51 #include "isa_if.h"
52
53 typedef void (*sio_conf_enter_f)(struct resource*, uint16_t);
54 typedef void (*sio_conf_exit_f)(struct resource*, uint16_t);
55
56 struct sio_conf_methods {
57 sio_conf_enter_f enter;
58 sio_conf_exit_f exit;
59 superio_vendor_t vendor;
60 };
61
62 struct sio_device {
63 uint8_t ldn;
64 superio_dev_type_t type;
65 };
66
67 struct superio_devinfo {
68 STAILQ_ENTRY(superio_devinfo) link;
69 struct resource_list resources;
70 device_t dev;
71 uint8_t ldn;
72 superio_dev_type_t type;
73 uint16_t iobase;
74 uint16_t iobase2;
75 uint8_t irq;
76 uint8_t dma;
77 };
78
79 struct siosc {
80 struct mtx conf_lock;
81 STAILQ_HEAD(, superio_devinfo) devlist;
82 struct resource* io_res;
83 struct cdev *chardev;
84 int io_rid;
85 uint16_t io_port;
86 const struct sio_conf_methods *methods;
87 const struct sio_device *known_devices;
88 superio_vendor_t vendor;
89 uint16_t devid;
90 uint8_t revid;
91 int extid;
92 uint8_t current_ldn;
93 uint8_t ldn_reg;
94 uint8_t enable_reg;
95 };
96
97 static d_ioctl_t superio_ioctl;
98
99 static struct cdevsw superio_cdevsw = {
100 .d_version = D_VERSION,
101 .d_ioctl = superio_ioctl,
102 .d_name = "superio",
103 };
104
105 #define NUMPORTS 2
106
107 static uint8_t
sio_read(struct resource * res,uint8_t reg)108 sio_read(struct resource* res, uint8_t reg)
109 {
110 bus_write_1(res, 0, reg);
111 return (bus_read_1(res, 1));
112 }
113
114 /* Read a word from two one-byte registers, big endian. */
115 static uint16_t
sio_readw(struct resource * res,uint8_t reg)116 sio_readw(struct resource* res, uint8_t reg)
117 {
118 uint16_t v;
119
120 v = sio_read(res, reg);
121 v <<= 8;
122 v |= sio_read(res, reg + 1);
123 return (v);
124 }
125
126 static void
sio_write(struct resource * res,uint8_t reg,uint8_t val)127 sio_write(struct resource* res, uint8_t reg, uint8_t val)
128 {
129 bus_write_1(res, 0, reg);
130 bus_write_1(res, 1, val);
131 }
132
133 static void
sio_ldn_select(struct siosc * sc,uint8_t ldn)134 sio_ldn_select(struct siosc *sc, uint8_t ldn)
135 {
136 mtx_assert(&sc->conf_lock, MA_OWNED);
137 if (ldn == sc->current_ldn)
138 return;
139 sio_write(sc->io_res, sc->ldn_reg, ldn);
140 sc->current_ldn = ldn;
141 }
142
143 static uint8_t
sio_ldn_read(struct siosc * sc,uint8_t ldn,uint8_t reg)144 sio_ldn_read(struct siosc *sc, uint8_t ldn, uint8_t reg)
145 {
146 mtx_assert(&sc->conf_lock, MA_OWNED);
147 if (reg >= sc->enable_reg) {
148 sio_ldn_select(sc, ldn);
149 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed"));
150 }
151 return (sio_read(sc->io_res, reg));
152 }
153
154 static uint16_t
sio_ldn_readw(struct siosc * sc,uint8_t ldn,uint8_t reg)155 sio_ldn_readw(struct siosc *sc, uint8_t ldn, uint8_t reg)
156 {
157 mtx_assert(&sc->conf_lock, MA_OWNED);
158 if (reg >= sc->enable_reg) {
159 sio_ldn_select(sc, ldn);
160 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed"));
161 }
162 return (sio_readw(sc->io_res, reg));
163 }
164
165 static void
sio_ldn_write(struct siosc * sc,uint8_t ldn,uint8_t reg,uint8_t val)166 sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val)
167 {
168 mtx_assert(&sc->conf_lock, MA_OWNED);
169 if (reg <= sc->ldn_reg) {
170 printf("ignored attempt to write special register 0x%x\n", reg);
171 return;
172 }
173 sio_ldn_select(sc, ldn);
174 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed"));
175 sio_write(sc->io_res, reg, val);
176 }
177
178 static void
sio_conf_enter(struct siosc * sc)179 sio_conf_enter(struct siosc *sc)
180 {
181 mtx_lock(&sc->conf_lock);
182 sc->methods->enter(sc->io_res, sc->io_port);
183 }
184
185 static void
sio_conf_exit(struct siosc * sc)186 sio_conf_exit(struct siosc *sc)
187 {
188 sc->methods->exit(sc->io_res, sc->io_port);
189 sc->current_ldn = 0xff;
190 mtx_unlock(&sc->conf_lock);
191 }
192
193 static void
ite_conf_enter(struct resource * res,uint16_t port)194 ite_conf_enter(struct resource* res, uint16_t port)
195 {
196 bus_write_1(res, 0, 0x87);
197 bus_write_1(res, 0, 0x01);
198 bus_write_1(res, 0, 0x55);
199 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa);
200 }
201
202 static void
ite_conf_exit(struct resource * res,uint16_t port)203 ite_conf_exit(struct resource* res, uint16_t port)
204 {
205 sio_write(res, 0x02, 0x02);
206 }
207
208 static const struct sio_conf_methods ite_conf_methods = {
209 .enter = ite_conf_enter,
210 .exit = ite_conf_exit,
211 .vendor = SUPERIO_VENDOR_ITE
212 };
213
214 static void
nvt_conf_enter(struct resource * res,uint16_t port)215 nvt_conf_enter(struct resource* res, uint16_t port)
216 {
217 bus_write_1(res, 0, 0x87);
218 bus_write_1(res, 0, 0x87);
219 }
220
221 static void
nvt_conf_exit(struct resource * res,uint16_t port)222 nvt_conf_exit(struct resource* res, uint16_t port)
223 {
224 bus_write_1(res, 0, 0xaa);
225 }
226
227 static const struct sio_conf_methods nvt_conf_methods = {
228 .enter = nvt_conf_enter,
229 .exit = nvt_conf_exit,
230 .vendor = SUPERIO_VENDOR_NUVOTON
231 };
232
233 static void
fintek_conf_enter(struct resource * res,uint16_t port)234 fintek_conf_enter(struct resource* res, uint16_t port)
235 {
236 bus_write_1(res, 0, 0x87);
237 bus_write_1(res, 0, 0x87);
238 }
239
240 static void
fintek_conf_exit(struct resource * res,uint16_t port)241 fintek_conf_exit(struct resource* res, uint16_t port)
242 {
243 bus_write_1(res, 0, 0xaa);
244 }
245
246 static const struct sio_conf_methods fintek_conf_methods = {
247 .enter = fintek_conf_enter,
248 .exit = fintek_conf_exit,
249 .vendor = SUPERIO_VENDOR_FINTEK
250 };
251
252 static const struct sio_conf_methods * const methods_table[] = {
253 &ite_conf_methods,
254 &nvt_conf_methods,
255 &fintek_conf_methods,
256 NULL
257 };
258
259 static const uint16_t ports_table[] = {
260 0x2e, 0x4e, 0
261 };
262
263 const struct sio_device ite_devices[] = {
264 { .ldn = 4, .type = SUPERIO_DEV_HWM },
265 { .ldn = 7, .type = SUPERIO_DEV_WDT },
266 { .type = SUPERIO_DEV_NONE },
267 };
268
269 const struct sio_device w83627_devices[] = {
270 { .ldn = 8, .type = SUPERIO_DEV_WDT },
271 { .ldn = 9, .type = SUPERIO_DEV_GPIO },
272 { .type = SUPERIO_DEV_NONE },
273 };
274
275 const struct sio_device nvt_devices[] = {
276 { .ldn = 8, .type = SUPERIO_DEV_WDT },
277 { .type = SUPERIO_DEV_NONE },
278 };
279
280 const struct sio_device nct5104_devices[] = {
281 { .ldn = 7, .type = SUPERIO_DEV_GPIO },
282 { .ldn = 8, .type = SUPERIO_DEV_WDT },
283 { .ldn = 15, .type = SUPERIO_DEV_GPIO },
284 { .type = SUPERIO_DEV_NONE },
285 };
286
287 const struct sio_device nct5585_devices[] = {
288 { .ldn = 9, .type = SUPERIO_DEV_GPIO },
289 { .type = SUPERIO_DEV_NONE },
290 };
291
292 const struct sio_device nct611x_devices[] = {
293 { .ldn = 0x7, .type = SUPERIO_DEV_GPIO },
294 { .ldn = 0x8, .type = SUPERIO_DEV_WDT },
295 { .type = SUPERIO_DEV_NONE },
296 };
297
298 const struct sio_device nct67xx_devices[] = {
299 { .ldn = 0x8, .type = SUPERIO_DEV_WDT },
300 { .ldn = 0x9, .type = SUPERIO_DEV_GPIO },
301 { .ldn = 0xb, .type = SUPERIO_DEV_HWM },
302 { .type = SUPERIO_DEV_NONE },
303 };
304
305 const struct sio_device fintek_devices[] = {
306 { .ldn = 6, .type = SUPERIO_DEV_GPIO },
307 { .ldn = 7, .type = SUPERIO_DEV_WDT },
308 { .type = SUPERIO_DEV_NONE },
309 };
310
311 static const struct {
312 superio_vendor_t vendor;
313 uint16_t devid;
314 uint16_t mask;
315 int extid; /* Extra ID: used to handle conflicting devid. */
316 const char *descr;
317 const struct sio_device *devices;
318 } superio_table[] = {
319 {
320 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8613,
321 .devices = ite_devices,
322 },
323 {
324 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8712,
325 .devices = ite_devices,
326 },
327 {
328 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8716,
329 .devices = ite_devices,
330 },
331 {
332 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8718,
333 .devices = ite_devices,
334 },
335 {
336 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8720,
337 .devices = ite_devices,
338 },
339 {
340 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8721,
341 .devices = ite_devices,
342 },
343 {
344 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8726,
345 .devices = ite_devices,
346 },
347 {
348 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8728,
349 .devices = ite_devices,
350 },
351 {
352 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8771,
353 .devices = ite_devices,
354 },
355 {
356 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x1061, .mask = 0x00,
357 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. A)",
358 .devices = nct5104_devices,
359 },
360 {
361 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5200, .mask = 0xff,
362 .descr = "Winbond 83627HF/F/HG/G",
363 .devices = nvt_devices,
364 },
365 {
366 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5900, .mask = 0xff,
367 .descr = "Winbond 83627S",
368 .devices = nvt_devices,
369 },
370 {
371 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6000, .mask = 0xff,
372 .descr = "Winbond 83697HF",
373 .devices = nvt_devices,
374 },
375 {
376 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6800, .mask = 0xff,
377 .descr = "Winbond 83697UG",
378 .devices = nvt_devices,
379 },
380 {
381 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x7000, .mask = 0xff,
382 .descr = "Winbond 83637HF",
383 .devices = nvt_devices,
384 },
385 {
386 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8200, .mask = 0xff,
387 .descr = "Winbond 83627THF",
388 .devices = nvt_devices,
389 },
390 {
391 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8500, .mask = 0xff,
392 .descr = "Winbond 83687THF",
393 .devices = nvt_devices,
394 },
395 {
396 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8800, .mask = 0xff,
397 .descr = "Winbond 83627EHF",
398 .devices = nvt_devices,
399 },
400 {
401 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa000, .mask = 0xff,
402 .descr = "Winbond 83627DHG",
403 .devices = w83627_devices,
404 },
405 {
406 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa200, .mask = 0xff,
407 .descr = "Winbond 83627UHG",
408 .devices = nvt_devices,
409 },
410 {
411 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa500, .mask = 0xff,
412 .descr = "Winbond 83667HG",
413 .devices = nvt_devices,
414 },
415 {
416 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb000, .mask = 0xff,
417 .descr = "Winbond 83627DHG-P",
418 .devices = nvt_devices,
419 },
420 {
421 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb300, .mask = 0xff,
422 .descr = "Winbond 83667HG-B",
423 .devices = nvt_devices,
424 },
425 {
426 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb400, .mask = 0xff,
427 .descr = "Nuvoton NCT6775",
428 .devices = nvt_devices,
429 },
430 {
431 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc300, .mask = 0xff,
432 .descr = "Nuvoton NCT6776",
433 .devices = nvt_devices,
434 },
435 {
436 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc400, .mask = 0xff,
437 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)",
438 .devices = nct5104_devices,
439 },
440 {
441 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc500, .mask = 0xff,
442 .descr = "Nuvoton NCT6779D",
443 .devices = nct67xx_devices,
444 },
445 {
446 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 1,
447 .descr = "Nuvoton NCT6796D-E",
448 .devices = nct67xx_devices,
449 },
450 {
451 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 2,
452 .descr = "Nuvoton NCT5585D",
453 .devices = nct5585_devices,
454 },
455 {
456 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42b,
457 .descr = "Nuvoton NCT6798D",
458 .devices = nct67xx_devices,
459 },
460 {
461 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc800, .mask = 0xff,
462 .descr = "Nuvoton NCT6791",
463 .devices = nvt_devices,
464 },
465 {
466 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc900, .mask = 0xff,
467 .descr = "Nuvoton NCT6792",
468 .devices = nvt_devices,
469 },
470 {
471 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd100, .mask = 0xff,
472 .descr = "Nuvoton NCT6793",
473 .devices = nvt_devices,
474 },
475 {
476 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd200, .mask = 0xff,
477 .descr = "Nuvoton NCT6112D/NCT6114D/NCT6116D",
478 .devices = nct611x_devices,
479 },
480 {
481 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd300, .mask = 0xff,
482 .descr = "Nuvoton NCT6795",
483 .devices = nvt_devices,
484 },
485 {
486 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x1210, .mask = 0xff,
487 .descr = "Fintek F81803",
488 .devices = fintek_devices,
489 },
490 {
491 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x0704,
492 .descr = "Fintek F81865",
493 .devices = fintek_devices,
494 },
495 { 0, 0 }
496 };
497
498 static const char *
devtype_to_str(superio_dev_type_t type)499 devtype_to_str(superio_dev_type_t type)
500 {
501 switch (type) {
502 case SUPERIO_DEV_NONE:
503 return ("none");
504 case SUPERIO_DEV_HWM:
505 return ("HWM");
506 case SUPERIO_DEV_WDT:
507 return ("WDT");
508 case SUPERIO_DEV_GPIO:
509 return ("GPIO");
510 case SUPERIO_DEV_MAX:
511 return ("invalid");
512 }
513 return ("invalid");
514 }
515
516 static int
superio_detect(device_t dev,bool claim,struct siosc * sc)517 superio_detect(device_t dev, bool claim, struct siosc *sc)
518 {
519 struct resource *res;
520 rman_res_t port;
521 rman_res_t count;
522 uint16_t devid;
523 uint8_t revid;
524 int error;
525 int rid;
526 int i, m;
527 int prefer;
528
529 error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, &count);
530 if (error != 0)
531 return (error);
532 if (port > UINT16_MAX || count < NUMPORTS) {
533 device_printf(dev, "unexpected I/O range size\n");
534 return (ENXIO);
535 }
536
537 /*
538 * Make a temporary resource reservation for hardware probing.
539 * If we can't get the resources we need then
540 * we need to abort. Possibly this indicates
541 * the resources were used by another device
542 * in which case the probe would have failed anyhow.
543 */
544 rid = 0;
545 res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
546 if (res == NULL) {
547 if (claim)
548 device_printf(dev, "failed to allocate I/O resource\n");
549 return (ENXIO);
550 }
551
552 prefer = 0;
553 resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer", &prefer);
554 if (bootverbose && prefer > 0)
555 device_printf(dev, "prefer extid %d\n", prefer);
556
557 for (m = 0; methods_table[m] != NULL; m++) {
558 methods_table[m]->enter(res, port);
559 if (methods_table[m]->vendor == SUPERIO_VENDOR_ITE) {
560 devid = sio_readw(res, 0x20);
561 revid = sio_read(res, 0x22);
562 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_NUVOTON) {
563 devid = sio_read(res, 0x20);
564 revid = sio_read(res, 0x21);
565 devid = (devid << 8) | revid;
566 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_FINTEK) {
567 devid = sio_read(res, 0x20);
568 revid = sio_read(res, 0x21);
569 devid = (devid << 8) | revid;
570 } else {
571 continue;
572 }
573 methods_table[m]->exit(res, port);
574 for (i = 0; superio_table[i].vendor != 0; i++) {
575 uint16_t mask;
576
577 mask = superio_table[i].mask;
578 if (superio_table[i].vendor !=
579 methods_table[m]->vendor)
580 continue;
581 if ((superio_table[i].devid & ~mask) != (devid & ~mask))
582 continue;
583 if (prefer > 0 && prefer != superio_table[i].extid)
584 continue;
585 break;
586 }
587
588 /* Found a matching SuperIO entry. */
589 if (superio_table[i].vendor != 0)
590 break;
591 }
592
593 if (methods_table[m] == NULL)
594 error = ENXIO;
595 else
596 error = 0;
597 if (!claim || error != 0) {
598 bus_release_resource(dev, SYS_RES_IOPORT, rid, res);
599 return (error);
600 }
601
602 sc->methods = methods_table[m];
603 sc->vendor = sc->methods->vendor;
604 sc->known_devices = superio_table[i].devices;
605 sc->io_res = res;
606 sc->io_rid = rid;
607 sc->io_port = port;
608 sc->devid = devid;
609 sc->revid = revid;
610 sc->extid = superio_table[i].extid;
611
612 KASSERT(sc->vendor == SUPERIO_VENDOR_ITE ||
613 sc->vendor == SUPERIO_VENDOR_NUVOTON ||
614 sc->vendor == SUPERIO_VENDOR_FINTEK,
615 ("Only ITE, Nuvoton and Fintek SuperIO-s are supported"));
616 sc->ldn_reg = 0x07;
617 sc->enable_reg = 0x30; /* FIXME enable_reg not used by nctgpio(4). */
618 sc->current_ldn = 0xff; /* no device should have this */
619
620 if (superio_table[i].descr != NULL) {
621 device_set_desc(dev, superio_table[i].descr);
622 } else if (sc->vendor == SUPERIO_VENDOR_ITE) {
623 device_set_descf(dev,
624 "ITE IT%4x SuperIO (revision 0x%02x)",
625 sc->devid, sc->revid);
626 }
627 return (0);
628 }
629
630 static void
superio_identify(driver_t * driver,device_t parent)631 superio_identify(driver_t *driver, device_t parent)
632 {
633 device_t child;
634 int i;
635
636 /*
637 * Don't create child devices if any already exist.
638 * Those could be created via isa hints or if this
639 * driver is loaded, unloaded and then loaded again.
640 */
641 if (device_find_child(parent, "superio", DEVICE_UNIT_ANY)) {
642 if (bootverbose)
643 printf("superio: device(s) already created\n");
644 return;
645 }
646
647 /*
648 * Create a child for each candidate port.
649 * It would be nice if we could somehow clean up those
650 * that this driver fails to probe.
651 */
652 for (i = 0; ports_table[i] != 0; i++) {
653 child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE,
654 "superio", -1);
655 if (child == NULL) {
656 device_printf(parent, "failed to add superio child\n");
657 continue;
658 }
659 bus_set_resource(child, SYS_RES_IOPORT, 0, ports_table[i], 2);
660 if (superio_detect(child, false, NULL) != 0)
661 device_delete_child(parent, child);
662 }
663 }
664
665 static int
superio_probe(device_t dev)666 superio_probe(device_t dev)
667 {
668 struct siosc *sc;
669 int error;
670
671 /* Make sure we do not claim some ISA PNP device. */
672 if (isa_get_logicalid(dev) != 0)
673 return (ENXIO);
674
675 /*
676 * XXX We can populate the softc now only because we return
677 * BUS_PROBE_SPECIFIC
678 */
679 sc = device_get_softc(dev);
680 error = superio_detect(dev, true, sc);
681 if (error != 0)
682 return (error);
683 return (BUS_PROBE_SPECIFIC);
684 }
685
686 static void
superio_add_known_child(device_t dev,superio_dev_type_t type,uint8_t ldn)687 superio_add_known_child(device_t dev, superio_dev_type_t type, uint8_t ldn)
688 {
689 struct siosc *sc = device_get_softc(dev);
690 struct superio_devinfo *dinfo;
691 device_t child;
692
693 child = BUS_ADD_CHILD(dev, 0, NULL, DEVICE_UNIT_ANY);
694 if (child == NULL) {
695 device_printf(dev, "failed to add child for ldn %d, type %s\n",
696 ldn, devtype_to_str(type));
697 return;
698 }
699 dinfo = device_get_ivars(child);
700 dinfo->ldn = ldn;
701 dinfo->type = type;
702 sio_conf_enter(sc);
703 dinfo->iobase = sio_ldn_readw(sc, ldn, 0x60);
704 dinfo->iobase2 = sio_ldn_readw(sc, ldn, 0x62);
705 dinfo->irq = sio_ldn_readw(sc, ldn, 0x70);
706 dinfo->dma = sio_ldn_readw(sc, ldn, 0x74);
707 sio_conf_exit(sc);
708 STAILQ_INSERT_TAIL(&sc->devlist, dinfo, link);
709 }
710
711 static int
superio_attach(device_t dev)712 superio_attach(device_t dev)
713 {
714 struct siosc *sc = device_get_softc(dev);
715 int i;
716
717 mtx_init(&sc->conf_lock, device_get_nameunit(dev), "superio", MTX_DEF);
718 STAILQ_INIT(&sc->devlist);
719
720 for (i = 0; sc->known_devices[i].type != SUPERIO_DEV_NONE; i++) {
721 superio_add_known_child(dev, sc->known_devices[i].type,
722 sc->known_devices[i].ldn);
723 }
724
725 bus_identify_children(dev);
726 bus_attach_children(dev);
727
728 sc->chardev = make_dev(&superio_cdevsw, device_get_unit(dev),
729 UID_ROOT, GID_WHEEL, 0600, "superio%d", device_get_unit(dev));
730 if (sc->chardev == NULL)
731 device_printf(dev, "failed to create character device\n");
732 else
733 sc->chardev->si_drv1 = sc;
734 return (0);
735 }
736
737 static int
superio_detach(device_t dev)738 superio_detach(device_t dev)
739 {
740 struct siosc *sc = device_get_softc(dev);
741 int error;
742
743 error = bus_generic_detach(dev);
744 if (error != 0)
745 return (error);
746 if (sc->chardev != NULL)
747 destroy_dev(sc->chardev);
748 bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid, sc->io_res);
749 mtx_destroy(&sc->conf_lock);
750 return (0);
751 }
752
753 static device_t
superio_add_child(device_t dev,u_int order,const char * name,int unit)754 superio_add_child(device_t dev, u_int order, const char *name, int unit)
755 {
756 struct superio_devinfo *dinfo;
757 device_t child;
758
759 child = device_add_child_ordered(dev, order, name, unit);
760 if (child == NULL)
761 return (NULL);
762 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
763 if (dinfo == NULL) {
764 device_delete_child(dev, child);
765 return (NULL);
766 }
767 dinfo->ldn = 0xff;
768 dinfo->type = SUPERIO_DEV_NONE;
769 dinfo->dev = child;
770 resource_list_init(&dinfo->resources);
771 device_set_ivars(child, dinfo);
772 return (child);
773 }
774
775 static void
superio_child_deleted(device_t dev,device_t child)776 superio_child_deleted(device_t dev, device_t child)
777 {
778 struct superio_devinfo *dinfo;
779
780 dinfo = device_get_ivars(child);
781 if (dinfo == NULL)
782 return;
783 resource_list_free(&dinfo->resources);
784 free(dinfo, M_DEVBUF);
785 }
786
787 static int
superio_read_ivar(device_t dev,device_t child,int which,uintptr_t * result)788 superio_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
789 {
790 struct superio_devinfo *dinfo;
791
792 dinfo = device_get_ivars(child);
793 switch (which) {
794 case SUPERIO_IVAR_LDN:
795 *result = dinfo->ldn;
796 break;
797 case SUPERIO_IVAR_TYPE:
798 *result = dinfo->type;
799 break;
800 case SUPERIO_IVAR_IOBASE:
801 *result = dinfo->iobase;
802 break;
803 case SUPERIO_IVAR_IOBASE2:
804 *result = dinfo->iobase2;
805 break;
806 case SUPERIO_IVAR_IRQ:
807 *result = dinfo->irq;
808 break;
809 case SUPERIO_IVAR_DMA:
810 *result = dinfo->dma;
811 break;
812 default:
813 return (ENOENT);
814 }
815 return (0);
816 }
817
818 static int
superio_write_ivar(device_t dev,device_t child,int which,uintptr_t value)819 superio_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
820 {
821
822 switch (which) {
823 case SUPERIO_IVAR_LDN:
824 case SUPERIO_IVAR_TYPE:
825 case SUPERIO_IVAR_IOBASE:
826 case SUPERIO_IVAR_IOBASE2:
827 case SUPERIO_IVAR_IRQ:
828 case SUPERIO_IVAR_DMA:
829 return (EINVAL);
830 default:
831 return (ENOENT);
832 }
833 }
834
835 static struct resource_list *
superio_get_resource_list(device_t dev,device_t child)836 superio_get_resource_list(device_t dev, device_t child)
837 {
838 struct superio_devinfo *dinfo = device_get_ivars(child);
839
840 return (&dinfo->resources);
841 }
842
843 static int
superio_printf(struct superio_devinfo * dinfo,const char * fmt,...)844 superio_printf(struct superio_devinfo *dinfo, const char *fmt, ...)
845 {
846 va_list ap;
847 int retval;
848
849 retval = printf("superio:%s@ldn%0x2x: ",
850 devtype_to_str(dinfo->type), dinfo->ldn);
851 va_start(ap, fmt);
852 retval += vprintf(fmt, ap);
853 va_end(ap);
854 return (retval);
855 }
856
857 static void
superio_child_detached(device_t dev,device_t child)858 superio_child_detached(device_t dev, device_t child)
859 {
860 struct superio_devinfo *dinfo;
861 struct resource_list *rl;
862
863 dinfo = device_get_ivars(child);
864 rl = &dinfo->resources;
865
866 if (resource_list_release_active(rl, dev, child, SYS_RES_IRQ) != 0)
867 superio_printf(dinfo, "Device leaked IRQ resources\n");
868 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0)
869 superio_printf(dinfo, "Device leaked memory resources\n");
870 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0)
871 superio_printf(dinfo, "Device leaked I/O resources\n");
872 }
873
874 static int
superio_child_location(device_t parent,device_t child,struct sbuf * sb)875 superio_child_location(device_t parent, device_t child, struct sbuf *sb)
876 {
877 uint8_t ldn;
878
879 ldn = superio_get_ldn(child);
880 sbuf_printf(sb, "ldn=0x%02x", ldn);
881 return (0);
882 }
883
884 static int
superio_child_pnp(device_t parent,device_t child,struct sbuf * sb)885 superio_child_pnp(device_t parent, device_t child, struct sbuf *sb)
886 {
887 superio_dev_type_t type;
888
889 type = superio_get_type(child);
890 sbuf_printf(sb, "type=%s", devtype_to_str(type));
891 return (0);
892 }
893
894 static int
superio_print_child(device_t parent,device_t child)895 superio_print_child(device_t parent, device_t child)
896 {
897 superio_dev_type_t type;
898 uint8_t ldn;
899 int retval;
900
901 ldn = superio_get_ldn(child);
902 type = superio_get_type(child);
903
904 retval = bus_print_child_header(parent, child);
905 retval += printf(" at %s ldn 0x%02x", devtype_to_str(type), ldn);
906 retval += bus_print_child_footer(parent, child);
907
908 return (retval);
909 }
910
911 superio_vendor_t
superio_vendor(device_t dev)912 superio_vendor(device_t dev)
913 {
914 device_t sio_dev = device_get_parent(dev);
915 struct siosc *sc = device_get_softc(sio_dev);
916
917 return (sc->vendor);
918 }
919
920 uint16_t
superio_devid(device_t dev)921 superio_devid(device_t dev)
922 {
923 device_t sio_dev = device_get_parent(dev);
924 struct siosc *sc = device_get_softc(sio_dev);
925
926 return (sc->devid);
927 }
928
929 uint8_t
superio_revid(device_t dev)930 superio_revid(device_t dev)
931 {
932 device_t sio_dev = device_get_parent(dev);
933 struct siosc *sc = device_get_softc(sio_dev);
934
935 return (sc->revid);
936 }
937
938 int
superio_extid(device_t dev)939 superio_extid(device_t dev)
940 {
941 device_t sio_dev = device_get_parent(dev);
942 struct siosc *sc = device_get_softc(sio_dev);
943
944 return (sc->extid);
945 }
946
947 uint8_t
superio_ldn_read(device_t dev,uint8_t ldn,uint8_t reg)948 superio_ldn_read(device_t dev, uint8_t ldn, uint8_t reg)
949 {
950 device_t sio_dev = device_get_parent(dev);
951 struct siosc *sc = device_get_softc(sio_dev);
952 uint8_t v;
953
954 sio_conf_enter(sc);
955 v = sio_ldn_read(sc, ldn, reg);
956 sio_conf_exit(sc);
957 return (v);
958 }
959
960 uint8_t
superio_read(device_t dev,uint8_t reg)961 superio_read(device_t dev, uint8_t reg)
962 {
963 struct superio_devinfo *dinfo = device_get_ivars(dev);
964
965 return (superio_ldn_read(dev, dinfo->ldn, reg));
966 }
967
968 void
superio_ldn_write(device_t dev,uint8_t ldn,uint8_t reg,uint8_t val)969 superio_ldn_write(device_t dev, uint8_t ldn, uint8_t reg, uint8_t val)
970 {
971 device_t sio_dev = device_get_parent(dev);
972 struct siosc *sc = device_get_softc(sio_dev);
973
974 sio_conf_enter(sc);
975 sio_ldn_write(sc, ldn, reg, val);
976 sio_conf_exit(sc);
977 }
978
979 void
superio_write(device_t dev,uint8_t reg,uint8_t val)980 superio_write(device_t dev, uint8_t reg, uint8_t val)
981 {
982 struct superio_devinfo *dinfo = device_get_ivars(dev);
983
984 return (superio_ldn_write(dev, dinfo->ldn, reg, val));
985 }
986
987 bool
superio_dev_enabled(device_t dev,uint8_t mask)988 superio_dev_enabled(device_t dev, uint8_t mask)
989 {
990 device_t sio_dev = device_get_parent(dev);
991 struct siosc *sc = device_get_softc(sio_dev);
992 struct superio_devinfo *dinfo = device_get_ivars(dev);
993 uint8_t v;
994
995 /* GPIO device is always active in ITE chips. */
996 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7)
997 return (true);
998
999 v = superio_read(dev, sc->enable_reg); /* FIXME enable_reg not used by nctgpio(4). */
1000 return ((v & mask) != 0);
1001 }
1002
1003 void
superio_dev_enable(device_t dev,uint8_t mask)1004 superio_dev_enable(device_t dev, uint8_t mask)
1005 {
1006 device_t sio_dev = device_get_parent(dev);
1007 struct siosc *sc = device_get_softc(sio_dev);
1008 struct superio_devinfo *dinfo = device_get_ivars(dev);
1009 uint8_t v;
1010
1011 /* GPIO device is always active in ITE chips. */
1012 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7)
1013 return;
1014
1015 sio_conf_enter(sc);
1016 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg);
1017 v |= mask;
1018 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v);
1019 sio_conf_exit(sc);
1020 }
1021
1022 void
superio_dev_disable(device_t dev,uint8_t mask)1023 superio_dev_disable(device_t dev, uint8_t mask)
1024 {
1025 device_t sio_dev = device_get_parent(dev);
1026 struct siosc *sc = device_get_softc(sio_dev);
1027 struct superio_devinfo *dinfo = device_get_ivars(dev);
1028 uint8_t v;
1029
1030 /* GPIO device is always active in ITE chips. */
1031 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7)
1032 return;
1033
1034 sio_conf_enter(sc);
1035 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg);
1036 v &= ~mask;
1037 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v);
1038 sio_conf_exit(sc);
1039 }
1040
1041 device_t
superio_find_dev(device_t superio,superio_dev_type_t type,int ldn)1042 superio_find_dev(device_t superio, superio_dev_type_t type, int ldn)
1043 {
1044 struct siosc *sc = device_get_softc(superio);
1045 struct superio_devinfo *dinfo;
1046
1047 if (ldn < -1 || ldn > UINT8_MAX)
1048 return (NULL); /* ERANGE */
1049 if (type == SUPERIO_DEV_NONE && ldn == -1)
1050 return (NULL); /* EINVAL */
1051
1052 STAILQ_FOREACH(dinfo, &sc->devlist, link) {
1053 if (ldn != -1 && dinfo->ldn != ldn)
1054 continue;
1055 if (type != SUPERIO_DEV_NONE && dinfo->type != type)
1056 continue;
1057 return (dinfo->dev);
1058 }
1059 return (NULL);
1060 }
1061
1062 static int
superio_ioctl(struct cdev * dev,u_long cmd,caddr_t data,int flags,struct thread * td)1063 superio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags,
1064 struct thread *td)
1065 {
1066 struct siosc *sc;
1067 struct superiocmd *s;
1068
1069 sc = dev->si_drv1;
1070 s = (struct superiocmd *)data;
1071 switch (cmd) {
1072 case SUPERIO_CR_READ:
1073 sio_conf_enter(sc);
1074 s->val = sio_ldn_read(sc, s->ldn, s->cr);
1075 sio_conf_exit(sc);
1076 return (0);
1077 case SUPERIO_CR_WRITE:
1078 sio_conf_enter(sc);
1079 sio_ldn_write(sc, s->ldn, s->cr, s->val);
1080 sio_conf_exit(sc);
1081 return (0);
1082 default:
1083 return (ENOTTY);
1084 }
1085 }
1086
1087 static device_method_t superio_methods[] = {
1088 DEVMETHOD(device_identify, superio_identify),
1089 DEVMETHOD(device_probe, superio_probe),
1090 DEVMETHOD(device_attach, superio_attach),
1091 DEVMETHOD(device_detach, superio_detach),
1092 DEVMETHOD(device_shutdown, bus_generic_shutdown),
1093 DEVMETHOD(device_suspend, bus_generic_suspend),
1094 DEVMETHOD(device_resume, bus_generic_resume),
1095
1096 DEVMETHOD(bus_add_child, superio_add_child),
1097 DEVMETHOD(bus_child_deleted, superio_child_deleted),
1098 DEVMETHOD(bus_child_detached, superio_child_detached),
1099 DEVMETHOD(bus_child_location, superio_child_location),
1100 DEVMETHOD(bus_child_pnpinfo, superio_child_pnp),
1101 DEVMETHOD(bus_print_child, superio_print_child),
1102 DEVMETHOD(bus_read_ivar, superio_read_ivar),
1103 DEVMETHOD(bus_write_ivar, superio_write_ivar),
1104 DEVMETHOD(bus_get_resource_list, superio_get_resource_list),
1105 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
1106 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
1107 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
1108 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
1109 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource),
1110 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
1111 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
1112 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
1113 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
1114
1115 DEVMETHOD_END
1116 };
1117
1118 static driver_t superio_driver = {
1119 "superio",
1120 superio_methods,
1121 sizeof(struct siosc)
1122 };
1123
1124 DRIVER_MODULE(superio, isa, superio_driver, 0, 0);
1125 MODULE_VERSION(superio, 1);
1126