1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * MEN 16Z127 GPIO driver
4 *
5 * Copyright (C) 2016 MEN Mikroelektronik GmbH (www.men.de)
6 */
7
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/io.h>
11 #include <linux/err.h>
12 #include <linux/mcb.h>
13 #include <linux/bitops.h>
14 #include <linux/gpio/driver.h>
15
16 #define MEN_Z127_CTRL 0x00
17 #define MEN_Z127_PSR 0x04
18 #define MEN_Z127_IRQR 0x08
19 #define MEN_Z127_GPIODR 0x0c
20 #define MEN_Z127_IER1 0x10
21 #define MEN_Z127_IER2 0x14
22 #define MEN_Z127_DBER 0x18
23 #define MEN_Z127_ODER 0x1C
24 #define GPIO_TO_DBCNT_REG(gpio) ((gpio * 4) + 0x80)
25
26 #define MEN_Z127_DB_MIN_US 50
27 /* 16 bit compare register. Each bit represents 50us */
28 #define MEN_Z127_DB_MAX_US (0xffff * MEN_Z127_DB_MIN_US)
29 #define MEN_Z127_DB_IN_RANGE(db) ((db >= MEN_Z127_DB_MIN_US) && \
30 (db <= MEN_Z127_DB_MAX_US))
31
32 struct men_z127_gpio {
33 struct gpio_chip gc;
34 void __iomem *reg_base;
35 struct resource *mem;
36 };
37
men_z127_debounce(struct gpio_chip * gc,unsigned gpio,unsigned debounce)38 static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
39 unsigned debounce)
40 {
41 struct men_z127_gpio *priv = gpiochip_get_data(gc);
42 struct device *dev = gc->parent;
43 unsigned int rnd;
44 u32 db_en, db_cnt;
45
46 if (!MEN_Z127_DB_IN_RANGE(debounce)) {
47 dev_err(dev, "debounce value %u out of range", debounce);
48 return -EINVAL;
49 }
50
51 if (debounce > 0) {
52 /* round up or down depending on MSB-1 */
53 rnd = fls(debounce) - 1;
54
55 if (rnd && (debounce & BIT(rnd - 1)))
56 debounce = roundup(debounce, MEN_Z127_DB_MIN_US);
57 else
58 debounce = rounddown(debounce, MEN_Z127_DB_MIN_US);
59
60 if (debounce > MEN_Z127_DB_MAX_US)
61 debounce = MEN_Z127_DB_MAX_US;
62
63 /* 50us per register unit */
64 debounce /= 50;
65 }
66
67 raw_spin_lock(&gc->bgpio_lock);
68
69 db_en = readl(priv->reg_base + MEN_Z127_DBER);
70
71 if (debounce == 0) {
72 db_en &= ~BIT(gpio);
73 db_cnt = 0;
74 } else {
75 db_en |= BIT(gpio);
76 db_cnt = debounce;
77 }
78
79 writel(db_en, priv->reg_base + MEN_Z127_DBER);
80 writel(db_cnt, priv->reg_base + GPIO_TO_DBCNT_REG(gpio));
81
82 raw_spin_unlock(&gc->bgpio_lock);
83
84 return 0;
85 }
86
men_z127_set_single_ended(struct gpio_chip * gc,unsigned offset,enum pin_config_param param)87 static int men_z127_set_single_ended(struct gpio_chip *gc,
88 unsigned offset,
89 enum pin_config_param param)
90 {
91 struct men_z127_gpio *priv = gpiochip_get_data(gc);
92 u32 od_en;
93
94 raw_spin_lock(&gc->bgpio_lock);
95 od_en = readl(priv->reg_base + MEN_Z127_ODER);
96
97 if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
98 od_en |= BIT(offset);
99 else
100 /* Implicitly PIN_CONFIG_DRIVE_PUSH_PULL */
101 od_en &= ~BIT(offset);
102
103 writel(od_en, priv->reg_base + MEN_Z127_ODER);
104 raw_spin_unlock(&gc->bgpio_lock);
105
106 return 0;
107 }
108
men_z127_set_config(struct gpio_chip * gc,unsigned offset,unsigned long config)109 static int men_z127_set_config(struct gpio_chip *gc, unsigned offset,
110 unsigned long config)
111 {
112 enum pin_config_param param = pinconf_to_config_param(config);
113
114 switch (param) {
115 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
116 case PIN_CONFIG_DRIVE_PUSH_PULL:
117 return men_z127_set_single_ended(gc, offset, param);
118
119 case PIN_CONFIG_INPUT_DEBOUNCE:
120 return men_z127_debounce(gc, offset,
121 pinconf_to_config_argument(config));
122
123 default:
124 break;
125 }
126
127 return -ENOTSUPP;
128 }
129
men_z127_release_mem(void * data)130 static void men_z127_release_mem(void *data)
131 {
132 struct resource *res = data;
133
134 mcb_release_mem(res);
135 }
136
men_z127_probe(struct mcb_device * mdev,const struct mcb_device_id * id)137 static int men_z127_probe(struct mcb_device *mdev,
138 const struct mcb_device_id *id)
139 {
140 struct men_z127_gpio *men_z127_gpio;
141 struct device *dev = &mdev->dev;
142 int ret;
143
144 men_z127_gpio = devm_kzalloc(dev, sizeof(struct men_z127_gpio),
145 GFP_KERNEL);
146 if (!men_z127_gpio)
147 return -ENOMEM;
148
149 men_z127_gpio->mem = mcb_request_mem(mdev, dev_name(dev));
150 if (IS_ERR(men_z127_gpio->mem))
151 return dev_err_probe(dev, PTR_ERR(men_z127_gpio->mem),
152 "failed to request device memory");
153
154 ret = devm_add_action_or_reset(dev, men_z127_release_mem,
155 men_z127_gpio->mem);
156 if (ret)
157 return ret;
158
159 men_z127_gpio->reg_base = devm_ioremap(dev, men_z127_gpio->mem->start,
160 resource_size(men_z127_gpio->mem));
161 if (men_z127_gpio->reg_base == NULL)
162 return -ENXIO;
163
164 mcb_set_drvdata(mdev, men_z127_gpio);
165
166 ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4,
167 men_z127_gpio->reg_base + MEN_Z127_PSR,
168 men_z127_gpio->reg_base + MEN_Z127_CTRL,
169 NULL,
170 men_z127_gpio->reg_base + MEN_Z127_GPIODR,
171 NULL, 0);
172 if (ret)
173 return ret;
174
175 men_z127_gpio->gc.set_config = men_z127_set_config;
176
177 ret = devm_gpiochip_add_data(dev, &men_z127_gpio->gc, men_z127_gpio);
178 if (ret)
179 return dev_err_probe(dev, ret,
180 "failed to register MEN 16Z127 GPIO controller");
181
182 return 0;
183 }
184
185 static const struct mcb_device_id men_z127_ids[] = {
186 { .device = 0x7f },
187 { }
188 };
189 MODULE_DEVICE_TABLE(mcb, men_z127_ids);
190
191 static struct mcb_driver men_z127_driver = {
192 .driver = {
193 .name = "z127-gpio",
194 },
195 .probe = men_z127_probe,
196 .id_table = men_z127_ids,
197 };
198 module_mcb_driver(men_z127_driver);
199
200 MODULE_AUTHOR("Andreas Werner <andreas.werner@men.de>");
201 MODULE_DESCRIPTION("MEN 16z127 GPIO Controller");
202 MODULE_LICENSE("GPL v2");
203 MODULE_ALIAS("mcb:16z127");
204 MODULE_IMPORT_NS("MCB");
205