1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Texas Instruments 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 #ifndef __TILCDC_DRV_H__ 8 #define __TILCDC_DRV_H__ 9 10 #include <linux/cpufreq.h> 11 #include <linux/irqreturn.h> 12 13 #include <drm/drm_print.h> 14 15 struct clk; 16 struct workqueue_struct; 17 18 struct drm_connector; 19 struct drm_connector_helper_funcs; 20 struct drm_crtc; 21 struct drm_device; 22 struct drm_display_mode; 23 struct drm_encoder; 24 struct drm_framebuffer; 25 struct drm_minor; 26 struct drm_pending_vblank_event; 27 struct drm_plane; 28 29 /* Defaulting to pixel clock defined on AM335x */ 30 #define TILCDC_DEFAULT_MAX_PIXELCLOCK 126000 31 /* Maximum display width for LCDC V1 */ 32 #define TILCDC_DEFAULT_MAX_WIDTH_V1 1024 33 /* ... and for LCDC V2 found on AM335x: */ 34 #define TILCDC_DEFAULT_MAX_WIDTH_V2 2048 35 /* 36 * This may need some tweaking, but want to allow at least 1280x1024@60 37 * with optimized DDR & EMIF settings tweaked 1920x1080@24 appears to 38 * be supportable 39 */ 40 #define TILCDC_DEFAULT_MAX_BANDWIDTH (1280*1024*60) 41 42 43 struct tilcdc_drm_private { 44 void __iomem *mmio; 45 46 struct clk *clk; /* functional clock */ 47 int rev; /* IP revision */ 48 49 unsigned int irq; 50 51 struct drm_device ddev; 52 53 /* don't attempt resolutions w/ higher W * H * Hz: */ 54 uint32_t max_bandwidth; 55 /* 56 * Pixel Clock will be restricted to some value as 57 * defined in the device datasheet measured in KHz 58 */ 59 uint32_t max_pixelclock; 60 /* 61 * Max allowable width is limited on a per device basis 62 * measured in pixels 63 */ 64 uint32_t max_width; 65 66 u32 fifo_th; 67 68 /* Supported pixel formats */ 69 const uint32_t *pixelformats; 70 uint32_t num_pixelformats; 71 72 #ifdef CONFIG_CPU_FREQ 73 struct notifier_block freq_transition; 74 #endif 75 76 struct workqueue_struct *wq; 77 78 struct drm_crtc *crtc; 79 80 struct tilcdc_encoder *encoder; 81 struct drm_connector *connector; 82 83 bool irq_enabled; 84 }; 85 86 #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) 87 88 #define ddev_to_tilcdc_priv(x) container_of(x, struct tilcdc_drm_private, ddev) 89 90 int tilcdc_crtc_create(struct drm_device *dev); 91 irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc); 92 void tilcdc_crtc_update_clk(struct drm_crtc *crtc); 93 void tilcdc_crtc_shutdown(struct drm_crtc *crtc); 94 int tilcdc_crtc_update_fb(struct drm_crtc *crtc, 95 struct drm_framebuffer *fb, 96 struct drm_pending_vblank_event *event); 97 98 struct tilcdc_plane { 99 struct drm_plane base; 100 }; 101 102 struct tilcdc_encoder { 103 struct drm_encoder base; 104 }; 105 106 struct tilcdc_plane *tilcdc_plane_init(struct drm_device *dev); 107 108 #endif /* __TILCDC_DRV_H__ */ 109