xref: /linux/drivers/soc/qcom/llcc-qcom.c (revision 24e7625df5ce065393249b78930781be593bc381) 
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4  *
5  */
6 
7 #include <linux/bitfield.h>
8 #include <linux/bitops.h>
9 #include <linux/cleanup.h>
10 #include <linux/device.h>
11 #include <linux/io.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/mutex.h>
15 #include <linux/nvmem-consumer.h>
16 #include <linux/of.h>
17 #include <linux/regmap.h>
18 #include <linux/sizes.h>
19 #include <linux/slab.h>
20 #include <linux/soc/qcom/llcc-qcom.h>
21 
22 #define ACTIVATE                      BIT(0)
23 #define DEACTIVATE                    BIT(1)
24 #define ACT_CLEAR                     BIT(0)
25 #define ACT_COMPLETE                  BIT(4)
26 #define ACT_CTRL_OPCODE_ACTIVATE      BIT(0)
27 #define ACT_CTRL_OPCODE_DEACTIVATE    BIT(1)
28 #define ACT_CTRL_ACT_TRIG             BIT(0)
29 #define ACT_CTRL_OPCODE_SHIFT         1
30 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 2
31 #define ATTR1_FIXED_SIZE_SHIFT        3
32 #define ATTR1_PRIORITY_SHIFT          4
33 #define ATTR1_MAX_CAP_SHIFT           16
34 #define ATTR0_RES_WAYS_MASK           GENMASK(15, 0)
35 #define ATTR0_BONUS_WAYS_MASK         GENMASK(31, 16)
36 #define ATTR0_BONUS_WAYS_SHIFT        16
37 #define ATTR2_PROBE_TARGET_WAYS_MASK  BIT(4)
38 #define ATTR2_FIXED_SIZE_MASK         BIT(8)
39 #define ATTR2_PRIORITY_MASK           GENMASK(14, 12)
40 #define ATTR2_PARENT_SCID_MASK        GENMASK(21, 16)
41 #define ATTR2_IN_A_GROUP_MASK         BIT(24)
42 #define LLCC_STATUS_READ_DELAY        100
43 
44 #define CACHE_LINE_SIZE_SHIFT         6
45 
46 #define LLCC_LB_CNT_MASK              GENMASK(31, 28)
47 #define LLCC_LB_CNT_SHIFT             28
48 
49 #define MAX_CAP_TO_BYTES(n)           (n * SZ_1K)
50 #define LLCC_TRP_ACT_CTRLn(n)         (n * SZ_4K)
51 #define LLCC_TRP_ACT_CLEARn(n)        (8 + n * SZ_4K)
52 #define LLCC_TRP_STATUSn(n)           (4 + n * SZ_4K)
53 #define LLCC_TRP_ATTR0_CFGn(n)        (0x21000 + SZ_8 * n)
54 #define LLCC_TRP_ATTR1_CFGn(n)        (0x21004 + SZ_8 * n)
55 #define LLCC_TRP_ATTR2_CFGn(n)        (0x21100 + SZ_4 * n)
56 #define LLCC_V6_TRP_ATTR0_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR0_CFG] + SZ_64 * (n))
57 #define LLCC_V6_TRP_ATTR1_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR1_CFG] + SZ_64 * (n))
58 #define LLCC_V6_TRP_ATTR2_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR2_CFG] + SZ_64 * (n))
59 #define LLCC_V6_TRP_ATTR3_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR3_CFG] + SZ_64 * (n))
60 
61 #define LLCC_TRP_SCID_DIS_CAP_ALLOC   0x21f00
62 #define LLCC_TRP_PCB_ACT              0x21f04
63 #define LLCC_TRP_ALGO_CFG1	      0x21f0c
64 #define LLCC_TRP_ALGO_CFG2	      0x21f10
65 #define LLCC_TRP_ALGO_CFG3	      0x21f14
66 #define LLCC_TRP_ALGO_CFG4	      0x21f18
67 #define LLCC_TRP_ALGO_CFG5	      0x21f1c
68 #define LLCC_TRP_WRSC_EN              0x21f20
69 #define LLCC_TRP_ALGO_CFG6	      0x21f24
70 #define LLCC_TRP_ALGO_CFG7	      0x21f28
71 #define LLCC_TRP_WRSC_CACHEABLE_EN    0x21f2c
72 #define LLCC_TRP_ALGO_CFG8	      0x21f30
73 
74 #define LLCC_VERSION_2_0_0_0          0x02000000
75 #define LLCC_VERSION_2_1_0_0          0x02010000
76 #define LLCC_VERSION_4_1_0_0          0x04010000
77 #define LLCC_VERSION_6_0_0_0          0X06000000
78 
79 /**
80  * struct llcc_slice_config - Data associated with the llcc slice
81  * @usecase_id: Unique id for the client's use case
82  * @slice_id: llcc slice id for each client
83  * @max_cap: The maximum capacity of the cache slice provided in KB
84  * @priority: Priority of the client used to select victim line for replacement
85  * @fixed_size: Boolean indicating if the slice has a fixed capacity
86  * @bonus_ways: Bonus ways are additional ways to be used for any slice,
87  *		if client ends up using more than reserved cache ways. Bonus
88  *		ways are allocated only if they are not reserved for some
89  *		other client.
90  * @res_ways: Reserved ways for the cache slice, the reserved ways cannot
91  *		be used by any other client than the one its assigned to.
92  * @cache_mode: Each slice operates as a cache, this controls the mode of the
93  *             slice: normal or TCM(Tightly Coupled Memory)
94  * @probe_target_ways: Determines what ways to probe for access hit. When
95  *                    configured to 1 only bonus and reserved ways are probed.
96  *                    When configured to 0 all ways in llcc are probed.
97  * @dis_cap_alloc: Disable capacity based allocation for a client
98  * @retain_on_pc: If this bit is set and client has maintained active vote
99  *               then the ways assigned to this client are not flushed on power
100  *               collapse.
101  * @activate_on_init: Activate the slice immediately after it is programmed
102  * @write_scid_en: Bit enables write cache support for a given scid.
103  * @write_scid_cacheable_en: Enables write cache cacheable support for a
104  *			     given scid (not supported on v2 or older hardware).
105  * @stale_en: Bit enables stale.
106  * @stale_cap_en: Bit enables stale only if current scid is over-cap.
107  * @mru_uncap_en: Roll-over on reserved cache ways if current scid is
108  *                under-cap.
109  * @mru_rollover: Roll-over on reserved cache ways.
110  * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no
111  *                   same-scid lines for replacement.
112  * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID.
113  * @ovcap_prio: Once current scid is over-capacity, allocate other low priority
114  *              over-cap scid. Depends on corresponding bit being set in
115  *              ovcap_en.
116  * @vict_prio: When current scid is under-capacity, allocate over other
117  *             lower-than victim priority-line threshold scid.
118  * @parent_slice_id: For grouped slices, specifies the slice id of the parent.
119  */
120 struct llcc_slice_config {
121 	u32 usecase_id;
122 	u32 slice_id;
123 	u32 max_cap;
124 	u32 priority;
125 	bool fixed_size;
126 	u32 bonus_ways;
127 	u32 res_ways;
128 	u32 cache_mode;
129 	u32 probe_target_ways;
130 	bool dis_cap_alloc;
131 	bool retain_on_pc;
132 	bool activate_on_init;
133 	bool write_scid_en;
134 	bool write_scid_cacheable_en;
135 	bool stale_en;
136 	bool stale_cap_en;
137 	bool mru_uncap_en;
138 	bool mru_rollover;
139 	bool alloc_oneway_en;
140 	bool ovcap_en;
141 	bool ovcap_prio;
142 	bool vict_prio;
143 	u32 parent_slice_id;
144 };
145 
146 struct qcom_llcc_config {
147 	const struct llcc_slice_config *sct_data;
148 	const u32 *reg_offset;
149 	const struct llcc_edac_reg_offset *edac_reg_offset;
150 	u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */
151 	u32 num_banks;
152 	int size;
153 	bool skip_llcc_cfg;
154 	bool no_edac;
155 	bool irq_configured;
156 	bool no_broadcast_register;
157 };
158 
159 struct qcom_sct_config {
160 	const struct qcom_llcc_config *llcc_config;
161 	int num_config;
162 };
163 
164 enum llcc_reg_offset {
165 	LLCC_COMMON_HW_INFO,
166 	LLCC_COMMON_STATUS0,
167 	LLCC_TRP_ATTR0_CFG,
168 	LLCC_TRP_ATTR1_CFG,
169 	LLCC_TRP_ATTR2_CFG,
170 	LLCC_TRP_ATTR3_CFG,
171 	LLCC_TRP_SID_DIS_CAP_ALLOC,
172 	LLCC_TRP_ALGO_STALE_EN,
173 	LLCC_TRP_ALGO_STALE_CAP_EN,
174 	LLCC_TRP_ALGO_MRU0,
175 	LLCC_TRP_ALGO_MRU1,
176 	LLCC_TRP_ALGO_ALLOC0,
177 	LLCC_TRP_ALGO_ALLOC1,
178 	LLCC_TRP_ALGO_ALLOC2,
179 	LLCC_TRP_ALGO_ALLOC3,
180 	LLCC_TRP_WRS_EN,
181 	LLCC_TRP_WRS_CACHEABLE_EN,
182 };
183 
184 static const struct llcc_slice_config glymur_data[] = {
185 	{
186 		.usecase_id = LLCC_CPUSS,
187 		.slice_id = 1,
188 		.max_cap = 7680,
189 		.priority = 1,
190 		.bonus_ways = 0xFFF,
191 		.res_ways = 0x0,
192 		.vict_prio = true,
193 		.activate_on_init = true,
194 	}, {
195 		.usecase_id = LLCC_VIDSC0,
196 		.slice_id = 2,
197 		.max_cap = 512,
198 		.priority = 3,
199 		.fixed_size = true,
200 		.bonus_ways = 0xFFF,
201 		.res_ways = 0x0,
202 		.vict_prio = true,
203 	}, {
204 		.usecase_id = LLCC_AUDIO,
205 		.slice_id = 6,
206 		.max_cap = 1024,
207 		.priority = 1,
208 		.fixed_size = true,
209 		.bonus_ways = 0xFFF,
210 		.res_ways = 0x0,
211 		.vict_prio = true,
212 	}, {
213 		.usecase_id = LLCC_VIDSC1,
214 		.slice_id = 4,
215 		.max_cap = 512,
216 		.priority = 3,
217 		.fixed_size = true,
218 		.bonus_ways = 0xFFF,
219 		.res_ways = 0x0,
220 		.vict_prio = true,
221 	}, {
222 		.usecase_id = LLCC_CMPT,
223 		.slice_id = 10,
224 		.max_cap = 7680,
225 		.priority = 1,
226 		.fixed_size = true,
227 		.bonus_ways = 0xFFF,
228 		.res_ways = 0x0,
229 		.vict_prio = true,
230 	}, {
231 		.usecase_id = LLCC_GPUHTW,
232 		.slice_id = 11,
233 		.max_cap = 512,
234 		.priority = 1,
235 		.fixed_size = true,
236 		.bonus_ways = 0xFFF,
237 		.res_ways = 0x0,
238 		.vict_prio = true,
239 	}, {
240 		.usecase_id = LLCC_GPU,
241 		.slice_id = 9,
242 		.max_cap = 7680,
243 		.priority = 1,
244 		.bonus_ways = 0xFFF,
245 		.res_ways = 0x0,
246 		.write_scid_en = true,
247 		.write_scid_cacheable_en = true,
248 		.stale_en = true,
249 		.vict_prio = true,
250 	}, {
251 		.usecase_id = LLCC_MMUHWT,
252 		.slice_id = 18,
253 		.max_cap = 768,
254 		.priority = 1,
255 		.fixed_size = true,
256 		.bonus_ways = 0xFFF,
257 		.res_ways = 0x0,
258 		.vict_prio = true,
259 		.activate_on_init = true,
260 	}, {
261 		.usecase_id = LLCC_AUDHW,
262 		.slice_id = 22,
263 		.max_cap = 1024,
264 		.priority = 1,
265 		.fixed_size = true,
266 		.bonus_ways = 0xFFF,
267 		.res_ways = 0x0,
268 		.vict_prio = true,
269 	}, {
270 		.usecase_id = LLCC_CVP,
271 		.slice_id = 8,
272 		.max_cap = 64,
273 		.priority = 3,
274 		.fixed_size = true,
275 		.bonus_ways = 0xFFF,
276 		.res_ways = 0x0,
277 		.vict_prio = true,
278 	}, {
279 		.usecase_id = LLCC_WRCACHE,
280 		.slice_id = 31,
281 		.max_cap = 1536,
282 		.priority = 1,
283 		.fixed_size = true,
284 		.bonus_ways = 0xFFF,
285 		.res_ways = 0x0,
286 		.vict_prio = true,
287 		.activate_on_init = true,
288 	}, {
289 		.usecase_id = LLCC_CMPTHCP,
290 		.slice_id = 17,
291 		.max_cap = 256,
292 		.priority = 3,
293 		.fixed_size = true,
294 		.bonus_ways = 0xFFF,
295 		.res_ways = 0x0,
296 		.vict_prio = true,
297 	}, {
298 		.usecase_id = LLCC_LCPDARE,
299 		.slice_id = 30,
300 		.max_cap = 768,
301 		.priority = 3,
302 		.fixed_size = true,
303 		.bonus_ways = 0xFFF,
304 		.res_ways = 0x0,
305 		.alloc_oneway_en = true,
306 		.vict_prio = true,
307 		.activate_on_init = true,
308 	}, {
309 		.usecase_id = LLCC_AENPU,
310 		.slice_id = 3,
311 		.max_cap = 3072,
312 		.priority = 1,
313 		.fixed_size = true,
314 		.bonus_ways = 0xFFF,
315 		.res_ways = 0x0,
316 		.cache_mode = 2,
317 		.vict_prio = true,
318 	}, {
319 		.usecase_id = LLCC_ISLAND1,
320 		.slice_id = 12,
321 		.max_cap = 5632,
322 		.priority = 7,
323 		.fixed_size = true,
324 		.bonus_ways = 0x0,
325 		.res_ways = 0x7FF,
326 		.vict_prio = true,
327 	}, {
328 		.usecase_id = LLCC_VIDVSP,
329 		.slice_id = 28,
330 		.max_cap = 256,
331 		.priority = 3,
332 		.fixed_size = true,
333 		.bonus_ways = 0xFFF,
334 		.res_ways = 0x0,
335 		.vict_prio = true,
336 	}, {
337 		.usecase_id = LLCC_OOBM_NS,
338 		.slice_id = 5,
339 		.max_cap = 512,
340 		.priority = 1,
341 		.bonus_ways = 0xFFF,
342 		.res_ways = 0x0,
343 		.vict_prio = true,
344 	}, {
345 		.usecase_id = LLCC_CPUSS_OPP,
346 		.slice_id = 32,
347 		.max_cap = 0,
348 		.fixed_size = true,
349 		.bonus_ways = 0x0,
350 		.res_ways = 0x0,
351 		.vict_prio = true,
352 		.activate_on_init = true,
353 	}, {
354 		.usecase_id = LLCC_PCIE_TCU,
355 		.slice_id = 19,
356 		.max_cap = 256,
357 		.priority = 1,
358 		.fixed_size = true,
359 		.bonus_ways = 0xFFF,
360 		.res_ways = 0x0,
361 		.vict_prio = true,
362 		.activate_on_init = true,
363 	}, {
364 		.usecase_id = LLCC_VIDSC_VSP1,
365 		.slice_id = 29,
366 		.max_cap = 256,
367 		.priority = 3,
368 		.fixed_size = true,
369 		.bonus_ways = 0xFFF,
370 		.res_ways = 0x0,
371 		.vict_prio = true,
372 	}
373 };
374 
375 static const struct llcc_slice_config ipq5424_data[] =  {
376 	{
377 		.usecase_id = LLCC_CPUSS,
378 		.slice_id = 1,
379 		.max_cap = 768,
380 		.priority = 1,
381 		.bonus_ways = 0xFFFF,
382 		.retain_on_pc = true,
383 		.activate_on_init = true,
384 		.write_scid_cacheable_en = true,
385 		.stale_en = true,
386 		.stale_cap_en = true,
387 		.alloc_oneway_en = true,
388 		.ovcap_en = true,
389 		.ovcap_prio = true,
390 		.vict_prio = true,
391 	},
392 	{
393 		.usecase_id = LLCC_VIDSC0,
394 		.slice_id = 2,
395 		.max_cap = 256,
396 		.priority = 2,
397 		.fixed_size = true,
398 		.bonus_ways = 0xF000,
399 		.retain_on_pc = true,
400 		.activate_on_init = true,
401 		.write_scid_cacheable_en = true,
402 		.stale_en = true,
403 		.stale_cap_en = true,
404 	},
405 };
406 
407 static const struct llcc_slice_config kaanapali_data[] = {
408 	{
409 		.usecase_id = LLCC_CPUSS,
410 		.slice_id = 1,
411 		.max_cap = 5120,
412 		.priority = 1,
413 		.bonus_ways = 0xffffffff,
414 		.activate_on_init = true,
415 		.write_scid_en = true,
416 		.stale_en = true,
417 		.mru_uncap_en = true,
418 		.vict_prio = true,
419 	}, {
420 		.usecase_id = LLCC_VIDSC0,
421 		.slice_id = 2,
422 		.max_cap = 512,
423 		.priority = 4,
424 		.fixed_size = true,
425 		.bonus_ways = 0xffffffff,
426 		.mru_uncap_en = true,
427 		.vict_prio = true,
428 	}, {
429 		.usecase_id = LLCC_AUDIO,
430 		.slice_id = 35,
431 		.max_cap = 512,
432 		.priority = 1,
433 		.fixed_size = true,
434 		.bonus_ways = 0xffffffff,
435 		.mru_uncap_en = true,
436 		.vict_prio = true,
437 	}, {
438 		.usecase_id = LLCC_MDMHPGRW,
439 		.slice_id = 25,
440 		.max_cap = 1024,
441 		.priority = 5,
442 		.bonus_ways = 0xffffffff,
443 		.mru_uncap_en = true,
444 		.vict_prio = true,
445 	}, {
446 		.usecase_id = LLCC_CMPT,
447 		.slice_id = 34,
448 		.max_cap = 4096,
449 		.priority = 1,
450 		.fixed_size = true,
451 		.bonus_ways = 0xffffffff,
452 		.mru_uncap_en = true,
453 		.vict_prio = true,
454 	}, {
455 		.usecase_id = LLCC_GPUHTW,
456 		.slice_id = 11,
457 		.max_cap = 512,
458 		.priority = 1,
459 		.fixed_size = true,
460 		.bonus_ways = 0xffffffff,
461 		.mru_uncap_en = true,
462 		.vict_prio = true,
463 	}, {
464 		.usecase_id = LLCC_GPU,
465 		.slice_id = 9,
466 		.max_cap = 5632,
467 		.priority = 1,
468 		.fixed_size = true,
469 		.bonus_ways = 0xffffffff,
470 		.write_scid_cacheable_en = true,
471 		.mru_uncap_en = true,
472 		.vict_prio = true,
473 	}, {
474 		.usecase_id = LLCC_MMUHWT,
475 		.slice_id = 18,
476 		.max_cap = 768,
477 		.priority = 1,
478 		.fixed_size = true,
479 		.bonus_ways = 0xffffffff,
480 		.activate_on_init = true,
481 		.mru_uncap_en = true,
482 		.vict_prio = true,
483 	}, {
484 		.usecase_id = LLCC_DISP,
485 		.slice_id = 16,
486 		.max_cap = 7168,
487 		.priority = 1,
488 		.fixed_size = true,
489 		.bonus_ways = 0xffffffff,
490 		.cache_mode = 2,
491 		.stale_en = true,
492 		.mru_uncap_en = true,
493 		.vict_prio = true,
494 	}, {
495 		.usecase_id = LLCC_MDMHPFX,
496 		.slice_id = 24,
497 		.max_cap = 1024,
498 		.priority = 5,
499 		.fixed_size = true,
500 		.bonus_ways = 0xffffffff,
501 		.mru_uncap_en = true,
502 		.vict_prio = true,
503 	}, {
504 		.usecase_id = LLCC_MDMPNG,
505 		.slice_id = 27,
506 		.max_cap = 256,
507 		.priority = 5,
508 		.bonus_ways = 0xfffff,
509 		.mru_uncap_en = true,
510 		.vict_prio = true,
511 	}, {
512 		.usecase_id = LLCC_CVP,
513 		.slice_id = 8,
514 		.max_cap = 800,
515 		.priority = 5,
516 		.fixed_size = true,
517 		.bonus_ways = 0xffffffff,
518 		.mru_uncap_en = true,
519 		.ovcap_en = true,
520 		.vict_prio = true,
521 		.parent_slice_id = 33,
522 	}, {
523 		.usecase_id = LLCC_MODPE,
524 		.slice_id = 29,
525 		.max_cap = 256,
526 		.priority = 1,
527 		.fixed_size = true,
528 		.bonus_ways = 0xf0000000,
529 		.mru_uncap_en = true,
530 		.alloc_oneway_en = true,
531 		.vict_prio = true,
532 	}, {
533 		.usecase_id = LLCC_WRCACHE,
534 		.slice_id = 31,
535 		.max_cap = 512,
536 		.priority = 1,
537 		.fixed_size = true,
538 		.bonus_ways = 0xffffffff,
539 		.activate_on_init = true,
540 		.mru_uncap_en = true,
541 		.vict_prio = true,
542 	}, {
543 		.usecase_id = LLCC_CVPFW,
544 		.slice_id = 19,
545 		.max_cap = 512,
546 		.priority = 5,
547 		.fixed_size = true,
548 		.bonus_ways = 0xffffffff,
549 		.mru_uncap_en = true,
550 		.vict_prio = true,
551 		.parent_slice_id = 33,
552 	}, {
553 		.usecase_id = LLCC_CPUMTE,
554 		.slice_id = 7,
555 		.max_cap = 256,
556 		.priority = 1,
557 		.fixed_size = true,
558 		.bonus_ways = 0xffffffff,
559 		.mru_uncap_en = true,
560 		.vict_prio = true,
561 	}, {
562 		.usecase_id = LLCC_CMPTHCP,
563 		.slice_id = 15,
564 		.max_cap = 256,
565 		.priority = 4,
566 		.fixed_size = true,
567 		.bonus_ways = 0xffffffff,
568 		.mru_uncap_en = true,
569 		.vict_prio = true,
570 	}, {
571 		.usecase_id = LLCC_LCPDARE,
572 		.slice_id = 30,
573 		.max_cap = 128,
574 		.priority = 5,
575 		.fixed_size = true,
576 		.bonus_ways = 0xffffffff,
577 		.activate_on_init = true,
578 		.mru_uncap_en = true,
579 		.alloc_oneway_en = true,
580 		.vict_prio = true,
581 	}, {
582 		.usecase_id = LLCC_AENPU,
583 		.slice_id = 3,
584 		.max_cap = 3072,
585 		.priority = 1,
586 		.fixed_size = true,
587 		.bonus_ways = 0xffffffff,
588 		.cache_mode = 2,
589 		.mru_uncap_en = true,
590 		.vict_prio = true,
591 	}, {
592 		.usecase_id = LLCC_ISLAND1,
593 		.slice_id = 12,
594 		.max_cap = 7936,
595 		.priority = 7,
596 		.fixed_size = true,
597 		.bonus_ways = 0x7fffffff,
598 		.mru_uncap_en = true,
599 		.vict_prio = true,
600 	}, {
601 		.usecase_id = LLCC_DISP_WB,
602 		.slice_id = 23,
603 		.max_cap = 512,
604 		.priority = 4,
605 		.fixed_size = true,
606 		.bonus_ways = 0xffffffff,
607 		.mru_uncap_en = true,
608 		.vict_prio = true,
609 	}, {
610 		.usecase_id = LLCC_VIDVSP,
611 		.slice_id = 4,
612 		.max_cap = 256,
613 		.priority = 4,
614 		.fixed_size = true,
615 		.bonus_ways = 0xffffffff,
616 		.mru_uncap_en = true,
617 		.vict_prio = true,
618 	}, {
619 		.usecase_id = LLCC_VIDDEC,
620 		.slice_id = 5,
621 		.max_cap = 512,
622 		.priority = 4,
623 		.fixed_size = true,
624 		.bonus_ways = 0xffffffff,
625 		.cache_mode = 2,
626 		.mru_uncap_en = true,
627 		.ovcap_en = true,
628 		.vict_prio = true,
629 		.parent_slice_id = 33,
630 	}, {
631 		.usecase_id = LLCC_CAMOFE,
632 		.slice_id = 33,
633 		.max_cap = 6144,
634 		.priority = 4,
635 		.fixed_size = true,
636 		.bonus_ways = 0xffffffff,
637 		.stale_en = true,
638 		.mru_uncap_en = true,
639 		.ovcap_en = true,
640 		.vict_prio = true,
641 		.parent_slice_id = 33,
642 	}, {
643 		.usecase_id = LLCC_CAMRTIP,
644 		.slice_id = 13,
645 		.max_cap = 6144,
646 		.priority = 4,
647 		.fixed_size = true,
648 		.bonus_ways = 0xffffffff,
649 		.stale_en = true,
650 		.mru_uncap_en = true,
651 		.ovcap_en = true,
652 		.vict_prio = true,
653 		.parent_slice_id = 33,
654 	}, {
655 		.usecase_id = LLCC_CAMRTRF,
656 		.slice_id = 10,
657 		.max_cap = 3584,
658 		.priority = 3,
659 		.fixed_size = true,
660 		.bonus_ways = 0xffffffff,
661 		.stale_en = true,
662 		.mru_uncap_en = true,
663 		.ovcap_en = true,
664 		.vict_prio = true,
665 		.parent_slice_id = 33,
666 	}, {
667 		.usecase_id = LLCC_CAMSRTRF,
668 		.slice_id = 21,
669 		.max_cap = 6144,
670 		.priority = 1,
671 		.fixed_size = true,
672 		.bonus_ways = 0xffffffff,
673 		.stale_en = true,
674 		.mru_uncap_en = true,
675 		.ovcap_en = true,
676 		.vict_prio = true,
677 		.parent_slice_id = 33,
678 	}, {
679 		.usecase_id = LLCC_VIDEO_APV,
680 		.slice_id = 6,
681 		.max_cap = 768,
682 		.priority = 4,
683 		.fixed_size = true,
684 		.bonus_ways = 0xffffffff,
685 		.mru_uncap_en = true,
686 		.vict_prio = true,
687 	}, {
688 		.usecase_id = LLCC_COMPUTE1,
689 		.slice_id = 22,
690 		.max_cap = 4096,
691 		.priority = 1,
692 		.fixed_size = true,
693 		.bonus_ways = 0xffffffff,
694 		.mru_uncap_en = true,
695 		.vict_prio = true,
696 	}, {
697 		.usecase_id = LLCC_CPUSS_OPP,
698 		.slice_id = 32,
699 		.max_cap = 0,
700 		.priority = 0,
701 		.fixed_size = true,
702 		.bonus_ways = 0,
703 		.activate_on_init = true,
704 		.write_scid_en = true,
705 		.mru_uncap_en = true,
706 		.vict_prio = true,
707 	}, {
708 		.usecase_id = LLCC_CPUSSMPAM,
709 		.slice_id = 17,
710 		.max_cap = 2048,
711 		.priority = 1,
712 		.fixed_size = true,
713 		.bonus_ways = 0xffffffff,
714 		.activate_on_init = true,
715 		.write_scid_en = true,
716 		.stale_en = true,
717 		.mru_uncap_en = true,
718 		.vict_prio = true,
719 	}, {
720 		.usecase_id = LLCC_CAM_IPE_STROV,
721 		.slice_id = 14,
722 		.max_cap = 400,
723 		.priority = 5,
724 		.fixed_size = true,
725 		.bonus_ways = 0xffffffff,
726 		.mru_uncap_en = true,
727 		.ovcap_en = true,
728 		.vict_prio = true,
729 		.parent_slice_id = 33,
730 	}, {
731 		.usecase_id = LLCC_CAM_OFE_STROV,
732 		.slice_id = 20,
733 		.max_cap = 400,
734 		.priority = 5,
735 		.fixed_size = true,
736 		.bonus_ways = 0xffffffff,
737 		.mru_uncap_en = true,
738 		.ovcap_en = true,
739 		.vict_prio = true,
740 		.parent_slice_id = 33,
741 	}, {
742 		.usecase_id = LLCC_CPUSS_HEU,
743 		.slice_id = 28,
744 		.max_cap = 0,
745 		.priority = 0,
746 		.fixed_size = true,
747 		.bonus_ways = 0,
748 		.mru_uncap_en = true,
749 		.ovcap_en = true,
750 		.vict_prio = true,
751 	}, {
752 		.usecase_id = LLCC_MDM_PNG_FIXED,
753 		.slice_id = 26,
754 		.max_cap = 256,
755 		.priority = 5,
756 		.fixed_size = true,
757 		.bonus_ways = 0xff000000,
758 		.activate_on_init = true,
759 		.write_scid_en = true,
760 		.mru_uncap_en = true,
761 		.vict_prio = true,
762 	   },
763 };
764 
765 static const struct llcc_slice_config sa8775p_data[] =  {
766 	{
767 		.usecase_id = LLCC_CPUSS,
768 		.slice_id = 1,
769 		.max_cap = 2048,
770 		.priority = 1,
771 		.bonus_ways = 0xff,
772 		.cache_mode = 0,
773 		.retain_on_pc = true,
774 		.activate_on_init = true,
775 	}, {
776 		.usecase_id = LLCC_VIDSC0,
777 		.slice_id = 2,
778 		.max_cap = 512,
779 		.priority = 3,
780 		.fixed_size = true,
781 		.bonus_ways = 0xff,
782 		.cache_mode = 0,
783 		.retain_on_pc = true,
784 	}, {
785 		.usecase_id = LLCC_CPUSS1,
786 		.slice_id = 3,
787 		.max_cap = 1024,
788 		.priority = 1,
789 		.fixed_size = true,
790 		.bonus_ways = 0xff,
791 		.cache_mode = 0,
792 		.retain_on_pc = true,
793 	}, {
794 		.usecase_id = LLCC_CPUHWT,
795 		.slice_id = 5,
796 		.max_cap = 512,
797 		.priority = 1,
798 		.fixed_size = true,
799 		.bonus_ways = 0xff,
800 		.cache_mode = 0,
801 		.retain_on_pc = true,
802 	}, {
803 		.usecase_id = LLCC_AUDIO,
804 		.slice_id = 6,
805 		.max_cap = 1024,
806 		.priority = 1,
807 		.fixed_size = true,
808 		.bonus_ways = 0xff,
809 		.cache_mode = 0,
810 	}, {
811 		.usecase_id = LLCC_CMPT,
812 		.slice_id = 10,
813 		.max_cap = 4096,
814 		.priority = 1,
815 		.fixed_size = true,
816 		.bonus_ways = 0xff,
817 		.cache_mode = 0,
818 		.retain_on_pc = true,
819 	}, {
820 		.usecase_id = LLCC_GPUHTW,
821 		.slice_id = 11,
822 		.max_cap = 1024,
823 		.priority = 1,
824 		.fixed_size = true,
825 		.bonus_ways = 0xff,
826 		.cache_mode = 0,
827 		.retain_on_pc = true,
828 	}, {
829 		.usecase_id = LLCC_GPU,
830 		.slice_id = 12,
831 		.max_cap = 1024,
832 		.priority = 1,
833 		.fixed_size = true,
834 		.bonus_ways = 0xff,
835 		.cache_mode = 0,
836 		.retain_on_pc = true,
837 		.write_scid_en = true,
838 	}, {
839 		.usecase_id = LLCC_MMUHWT,
840 		.slice_id = 13,
841 		.max_cap = 1024,
842 		.priority = 1,
843 		.fixed_size = true,
844 		.bonus_ways = 0xff,
845 		.cache_mode = 0,
846 		.activate_on_init = true,
847 	}, {
848 		.usecase_id = LLCC_CMPTDMA,
849 		.slice_id = 15,
850 		.max_cap = 1024,
851 		.priority = 1,
852 		.fixed_size = true,
853 		.bonus_ways = 0xff,
854 		.cache_mode = 0,
855 		.retain_on_pc = true,
856 	}, {
857 		.usecase_id = LLCC_DISP,
858 		.slice_id = 16,
859 		.max_cap = 4096,
860 		.priority = 2,
861 		.fixed_size = true,
862 		.bonus_ways = 0xff,
863 		.cache_mode = 0,
864 		.retain_on_pc = true,
865 	}, {
866 		.usecase_id = LLCC_VIDFW,
867 		.slice_id = 17,
868 		.max_cap = 3072,
869 		.priority = 1,
870 		.bonus_ways = 0xff,
871 		.cache_mode = 0,
872 		.retain_on_pc = true,
873 	}, {
874 		.usecase_id = LLCC_AUDHW,
875 		.slice_id = 22,
876 		.max_cap = 1024,
877 		.priority = 1,
878 		.fixed_size = true,
879 		.bonus_ways = 0xff,
880 		.cache_mode = 0,
881 	}, {
882 		.usecase_id = LLCC_CVP,
883 		.slice_id = 28,
884 		.max_cap = 256,
885 		.priority = 3,
886 		.fixed_size = true,
887 		.bonus_ways = 0xff,
888 		.cache_mode = 0,
889 		.retain_on_pc = true,
890 	}, {
891 		.usecase_id = LLCC_APTCM,
892 		.slice_id = 30,
893 		.max_cap = 1024,
894 		.priority = 3,
895 		.fixed_size = true,
896 		.res_ways = 0xf0,
897 		.cache_mode = 1,
898 		.retain_on_pc = true,
899 	}, {
900 		.usecase_id = LLCC_WRCACHE,
901 		.slice_id = 31,
902 		.max_cap = 512,
903 		.priority = 1,
904 		.fixed_size = true,
905 		.bonus_ways = 0xff,
906 		.cache_mode = 0,
907 		.activate_on_init = true,
908 	},
909 };
910 
911 static const struct llcc_slice_config sar1130p_data[] = {
912 	{
913 		.usecase_id = LLCC_CPUSS,
914 		.slice_id = 1,
915 		.max_cap = 4096,
916 		.priority = 1,
917 		.bonus_ways = 0x1fff,
918 		.res_ways = 0x0,
919 		.cache_mode = 0,
920 		.retain_on_pc = true,
921 		.activate_on_init = true,
922 	}, {
923 		.usecase_id = LLCC_VIDSC0,
924 		.slice_id = 2,
925 		.max_cap = 512,
926 		.priority = 3,
927 		.fixed_size = true,
928 		.bonus_ways = 0x1fff,
929 		.res_ways = 0x0,
930 		.cache_mode = 0,
931 		.retain_on_pc = true,
932 	}, {
933 		.usecase_id = LLCC_AUDIO,
934 		.slice_id = 6,
935 		.max_cap = 1024,
936 		.priority = 3,
937 		.fixed_size = true,
938 		.bonus_ways = 0x1fff,
939 		.res_ways = 0x0,
940 		.cache_mode = 0,
941 		.retain_on_pc = true,
942 	}, {
943 		.usecase_id = LLCC_CMPT,
944 		.slice_id = 10,
945 		.max_cap = 1024,
946 		.priority = 1,
947 		.fixed_size = true,
948 		.bonus_ways = 0x1fff,
949 		.res_ways = 0x0,
950 		.cache_mode = 0,
951 		.retain_on_pc = true,
952 	}, {
953 		.usecase_id = LLCC_GPUHTW,
954 		.slice_id = 11,
955 		.max_cap = 0,
956 		.priority = 1,
957 		.fixed_size = true,
958 		.bonus_ways = 0x1fff,
959 		.res_ways = 0x0,
960 		.cache_mode = 0,
961 		.retain_on_pc = true,
962 	}, {
963 		.usecase_id = LLCC_GPU,
964 		.slice_id = 12,
965 		.max_cap = 3072,
966 		.priority = 3,
967 		.fixed_size = true,
968 		.bonus_ways = 0x1fff,
969 		.res_ways = 0x0,
970 		.cache_mode = 0,
971 		.retain_on_pc = true,
972 		.write_scid_en = true,
973 	}, {
974 		.usecase_id = LLCC_MMUHWT,
975 		.slice_id = 13,
976 		.max_cap = 512,
977 		.priority = 1,
978 		.fixed_size = true,
979 		.bonus_ways = 0x1fff,
980 		.res_ways = 0x0,
981 		.cache_mode = 0,
982 	}, {
983 		.usecase_id = LLCC_DISP,
984 		.slice_id = 16,
985 		.max_cap = 12800,
986 		.priority = 1,
987 		.fixed_size = true,
988 		.bonus_ways = 0x1fff,
989 		.res_ways = 0x0,
990 		.cache_mode = 0,
991 		.retain_on_pc = true,
992 	}, {
993 		.usecase_id = LLCC_CVP,
994 		.slice_id = 28,
995 		.max_cap = 256,
996 		.priority = 3,
997 		.fixed_size = true,
998 		.bonus_ways = 0x1fff,
999 		.res_ways = 0x0,
1000 		.cache_mode = 0,
1001 		.retain_on_pc = true,
1002 	}, {
1003 		.usecase_id = LLCC_APTCM,
1004 		.slice_id = 26,
1005 		.max_cap = 2048,
1006 		.priority = 3,
1007 		.fixed_size = true,
1008 		.bonus_ways = 0x0,
1009 		.res_ways = 0x3,
1010 		.cache_mode = true,
1011 		.dis_cap_alloc = true,
1012 		.retain_on_pc = true,
1013 	}, {
1014 		.usecase_id = LLCC_WRCACHE,
1015 		.slice_id = 31,
1016 		.max_cap = 256,
1017 		.priority = 1,
1018 		.fixed_size = true,
1019 		.bonus_ways = 0x1fff,
1020 		.res_ways = 0x0,
1021 		.cache_mode = 0,
1022 		.activate_on_init = true,
1023 	}, {
1024 		.usecase_id = LLCC_AENPU,
1025 		.slice_id = 30,
1026 		.max_cap = 3072,
1027 		.priority = 3,
1028 		.fixed_size = true,
1029 		.bonus_ways = 0x1fff,
1030 		.res_ways = 0x0,
1031 		.cache_mode = 0,
1032 		.retain_on_pc = true,
1033 	}, {
1034 		.usecase_id = LLCC_DISP_LEFT,
1035 		.slice_id = 17,
1036 		.max_cap = 0,
1037 		.priority = 1,
1038 		.fixed_size = true,
1039 		.bonus_ways = 0x0,
1040 		.res_ways = 0x0,
1041 		.cache_mode = 0,
1042 		.retain_on_pc = true,
1043 	}, {
1044 		.usecase_id = LLCC_DISP_RIGHT,
1045 		.slice_id = 18,
1046 		.max_cap = 0,
1047 		.priority = 1,
1048 		.fixed_size = true,
1049 		.bonus_ways = 0x0,
1050 		.res_ways = 0x0,
1051 		.cache_mode = 0,
1052 		.retain_on_pc = true,
1053 	}, {
1054 		.usecase_id = LLCC_EVCS_LEFT,
1055 		.slice_id = 22,
1056 		.max_cap = 0,
1057 		.priority = 1,
1058 		.fixed_size = true,
1059 		.bonus_ways = 0x0,
1060 		.res_ways = 0x0,
1061 		.cache_mode = 0,
1062 		.retain_on_pc = true,
1063 	}, {
1064 		.usecase_id = LLCC_EVCS_RIGHT,
1065 		.slice_id = 23,
1066 		.max_cap = 0,
1067 		.priority = 1,
1068 		.fixed_size = true,
1069 		.bonus_ways = 0x0,
1070 		.res_ways = 0x0,
1071 		.cache_mode = 0,
1072 		.retain_on_pc = true,
1073 	},
1074 };
1075 
1076 static const struct llcc_slice_config sar2130p_data[] = {
1077 	{
1078 		.usecase_id = LLCC_CPUSS,
1079 		.slice_id = 1,
1080 		.max_cap = 6144,
1081 		.priority = 1,
1082 		.fixed_size = 0,
1083 		.bonus_ways = 0x3fffffff,
1084 		.res_ways = 0x0,
1085 		.cache_mode = 0,
1086 		.retain_on_pc = true,
1087 		.activate_on_init = true,
1088 	}, {
1089 		.usecase_id = LLCC_VIDSC0,
1090 		.slice_id = 2,
1091 		.max_cap = 128,
1092 		.priority = 2,
1093 		.fixed_size = true,
1094 		.bonus_ways = 0x3fffffff,
1095 		.res_ways = 0x0,
1096 		.cache_mode = 0,
1097 		.retain_on_pc = true,
1098 	}, {
1099 		.usecase_id = LLCC_AUDIO,
1100 		.slice_id = 6,
1101 		.max_cap = 1024,
1102 		.priority = 3,
1103 		.fixed_size = true,
1104 		.bonus_ways = 0x3fffffff,
1105 		.res_ways = 0x0,
1106 		.cache_mode = 0,
1107 		.retain_on_pc = true,
1108 	}, {
1109 		.usecase_id = LLCC_CMPT,
1110 		.slice_id = 10,
1111 		.max_cap = 1024,
1112 		.priority = 1,
1113 		.fixed_size = true,
1114 		.bonus_ways = 0x3fffffff,
1115 		.res_ways = 0x0,
1116 		.cache_mode = 0,
1117 		.retain_on_pc = true,
1118 	}, {
1119 		.usecase_id = LLCC_GPUHTW,
1120 		.slice_id = 11,
1121 		.max_cap = 0,
1122 		.priority = 1,
1123 		.fixed_size = true,
1124 		.bonus_ways = 0x3fffffff,
1125 		.res_ways = 0x0,
1126 		.cache_mode = 0,
1127 		.retain_on_pc = true,
1128 	}, {
1129 		.usecase_id = LLCC_GPU,
1130 		.slice_id = 12,
1131 		.max_cap = 1536,
1132 		.priority = 2,
1133 		.fixed_size = true,
1134 		.bonus_ways = 0x3fffffff,
1135 		.res_ways = 0x0,
1136 		.cache_mode = 0,
1137 		.retain_on_pc = true,
1138 		.write_scid_en = true,
1139 	}, {
1140 		.usecase_id = LLCC_MMUHWT,
1141 		.slice_id = 13,
1142 		.max_cap = 1024,
1143 		.priority = 1,
1144 		.fixed_size = true,
1145 		.bonus_ways = 0x3fffffff,
1146 		.res_ways = 0x0,
1147 		.cache_mode = 0,
1148 		.activate_on_init = true,
1149 	}, {
1150 		.usecase_id = LLCC_DISP,
1151 		.slice_id = 16,
1152 		.max_cap = 0,
1153 		.priority = 1,
1154 		.fixed_size = true,
1155 		.bonus_ways = 0x3fffffff,
1156 		.res_ways = 0x0,
1157 		.cache_mode = 0,
1158 		.retain_on_pc = true,
1159 	}, {
1160 		.usecase_id = LLCC_APTCM,
1161 		.slice_id = 26,
1162 		.max_cap = 2048,
1163 		.priority = 3,
1164 		.fixed_size = true,
1165 		.bonus_ways = 0x0,
1166 		.res_ways = 0x3,
1167 		.cache_mode = true,
1168 		.dis_cap_alloc = true,
1169 		.retain_on_pc = true,
1170 	}, {
1171 		.usecase_id = LLCC_WRCACHE,
1172 		.slice_id = 31,
1173 		.max_cap = 256,
1174 		.priority = 1,
1175 		.fixed_size = true,
1176 		.bonus_ways = 0x3fffffff,
1177 		.res_ways = 0x0,
1178 		.cache_mode = 0,
1179 		.activate_on_init = true,
1180 	}, {
1181 		.usecase_id = LLCC_VIEYE,
1182 		.slice_id = 7,
1183 		.max_cap = 7168,
1184 		.priority = 4,
1185 		.fixed_size = true,
1186 		.bonus_ways = 0x3fffffff,
1187 		.res_ways = 0x0,
1188 		.cache_mode = 0,
1189 		.retain_on_pc = true,
1190 	}, {
1191 		.usecase_id = LLCC_VIDPTH,
1192 		.slice_id = 8,
1193 		.max_cap = 7168,
1194 		.priority = 4,
1195 		.fixed_size = true,
1196 		.bonus_ways = 0x3fffffff,
1197 		.res_ways = 0x0,
1198 		.cache_mode = 0,
1199 		.retain_on_pc = true,
1200 	}, {
1201 		.usecase_id = LLCC_GPUMV,
1202 		.slice_id = 9,
1203 		.max_cap = 2048,
1204 		.priority = 2,
1205 		.fixed_size = true,
1206 		.bonus_ways = 0x3fffffff,
1207 		.res_ways = 0x0,
1208 		.cache_mode = 0,
1209 		.retain_on_pc = true,
1210 	}, {
1211 		.usecase_id = LLCC_EVA_LEFT,
1212 		.slice_id = 20,
1213 		.max_cap = 7168,
1214 		.priority = 5,
1215 		.fixed_size = true,
1216 		.bonus_ways = 0x3ffffffc,
1217 		.res_ways = 0x0,
1218 		.cache_mode = 0,
1219 		.retain_on_pc = true,
1220 	}, {
1221 		.usecase_id = LLCC_EVA_RIGHT,
1222 		.slice_id = 21,
1223 		.max_cap = 7168,
1224 		.priority = 5,
1225 		.fixed_size = true,
1226 		.bonus_ways = 0x3ffffffc,
1227 		.res_ways = 0x0,
1228 		.cache_mode = 0,
1229 		.retain_on_pc = true,
1230 	}, {
1231 		.usecase_id = LLCC_EVAGAIN,
1232 		.slice_id = 25,
1233 		.max_cap = 1024,
1234 		.priority = 2,
1235 		.fixed_size = true,
1236 		.bonus_ways = 0x3fffffff,
1237 		.res_ways = 0x0,
1238 		.cache_mode = 0,
1239 		.retain_on_pc = true,
1240 	}, {
1241 		.usecase_id = LLCC_AENPU,
1242 		.slice_id = 30,
1243 		.max_cap = 3072,
1244 		.priority = 3,
1245 		.fixed_size = true,
1246 		.bonus_ways = 0x3fffffff,
1247 		.res_ways = 0x0,
1248 		.cache_mode = 0,
1249 		.retain_on_pc = true,
1250 	}, {
1251 		.usecase_id = LLCC_VIPTH,
1252 		.slice_id = 29,
1253 		.max_cap = 1024,
1254 		.priority = 4,
1255 		.fixed_size = true,
1256 		.bonus_ways = 0x3fffffff,
1257 		.res_ways = 0x0,
1258 		.cache_mode = 0,
1259 		.retain_on_pc = true,
1260 	}, {
1261 		.usecase_id = LLCC_DISP_LEFT,
1262 		.slice_id = 17,
1263 		.max_cap = 0,
1264 		.priority = 1,
1265 		.fixed_size = true,
1266 		.bonus_ways = 0x0,
1267 		.res_ways = 0x0,
1268 		.cache_mode = 0,
1269 		.retain_on_pc = true,
1270 	}, {
1271 		.usecase_id = LLCC_DISP_RIGHT,
1272 		.slice_id = 18,
1273 		.max_cap = 0,
1274 		.priority = 1,
1275 		.fixed_size = true,
1276 		.bonus_ways = 0x0,
1277 		.res_ways = 0x0,
1278 		.cache_mode = 0,
1279 		.retain_on_pc = true,
1280 	}, {
1281 		.usecase_id = LLCC_EVCS_LEFT,
1282 		.slice_id = 22,
1283 		.max_cap = 0,
1284 		.priority = 1,
1285 		.fixed_size = true,
1286 		.bonus_ways = 0x0,
1287 		.res_ways = 0x0,
1288 		.cache_mode = 0,
1289 		.retain_on_pc = true,
1290 	}, {
1291 		.usecase_id = LLCC_EVCS_RIGHT,
1292 		.slice_id = 23,
1293 		.max_cap = 0,
1294 		.priority = 1,
1295 		.fixed_size = true,
1296 		.bonus_ways = 0x0,
1297 		.res_ways = 0x0,
1298 		.cache_mode = 0,
1299 		.retain_on_pc = true,
1300 	}, {
1301 		.usecase_id = LLCC_SPAD,
1302 		.slice_id = 24,
1303 		.max_cap = 7168,
1304 		.priority = 1,
1305 		.fixed_size = true,
1306 		.bonus_ways = 0x0,
1307 		.res_ways = 0x0,
1308 		.cache_mode = 0,
1309 		.retain_on_pc = true,
1310 	},
1311 };
1312 
1313 static const struct llcc_slice_config sc7180_data[] =  {
1314 	{
1315 		.usecase_id = LLCC_CPUSS,
1316 		.slice_id = 1,
1317 		.max_cap = 256,
1318 		.priority = 1,
1319 		.bonus_ways = 0xf,
1320 		.cache_mode = 0,
1321 		.retain_on_pc = true,
1322 		.activate_on_init = true,
1323 	}, {
1324 		.usecase_id = LLCC_MDM,
1325 		.slice_id = 8,
1326 		.max_cap = 128,
1327 		.priority = 1,
1328 		.bonus_ways = 0xf,
1329 		.cache_mode = 0,
1330 		.retain_on_pc = true,
1331 	}, {
1332 		.usecase_id = LLCC_GPUHTW,
1333 		.slice_id = 11,
1334 		.max_cap = 128,
1335 		.priority = 1,
1336 		.bonus_ways = 0xf,
1337 		.cache_mode = 0,
1338 		.retain_on_pc = true,
1339 	}, {
1340 		.usecase_id = LLCC_GPU,
1341 		.slice_id = 12,
1342 		.max_cap = 128,
1343 		.priority = 1,
1344 		.bonus_ways = 0xf,
1345 		.cache_mode = 0,
1346 		.retain_on_pc = true,
1347 	},
1348 };
1349 
1350 static const struct llcc_slice_config sc7280_data[] =  {
1351 	{
1352 		.usecase_id = LLCC_CPUSS,
1353 		.slice_id = 1,
1354 		.max_cap = 768,
1355 		.priority = 1,
1356 		.bonus_ways = 0x3f,
1357 		.cache_mode = 0,
1358 		.retain_on_pc = true,
1359 		.activate_on_init = true,
1360 	}, {
1361 		.usecase_id = LLCC_MDMHPGRW,
1362 		.slice_id = 7,
1363 		.max_cap = 512,
1364 		.priority = 2,
1365 		.fixed_size = true,
1366 		.bonus_ways = 0x3f,
1367 		.cache_mode = 0,
1368 		.retain_on_pc = true,
1369 	}, {
1370 		.usecase_id = LLCC_CMPT,
1371 		.slice_id = 10,
1372 		.max_cap = 768,
1373 		.priority = 1,
1374 		.fixed_size = true,
1375 		.bonus_ways = 0x3f,
1376 		.cache_mode = 0,
1377 		.retain_on_pc = true,
1378 	}, {
1379 		.usecase_id = LLCC_GPUHTW,
1380 		.slice_id = 11,
1381 		.max_cap = 256,
1382 		.priority = 1,
1383 		.fixed_size = true,
1384 		.bonus_ways = 0x3f,
1385 		.cache_mode = 0,
1386 		.retain_on_pc = true,
1387 	}, {
1388 		.usecase_id = LLCC_GPU,
1389 		.slice_id = 12,
1390 		.max_cap = 512,
1391 		.priority = 1,
1392 		.bonus_ways = 0x3f,
1393 		.cache_mode = 0,
1394 		.retain_on_pc = true,
1395 	}, {
1396 		.usecase_id = LLCC_MMUHWT,
1397 		.slice_id = 13,
1398 		.max_cap = 256,
1399 		.priority = 1,
1400 		.fixed_size = true,
1401 		.bonus_ways = 0x3f,
1402 		.cache_mode = 0,
1403 		.activate_on_init = true,
1404 	}, {
1405 		.usecase_id = LLCC_MDMPNG,
1406 		.slice_id = 21,
1407 		.max_cap = 768,
1408 		.priority = 0,
1409 		.fixed_size = true,
1410 		.bonus_ways = 0x3f,
1411 		.cache_mode = 0,
1412 		.retain_on_pc = true,
1413 	}, {
1414 		.usecase_id = LLCC_WLHW,
1415 		.slice_id = 24,
1416 		.max_cap = 256,
1417 		.priority = 1,
1418 		.fixed_size = true,
1419 		.bonus_ways = 0x3f,
1420 		.cache_mode = 0,
1421 		.retain_on_pc = true,
1422 	}, {
1423 		.usecase_id = LLCC_MODPE,
1424 		.slice_id = 29,
1425 		.max_cap = 64,
1426 		.priority = 1,
1427 		.fixed_size = true,
1428 		.bonus_ways = 0x3f,
1429 		.cache_mode = 0,
1430 		.retain_on_pc = true,
1431 	},
1432 };
1433 
1434 static const struct llcc_slice_config sc8180x_data[] = {
1435 	{
1436 		.usecase_id = LLCC_CPUSS,
1437 		.slice_id = 1,
1438 		.max_cap = 6144,
1439 		.priority = 1,
1440 		.fixed_size = true,
1441 		.bonus_ways = 0xfff,
1442 		.cache_mode = 0,
1443 		.retain_on_pc = true,
1444 		.activate_on_init = true,
1445 	}, {
1446 		.usecase_id = LLCC_VIDSC0,
1447 		.slice_id = 2,
1448 		.max_cap = 512,
1449 		.priority = 2,
1450 		.fixed_size = true,
1451 		.bonus_ways = 0xfff,
1452 		.cache_mode = 0,
1453 		.retain_on_pc = true,
1454 	}, {
1455 		.usecase_id = LLCC_VIDSC1,
1456 		.slice_id = 3,
1457 		.max_cap = 512,
1458 		.priority = 2,
1459 		.fixed_size = true,
1460 		.bonus_ways = 0xfff,
1461 		.cache_mode = 0,
1462 		.retain_on_pc = true,
1463 	}, {
1464 		.usecase_id = LLCC_AUDIO,
1465 		.slice_id = 6,
1466 		.max_cap = 1024,
1467 		.priority = 1,
1468 		.fixed_size = true,
1469 		.bonus_ways = 0xfff,
1470 		.cache_mode = 0,
1471 		.retain_on_pc = true,
1472 	}, {
1473 		.usecase_id = LLCC_MDMHPGRW,
1474 		.slice_id = 7,
1475 		.max_cap = 3072,
1476 		.priority = 1,
1477 		.fixed_size = true,
1478 		.bonus_ways = 0x3ff,
1479 		.res_ways = 0xc00,
1480 		.cache_mode = 0,
1481 		.retain_on_pc = true,
1482 	}, {
1483 		.usecase_id = LLCC_MDM,
1484 		.slice_id = 8,
1485 		.max_cap = 3072,
1486 		.priority = 1,
1487 		.fixed_size = true,
1488 		.bonus_ways = 0xfff,
1489 		.cache_mode = 0,
1490 		.retain_on_pc = true,
1491 	}, {
1492 		.usecase_id = LLCC_MODHW,
1493 		.slice_id = 9,
1494 		.max_cap = 1024,
1495 		.priority = 1,
1496 		.fixed_size = true,
1497 		.bonus_ways = 0xfff,
1498 		.cache_mode = 0,
1499 		.retain_on_pc = true,
1500 	}, {
1501 		.usecase_id = LLCC_CMPT,
1502 		.slice_id = 10,
1503 		.max_cap = 6144,
1504 		.priority = 1,
1505 		.fixed_size = true,
1506 		.bonus_ways = 0xfff,
1507 		.cache_mode = 0,
1508 		.retain_on_pc = true,
1509 	}, {
1510 		.usecase_id = LLCC_GPUHTW,
1511 		.slice_id = 11,
1512 		.max_cap = 1024,
1513 		.priority = 1,
1514 		.fixed_size = true,
1515 		.bonus_ways = 0xfff,
1516 		.cache_mode = 0,
1517 		.retain_on_pc = true,
1518 	}, {
1519 		.usecase_id = LLCC_GPU,
1520 		.slice_id = 12,
1521 		.max_cap = 5120,
1522 		.priority = 1,
1523 		.fixed_size = true,
1524 		.bonus_ways = 0xfff,
1525 		.cache_mode = 0,
1526 		.retain_on_pc = true,
1527 	}, {
1528 		.usecase_id = LLCC_MMUHWT,
1529 		.slice_id = 13,
1530 		.max_cap = 1024,
1531 		.priority = 1,
1532 		.fixed_size = true,
1533 		.bonus_ways = 0xfff,
1534 		.cache_mode = 0,
1535 		.activate_on_init = true,
1536 	}, {
1537 		.usecase_id = LLCC_CMPTDMA,
1538 		.slice_id = 15,
1539 		.max_cap = 6144,
1540 		.priority = 1,
1541 		.fixed_size = true,
1542 		.bonus_ways = 0xfff,
1543 		.cache_mode = 0,
1544 		.retain_on_pc = true,
1545 	}, {
1546 		.usecase_id = LLCC_DISP,
1547 		.slice_id = 16,
1548 		.max_cap = 6144,
1549 		.priority = 1,
1550 		.fixed_size = true,
1551 		.bonus_ways = 0xfff,
1552 		.cache_mode = 0,
1553 		.retain_on_pc = true,
1554 	}, {
1555 		.usecase_id = LLCC_VIDFW,
1556 		.slice_id = 17,
1557 		.max_cap = 1024,
1558 		.priority = 1,
1559 		.fixed_size = true,
1560 		.bonus_ways = 0xfff,
1561 		.cache_mode = 0,
1562 		.retain_on_pc = true,
1563 	}, {
1564 		.usecase_id = LLCC_MDMHPFX,
1565 		.slice_id = 20,
1566 		.max_cap = 1024,
1567 		.priority = 2,
1568 		.fixed_size = true,
1569 		.bonus_ways = 0xfff,
1570 		.cache_mode = 0,
1571 		.retain_on_pc = true,
1572 	}, {
1573 		.usecase_id = LLCC_MDMPNG,
1574 		.slice_id = 21,
1575 		.max_cap = 1024,
1576 		.priority = 0,
1577 		.fixed_size = true,
1578 		.bonus_ways = 0xc,
1579 		.cache_mode = 0,
1580 		.retain_on_pc = true,
1581 	}, {
1582 		.usecase_id = LLCC_AUDHW,
1583 		.slice_id = 22,
1584 		.max_cap = 1024,
1585 		.priority = 1,
1586 		.fixed_size = true,
1587 		.bonus_ways = 0xfff,
1588 		.cache_mode = 0,
1589 		.retain_on_pc = true,
1590 	}, {
1591 		.usecase_id = LLCC_NPU,
1592 		.slice_id = 23,
1593 		.max_cap = 6144,
1594 		.priority = 1,
1595 		.fixed_size = true,
1596 		.bonus_ways = 0xfff,
1597 		.cache_mode = 0,
1598 		.retain_on_pc = true,
1599 	}, {
1600 		.usecase_id = LLCC_WLHW,
1601 		.slice_id = 24,
1602 		.max_cap = 6144,
1603 		.priority = 1,
1604 		.fixed_size = true,
1605 		.bonus_ways = 0xfff,
1606 		.cache_mode = 0,
1607 		.retain_on_pc = true,
1608 	}, {
1609 		.usecase_id = LLCC_MODPE,
1610 		.slice_id = 29,
1611 		.max_cap = 512,
1612 		.priority = 1,
1613 		.fixed_size = true,
1614 		.bonus_ways = 0xc,
1615 		.cache_mode = 0,
1616 		.retain_on_pc = true,
1617 	}, {
1618 		.usecase_id = LLCC_APTCM,
1619 		.slice_id = 30,
1620 		.max_cap = 512,
1621 		.priority = 3,
1622 		.fixed_size = true,
1623 		.res_ways = 0x1,
1624 		.cache_mode = 1,
1625 		.retain_on_pc = true,
1626 	}, {
1627 		.usecase_id = LLCC_WRCACHE,
1628 		.slice_id = 31,
1629 		.max_cap = 128,
1630 		.priority = 1,
1631 		.fixed_size = true,
1632 		.bonus_ways = 0xfff,
1633 		.cache_mode = 0,
1634 	},
1635 };
1636 
1637 static const struct llcc_slice_config sc8280xp_data[] = {
1638 	{
1639 		.usecase_id = LLCC_CPUSS,
1640 		.slice_id = 1,
1641 		.max_cap = 6144,
1642 		.priority = 1,
1643 		.fixed_size = true,
1644 		.bonus_ways = 0xfff,
1645 		.cache_mode = 0,
1646 		.retain_on_pc = true,
1647 		.activate_on_init = true,
1648 	}, {
1649 		.usecase_id = LLCC_VIDSC0,
1650 		.slice_id = 2,
1651 		.max_cap = 512,
1652 		.priority = 3,
1653 		.fixed_size = true,
1654 		.bonus_ways = 0xfff,
1655 		.cache_mode = 0,
1656 		.retain_on_pc = true,
1657 	}, {
1658 		.usecase_id = LLCC_AUDIO,
1659 		.slice_id = 6,
1660 		.max_cap = 1024,
1661 		.priority = 1,
1662 		.fixed_size = true,
1663 		.bonus_ways = 0xfff,
1664 		.cache_mode = 0,
1665 	}, {
1666 		.usecase_id = LLCC_CMPT,
1667 		.slice_id = 10,
1668 		.max_cap = 6144,
1669 		.priority = 1,
1670 		.fixed_size = true,
1671 		.bonus_ways = 0xfff,
1672 		.cache_mode = 0,
1673 	}, {
1674 		.usecase_id = LLCC_GPUHTW,
1675 		.slice_id = 11,
1676 		.max_cap = 1024,
1677 		.priority = 1,
1678 		.fixed_size = true,
1679 		.bonus_ways = 0xfff,
1680 		.cache_mode = 0,
1681 		.retain_on_pc = true,
1682 	}, {
1683 		.usecase_id = LLCC_GPU,
1684 		.slice_id = 12,
1685 		.max_cap = 4096,
1686 		.priority = 1,
1687 		.fixed_size = true,
1688 		.bonus_ways = 0xfff,
1689 		.cache_mode = 0,
1690 		.retain_on_pc = true,
1691 		.write_scid_en = true,
1692 	}, {
1693 		.usecase_id = LLCC_MMUHWT,
1694 		.slice_id = 13,
1695 		.max_cap = 1024,
1696 		.priority = 1,
1697 		.fixed_size = true,
1698 		.bonus_ways = 0xfff,
1699 		.cache_mode = 0,
1700 		.activate_on_init = true,
1701 	}, {
1702 		.usecase_id = LLCC_DISP,
1703 		.slice_id = 16,
1704 		.max_cap = 6144,
1705 		.priority = 1,
1706 		.fixed_size = true,
1707 		.bonus_ways = 0xfff,
1708 		.cache_mode = 0,
1709 		.retain_on_pc = true,
1710 	}, {
1711 		.usecase_id = LLCC_AUDHW,
1712 		.slice_id = 22,
1713 		.max_cap = 2048,
1714 		.priority = 1,
1715 		.fixed_size = true,
1716 		.bonus_ways = 0xfff,
1717 		.cache_mode = 0,
1718 		.retain_on_pc = true,
1719 	}, {
1720 		.usecase_id = LLCC_ECC,
1721 		.slice_id = 26,
1722 		.max_cap = 1024,
1723 		.priority = 1,
1724 		.fixed_size = true,
1725 		.bonus_ways = 0xfff,
1726 		.cache_mode = 0,
1727 		.retain_on_pc = true,
1728 	}, {
1729 		.usecase_id = LLCC_CVP,
1730 		.slice_id = 28,
1731 		.max_cap = 512,
1732 		.priority = 3,
1733 		.fixed_size = true,
1734 		.bonus_ways = 0xfff,
1735 		.cache_mode = 0,
1736 		.retain_on_pc = true,
1737 	}, {
1738 		.usecase_id = LLCC_APTCM,
1739 		.slice_id = 30,
1740 		.max_cap = 1024,
1741 		.priority = 3,
1742 		.fixed_size = true,
1743 		.res_ways = 0x1,
1744 		.cache_mode = 1,
1745 		.retain_on_pc = true,
1746 	}, {
1747 		.usecase_id = LLCC_WRCACHE,
1748 		.slice_id = 31,
1749 		.max_cap = 1024,
1750 		.priority = 1,
1751 		.fixed_size = true,
1752 		.bonus_ways = 0xfff,
1753 		.cache_mode = 0,
1754 		.activate_on_init = true,
1755 	}, {
1756 		.usecase_id = LLCC_CVPFW,
1757 		.slice_id = 17,
1758 		.max_cap = 512,
1759 		.priority = 1,
1760 		.bonus_ways = 0xfff,
1761 		.cache_mode = 0,
1762 		.retain_on_pc = true,
1763 	}, {
1764 		.usecase_id = LLCC_CPUSS1,
1765 		.slice_id = 3,
1766 		.max_cap = 2048,
1767 		.priority = 1,
1768 		.fixed_size = true,
1769 		.bonus_ways = 0xfff,
1770 		.cache_mode = 0,
1771 		.retain_on_pc = true,
1772 	}, {
1773 		.usecase_id = LLCC_CPUHWT,
1774 		.slice_id = 5,
1775 		.max_cap = 512,
1776 		.priority = 1,
1777 		.fixed_size = true,
1778 		.bonus_ways = 0xfff,
1779 		.cache_mode = 0,
1780 		.activate_on_init = true,
1781 	},
1782 };
1783 
1784 static const struct llcc_slice_config sdm670_data[] = {
1785 	{
1786 		.usecase_id = LLCC_CPUSS,
1787 		.slice_id = 1,
1788 		.max_cap = 512,
1789 		.priority = 1,
1790 		.bonus_ways = 0xf,
1791 		.res_ways = 0x0,
1792 		.cache_mode = 0,
1793 		.dis_cap_alloc = true,
1794 		.retain_on_pc = true,
1795 		.activate_on_init = true,
1796 	}, {
1797 		.usecase_id = LLCC_ROTATOR,
1798 		.slice_id = 4,
1799 		.max_cap = 384,
1800 		.priority = 2,
1801 		.fixed_size = true,
1802 		.bonus_ways = 0x0,
1803 		.res_ways = 0xe,
1804 		.cache_mode = 2,
1805 		.dis_cap_alloc = true,
1806 		.retain_on_pc = true,
1807 	}, {
1808 		.usecase_id = LLCC_VOICE,
1809 		.slice_id = 5,
1810 		.max_cap = 512,
1811 		.priority = 1,
1812 		.bonus_ways = 0xf,
1813 		.res_ways = 0x0,
1814 		.cache_mode = 0,
1815 		.dis_cap_alloc = true,
1816 		.retain_on_pc = true,
1817 	}, {
1818 		.usecase_id = LLCC_AUDIO,
1819 		.slice_id = 6,
1820 		.max_cap = 512,
1821 		.priority = 1,
1822 		.bonus_ways = 0xf,
1823 		.res_ways = 0x0,
1824 		.cache_mode = 0,
1825 		.dis_cap_alloc = true,
1826 		.retain_on_pc = true,
1827 	}, {
1828 		.usecase_id = LLCC_MDM,
1829 		.slice_id = 8,
1830 		.max_cap = 512,
1831 		.priority = 1,
1832 		.bonus_ways = 0xf,
1833 		.res_ways = 0x0,
1834 		.cache_mode = 0,
1835 		.dis_cap_alloc = true,
1836 		.retain_on_pc = true,
1837 	}, {
1838 		.usecase_id = LLCC_GPU,
1839 		.slice_id = 12,
1840 		.max_cap = 384,
1841 		.priority = 1,
1842 		.fixed_size = true,
1843 		.bonus_ways = 0x0,
1844 		.res_ways = 0x0,
1845 		.cache_mode = 0,
1846 		.dis_cap_alloc = true,
1847 		.retain_on_pc = true,
1848 	}, {
1849 		.usecase_id = LLCC_MMUHWT,
1850 		.slice_id = 13,
1851 		.max_cap = 512,
1852 		.priority = 1,
1853 		.bonus_ways = 0xf,
1854 		.res_ways = 0x0,
1855 		.cache_mode = 0,
1856 		.dis_cap_alloc = true,
1857 		.activate_on_init = true,
1858 	}, {
1859 		.usecase_id = LLCC_AUDHW,
1860 		.slice_id = 22,
1861 		.max_cap = 512,
1862 		.priority = 1,
1863 		.fixed_size = true,
1864 		.bonus_ways = 0xf,
1865 		.res_ways = 0x0,
1866 		.cache_mode = 0,
1867 		.dis_cap_alloc = true,
1868 		.retain_on_pc = true,
1869 	},
1870 };
1871 
1872 static const struct llcc_slice_config sdm845_data[] =  {{
1873 		.usecase_id = LLCC_CPUSS,
1874 		.slice_id = 1,
1875 		.max_cap = 2816,
1876 		.priority = 1,
1877 		.bonus_ways = 0xffc,
1878 		.res_ways = 0x2,
1879 		.cache_mode = 0,
1880 		.dis_cap_alloc = true,
1881 		.retain_on_pc = true,
1882 		.activate_on_init = true,
1883 	}, {
1884 		.usecase_id = LLCC_VIDSC0,
1885 		.slice_id = 2,
1886 		.max_cap = 512,
1887 		.priority = 2,
1888 		.fixed_size = true,
1889 		.res_ways = 0xf0,
1890 		.cache_mode = 0,
1891 		.dis_cap_alloc = true,
1892 		.retain_on_pc = true,
1893 	}, {
1894 		.usecase_id = LLCC_VIDSC1,
1895 		.slice_id = 3,
1896 		.max_cap = 512,
1897 		.priority = 2,
1898 		.fixed_size = true,
1899 		.res_ways = 0xf0,
1900 		.cache_mode = 0,
1901 		.dis_cap_alloc = true,
1902 		.retain_on_pc = true,
1903 	}, {
1904 		.usecase_id = LLCC_ROTATOR,
1905 		.slice_id = 4,
1906 		.max_cap = 563,
1907 		.priority = 2,
1908 		.fixed_size = true,
1909 		.res_ways = 0xe,
1910 		.cache_mode = 2,
1911 		.dis_cap_alloc = true,
1912 		.retain_on_pc = true,
1913 	}, {
1914 		.usecase_id = LLCC_VOICE,
1915 		.slice_id = 5,
1916 		.max_cap = 2816,
1917 		.priority = 1,
1918 		.bonus_ways = 0xffc,
1919 		.res_ways = 0x2,
1920 		.cache_mode = 0,
1921 		.dis_cap_alloc = true,
1922 		.retain_on_pc = true,
1923 	}, {
1924 		.usecase_id = LLCC_AUDIO,
1925 		.slice_id = 6,
1926 		.max_cap = 2816,
1927 		.priority = 1,
1928 		.bonus_ways = 0xffc,
1929 		.res_ways = 0x2,
1930 		.cache_mode = 0,
1931 		.dis_cap_alloc = true,
1932 		.retain_on_pc = true,
1933 	}, {
1934 		.usecase_id = LLCC_MDMHPGRW,
1935 		.slice_id = 7,
1936 		.max_cap = 1024,
1937 		.priority = 2,
1938 		.bonus_ways = 0xfc,
1939 		.res_ways = 0xf00,
1940 		.cache_mode = 0,
1941 		.dis_cap_alloc = true,
1942 		.retain_on_pc = true,
1943 	}, {
1944 		.usecase_id = LLCC_MDM,
1945 		.slice_id = 8,
1946 		.max_cap = 2816,
1947 		.priority = 1,
1948 		.bonus_ways = 0xffc,
1949 		.res_ways = 0x2,
1950 		.cache_mode = 0,
1951 		.dis_cap_alloc = true,
1952 		.retain_on_pc = true,
1953 	}, {
1954 		.usecase_id = LLCC_CMPT,
1955 		.slice_id = 10,
1956 		.max_cap = 2816,
1957 		.priority = 1,
1958 		.bonus_ways = 0xffc,
1959 		.res_ways = 0x2,
1960 		.cache_mode = 0,
1961 		.dis_cap_alloc = true,
1962 		.retain_on_pc = true,
1963 	}, {
1964 		.usecase_id = LLCC_GPUHTW,
1965 		.slice_id = 11,
1966 		.max_cap = 512,
1967 		.priority = 1,
1968 		.fixed_size = true,
1969 		.bonus_ways = 0xc,
1970 		.cache_mode = 0,
1971 		.dis_cap_alloc = true,
1972 		.retain_on_pc = true,
1973 	}, {
1974 		.usecase_id = LLCC_GPU,
1975 		.slice_id = 12,
1976 		.max_cap = 2304,
1977 		.priority = 1,
1978 		.bonus_ways = 0xff0,
1979 		.res_ways = 0x2,
1980 		.cache_mode = 0,
1981 		.dis_cap_alloc = true,
1982 		.retain_on_pc = true,
1983 	}, {
1984 		.usecase_id = LLCC_MMUHWT,
1985 		.slice_id = 13,
1986 		.max_cap = 256,
1987 		.priority = 2,
1988 		.res_ways = 0x1,
1989 		.cache_mode = 0,
1990 		.dis_cap_alloc = true,
1991 		.activate_on_init = true,
1992 	}, {
1993 		.usecase_id = LLCC_CMPTDMA,
1994 		.slice_id = 15,
1995 		.max_cap = 2816,
1996 		.priority = 1,
1997 		.bonus_ways = 0xffc,
1998 		.res_ways = 0x2,
1999 		.cache_mode = 0,
2000 		.dis_cap_alloc = true,
2001 		.retain_on_pc = true,
2002 	}, {
2003 		.usecase_id = LLCC_DISP,
2004 		.slice_id = 16,
2005 		.max_cap = 2816,
2006 		.priority = 1,
2007 		.bonus_ways = 0xffc,
2008 		.res_ways = 0x2,
2009 		.cache_mode = 0,
2010 		.dis_cap_alloc = true,
2011 		.retain_on_pc = true,
2012 	}, {
2013 		.usecase_id = LLCC_VIDFW,
2014 		.slice_id = 17,
2015 		.max_cap = 2816,
2016 		.priority = 1,
2017 		.bonus_ways = 0xffc,
2018 		.res_ways = 0x2,
2019 		.cache_mode = 0,
2020 		.dis_cap_alloc = true,
2021 		.retain_on_pc = true,
2022 	}, {
2023 		.usecase_id = LLCC_MDMHPFX,
2024 		.slice_id = 20,
2025 		.max_cap = 1024,
2026 		.priority = 2,
2027 		.fixed_size = true,
2028 		.res_ways = 0xf00,
2029 		.cache_mode = 0,
2030 		.dis_cap_alloc = true,
2031 		.retain_on_pc = true,
2032 	}, {
2033 		.usecase_id = LLCC_MDMPNG,
2034 		.slice_id = 21,
2035 		.max_cap = 1024,
2036 		.priority = 0,
2037 		.fixed_size = true,
2038 		.bonus_ways = 0x1e,
2039 		.cache_mode = 0,
2040 		.dis_cap_alloc = true,
2041 		.retain_on_pc = true,
2042 	}, {
2043 		.usecase_id = LLCC_AUDHW,
2044 		.slice_id = 22,
2045 		.max_cap = 1024,
2046 		.priority = 1,
2047 		.fixed_size = true,
2048 		.bonus_ways = 0xffc,
2049 		.res_ways = 0x2,
2050 		.cache_mode = 0,
2051 		.dis_cap_alloc = true,
2052 		.retain_on_pc = true,
2053 	},
2054 };
2055 
2056 static const struct llcc_slice_config sm6350_data[] =  {
2057 	{
2058 		.usecase_id = LLCC_CPUSS,
2059 		.slice_id = 1,
2060 		.max_cap = 768,
2061 		.priority = 1,
2062 		.bonus_ways = 0xfff,
2063 		.cache_mode = 0,
2064 		.activate_on_init = true,
2065 		.write_scid_en = true,
2066 	}, {
2067 		.usecase_id = LLCC_MDM,
2068 		.slice_id = 8,
2069 		.max_cap = 512,
2070 		.priority = 2,
2071 		.bonus_ways = 0xfff,
2072 		.cache_mode = 0,
2073 		.activate_on_init = true,
2074 	}, {
2075 		.usecase_id = LLCC_GPUHTW,
2076 		.slice_id = 11,
2077 		.max_cap = 256,
2078 		.priority = 1,
2079 		.bonus_ways = 0xfff,
2080 		.cache_mode = 0,
2081 		.activate_on_init = true,
2082 	}, {
2083 		.usecase_id = LLCC_GPU,
2084 		.slice_id = 12,
2085 		.max_cap = 512,
2086 		.priority = 1,
2087 		.bonus_ways = 0xfff,
2088 		.cache_mode = 0,
2089 		.activate_on_init = true,
2090 	}, {
2091 		.usecase_id = LLCC_MDMPNG,
2092 		.slice_id = 21,
2093 		.max_cap = 768,
2094 		.priority = 0,
2095 		.fixed_size = true,
2096 		.bonus_ways = 0xfff,
2097 		.cache_mode = 0,
2098 		.activate_on_init = true,
2099 	}, {
2100 		.usecase_id = LLCC_NPU,
2101 		.slice_id = 23,
2102 		.max_cap = 768,
2103 		.priority = 1,
2104 		.bonus_ways = 0xfff,
2105 		.cache_mode = 0,
2106 		.activate_on_init = true,
2107 	}, {
2108 		.usecase_id = LLCC_MODPE,
2109 		.slice_id = 29,
2110 		.max_cap = 64,
2111 		.priority = 1,
2112 		.fixed_size = true,
2113 		.bonus_ways = 0xfff,
2114 		.cache_mode = 0,
2115 		.activate_on_init = true,
2116 	},
2117 };
2118 
2119 static const struct llcc_slice_config sm7150_data[] =  {
2120 	{
2121 		.usecase_id = LLCC_CPUSS,
2122 		.slice_id = 1,
2123 		.max_cap = 512,
2124 		.priority = 1,
2125 		.bonus_ways = 0xf,
2126 		.cache_mode = 0,
2127 		.retain_on_pc = true,
2128 		.activate_on_init = true,
2129 	}, {
2130 		.usecase_id = LLCC_MDM,
2131 		.slice_id = 8,
2132 		.max_cap = 128,
2133 		.priority = 2,
2134 		.bonus_ways = 0xf,
2135 		.cache_mode = 0,
2136 		.retain_on_pc = true,
2137 	}, {
2138 		.usecase_id = LLCC_GPUHTW,
2139 		.slice_id = 11,
2140 		.max_cap = 256,
2141 		.priority = 1,
2142 		.fixed_size = true,
2143 		.bonus_ways = 0xf,
2144 		.cache_mode = 0,
2145 		.retain_on_pc = true,
2146 	}, {
2147 		.usecase_id = LLCC_GPU,
2148 		.slice_id = 12,
2149 		.max_cap = 256,
2150 		.priority = 1,
2151 		.fixed_size = true,
2152 		.bonus_ways = 0xf,
2153 		.cache_mode = 0,
2154 		.retain_on_pc = true,
2155 	}, {
2156 		.usecase_id = LLCC_NPU,
2157 		.slice_id = 23,
2158 		.max_cap = 512,
2159 		.priority = 1,
2160 		.bonus_ways = 0xf,
2161 		.cache_mode = 0,
2162 		.retain_on_pc = true,
2163 	},
2164 };
2165 
2166 static const struct llcc_slice_config sm8150_data[] =  {
2167 	{
2168 		.usecase_id = LLCC_CPUSS,
2169 		.slice_id = 1,
2170 		.max_cap = 3072,
2171 		.priority = 1,
2172 		.fixed_size = true,
2173 		.bonus_ways = 0xfff,
2174 		.cache_mode = 0,
2175 		.retain_on_pc = true,
2176 		.activate_on_init = true,
2177 	}, {
2178 		.usecase_id = LLCC_VIDSC0,
2179 		.slice_id = 2,
2180 		.max_cap = 512,
2181 		.priority = 2,
2182 		.fixed_size = true,
2183 		.bonus_ways = 0xfff,
2184 		.cache_mode = 0,
2185 		.retain_on_pc = true,
2186 	}, {
2187 		.usecase_id = LLCC_VIDSC1,
2188 		.slice_id = 3,
2189 		.max_cap = 512,
2190 		.priority = 2,
2191 		.fixed_size = true,
2192 		.bonus_ways = 0xfff,
2193 		.cache_mode = 0,
2194 		.retain_on_pc = true,
2195 	}, {
2196 		.usecase_id = LLCC_AUDIO,
2197 		.slice_id = 6,
2198 		.max_cap = 1024,
2199 		.priority = 1,
2200 		.fixed_size = true,
2201 		.bonus_ways = 0xfff,
2202 		.cache_mode = 0,
2203 		.retain_on_pc = true,
2204 	}, {
2205 		.usecase_id = LLCC_MDMHPGRW,
2206 		.slice_id = 7,
2207 		.max_cap = 3072,
2208 		.priority = 1,
2209 		.bonus_ways = 0xff,
2210 		.res_ways = 0xf00,
2211 		.cache_mode = 0,
2212 		.retain_on_pc = true,
2213 	}, {
2214 		.usecase_id = LLCC_MDM,
2215 		.slice_id = 8,
2216 		.max_cap = 3072,
2217 		.priority = 1,
2218 		.fixed_size = true,
2219 		.bonus_ways = 0xfff,
2220 		.cache_mode = 0,
2221 		.retain_on_pc = true,
2222 	}, {
2223 		.usecase_id = LLCC_MODHW,
2224 		.slice_id = 9,
2225 		.max_cap = 1024,
2226 		.priority = 1,
2227 		.fixed_size = true,
2228 		.bonus_ways = 0xfff,
2229 		.cache_mode = 0,
2230 		.retain_on_pc = true,
2231 	}, {
2232 		.usecase_id = LLCC_CMPT,
2233 		.slice_id = 10,
2234 		.max_cap = 3072,
2235 		.priority = 1,
2236 		.fixed_size = true,
2237 		.bonus_ways = 0xfff,
2238 		.cache_mode = 0,
2239 		.retain_on_pc = true,
2240 	}, {
2241 		.usecase_id = LLCC_GPUHTW,
2242 		.slice_id = 11,
2243 		.max_cap = 512,
2244 		.priority = 1,
2245 		.fixed_size = true,
2246 		.bonus_ways = 0xfff,
2247 		.cache_mode = 0,
2248 		.retain_on_pc = true,
2249 	}, {
2250 		.usecase_id = LLCC_GPU,
2251 		.slice_id = 12,
2252 		.max_cap = 2560,
2253 		.priority = 1,
2254 		.fixed_size = true,
2255 		.bonus_ways = 0xfff,
2256 		.cache_mode = 0,
2257 		.retain_on_pc = true,
2258 	}, {
2259 		.usecase_id = LLCC_MMUHWT,
2260 		.slice_id = 13,
2261 		.max_cap = 1024,
2262 		.priority = 1,
2263 		.fixed_size = true,
2264 		.bonus_ways = 0xfff,
2265 		.cache_mode = 0,
2266 		.activate_on_init = true,
2267 	}, {
2268 		.usecase_id = LLCC_CMPTDMA,
2269 		.slice_id = 15,
2270 		.max_cap = 3072,
2271 		.priority = 1,
2272 		.fixed_size = true,
2273 		.bonus_ways = 0xfff,
2274 		.cache_mode = 0,
2275 		.retain_on_pc = true,
2276 	}, {
2277 		.usecase_id = LLCC_DISP,
2278 		.slice_id = 16,
2279 		.max_cap = 3072,
2280 		.priority = 1,
2281 		.fixed_size = true,
2282 		.bonus_ways = 0xfff,
2283 		.cache_mode = 0,
2284 		.retain_on_pc = true,
2285 	}, {
2286 		.usecase_id = LLCC_MDMHPFX,
2287 		.slice_id = 20,
2288 		.max_cap = 1024,
2289 		.priority = 2,
2290 		.fixed_size = true,
2291 		.bonus_ways = 0xfff,
2292 		.cache_mode = 0,
2293 		.retain_on_pc = true,
2294 	}, {
2295 		.usecase_id = LLCC_MDMHPFX,
2296 		.slice_id = 21,
2297 		.max_cap = 1024,
2298 		.priority = 0,
2299 		.fixed_size = true,
2300 		.bonus_ways = 0xf,
2301 		.cache_mode = 0,
2302 		.retain_on_pc = true,
2303 	}, {
2304 		.usecase_id = LLCC_AUDHW,
2305 		.slice_id = 22,
2306 		.max_cap = 1024,
2307 		.priority = 1,
2308 		.fixed_size = true,
2309 		.bonus_ways = 0xfff,
2310 		.cache_mode = 0,
2311 		.retain_on_pc = true,
2312 	}, {
2313 		.usecase_id = LLCC_NPU,
2314 		.slice_id = 23,
2315 		.max_cap = 3072,
2316 		.priority = 1,
2317 		.fixed_size = true,
2318 		.bonus_ways = 0xfff,
2319 		.cache_mode = 0,
2320 		.retain_on_pc = true,
2321 	}, {
2322 		.usecase_id = LLCC_WLHW,
2323 		.slice_id = 24,
2324 		.max_cap = 3072,
2325 		.priority = 1,
2326 		.fixed_size = true,
2327 		.bonus_ways = 0xfff,
2328 		.cache_mode = 0,
2329 		.retain_on_pc = true,
2330 	}, {
2331 		.usecase_id = LLCC_MODPE,
2332 		.slice_id = 29,
2333 		.max_cap = 256,
2334 		.priority = 1,
2335 		.fixed_size = true,
2336 		.bonus_ways = 0xf,
2337 		.cache_mode = 0,
2338 		.retain_on_pc = true,
2339 	}, {
2340 		.usecase_id = LLCC_APTCM,
2341 		.slice_id = 30,
2342 		.max_cap = 256,
2343 		.priority = 3,
2344 		.fixed_size = true,
2345 		.res_ways = 0x1,
2346 		.cache_mode = 1,
2347 		.retain_on_pc = true,
2348 	}, {
2349 		.usecase_id = LLCC_WRCACHE,
2350 		.slice_id = 31,
2351 		.max_cap = 128,
2352 		.priority = 1,
2353 		.fixed_size = true,
2354 		.bonus_ways = 0xfff,
2355 		.cache_mode = 0,
2356 	},
2357 };
2358 
2359 static const struct llcc_slice_config sm8250_data[] =  {
2360 	{
2361 		.usecase_id = LLCC_CPUSS,
2362 		.slice_id = 1,
2363 		.max_cap = 3072,
2364 		.priority = 1,
2365 		.fixed_size = true,
2366 		.bonus_ways = 0xfff,
2367 		.cache_mode = 0,
2368 		.retain_on_pc = true,
2369 		.activate_on_init = true,
2370 	}, {
2371 		.usecase_id = LLCC_VIDSC0,
2372 		.slice_id = 2,
2373 		.max_cap = 512,
2374 		.priority = 3,
2375 		.fixed_size = true,
2376 		.bonus_ways = 0xfff,
2377 		.cache_mode = 0,
2378 		.retain_on_pc = true,
2379 	}, {
2380 		.usecase_id = LLCC_AUDIO,
2381 		.slice_id = 6,
2382 		.max_cap = 1024,
2383 		.priority = 1,
2384 		.bonus_ways = 0xfff,
2385 		.cache_mode = 0,
2386 	}, {
2387 		.usecase_id = LLCC_CMPT,
2388 		.slice_id = 10,
2389 		.max_cap = 1024,
2390 		.priority = 1,
2391 		.bonus_ways = 0xfff,
2392 		.cache_mode = 0,
2393 	}, {
2394 		.usecase_id = LLCC_GPUHTW,
2395 		.slice_id = 11,
2396 		.max_cap = 1024,
2397 		.priority = 1,
2398 		.fixed_size = true,
2399 		.bonus_ways = 0xfff,
2400 		.cache_mode = 0,
2401 		.retain_on_pc = true,
2402 	}, {
2403 		.usecase_id = LLCC_GPU,
2404 		.slice_id = 12,
2405 		.max_cap = 1024,
2406 		.priority = 1,
2407 		.bonus_ways = 0xfff,
2408 		.cache_mode = 0,
2409 		.retain_on_pc = true,
2410 		.write_scid_en = true,
2411 	}, {
2412 		.usecase_id = LLCC_MMUHWT,
2413 		.slice_id = 13,
2414 		.max_cap = 1024,
2415 		.priority = 1,
2416 		.fixed_size = true,
2417 		.bonus_ways = 0xfff,
2418 		.cache_mode = 0,
2419 		.activate_on_init = true,
2420 	}, {
2421 		.usecase_id = LLCC_CMPTDMA,
2422 		.slice_id = 15,
2423 		.max_cap = 1024,
2424 		.priority = 1,
2425 		.bonus_ways = 0xfff,
2426 		.cache_mode = 0,
2427 		.retain_on_pc = true,
2428 	}, {
2429 		.usecase_id = LLCC_DISP,
2430 		.slice_id = 16,
2431 		.max_cap = 3072,
2432 		.priority = 1,
2433 		.fixed_size = true,
2434 		.bonus_ways = 0xfff,
2435 		.cache_mode = 0,
2436 		.retain_on_pc = true,
2437 	}, {
2438 		.usecase_id = LLCC_VIDFW,
2439 		.slice_id = 17,
2440 		.max_cap = 512,
2441 		.priority = 1,
2442 		.bonus_ways = 0xfff,
2443 		.cache_mode = 0,
2444 		.retain_on_pc = true,
2445 	}, {
2446 		.usecase_id = LLCC_AUDHW,
2447 		.slice_id = 22,
2448 		.max_cap = 1024,
2449 		.priority = 1,
2450 		.fixed_size = true,
2451 		.bonus_ways = 0xfff,
2452 		.cache_mode = 0,
2453 		.retain_on_pc = true,
2454 	}, {
2455 		.usecase_id = LLCC_NPU,
2456 		.slice_id = 23,
2457 		.max_cap = 3072,
2458 		.priority = 1,
2459 		.fixed_size = true,
2460 		.bonus_ways = 0xfff,
2461 		.cache_mode = 0,
2462 		.retain_on_pc = true,
2463 	}, {
2464 		.usecase_id = LLCC_WLHW,
2465 		.slice_id = 24,
2466 		.max_cap = 1024,
2467 		.priority = 1,
2468 		.bonus_ways = 0xfff,
2469 		.cache_mode = 0,
2470 		.retain_on_pc = true,
2471 	}, {
2472 		.usecase_id = LLCC_CVP,
2473 		.slice_id = 28,
2474 		.max_cap = 256,
2475 		.priority = 3,
2476 		.fixed_size = true,
2477 		.bonus_ways = 0xfff,
2478 		.cache_mode = 0,
2479 		.retain_on_pc = true,
2480 	}, {
2481 		.usecase_id = LLCC_APTCM,
2482 		.slice_id = 30,
2483 		.max_cap = 128,
2484 		.priority = 3,
2485 		.res_ways = 0x3,
2486 		.cache_mode = 1,
2487 		.retain_on_pc = true,
2488 	}, {
2489 		.usecase_id = LLCC_WRCACHE,
2490 		.slice_id = 31,
2491 		.max_cap = 256,
2492 		.priority = 1,
2493 		.fixed_size = true,
2494 		.bonus_ways = 0xfff,
2495 		.cache_mode = 0,
2496 		.activate_on_init = true,
2497 	},
2498 };
2499 
2500 static const struct llcc_slice_config sm8350_data[] =  {
2501 	{
2502 		.usecase_id = LLCC_CPUSS,
2503 		.slice_id = 1,
2504 		.max_cap = 3072,
2505 		.priority = 1,
2506 		.fixed_size = true,
2507 		.bonus_ways = 0xfff,
2508 		.cache_mode = 0,
2509 		.activate_on_init = true,
2510 		.write_scid_en = true,
2511 	}, {
2512 		.usecase_id = LLCC_VIDSC0,
2513 		.slice_id = 2,
2514 		.max_cap = 512,
2515 		.priority = 3,
2516 		.fixed_size = true,
2517 		.bonus_ways = 0xfff,
2518 		.cache_mode = 0,
2519 		.activate_on_init = true,
2520 	}, {
2521 		.usecase_id = LLCC_AUDIO,
2522 		.slice_id = 6,
2523 		.max_cap = 1024,
2524 		.priority = 1,
2525 		.fixed_size = true,
2526 		.bonus_ways = 0xfff,
2527 		.cache_mode = 0,
2528 	}, {
2529 		.usecase_id = LLCC_MDMHPGRW,
2530 		.slice_id = 7,
2531 		.max_cap = 1024,
2532 		.priority = 3,
2533 		.bonus_ways = 0xfff,
2534 		.cache_mode = 0,
2535 		.activate_on_init = true,
2536 	}, {
2537 		.usecase_id = LLCC_MODHW,
2538 		.slice_id = 9,
2539 		.max_cap = 1024,
2540 		.priority = 1,
2541 		.fixed_size = true,
2542 		.bonus_ways = 0xfff,
2543 		.cache_mode = 0,
2544 		.activate_on_init = true,
2545 	}, {
2546 		.usecase_id = LLCC_CMPT,
2547 		.slice_id = 10,
2548 		.max_cap = 3072,
2549 		.priority = 1,
2550 		.fixed_size = true,
2551 		.bonus_ways = 0xfff,
2552 		.cache_mode = 0,
2553 		.activate_on_init = true,
2554 	}, {
2555 		.usecase_id = LLCC_GPUHTW,
2556 		.slice_id = 11,
2557 		.max_cap = 1024,
2558 		.priority = 1,
2559 		.fixed_size = true,
2560 		.bonus_ways = 0xfff,
2561 		.cache_mode = 0,
2562 		.activate_on_init = true,
2563 	}, {
2564 		.usecase_id = LLCC_GPU,
2565 		.slice_id = 12,
2566 		.max_cap = 1024,
2567 		.priority = 1,
2568 		.bonus_ways = 0xfff,
2569 		.cache_mode = 0,
2570 		.retain_on_pc = true,
2571 		.activate_on_init = true,
2572 	}, {
2573 		.usecase_id = LLCC_MMUHWT,
2574 		.slice_id = 13,
2575 		.max_cap = 1024,
2576 		.priority = 1,
2577 		.fixed_size = true,
2578 		.bonus_ways = 0xfff,
2579 		.cache_mode = 0,
2580 		.write_scid_en = true,
2581 	}, {
2582 		.usecase_id = LLCC_DISP,
2583 		.slice_id = 16,
2584 		.max_cap = 3072,
2585 		.priority = 2,
2586 		.fixed_size = true,
2587 		.bonus_ways = 0xfff,
2588 		.cache_mode = 0,
2589 		.activate_on_init = true,
2590 	}, {
2591 		.usecase_id = LLCC_MDMPNG,
2592 		.slice_id = 21,
2593 		.max_cap = 1024,
2594 		.priority = 0,
2595 		.fixed_size = true,
2596 		.bonus_ways = 0xf,
2597 		.cache_mode = 0,
2598 		.activate_on_init = true,
2599 	}, {
2600 		.usecase_id = LLCC_AUDHW,
2601 		.slice_id = 22,
2602 		.max_cap = 1024,
2603 		.priority = 1,
2604 		.fixed_size = true,
2605 		.bonus_ways = 0xfff,
2606 		.cache_mode = 0,
2607 		.activate_on_init = true,
2608 	}, {
2609 		.usecase_id = LLCC_CVP,
2610 		.slice_id = 28,
2611 		.max_cap = 512,
2612 		.priority = 3,
2613 		.fixed_size = true,
2614 		.bonus_ways = 0xfff,
2615 		.cache_mode = 0,
2616 		.activate_on_init = true,
2617 	}, {
2618 		.usecase_id = LLCC_MODPE,
2619 		.slice_id = 29,
2620 		.max_cap = 256,
2621 		.priority = 1,
2622 		.fixed_size = true,
2623 		.bonus_ways = 0xf,
2624 		.cache_mode = 0,
2625 		.activate_on_init = true,
2626 	}, {
2627 		.usecase_id = LLCC_APTCM,
2628 		.slice_id = 30,
2629 		.max_cap = 1024,
2630 		.priority = 3,
2631 		.fixed_size = true,
2632 		.res_ways = 0x1,
2633 		.cache_mode = 1,
2634 		.activate_on_init = true,
2635 	}, {
2636 		.usecase_id = LLCC_WRCACHE,
2637 		.slice_id = 31,
2638 		.max_cap = 512,
2639 		.priority = 1,
2640 		.fixed_size = true,
2641 		.bonus_ways = 0xfff,
2642 		.cache_mode = 0,
2643 		.write_scid_en = true,
2644 	}, {
2645 		.usecase_id = LLCC_CVPFW,
2646 		.slice_id = 17,
2647 		.max_cap = 512,
2648 		.priority = 1,
2649 		.bonus_ways = 0xfff,
2650 		.cache_mode = 0,
2651 		.activate_on_init = true,
2652 	}, {
2653 		.usecase_id = LLCC_CPUSS1,
2654 		.slice_id = 3,
2655 		.max_cap = 1024,
2656 		.priority = 1,
2657 		.fixed_size = true,
2658 		.bonus_ways = 0xfff,
2659 		.cache_mode = 0,
2660 		.activate_on_init = true,
2661 	}, {
2662 		.usecase_id = LLCC_CPUHWT,
2663 		.slice_id = 5,
2664 		.max_cap = 512,
2665 		.priority = 1,
2666 		.fixed_size = true,
2667 		.bonus_ways = 0xfff,
2668 		.cache_mode = 0,
2669 		.write_scid_en = true,
2670 	},
2671 };
2672 
2673 static const struct llcc_slice_config sm8450_data[] =  {
2674 	{
2675 		.usecase_id = LLCC_CPUSS,
2676 		.slice_id = 1,
2677 		.max_cap = 3072,
2678 		.priority = 1,
2679 		.bonus_ways = 0xffff,
2680 		.cache_mode = 0,
2681 		.retain_on_pc = true,
2682 		.activate_on_init = true,
2683 	}, {
2684 		.usecase_id = LLCC_VIDSC0,
2685 		.slice_id = 2,
2686 		.max_cap = 512,
2687 		.priority = 3,
2688 		.fixed_size = true,
2689 		.bonus_ways = 0xffff,
2690 		.cache_mode = 0,
2691 		.retain_on_pc = true,
2692 	}, {
2693 		.usecase_id = LLCC_AUDIO,
2694 		.slice_id = 6,
2695 		.max_cap = 1024,
2696 		.priority = 1,
2697 		.fixed_size = true,
2698 		.bonus_ways = 0xffff,
2699 		.cache_mode = 0,
2700 	}, {
2701 		.usecase_id = LLCC_MDMHPGRW,
2702 		.slice_id = 7,
2703 		.max_cap = 1024,
2704 		.priority = 3,
2705 		.bonus_ways = 0xffff,
2706 		.cache_mode = 0,
2707 		.retain_on_pc = true,
2708 	}, {
2709 		.usecase_id = LLCC_MODHW,
2710 		.slice_id = 9,
2711 		.max_cap = 1024,
2712 		.priority = 1,
2713 		.fixed_size = true,
2714 		.bonus_ways = 0xffff,
2715 		.cache_mode = 0,
2716 		.retain_on_pc = true,
2717 	}, {
2718 		.usecase_id = LLCC_CMPT,
2719 		.slice_id = 10,
2720 		.max_cap = 4096,
2721 		.priority = 1,
2722 		.fixed_size = true,
2723 		.bonus_ways = 0xffff,
2724 		.cache_mode = 0,
2725 		.retain_on_pc = true,
2726 	}, {
2727 		.usecase_id = LLCC_GPUHTW,
2728 		.slice_id = 11,
2729 		.max_cap = 512,
2730 		.priority = 1,
2731 		.fixed_size = true,
2732 		.bonus_ways = 0xffff,
2733 		.cache_mode = 0,
2734 		.retain_on_pc = true,
2735 	}, {
2736 		.usecase_id = LLCC_GPU,
2737 		.slice_id = 12,
2738 		.max_cap = 2048,
2739 		.priority = 1,
2740 		.fixed_size = true,
2741 		.bonus_ways = 0xffff,
2742 		.cache_mode = 0,
2743 		.retain_on_pc = true,
2744 		.write_scid_en = true,
2745 	}, {
2746 		.usecase_id = LLCC_MMUHWT,
2747 		.slice_id = 13,
2748 		.max_cap = 768,
2749 		.priority = 1,
2750 		.fixed_size = true,
2751 		.bonus_ways = 0xffff,
2752 		.cache_mode = 0,
2753 		.activate_on_init = true,
2754 	}, {
2755 		.usecase_id = LLCC_DISP,
2756 		.slice_id = 16,
2757 		.max_cap = 4096,
2758 		.priority = 2,
2759 		.fixed_size = true,
2760 		.bonus_ways = 0xffff,
2761 		.cache_mode = 0,
2762 		.retain_on_pc = true,
2763 	}, {
2764 		.usecase_id = LLCC_MDMPNG,
2765 		.slice_id = 21,
2766 		.max_cap = 1024,
2767 		.priority = 1,
2768 		.fixed_size = true,
2769 		.bonus_ways = 0xf000,
2770 		.cache_mode = 0,
2771 		.retain_on_pc = true,
2772 	}, {
2773 		.usecase_id = LLCC_AUDHW,
2774 		.slice_id = 22,
2775 		.max_cap = 1024,
2776 		.priority = 1,
2777 		.fixed_size = true,
2778 		.bonus_ways = 0xffff,
2779 		.cache_mode = 0,
2780 	}, {
2781 		.usecase_id = LLCC_CVP,
2782 		.slice_id = 28,
2783 		.max_cap = 256,
2784 		.priority = 3,
2785 		.fixed_size = true,
2786 		.bonus_ways = 0xffff,
2787 		.cache_mode = 0,
2788 		.retain_on_pc = true,
2789 	}, {
2790 		.usecase_id = LLCC_MODPE,
2791 		.slice_id = 29,
2792 		.max_cap = 64,
2793 		.priority = 1,
2794 		.fixed_size = true,
2795 		.bonus_ways = 0xf000,
2796 		.cache_mode = 0,
2797 		.retain_on_pc = true,
2798 	}, {
2799 		.usecase_id = LLCC_APTCM,
2800 		.slice_id = 30,
2801 		.max_cap = 1024,
2802 		.priority = 3,
2803 		.fixed_size = true,
2804 		.res_ways = 0xf0,
2805 		.cache_mode = 1,
2806 		.retain_on_pc = true,
2807 	}, {
2808 		.usecase_id = LLCC_WRCACHE,
2809 		.slice_id = 31,
2810 		.max_cap = 512,
2811 		.priority = 1,
2812 		.fixed_size = true,
2813 		.bonus_ways = 0xffff,
2814 		.cache_mode = 0,
2815 		.activate_on_init = true,
2816 	}, {
2817 		.usecase_id = LLCC_CVPFW,
2818 		.slice_id = 17,
2819 		.max_cap = 512,
2820 		.priority = 1,
2821 		.fixed_size = true,
2822 		.bonus_ways = 0xffff,
2823 		.cache_mode = 0,
2824 		.retain_on_pc = true,
2825 	}, {
2826 		.usecase_id = LLCC_CPUSS1,
2827 		.slice_id = 3,
2828 		.max_cap = 1024,
2829 		.priority = 1,
2830 		.fixed_size = true,
2831 		.bonus_ways = 0xffff,
2832 		.cache_mode = 0,
2833 		.retain_on_pc = true,
2834 	}, {
2835 		.usecase_id = LLCC_CAMEXP0,
2836 		.slice_id = 4,
2837 		.max_cap = 256,
2838 		.priority = 3,
2839 		.fixed_size = true,
2840 		.bonus_ways = 0xffff,
2841 		.cache_mode = 0,
2842 		.retain_on_pc = true,
2843 	}, {
2844 		.usecase_id = LLCC_CPUMTE,
2845 		.slice_id = 23,
2846 		.max_cap = 256,
2847 		.priority = 1,
2848 		.fixed_size = true,
2849 		.bonus_ways = 0xfff,
2850 		.cache_mode = 0,
2851 		.activate_on_init = true,
2852 	}, {
2853 		.usecase_id = LLCC_CPUHWT,
2854 		.slice_id = 5,
2855 		.max_cap = 512,
2856 		.priority = 1,
2857 		.fixed_size = true,
2858 		.bonus_ways = 0xffff,
2859 		.cache_mode = 0,
2860 		.retain_on_pc = true,
2861 		.activate_on_init = true,
2862 	}, {
2863 		.usecase_id = LLCC_CAMEXP1,
2864 		.slice_id = 27,
2865 		.max_cap = 256,
2866 		.priority = 3,
2867 		.fixed_size = true,
2868 		.bonus_ways = 0xffff,
2869 		.cache_mode = 0,
2870 		.retain_on_pc = true,
2871 	}, {
2872 		.usecase_id = LLCC_AENPU,
2873 		.slice_id = 8,
2874 		.max_cap = 2048,
2875 		.priority = 1,
2876 		.fixed_size = true,
2877 		.bonus_ways = 0xffff,
2878 		.cache_mode = 0,
2879 	},
2880 };
2881 
2882 static const struct llcc_slice_config sm8550_data[] =  {
2883 	{
2884 		.usecase_id = LLCC_CPUSS,
2885 		.slice_id = 1,
2886 		.max_cap = 5120,
2887 		.priority = 1,
2888 		.bonus_ways = 0xffffff,
2889 		.cache_mode = 0,
2890 		.activate_on_init = true,
2891 		.write_scid_en = true,
2892 	}, {
2893 		.usecase_id = LLCC_VIDSC0,
2894 		.slice_id = 2,
2895 		.max_cap = 512,
2896 		.priority = 4,
2897 		.fixed_size = true,
2898 		.bonus_ways = 0xffffff,
2899 		.cache_mode = 0,
2900 	}, {
2901 		.usecase_id = LLCC_AUDIO,
2902 		.slice_id = 6,
2903 		.max_cap = 1024,
2904 		.priority = 1,
2905 		.fixed_size = true,
2906 		.bonus_ways = 0xffffff,
2907 		.cache_mode = 0,
2908 	}, {
2909 		.usecase_id = LLCC_MDMHPGRW,
2910 		.slice_id = 25,
2911 		.max_cap = 1024,
2912 		.priority = 4,
2913 		.bonus_ways = 0xffffff,
2914 		.cache_mode = 0,
2915 	}, {
2916 		.usecase_id = LLCC_MODHW,
2917 		.slice_id = 26,
2918 		.max_cap = 1024,
2919 		.priority = 1,
2920 		.fixed_size = true,
2921 		.bonus_ways = 0xffffff,
2922 		.cache_mode = 0,
2923 	}, {
2924 		.usecase_id = LLCC_CMPT,
2925 		.slice_id = 10,
2926 		.max_cap = 4096,
2927 		.priority = 1,
2928 		.fixed_size = true,
2929 		.bonus_ways = 0xffffff,
2930 		.cache_mode = 0,
2931 	}, {
2932 		.usecase_id = LLCC_GPUHTW,
2933 		.slice_id = 11,
2934 		.max_cap = 512,
2935 		.priority = 1,
2936 		.fixed_size = true,
2937 		.bonus_ways = 0xffffff,
2938 		.cache_mode = 0,
2939 	}, {
2940 		.usecase_id = LLCC_GPU,
2941 		.slice_id = 9,
2942 		.max_cap = 3096,
2943 		.priority = 1,
2944 		.bonus_ways = 0xffffff,
2945 		.cache_mode = 0,
2946 		.write_scid_en = true,
2947 		.write_scid_cacheable_en = true,
2948 	}, {
2949 		.usecase_id = LLCC_MMUHWT,
2950 		.slice_id = 18,
2951 		.max_cap = 768,
2952 		.priority = 1,
2953 		.fixed_size = true,
2954 		.bonus_ways = 0xffffff,
2955 		.cache_mode = 0,
2956 		.activate_on_init = true,
2957 	}, {
2958 		.usecase_id = LLCC_DISP,
2959 		.slice_id = 16,
2960 		.max_cap = 6144,
2961 		.priority = 1,
2962 		.fixed_size = true,
2963 		.bonus_ways = 0xffffff,
2964 		.cache_mode = 2,
2965 	}, {
2966 		.usecase_id = LLCC_MDMPNG,
2967 		.slice_id = 27,
2968 		.max_cap = 1024,
2969 		.priority = 0,
2970 		.fixed_size = true,
2971 		.bonus_ways = 0xf00000,
2972 		.cache_mode = 0,
2973 	}, {
2974 		.usecase_id = LLCC_AUDHW,
2975 		.slice_id = 22,
2976 		.max_cap = 1024,
2977 		.priority = 1,
2978 		.fixed_size = true,
2979 		.bonus_ways = 0xffffff,
2980 		.cache_mode = 0,
2981 	}, {
2982 		.usecase_id = LLCC_CVP,
2983 		.slice_id = 8,
2984 		.max_cap = 256,
2985 		.priority = 4,
2986 		.fixed_size = true,
2987 		.bonus_ways = 0xffffff,
2988 		.cache_mode = 0,
2989 	}, {
2990 		.usecase_id = LLCC_MODPE,
2991 		.slice_id = 29,
2992 		.max_cap = 64,
2993 		.priority = 1,
2994 		.fixed_size = true,
2995 		.bonus_ways = 0xf00000,
2996 		.cache_mode = 0,
2997 		.alloc_oneway_en = true,
2998 		.vict_prio = true,
2999 	}, {
3000 		.usecase_id = LLCC_WRCACHE,
3001 		.slice_id = 31,
3002 		.max_cap = 512,
3003 		.priority = 1,
3004 		.fixed_size = true,
3005 		.bonus_ways = 0xffffff,
3006 		.cache_mode = 0,
3007 		.activate_on_init = true,
3008 	}, {
3009 		.usecase_id = LLCC_CAMEXP0,
3010 		.slice_id = 4,
3011 		.max_cap = 256,
3012 		.priority = 4,
3013 		.fixed_size = true,
3014 		.bonus_ways = 0xf,
3015 		.cache_mode = 0,
3016 	}, {
3017 		.usecase_id = LLCC_CPUHWT,
3018 		.slice_id = 5,
3019 		.max_cap = 512,
3020 		.priority = 1,
3021 		.fixed_size = true,
3022 		.bonus_ways = 0xffffff,
3023 		.cache_mode = 0,
3024 		.activate_on_init = true,
3025 	}, {
3026 		.usecase_id = LLCC_CAMEXP1,
3027 		.slice_id = 7,
3028 		.max_cap = 3200,
3029 		.priority = 3,
3030 		.fixed_size = true,
3031 		.bonus_ways = 0xfffff0,
3032 		.cache_mode = 2,
3033 	}, {
3034 		.usecase_id = LLCC_CMPTHCP,
3035 		.slice_id = 17,
3036 		.max_cap = 256,
3037 		.priority = 4,
3038 		.fixed_size = true,
3039 		.bonus_ways = 0xffffff,
3040 		.cache_mode = 0,
3041 	}, {
3042 		.usecase_id = LLCC_LCPDARE,
3043 		.slice_id = 30,
3044 		.max_cap = 128,
3045 		.priority = 4,
3046 		.fixed_size = true,
3047 		.bonus_ways = 0xffffff,
3048 		.cache_mode = 0,
3049 		.activate_on_init = true,
3050 		.alloc_oneway_en = true,
3051 		.vict_prio = true,
3052 	}, {
3053 		.usecase_id = LLCC_AENPU,
3054 		.slice_id = 3,
3055 		.max_cap = 3072,
3056 		.priority = 1,
3057 		.fixed_size = true,
3058 		.bonus_ways = 0xfe01ff,
3059 		.cache_mode = 2,
3060 	}, {
3061 		.usecase_id = LLCC_ISLAND1,
3062 		.slice_id = 12,
3063 		.max_cap = 1792,
3064 		.priority = 7,
3065 		.fixed_size = true,
3066 		.bonus_ways = 0xfe00,
3067 		.cache_mode = 0,
3068 	}, {
3069 		.usecase_id = LLCC_ISLAND4,
3070 		.slice_id = 15,
3071 		.max_cap = 256,
3072 		.priority = 7,
3073 		.fixed_size = true,
3074 		.bonus_ways = 0x10000,
3075 		.cache_mode = 0,
3076 	}, {
3077 		.usecase_id = LLCC_CAMEXP2,
3078 		.slice_id = 19,
3079 		.max_cap = 3200,
3080 		.priority = 3,
3081 		.fixed_size = true,
3082 		.bonus_ways = 0xfffff0,
3083 		.cache_mode = 2,
3084 	}, {
3085 		.usecase_id = LLCC_CAMEXP3,
3086 		.slice_id = 20,
3087 		.max_cap = 3200,
3088 		.priority = 2,
3089 		.fixed_size = true,
3090 		.bonus_ways = 0xfffff0,
3091 		.cache_mode = 2,
3092 	}, {
3093 		.usecase_id = LLCC_CAMEXP4,
3094 		.slice_id = 21,
3095 		.max_cap = 3200,
3096 		.priority = 2,
3097 		.fixed_size = true,
3098 		.bonus_ways = 0xfffff0,
3099 		.cache_mode = 2,
3100 	}, {
3101 		.usecase_id = LLCC_DISP_WB,
3102 		.slice_id = 23,
3103 		.max_cap = 1024,
3104 		.priority = 4,
3105 		.fixed_size = true,
3106 		.bonus_ways = 0xffffff,
3107 		.cache_mode = 0,
3108 	}, {
3109 		.usecase_id = LLCC_DISP_1,
3110 		.slice_id = 24,
3111 		.max_cap = 6144,
3112 		.priority = 1,
3113 		.fixed_size = true,
3114 		.bonus_ways = 0xffffff,
3115 		.cache_mode = 2,
3116 	}, {
3117 		.usecase_id = LLCC_VIDVSP,
3118 		.slice_id = 28,
3119 		.max_cap = 256,
3120 		.priority = 4,
3121 		.fixed_size = true,
3122 		.bonus_ways = 0xffffff,
3123 		.cache_mode = 0,
3124 	},
3125 };
3126 
3127 static const struct llcc_slice_config sm8650_data[] = {
3128 	{
3129 		.usecase_id = LLCC_CPUSS,
3130 		.slice_id = 1,
3131 		.max_cap = 5120,
3132 		.priority = 1,
3133 		.bonus_ways = 0xffffff,
3134 		.cache_mode = 0,
3135 		.activate_on_init = true,
3136 		.stale_en = true,
3137 	}, {
3138 		.usecase_id = LLCC_VIDSC0,
3139 		.slice_id = 2,
3140 		.max_cap = 512,
3141 		.priority = 3,
3142 		.fixed_size = true,
3143 		.bonus_ways = 0xffffff,
3144 		.cache_mode = 0,
3145 	}, {
3146 		.usecase_id = LLCC_AUDIO,
3147 		.slice_id = 6,
3148 		.max_cap = 512,
3149 		.priority = 1,
3150 		.fixed_size = true,
3151 		.bonus_ways = 0xffffff,
3152 		.cache_mode = 0,
3153 	}, {
3154 		.usecase_id = LLCC_MDMHPGRW,
3155 		.slice_id = 25,
3156 		.max_cap = 1024,
3157 		.priority = 3,
3158 		.bonus_ways = 0xffffff,
3159 		.cache_mode = 0,
3160 	}, {
3161 		.usecase_id = LLCC_MODHW,
3162 		.slice_id = 26,
3163 		.max_cap = 1024,
3164 		.priority = 1,
3165 		.fixed_size = true,
3166 		.bonus_ways = 0xffffff,
3167 		.cache_mode = 0,
3168 	}, {
3169 		.usecase_id = LLCC_CMPT,
3170 		.slice_id = 10,
3171 		.max_cap = 4096,
3172 		.priority = 1,
3173 		.fixed_size = true,
3174 		.bonus_ways = 0xffffff,
3175 		.cache_mode = 0,
3176 	}, {
3177 		.usecase_id = LLCC_GPUHTW,
3178 		.slice_id = 11,
3179 		.max_cap = 512,
3180 		.priority = 1,
3181 		.fixed_size = true,
3182 		.bonus_ways = 0xffffff,
3183 		.cache_mode = 0,
3184 	}, {
3185 		.usecase_id = LLCC_GPU,
3186 		.slice_id = 9,
3187 		.max_cap = 3096,
3188 		.priority = 1,
3189 		.bonus_ways = 0xffffff,
3190 		.cache_mode = 0,
3191 		.write_scid_en = true,
3192 		.write_scid_cacheable_en = true,
3193 	}, {
3194 		.usecase_id = LLCC_MMUHWT,
3195 		.slice_id = 18,
3196 		.max_cap = 768,
3197 		.priority = 1,
3198 		.fixed_size = true,
3199 		.bonus_ways = 0xffffff,
3200 		.cache_mode = 0,
3201 		.activate_on_init = true,
3202 	}, {
3203 		.usecase_id = LLCC_DISP,
3204 		.slice_id = 16,
3205 		.max_cap = 6144,
3206 		.priority = 1,
3207 		.fixed_size = true,
3208 		.bonus_ways = 0xffffff,
3209 		.cache_mode = 2,
3210 	}, {
3211 		.usecase_id = LLCC_MDMHPFX,
3212 		.slice_id = 24,
3213 		.max_cap = 1024,
3214 		.priority = 3,
3215 		.fixed_size = true,
3216 		.bonus_ways = 0xffffff,
3217 		.cache_mode = 0,
3218 	}, {
3219 		.usecase_id = LLCC_MDMPNG,
3220 		.slice_id = 27,
3221 		.max_cap = 1024,
3222 		.priority = 0,
3223 		.fixed_size = true,
3224 		.cache_mode = 0,
3225 	}, {
3226 		.usecase_id = LLCC_AUDHW,
3227 		.slice_id = 22,
3228 		.max_cap = 1024,
3229 		.priority = 1,
3230 		.fixed_size = true,
3231 		.bonus_ways = 0xffffff,
3232 		.cache_mode = 0,
3233 	}, {
3234 		.usecase_id = LLCC_CVP,
3235 		.slice_id = 8,
3236 		.max_cap = 256,
3237 		.priority = 3,
3238 		.fixed_size = true,
3239 		.bonus_ways = 0xffffff,
3240 		.cache_mode = 0,
3241 	}, {
3242 		.usecase_id = LLCC_MODPE,
3243 		.slice_id = 29,
3244 		.max_cap = 128,
3245 		.priority = 1,
3246 		.fixed_size = true,
3247 		.bonus_ways = 0xf00000,
3248 		.cache_mode = 0,
3249 		.alloc_oneway_en = true,
3250 	}, {
3251 		.usecase_id = LLCC_WRCACHE,
3252 		.slice_id = 31,
3253 		.max_cap = 512,
3254 		.priority = 1,
3255 		.fixed_size = true,
3256 		.bonus_ways = 0xffffff,
3257 		.cache_mode = 0,
3258 		.activate_on_init = true,
3259 	}, {
3260 		.usecase_id = LLCC_CAMEXP0,
3261 		.slice_id = 4,
3262 		.max_cap = 256,
3263 		.priority = 3,
3264 		.fixed_size = true,
3265 		.bonus_ways = 0xf,
3266 		.cache_mode = 0,
3267 	}, {
3268 		.usecase_id = LLCC_CAMEXP1,
3269 		.slice_id = 7,
3270 		.max_cap = 3200,
3271 		.priority = 3,
3272 		.fixed_size = true,
3273 		.bonus_ways = 0xfffff0,
3274 		.cache_mode = 2,
3275 	}, {
3276 		.usecase_id = LLCC_CMPTHCP,
3277 		.slice_id = 17,
3278 		.max_cap = 256,
3279 		.priority = 3,
3280 		.fixed_size = true,
3281 		.bonus_ways = 0xffffff,
3282 		.cache_mode = 0,
3283 	}, {
3284 		.usecase_id = LLCC_LCPDARE,
3285 		.slice_id = 30,
3286 		.max_cap = 128,
3287 		.priority = 3,
3288 		.fixed_size = true,
3289 		.bonus_ways = 0xffffff,
3290 		.cache_mode = 0,
3291 		.activate_on_init = true,
3292 		.alloc_oneway_en = true,
3293 	}, {
3294 		.usecase_id = LLCC_AENPU,
3295 		.slice_id = 3,
3296 		.max_cap = 3072,
3297 		.priority = 1,
3298 		.fixed_size = true,
3299 		.bonus_ways = 0xffffff,
3300 		.cache_mode = 2,
3301 	}, {
3302 		.usecase_id = LLCC_ISLAND1,
3303 		.slice_id = 12,
3304 		.max_cap = 5888,
3305 		.priority = 7,
3306 		.fixed_size = true,
3307 		.res_ways = 0x7fffff,
3308 		.cache_mode = 0,
3309 	}, {
3310 		.usecase_id = LLCC_DISP_WB,
3311 		.slice_id = 23,
3312 		.max_cap = 1024,
3313 		.priority = 3,
3314 		.fixed_size = true,
3315 		.bonus_ways = 0xffffff,
3316 		.cache_mode = 0,
3317 	}, {
3318 		.usecase_id = LLCC_VIDVSP,
3319 		.slice_id = 28,
3320 		.max_cap = 256,
3321 		.priority = 3,
3322 		.fixed_size = true,
3323 		.bonus_ways = 0xffffff,
3324 		.cache_mode = 0,
3325 	},
3326 };
3327 
3328 static const struct llcc_slice_config sm8750_data[] = {
3329 	{
3330 		.usecase_id = LLCC_CPUSS,
3331 		.slice_id = 1,
3332 		.max_cap = 5120,
3333 		.priority = 1,
3334 		.bonus_ways = 0xffffffff,
3335 		.activate_on_init = true,
3336 		.write_scid_en = true,
3337 	}, {
3338 		.usecase_id = LLCC_MDMHPFX,
3339 		.slice_id = 24,
3340 		.max_cap = 1024,
3341 		.priority = 5,
3342 		.fixed_size = true,
3343 		.bonus_ways = 0xffffffff,
3344 	}, {
3345 		.usecase_id = LLCC_VIDSC0,
3346 		.slice_id = 2,
3347 		.max_cap = 512,
3348 		.priority = 4,
3349 		.fixed_size = true,
3350 		.bonus_ways = 0xffffffff,
3351 	}, {
3352 		.usecase_id = LLCC_AUDIO,
3353 		.slice_id = 35,
3354 		.max_cap = 512,
3355 		.priority = 1,
3356 		.fixed_size = true,
3357 		.bonus_ways = 0xffffffff,
3358 	}, {
3359 		.usecase_id = LLCC_MDMHPGRW,
3360 		.slice_id = 25,
3361 		.max_cap = 1024,
3362 		.priority = 5,
3363 		.bonus_ways = 0xffffffff,
3364 	}, {
3365 		.usecase_id = LLCC_MODHW,
3366 		.slice_id = 26,
3367 		.max_cap = 1024,
3368 		.priority = 1,
3369 		.fixed_size = true,
3370 		.bonus_ways = 0xffffffff,
3371 	}, {
3372 		.usecase_id = LLCC_CMPT,
3373 		.slice_id = 34,
3374 		.max_cap = 4096,
3375 		.priority = 1,
3376 		.fixed_size = true,
3377 		.bonus_ways = 0xffffffff,
3378 	}, {
3379 		.usecase_id = LLCC_GPUHTW,
3380 		.slice_id = 11,
3381 		.max_cap = 512,
3382 		.priority = 1,
3383 		.fixed_size = true,
3384 		.bonus_ways = 0xffffffff,
3385 	}, {
3386 		.usecase_id = LLCC_GPU,
3387 		.slice_id = 9,
3388 		.max_cap = 5632,
3389 		.priority = 1,
3390 		.fixed_size = true,
3391 		.bonus_ways = 0xffffffff,
3392 		.write_scid_en = true,
3393 		.write_scid_cacheable_en = true
3394 	}, {
3395 		.usecase_id = LLCC_MMUHWT,
3396 		.slice_id = 18,
3397 		.max_cap = 768,
3398 		.priority = 1,
3399 		.fixed_size = true,
3400 		.bonus_ways = 0xffffffff,
3401 		.activate_on_init = true,
3402 	}, {
3403 		.usecase_id = LLCC_DISP,
3404 		.slice_id = 16,
3405 		.max_cap = 7168,
3406 		.priority = 1,
3407 		.fixed_size = true,
3408 		.bonus_ways = 0xffffffff,
3409 		.cache_mode = 2,
3410 		.stale_en = true,
3411 	}, {
3412 		.usecase_id = LLCC_VIDFW,
3413 		.slice_id = 17,
3414 		.priority = 4,
3415 		.fixed_size = true,
3416 		.bonus_ways = 0xffffffff,
3417 	}, {
3418 		.usecase_id = LLCC_CAMFW,
3419 		.slice_id = 20,
3420 		.priority = 4,
3421 		.fixed_size = true,
3422 		.bonus_ways = 0xffffffff,
3423 	}, {
3424 		.usecase_id = LLCC_MDMPNG,
3425 		.slice_id = 27,
3426 		.max_cap = 256,
3427 		.priority = 5,
3428 		.fixed_size = true,
3429 		.bonus_ways = 0xf0000000,
3430 	}, {
3431 		.usecase_id = LLCC_AUDHW,
3432 		.slice_id = 22,
3433 		.max_cap = 512,
3434 		.priority = 1,
3435 		.fixed_size = true,
3436 		.bonus_ways = 0xffffffff,
3437 	}, {
3438 		.usecase_id = LLCC_CVP,
3439 		.slice_id = 8,
3440 		.max_cap = 800,
3441 		.priority = 5,
3442 		.fixed_size = true,
3443 		.bonus_ways = 0xffffffff,
3444 		.vict_prio = true,
3445 	}, {
3446 		.usecase_id = LLCC_MODPE,
3447 		.slice_id = 29,
3448 		.max_cap = 256,
3449 		.priority = 1,
3450 		.fixed_size = true,
3451 		.bonus_ways = 0xf0000000,
3452 		.alloc_oneway_en = true,
3453 	}, {
3454 		.usecase_id = LLCC_WRCACHE,
3455 		.slice_id = 31,
3456 		.max_cap = 512,
3457 		.priority = 1,
3458 		.fixed_size = true,
3459 		.bonus_ways = 0xffffffff,
3460 		.activate_on_init = true,
3461 	}, {
3462 		.usecase_id = LLCC_CVPFW,
3463 		.slice_id = 19,
3464 		.max_cap = 64,
3465 		.priority = 4,
3466 		.fixed_size = true,
3467 		.bonus_ways = 0xffffffff,
3468 	}, {
3469 		.usecase_id = LLCC_CMPTHCP,
3470 		.slice_id = 15,
3471 		.max_cap = 256,
3472 		.priority = 4,
3473 		.fixed_size = true,
3474 		.bonus_ways = 0xffffffff,
3475 	}, {
3476 		.usecase_id = LLCC_LCPDARE,
3477 		.slice_id = 30,
3478 		.max_cap = 128,
3479 		.priority = 5,
3480 		.fixed_size = true,
3481 		.bonus_ways = 0xffffffff,
3482 		.activate_on_init = true,
3483 		.alloc_oneway_en = true,
3484 	}, {
3485 		.usecase_id = LLCC_AENPU,
3486 		.slice_id = 3,
3487 		.max_cap = 3072,
3488 		.priority = 1,
3489 		.fixed_size = true,
3490 		.bonus_ways = 0xffffffff,
3491 		.cache_mode = 2,
3492 	}, {
3493 		.usecase_id = LLCC_ISLAND1,
3494 		.slice_id = 12,
3495 		.max_cap = 7936,
3496 		.priority = 7,
3497 		.fixed_size = true,
3498 		.bonus_ways = 0x7fffffff,
3499 	}, {
3500 		.usecase_id = LLCC_DISP_WB,
3501 		.slice_id = 23,
3502 		.max_cap = 512,
3503 		.priority = 4,
3504 		.fixed_size = true,
3505 		.bonus_ways = 0xffffffff,
3506 	}, {
3507 		.usecase_id = LLCC_VIDVSP,
3508 		.slice_id = 4,
3509 		.max_cap = 256,
3510 		.priority = 4,
3511 		.fixed_size = true,
3512 		.bonus_ways = 0xffffffff,
3513 	}, {
3514 		.usecase_id = LLCC_VIDDEC,
3515 		.slice_id = 5,
3516 		.max_cap = 6144,
3517 		.priority = 4,
3518 		.fixed_size = true,
3519 		.bonus_ways = 0xffffffff,
3520 		.cache_mode = 2,
3521 		.ovcap_prio = true,
3522 		.parent_slice_id = 33,
3523 	}, {
3524 		.usecase_id = LLCC_CAMOFE,
3525 		.slice_id = 33,
3526 		.max_cap = 6144,
3527 		.priority = 4,
3528 		.fixed_size = true,
3529 		.bonus_ways = 0xffffffff,
3530 		.stale_en = true,
3531 		.ovcap_prio = true,
3532 		.parent_slice_id = 33,
3533 	}, {
3534 		.usecase_id = LLCC_CAMRTIP,
3535 		.slice_id = 13,
3536 		.max_cap = 1024,
3537 		.priority = 4,
3538 		.fixed_size = true,
3539 		.bonus_ways = 0xffffffff,
3540 		.stale_en = true,
3541 		.ovcap_prio = true,
3542 		.parent_slice_id = 33,
3543 	}, {
3544 		.usecase_id = LLCC_CAMSRTIP,
3545 		.slice_id = 14,
3546 		.max_cap = 6144,
3547 		.priority = 4,
3548 		.fixed_size = true,
3549 		.bonus_ways = 0xffffffff,
3550 		.stale_en = true,
3551 		.ovcap_prio = true,
3552 		.parent_slice_id = 33,
3553 	}, {
3554 		.usecase_id = LLCC_CAMRTRF,
3555 		.slice_id = 7,
3556 		.max_cap = 3584,
3557 		.priority = 1,
3558 		.fixed_size = true,
3559 		.bonus_ways = 0xffffffff,
3560 		.stale_en = true,
3561 		.ovcap_prio = true,
3562 		.parent_slice_id = 33,
3563 	}, {
3564 		.usecase_id = LLCC_CAMSRTRF,
3565 		.slice_id = 21,
3566 		.max_cap = 6144,
3567 		.priority = 1,
3568 		.fixed_size = true,
3569 		.bonus_ways = 0xffffffff,
3570 		.stale_en = true,
3571 		.ovcap_prio = true,
3572 		.parent_slice_id = 33,
3573 	}, {
3574 		.usecase_id = LLCC_CPUSSMPAM,
3575 		.slice_id = 6,
3576 		.max_cap = 2048,
3577 		.priority = 1,
3578 		.fixed_size = true,
3579 		.bonus_ways = 0xffffffff,
3580 		.activate_on_init = true,
3581 		.write_scid_en = true,
3582 	},
3583 };
3584 
3585 static const struct llcc_slice_config qcs615_data[] = {
3586 	{
3587 		.usecase_id = LLCC_CPUSS,
3588 		.slice_id = 1,
3589 		.max_cap = 128,
3590 		.priority = 1,
3591 		.bonus_ways = 0xf,
3592 		.cache_mode = 0,
3593 		.activate_on_init = true,
3594 		.write_scid_en = true,
3595 	}, {
3596 		.usecase_id = LLCC_MDM,
3597 		.slice_id = 8,
3598 		.max_cap = 256,
3599 		.priority = 0,
3600 		.fixed_size = true,
3601 		.bonus_ways = 0xf,
3602 		.cache_mode = 0,
3603 		.activate_on_init = true,
3604 	}, {
3605 		.usecase_id = LLCC_GPUHTW,
3606 		.slice_id = 11,
3607 		.max_cap = 128,
3608 		.priority = 1,
3609 		.fixed_size = true,
3610 		.bonus_ways = 0xf,
3611 		.cache_mode = 0,
3612 		.activate_on_init = true,
3613 	}, {
3614 		.usecase_id = LLCC_GPU,
3615 		.slice_id = 12,
3616 		.max_cap = 128,
3617 		.priority = 1,
3618 		.bonus_ways = 0xf,
3619 		.cache_mode = 0,
3620 		.activate_on_init = true,
3621 	},
3622 };
3623 
3624 static const struct llcc_slice_config qcs8300_data[] = {
3625 	{
3626 		.usecase_id = LLCC_GPUHTW,
3627 		.slice_id = 11,
3628 		.max_cap = 128,
3629 		.priority = 1,
3630 		.fixed_size = true,
3631 		.bonus_ways = 0xf,
3632 		.cache_mode = 0,
3633 		.retain_on_pc = true,
3634 	}, {
3635 		.usecase_id = LLCC_GPU,
3636 		.slice_id = 12,
3637 		.max_cap = 512,
3638 		.priority = 1,
3639 		.fixed_size = true,
3640 		.bonus_ways = 0xf,
3641 		.cache_mode = 0,
3642 		.retain_on_pc = true,
3643 		.write_scid_en = true,
3644 	}, {
3645 		.usecase_id = LLCC_MMUHWT,
3646 		.slice_id = 13,
3647 		.max_cap = 128,
3648 		.priority = 1,
3649 		.fixed_size = true,
3650 		.bonus_ways = 0xf,
3651 		.cache_mode = 0,
3652 		.activate_on_init = true,
3653 	}, {
3654 		.usecase_id = LLCC_ECC,
3655 		.slice_id = 26,
3656 		.max_cap = 256,
3657 		.priority = 3,
3658 		.fixed_size = true,
3659 		.bonus_ways = 0xf,
3660 		.cache_mode = 0,
3661 		.activate_on_init = true,
3662 	}, {
3663 		.usecase_id = LLCC_WRCACHE,
3664 		.slice_id = 31,
3665 		.max_cap = 128,
3666 		.priority = 1,
3667 		.fixed_size = true,
3668 		.bonus_ways = 0xf,
3669 		.cache_mode = 0,
3670 		.activate_on_init = true,
3671 	},
3672 };
3673 
3674 static const struct llcc_slice_config qdu1000_data_2ch[] = {
3675 	{
3676 		.usecase_id = LLCC_MDMHPGRW,
3677 		.slice_id = 7,
3678 		.max_cap = 512,
3679 		.priority = 1,
3680 		.fixed_size = true,
3681 		.bonus_ways = 0xfff,
3682 		.cache_mode = 0,
3683 		.retain_on_pc = true,
3684 	}, {
3685 		.usecase_id = LLCC_MODHW,
3686 		.slice_id = 9,
3687 		.max_cap = 256,
3688 		.priority = 1,
3689 		.fixed_size = true,
3690 		.bonus_ways = 0xfff,
3691 		.cache_mode = 0,
3692 		.retain_on_pc = true,
3693 	}, {
3694 		.usecase_id = LLCC_MDMPNG,
3695 		.slice_id = 21,
3696 		.max_cap = 256,
3697 		.priority = 0,
3698 		.fixed_size = true,
3699 		.bonus_ways = 0x3,
3700 		.cache_mode = 0,
3701 		.retain_on_pc = true,
3702 	}, {
3703 		.usecase_id = LLCC_ECC,
3704 		.slice_id = 26,
3705 		.max_cap = 512,
3706 		.priority = 3,
3707 		.fixed_size = true,
3708 		.bonus_ways = 0xffc,
3709 		.cache_mode = 0,
3710 		.activate_on_init = true,
3711 	}, {
3712 		.usecase_id = LLCC_MODPE,
3713 		.slice_id = 29,
3714 		.max_cap = 256,
3715 		.priority = 1,
3716 		.fixed_size = true,
3717 		.bonus_ways = 0xfff,
3718 		.cache_mode = 0,
3719 		.retain_on_pc = true,
3720 	}, {
3721 		.usecase_id = LLCC_APTCM,
3722 		.slice_id = 30,
3723 		.max_cap = 256,
3724 		.priority = 3,
3725 		.fixed_size = true,
3726 		.res_ways = 0xc,
3727 		.cache_mode = 1,
3728 		.retain_on_pc = true,
3729 	}, {
3730 		.usecase_id = LLCC_WRCACHE,
3731 		.slice_id = 31,
3732 		.max_cap = 128,
3733 		.priority = 1,
3734 		.fixed_size = true,
3735 		.bonus_ways = 0x3,
3736 		.cache_mode = 0,
3737 		.activate_on_init = true,
3738 	},
3739 };
3740 
3741 static const struct llcc_slice_config qdu1000_data_4ch[] = {
3742 	{
3743 		.usecase_id = LLCC_MDMHPGRW,
3744 		.slice_id = 7,
3745 		.max_cap = 1024,
3746 		.priority = 1,
3747 		.fixed_size = true,
3748 		.bonus_ways = 0xfff,
3749 		.cache_mode = 0,
3750 		.retain_on_pc = true,
3751 	}, {
3752 		.usecase_id = LLCC_MODHW,
3753 		.slice_id = 9,
3754 		.max_cap = 512,
3755 		.priority = 1,
3756 		.fixed_size = true,
3757 		.bonus_ways = 0xfff,
3758 		.cache_mode = 0,
3759 		.retain_on_pc = true,
3760 	}, {
3761 		.usecase_id = LLCC_MDMPNG,
3762 		.slice_id = 21,
3763 		.max_cap = 512,
3764 		.priority = 0,
3765 		.fixed_size = true,
3766 		.bonus_ways = 0x3,
3767 		.cache_mode = 0,
3768 		.retain_on_pc = true,
3769 	}, {
3770 		.usecase_id = LLCC_ECC,
3771 		.slice_id = 26,
3772 		.max_cap = 1024,
3773 		.priority = 3,
3774 		.fixed_size = true,
3775 		.bonus_ways = 0xffc,
3776 		.cache_mode = 0,
3777 		.activate_on_init = true,
3778 	}, {
3779 		.usecase_id = LLCC_MODPE,
3780 		.slice_id = 29,
3781 		.max_cap = 512,
3782 		.priority = 1,
3783 		.fixed_size = true,
3784 		.bonus_ways = 0xfff,
3785 		.cache_mode = 0,
3786 		.retain_on_pc = true,
3787 	}, {
3788 		.usecase_id = LLCC_APTCM,
3789 		.slice_id = 30,
3790 		.max_cap = 512,
3791 		.priority = 3,
3792 		.fixed_size = true,
3793 		.res_ways = 0xc,
3794 		.cache_mode = 1,
3795 		.retain_on_pc = true,
3796 	}, {
3797 		.usecase_id = LLCC_WRCACHE,
3798 		.slice_id = 31,
3799 		.max_cap = 256,
3800 		.priority = 1,
3801 		.fixed_size = true,
3802 		.bonus_ways = 0x3,
3803 		.cache_mode = 0,
3804 		.activate_on_init = true,
3805 	},
3806 };
3807 
3808 static const struct llcc_slice_config qdu1000_data_8ch[] = {
3809 	{
3810 		.usecase_id = LLCC_MDMHPGRW,
3811 		.slice_id = 7,
3812 		.max_cap = 2048,
3813 		.priority = 1,
3814 		.fixed_size = true,
3815 		.bonus_ways = 0xfff,
3816 		.cache_mode = 0,
3817 		.retain_on_pc = true,
3818 	}, {
3819 		.usecase_id = LLCC_MODHW,
3820 		.slice_id = 9,
3821 		.max_cap = 1024,
3822 		.priority = 1,
3823 		.fixed_size = true,
3824 		.bonus_ways = 0xfff,
3825 		.cache_mode = 0,
3826 		.retain_on_pc = true,
3827 	}, {
3828 		.usecase_id = LLCC_MDMPNG,
3829 		.slice_id = 21,
3830 		.max_cap = 1024,
3831 		.priority = 0,
3832 		.fixed_size = true,
3833 		.bonus_ways = 0x3,
3834 		.cache_mode = 0,
3835 		.retain_on_pc = true,
3836 	}, {
3837 		.usecase_id = LLCC_ECC,
3838 		.slice_id = 26,
3839 		.max_cap = 2048,
3840 		.priority = 3,
3841 		.fixed_size = true,
3842 		.bonus_ways = 0xffc,
3843 		.cache_mode = 0,
3844 		.activate_on_init = true,
3845 	}, {
3846 		.usecase_id = LLCC_MODPE,
3847 		.slice_id = 29,
3848 		.max_cap = 1024,
3849 		.priority = 1,
3850 		.fixed_size = true,
3851 		.bonus_ways = 0xfff,
3852 		.cache_mode = 0,
3853 		.retain_on_pc = true,
3854 	}, {
3855 		.usecase_id = LLCC_APTCM,
3856 		.slice_id = 30,
3857 		.max_cap = 1024,
3858 		.priority = 3,
3859 		.fixed_size = true,
3860 		.res_ways = 0xc,
3861 		.cache_mode = 1,
3862 		.retain_on_pc = true,
3863 	}, {
3864 		.usecase_id = LLCC_WRCACHE,
3865 		.slice_id = 31,
3866 		.max_cap = 512,
3867 		.priority = 1,
3868 		.fixed_size = true,
3869 		.bonus_ways = 0x3,
3870 		.cache_mode = 0,
3871 		.activate_on_init = true,
3872 	},
3873 };
3874 
3875 static const struct llcc_slice_config x1e80100_data[] = {
3876 	{
3877 		.usecase_id = LLCC_CPUSS,
3878 		.slice_id = 1,
3879 		.max_cap = 6144,
3880 		.priority = 1,
3881 		.fixed_size = true,
3882 		.bonus_ways = 0xfff,
3883 		.cache_mode = 0,
3884 		.activate_on_init = true,
3885 	}, {
3886 		.usecase_id = LLCC_VIDSC0,
3887 		.slice_id = 2,
3888 		.max_cap = 512,
3889 		.priority = 4,
3890 		.fixed_size = true,
3891 		.bonus_ways = 0xfff,
3892 		.cache_mode = 0,
3893 	}, {
3894 		.usecase_id = LLCC_AUDIO,
3895 		.slice_id = 6,
3896 		.max_cap = 1024,
3897 		.priority = 1,
3898 		.fixed_size = true,
3899 		.bonus_ways = 0xfff,
3900 		.cache_mode = 0,
3901 	}, {
3902 		.usecase_id = LLCC_CMPT,
3903 		.slice_id = 10,
3904 		.max_cap = 6144,
3905 		.priority = 1,
3906 		.fixed_size = true,
3907 		.bonus_ways = 0xfff,
3908 		.cache_mode = 0,
3909 	}, {
3910 		.usecase_id = LLCC_GPUHTW,
3911 		.slice_id = 11,
3912 		.max_cap = 512,
3913 		.priority = 1,
3914 		.fixed_size = true,
3915 		.bonus_ways = 0xfff,
3916 		.cache_mode = 0,
3917 	}, {
3918 		.usecase_id = LLCC_GPU,
3919 		.slice_id = 9,
3920 		.max_cap = 4608,
3921 		.priority = 1,
3922 		.bonus_ways = 0xfff,
3923 		.cache_mode = 0,
3924 		.write_scid_en = true,
3925 		.write_scid_cacheable_en = true,
3926 		.stale_en = true,
3927 	}, {
3928 		.usecase_id = LLCC_MMUHWT,
3929 		.slice_id = 18,
3930 		.max_cap = 512,
3931 		.priority = 1,
3932 		.fixed_size = true,
3933 		.bonus_ways = 0xfff,
3934 		.cache_mode = 0,
3935 		.activate_on_init = true,
3936 	}, {
3937 		.usecase_id = LLCC_AUDHW,
3938 		.slice_id = 22,
3939 		.max_cap = 1024,
3940 		.priority = 1,
3941 		.fixed_size = true,
3942 		.bonus_ways = 0xfff,
3943 		.cache_mode = 0,
3944 	}, {
3945 		.usecase_id = LLCC_CVP,
3946 		.slice_id = 8,
3947 		.max_cap = 512,
3948 		.priority = 4,
3949 		.fixed_size = true,
3950 		.bonus_ways = 0xfff,
3951 		.cache_mode = 0,
3952 	}, {
3953 		.usecase_id = LLCC_WRCACHE,
3954 		.slice_id = 31,
3955 		.max_cap = 1024,
3956 		.priority = 1,
3957 		.fixed_size = true,
3958 		.bonus_ways = 0xfff,
3959 		.cache_mode = 0,
3960 		.activate_on_init = true,
3961 	}, {
3962 		.usecase_id = LLCC_CAMEXP0,
3963 		.slice_id = 4,
3964 		.max_cap = 256,
3965 		.priority = 4,
3966 		.fixed_size = true,
3967 		.bonus_ways = 0x3,
3968 		.cache_mode = 0,
3969 	}, {
3970 		.usecase_id = LLCC_CAMEXP1,
3971 		.slice_id = 7,
3972 		.max_cap = 3072,
3973 		.priority = 3,
3974 		.fixed_size = true,
3975 		.bonus_ways = 0xffc,
3976 		.cache_mode = 2,
3977 	}, {
3978 		.usecase_id = LLCC_LCPDARE,
3979 		.slice_id = 30,
3980 		.max_cap = 512,
3981 		.priority = 3,
3982 		.fixed_size = true,
3983 		.bonus_ways = 0xfff,
3984 		.cache_mode = 0,
3985 		.activate_on_init = true,
3986 		.alloc_oneway_en = true,
3987 	}, {
3988 		.usecase_id = LLCC_AENPU,
3989 		.slice_id = 3,
3990 		.max_cap = 3072,
3991 		.priority = 1,
3992 		.fixed_size = true,
3993 		.bonus_ways = 0xfff,
3994 		.cache_mode = 2,
3995 	}, {
3996 		.usecase_id = LLCC_ISLAND1,
3997 		.slice_id = 12,
3998 		.max_cap = 2048,
3999 		.priority = 7,
4000 		.fixed_size = true,
4001 		.res_ways = 0xf,
4002 		.cache_mode = 0,
4003 	}, {
4004 		.usecase_id = LLCC_CAMEXP2,
4005 		.slice_id = 19,
4006 		.max_cap = 3072,
4007 		.priority = 3,
4008 		.fixed_size = true,
4009 		.bonus_ways = 0xffc,
4010 		.cache_mode = 2,
4011 	}, {
4012 		.usecase_id = LLCC_CAMEXP3,
4013 		.slice_id = 20,
4014 		.max_cap = 3072,
4015 		.priority = 2,
4016 		.fixed_size = true,
4017 		.bonus_ways = 0xffc,
4018 		.cache_mode = 2,
4019 	}, {
4020 		.usecase_id = LLCC_CAMEXP4,
4021 		.slice_id = 21,
4022 		.max_cap = 3072,
4023 		.priority = 2,
4024 		.fixed_size = true,
4025 		.bonus_ways = 0xffc,
4026 		.cache_mode = 2,
4027 	},
4028 };
4029 
4030 static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = {
4031 	.trp_ecc_error_status0 = 0x20344,
4032 	.trp_ecc_error_status1 = 0x20348,
4033 	.trp_ecc_sb_err_syn0 = 0x2034c,
4034 	.trp_ecc_db_err_syn0 = 0x20370,
4035 	.trp_ecc_error_cntr_clear = 0x20440,
4036 	.trp_interrupt_0_status = 0x20480,
4037 	.trp_interrupt_0_clear = 0x20484,
4038 	.trp_interrupt_0_enable = 0x20488,
4039 
4040 	/* LLCC Common registers */
4041 	.cmn_status0 = 0x3000c,
4042 	.cmn_interrupt_0_enable = 0x3001c,
4043 	.cmn_interrupt_2_enable = 0x3003c,
4044 
4045 	/* LLCC DRP registers */
4046 	.drp_ecc_error_cfg = 0x40000,
4047 	.drp_ecc_error_cntr_clear = 0x40004,
4048 	.drp_interrupt_status = 0x41000,
4049 	.drp_interrupt_clear = 0x41008,
4050 	.drp_interrupt_enable = 0x4100c,
4051 	.drp_ecc_error_status0 = 0x42044,
4052 	.drp_ecc_error_status1 = 0x42048,
4053 	.drp_ecc_sb_err_syn0 = 0x4204c,
4054 	.drp_ecc_db_err_syn0 = 0x42070,
4055 };
4056 
4057 static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = {
4058 	.trp_ecc_error_status0 = 0x20344,
4059 	.trp_ecc_error_status1 = 0x20348,
4060 	.trp_ecc_sb_err_syn0 = 0x2034c,
4061 	.trp_ecc_db_err_syn0 = 0x20370,
4062 	.trp_ecc_error_cntr_clear = 0x20440,
4063 	.trp_interrupt_0_status = 0x20480,
4064 	.trp_interrupt_0_clear = 0x20484,
4065 	.trp_interrupt_0_enable = 0x20488,
4066 
4067 	/* LLCC Common registers */
4068 	.cmn_status0 = 0x3400c,
4069 	.cmn_interrupt_0_enable = 0x3401c,
4070 	.cmn_interrupt_2_enable = 0x3403c,
4071 
4072 	/* LLCC DRP registers */
4073 	.drp_ecc_error_cfg = 0x50000,
4074 	.drp_ecc_error_cntr_clear = 0x50004,
4075 	.drp_interrupt_status = 0x50020,
4076 	.drp_interrupt_clear = 0x50028,
4077 	.drp_interrupt_enable = 0x5002c,
4078 	.drp_ecc_error_status0 = 0x520f4,
4079 	.drp_ecc_error_status1 = 0x520f8,
4080 	.drp_ecc_sb_err_syn0 = 0x520fc,
4081 	.drp_ecc_db_err_syn0 = 0x52120,
4082 };
4083 
4084 static const struct llcc_edac_reg_offset llcc_v6_edac_reg_offset = {
4085 	.trp_ecc_error_status0 = 0x47448,
4086 	.trp_ecc_error_status1 = 0x47450,
4087 	.trp_ecc_sb_err_syn0 = 0x47490,
4088 	.trp_ecc_db_err_syn0 = 0x474d0,
4089 	.trp_ecc_error_cntr_clear = 0x47444,
4090 	.trp_interrupt_0_status = 0x47600,
4091 	.trp_interrupt_0_clear = 0x47604,
4092 	.trp_interrupt_0_enable = 0x47608,
4093 
4094 	/* LLCC Common registers */
4095 	.cmn_status0 = 0x6400c,
4096 	.cmn_interrupt_0_enable = 0x6401c,
4097 	.cmn_interrupt_2_enable = 0x6403c,
4098 
4099 	/* LLCC DRP registers */
4100 	.drp_ecc_error_cfg = 0x80000,
4101 	.drp_ecc_error_cntr_clear = 0x80004,
4102 	.drp_interrupt_status = 0x80020,
4103 	.drp_interrupt_clear = 0x80028,
4104 	.drp_interrupt_enable = 0x8002c,
4105 	.drp_ecc_error_status0 = 0x820f4,
4106 	.drp_ecc_error_status1 = 0x820f8,
4107 	.drp_ecc_sb_err_syn0 = 0x820fc,
4108 	.drp_ecc_db_err_syn0 = 0x82120,
4109 };
4110 
4111 /* LLCC register offset starting from v1.0.0 */
4112 static const u32 llcc_v1_reg_offset[] = {
4113 	[LLCC_COMMON_HW_INFO]	= 0x00030000,
4114 	[LLCC_COMMON_STATUS0]	= 0x0003000c,
4115 };
4116 
4117 /* LLCC register offset starting from v2.0.1 */
4118 static const u32 llcc_v2_1_reg_offset[] = {
4119 	[LLCC_COMMON_HW_INFO]	= 0x00034000,
4120 	[LLCC_COMMON_STATUS0]	= 0x0003400c,
4121 };
4122 
4123 /* LLCC register offset starting from v6.0.0 */
4124 static const u32 llcc_v6_reg_offset[] = {
4125 	[LLCC_COMMON_HW_INFO]	        = 0x00064000,
4126 	[LLCC_COMMON_STATUS0]	        = 0x0006400c,
4127 	[LLCC_TRP_ATTR0_CFG]		= 0x00041000,
4128 	[LLCC_TRP_ATTR1_CFG]		= 0x00041008,
4129 	[LLCC_TRP_ATTR2_CFG]		= 0x00041010,
4130 	[LLCC_TRP_ATTR3_CFG]		= 0x00041014,
4131 	[LLCC_TRP_SID_DIS_CAP_ALLOC]	= 0x00042000,
4132 	[LLCC_TRP_ALGO_STALE_EN]	= 0x00042008,
4133 	[LLCC_TRP_ALGO_STALE_CAP_EN]	= 0x00042010,
4134 	[LLCC_TRP_ALGO_MRU0]		= 0x00042018,
4135 	[LLCC_TRP_ALGO_MRU1]		= 0x00042020,
4136 	[LLCC_TRP_ALGO_ALLOC0]		= 0x00042028,
4137 	[LLCC_TRP_ALGO_ALLOC1]		= 0x00042030,
4138 	[LLCC_TRP_ALGO_ALLOC2]		= 0x00042038,
4139 	[LLCC_TRP_ALGO_ALLOC3]		= 0x00042040,
4140 	[LLCC_TRP_WRS_EN]		= 0x00042080,
4141 	[LLCC_TRP_WRS_CACHEABLE_EN]	= 0x00042088,
4142 };
4143 
4144 static const struct qcom_llcc_config kaanapali_cfg[] = {
4145 	{
4146 		.sct_data	= kaanapali_data,
4147 		.size		= ARRAY_SIZE(kaanapali_data),
4148 		.reg_offset	= llcc_v6_reg_offset,
4149 		.edac_reg_offset = &llcc_v6_edac_reg_offset,
4150 	},
4151 };
4152 
4153 static const struct qcom_llcc_config glymur_cfg[] = {
4154 	{
4155 		.sct_data	= glymur_data,
4156 		.size		= ARRAY_SIZE(glymur_data),
4157 		.reg_offset	= llcc_v6_reg_offset,
4158 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4159 		.no_edac	= true,
4160 	},
4161 };
4162 
4163 static const struct qcom_llcc_config qcs615_cfg[] = {
4164 	{
4165 		.sct_data	= qcs615_data,
4166 		.size		= ARRAY_SIZE(qcs615_data),
4167 		.reg_offset	= llcc_v1_reg_offset,
4168 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4169 	},
4170 };
4171 
4172 static const struct qcom_llcc_config qcs8300_cfg[] = {
4173 	{
4174 		.sct_data	= qcs8300_data,
4175 		.size		= ARRAY_SIZE(qcs8300_data),
4176 		.reg_offset	= llcc_v2_1_reg_offset,
4177 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4178 		.num_banks	= 4,
4179 	},
4180 };
4181 
4182 static const struct qcom_llcc_config qdu1000_cfg[] = {
4183 	{
4184 		.sct_data       = qdu1000_data_8ch,
4185 		.size		= ARRAY_SIZE(qdu1000_data_8ch),
4186 		.reg_offset	= llcc_v2_1_reg_offset,
4187 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4188 	},
4189 	{
4190 		.sct_data       = qdu1000_data_4ch,
4191 		.size           = ARRAY_SIZE(qdu1000_data_4ch),
4192 		.reg_offset     = llcc_v2_1_reg_offset,
4193 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4194 	},
4195 	{
4196 		.sct_data       = qdu1000_data_4ch,
4197 		.size           = ARRAY_SIZE(qdu1000_data_4ch),
4198 		.reg_offset     = llcc_v2_1_reg_offset,
4199 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4200 	},
4201 	{
4202 		.sct_data       = qdu1000_data_2ch,
4203 		.size           = ARRAY_SIZE(qdu1000_data_2ch),
4204 		.reg_offset     = llcc_v2_1_reg_offset,
4205 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4206 	},
4207 };
4208 
4209 static const struct qcom_llcc_config ipq5424_cfg[] = {
4210 	{
4211 		.sct_data       = ipq5424_data,
4212 		.size           = ARRAY_SIZE(ipq5424_data),
4213 		.reg_offset     = llcc_v2_1_reg_offset,
4214 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4215 		.no_broadcast_register = true,
4216 	},
4217 };
4218 
4219 static const struct qcom_llcc_config sa8775p_cfg[] = {
4220 	{
4221 		.sct_data	= sa8775p_data,
4222 		.size		= ARRAY_SIZE(sa8775p_data),
4223 		.reg_offset	= llcc_v2_1_reg_offset,
4224 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4225 	},
4226 };
4227 
4228 static const struct qcom_llcc_config sar1130p_cfg[] = {
4229 	{
4230 		.sct_data	= sar1130p_data,
4231 		.size		= ARRAY_SIZE(sar1130p_data),
4232 		.reg_offset	= llcc_v2_1_reg_offset,
4233 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4234 		.max_cap_shift	= 14,
4235 		.num_banks	= 2,
4236 	},
4237 };
4238 
4239 static const struct qcom_llcc_config sar2130p_cfg[] = {
4240 	{
4241 		.sct_data	= sar2130p_data,
4242 		.size		= ARRAY_SIZE(sar2130p_data),
4243 		.reg_offset	= llcc_v2_1_reg_offset,
4244 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4245 		.max_cap_shift	= 14,
4246 		.num_banks	= 2,
4247 	},
4248 };
4249 
4250 static const struct qcom_llcc_config sc7180_cfg[] = {
4251 	{
4252 		.sct_data	= sc7180_data,
4253 		.size		= ARRAY_SIZE(sc7180_data),
4254 		.reg_offset	= llcc_v1_reg_offset,
4255 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4256 	},
4257 };
4258 
4259 static const struct qcom_llcc_config sc7280_cfg[] = {
4260 	{
4261 		.sct_data	= sc7280_data,
4262 		.size		= ARRAY_SIZE(sc7280_data),
4263 		.reg_offset	= llcc_v1_reg_offset,
4264 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4265 	},
4266 };
4267 
4268 static const struct qcom_llcc_config sc8180x_cfg[] = {
4269 	{
4270 		.sct_data	= sc8180x_data,
4271 		.size		= ARRAY_SIZE(sc8180x_data),
4272 		.reg_offset	= llcc_v1_reg_offset,
4273 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4274 	},
4275 };
4276 
4277 static const struct qcom_llcc_config sc8280xp_cfg[] = {
4278 	{
4279 		.sct_data	= sc8280xp_data,
4280 		.size		= ARRAY_SIZE(sc8280xp_data),
4281 		.reg_offset	= llcc_v1_reg_offset,
4282 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4283 	},
4284 };
4285 
4286 static const struct qcom_llcc_config sdm670_cfg[] = {
4287 	{
4288 		.sct_data	= sdm670_data,
4289 		.size		= ARRAY_SIZE(sdm670_data),
4290 		.skip_llcc_cfg	= true,
4291 		.reg_offset	= llcc_v1_reg_offset,
4292 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4293 		.no_edac	= true,
4294 	},
4295 };
4296 
4297 static const struct qcom_llcc_config sdm845_cfg[] = {
4298 	{
4299 		.sct_data	= sdm845_data,
4300 		.size		= ARRAY_SIZE(sdm845_data),
4301 		.skip_llcc_cfg	= true,
4302 		.reg_offset	= llcc_v1_reg_offset,
4303 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4304 		.no_edac	= true,
4305 	},
4306 };
4307 
4308 static const struct qcom_llcc_config sm6350_cfg[] = {
4309 	{
4310 		.sct_data	= sm6350_data,
4311 		.size		= ARRAY_SIZE(sm6350_data),
4312 		.reg_offset	= llcc_v1_reg_offset,
4313 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4314 	},
4315 };
4316 
4317 static const struct qcom_llcc_config sm7150_cfg[] = {
4318 	{
4319 		.sct_data       = sm7150_data,
4320 		.size           = ARRAY_SIZE(sm7150_data),
4321 		.reg_offset	= llcc_v1_reg_offset,
4322 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4323 	},
4324 };
4325 
4326 static const struct qcom_llcc_config sm8150_cfg[] = {
4327 	{
4328 		.sct_data       = sm8150_data,
4329 		.size           = ARRAY_SIZE(sm8150_data),
4330 		.reg_offset	= llcc_v1_reg_offset,
4331 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4332 	},
4333 };
4334 
4335 static const struct qcom_llcc_config sm8250_cfg[] = {
4336 	{
4337 		.sct_data       = sm8250_data,
4338 		.size           = ARRAY_SIZE(sm8250_data),
4339 		.reg_offset	= llcc_v1_reg_offset,
4340 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4341 	},
4342 };
4343 
4344 static const struct qcom_llcc_config sm8350_cfg[] = {
4345 	{
4346 		.sct_data       = sm8350_data,
4347 		.size           = ARRAY_SIZE(sm8350_data),
4348 		.reg_offset	= llcc_v1_reg_offset,
4349 		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4350 	},
4351 };
4352 
4353 static const struct qcom_llcc_config sm8450_cfg[] = {
4354 	{
4355 		.sct_data       = sm8450_data,
4356 		.size           = ARRAY_SIZE(sm8450_data),
4357 		.reg_offset	= llcc_v2_1_reg_offset,
4358 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4359 	},
4360 };
4361 
4362 static const struct qcom_llcc_config sm8550_cfg[] = {
4363 	{
4364 		.sct_data       = sm8550_data,
4365 		.size           = ARRAY_SIZE(sm8550_data),
4366 		.reg_offset	= llcc_v2_1_reg_offset,
4367 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4368 	},
4369 };
4370 
4371 static const struct qcom_llcc_config sm8650_cfg[] = {
4372 	{
4373 		.sct_data       = sm8650_data,
4374 		.size           = ARRAY_SIZE(sm8650_data),
4375 		.reg_offset	= llcc_v2_1_reg_offset,
4376 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4377 	},
4378 };
4379 
4380 static const struct qcom_llcc_config sm8750_cfg[] = {
4381 	{
4382 		.sct_data		= sm8750_data,
4383 		.size			= ARRAY_SIZE(sm8750_data),
4384 		.skip_llcc_cfg	= false,
4385 		.reg_offset		= llcc_v6_reg_offset,
4386 		.edac_reg_offset = &llcc_v6_edac_reg_offset,
4387 	},
4388 };
4389 
4390 static const struct qcom_llcc_config x1e80100_cfg[] = {
4391 	{
4392 		.sct_data	= x1e80100_data,
4393 		.size		= ARRAY_SIZE(x1e80100_data),
4394 		.reg_offset	= llcc_v2_1_reg_offset,
4395 		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4396 		.irq_configured = true,
4397 	},
4398 };
4399 
4400 static const struct qcom_sct_config kaanapali_cfgs = {
4401 	.llcc_config	= kaanapali_cfg,
4402 	.num_config	= ARRAY_SIZE(kaanapali_cfg),
4403 };
4404 
4405 static const struct qcom_sct_config glymur_cfgs = {
4406 	.llcc_config	= glymur_cfg,
4407 	.num_config	= ARRAY_SIZE(glymur_cfg),
4408 };
4409 
4410 static const struct qcom_sct_config qcs615_cfgs = {
4411 	.llcc_config	= qcs615_cfg,
4412 	.num_config	= ARRAY_SIZE(qcs615_cfg),
4413 };
4414 
4415 static const struct qcom_sct_config qcs8300_cfgs = {
4416 	.llcc_config	= qcs8300_cfg,
4417 	.num_config	= ARRAY_SIZE(qcs8300_cfg),
4418 };
4419 
4420 static const struct qcom_sct_config qdu1000_cfgs = {
4421 	.llcc_config	= qdu1000_cfg,
4422 	.num_config	= ARRAY_SIZE(qdu1000_cfg),
4423 };
4424 
4425 static const struct qcom_sct_config ipq5424_cfgs = {
4426 	.llcc_config	= ipq5424_cfg,
4427 	.num_config	= ARRAY_SIZE(ipq5424_cfg),
4428 };
4429 
4430 static const struct qcom_sct_config sa8775p_cfgs = {
4431 	.llcc_config	= sa8775p_cfg,
4432 	.num_config	= ARRAY_SIZE(sa8775p_cfg),
4433 };
4434 
4435 static const struct qcom_sct_config sar1130p_cfgs = {
4436 	.llcc_config	= sar1130p_cfg,
4437 	.num_config	= ARRAY_SIZE(sar1130p_cfg),
4438 };
4439 
4440 static const struct qcom_sct_config sar2130p_cfgs = {
4441 	.llcc_config	= sar2130p_cfg,
4442 	.num_config	= ARRAY_SIZE(sar2130p_cfg),
4443 };
4444 
4445 static const struct qcom_sct_config sc7180_cfgs = {
4446 	.llcc_config	= sc7180_cfg,
4447 	.num_config	= ARRAY_SIZE(sc7180_cfg),
4448 };
4449 
4450 static const struct qcom_sct_config sc7280_cfgs = {
4451 	.llcc_config	= sc7280_cfg,
4452 	.num_config	= ARRAY_SIZE(sc7280_cfg),
4453 };
4454 
4455 static const struct qcom_sct_config sc8180x_cfgs = {
4456 	.llcc_config	= sc8180x_cfg,
4457 	.num_config	= ARRAY_SIZE(sc8180x_cfg),
4458 };
4459 
4460 static const struct qcom_sct_config sc8280xp_cfgs = {
4461 	.llcc_config	= sc8280xp_cfg,
4462 	.num_config	= ARRAY_SIZE(sc8280xp_cfg),
4463 };
4464 
4465 static const struct qcom_sct_config sdm670_cfgs = {
4466 	.llcc_config	= sdm670_cfg,
4467 	.num_config	= ARRAY_SIZE(sdm670_cfg),
4468 };
4469 
4470 static const struct qcom_sct_config sdm845_cfgs = {
4471 	.llcc_config	= sdm845_cfg,
4472 	.num_config	= ARRAY_SIZE(sdm845_cfg),
4473 };
4474 
4475 static const struct qcom_sct_config sm6350_cfgs = {
4476 	.llcc_config	= sm6350_cfg,
4477 	.num_config	= ARRAY_SIZE(sm6350_cfg),
4478 };
4479 
4480 static const struct qcom_sct_config sm7150_cfgs = {
4481 	.llcc_config	= sm7150_cfg,
4482 	.num_config	= ARRAY_SIZE(sm7150_cfg),
4483 };
4484 
4485 static const struct qcom_sct_config sm8150_cfgs = {
4486 	.llcc_config	= sm8150_cfg,
4487 	.num_config	= ARRAY_SIZE(sm8150_cfg),
4488 };
4489 
4490 static const struct qcom_sct_config sm8250_cfgs = {
4491 	.llcc_config	= sm8250_cfg,
4492 	.num_config	= ARRAY_SIZE(sm8250_cfg),
4493 };
4494 
4495 static const struct qcom_sct_config sm8350_cfgs = {
4496 	.llcc_config	= sm8350_cfg,
4497 	.num_config	= ARRAY_SIZE(sm8350_cfg),
4498 };
4499 
4500 static const struct qcom_sct_config sm8450_cfgs = {
4501 	.llcc_config	= sm8450_cfg,
4502 	.num_config	= ARRAY_SIZE(sm8450_cfg),
4503 };
4504 
4505 static const struct qcom_sct_config sm8550_cfgs = {
4506 	.llcc_config	= sm8550_cfg,
4507 	.num_config	= ARRAY_SIZE(sm8550_cfg),
4508 };
4509 
4510 static const struct qcom_sct_config sm8650_cfgs = {
4511 	.llcc_config	= sm8650_cfg,
4512 	.num_config	= ARRAY_SIZE(sm8650_cfg),
4513 };
4514 
4515 static const struct qcom_sct_config sm8750_cfgs = {
4516 	.llcc_config	= sm8750_cfg,
4517 	.num_config	= ARRAY_SIZE(sm8750_cfg),
4518 };
4519 
4520 static const struct qcom_sct_config x1e80100_cfgs = {
4521 	.llcc_config	= x1e80100_cfg,
4522 	.num_config	= ARRAY_SIZE(x1e80100_cfg),
4523 };
4524 
4525 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
4526 
4527 /**
4528  * llcc_slice_getd - get llcc slice descriptor
4529  * @uid: usecase_id for the client
4530  *
4531  * A pointer to llcc slice descriptor will be returned on success
4532  * and error pointer is returned on failure
4533  */
4534 struct llcc_slice_desc *llcc_slice_getd(u32 uid)
4535 {
4536 	const struct llcc_slice_config *cfg;
4537 	u32 sz, i;
4538 
4539 	if (IS_ERR(drv_data))
4540 		return ERR_CAST(drv_data);
4541 
4542 	cfg = drv_data->cfg;
4543 	sz = drv_data->cfg_size;
4544 
4545 	for (i = 0; cfg && i < sz; i++, cfg++)
4546 		if (cfg->usecase_id == uid)
4547 			break;
4548 
4549 	if (i == sz)
4550 		return ERR_PTR(-ENODEV);
4551 
4552 	return &drv_data->desc[i];
4553 }
4554 EXPORT_SYMBOL_GPL(llcc_slice_getd);
4555 
4556 /**
4557  * llcc_slice_putd - llcc slice descriptor
4558  * @desc: Pointer to llcc slice descriptor
4559  */
4560 void llcc_slice_putd(struct llcc_slice_desc *desc)
4561 {
4562 	if (!IS_ERR_OR_NULL(desc))
4563 		return;
4564 }
4565 EXPORT_SYMBOL_GPL(llcc_slice_putd);
4566 
4567 static int llcc_update_act_ctrl(u32 sid,
4568 				u32 act_ctrl_reg_val, u32 status)
4569 {
4570 	struct regmap *regmap;
4571 	u32 act_ctrl_reg;
4572 	u32 act_clear_reg;
4573 	u32 status_reg;
4574 	u32 slice_status;
4575 	int ret;
4576 
4577 	if (IS_ERR(drv_data))
4578 		return PTR_ERR(drv_data);
4579 
4580 	act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid);
4581 	act_clear_reg = LLCC_TRP_ACT_CLEARn(sid);
4582 	status_reg = LLCC_TRP_STATUSn(sid);
4583 
4584 	/* Set the ACTIVE trigger */
4585 	act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG;
4586 	ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
4587 				act_ctrl_reg_val);
4588 	if (ret)
4589 		return ret;
4590 
4591 	/* Clear the ACTIVE trigger */
4592 	act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG;
4593 	ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
4594 				act_ctrl_reg_val);
4595 	if (ret)
4596 		return ret;
4597 
4598 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4599 		regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
4600 		ret = regmap_read_poll_timeout(regmap, status_reg,
4601 				      slice_status, (slice_status & ACT_COMPLETE),
4602 				      0, LLCC_STATUS_READ_DELAY);
4603 		if (ret)
4604 			return ret;
4605 	}
4606 
4607 	ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
4608 				      slice_status, !(slice_status & status),
4609 				      0, LLCC_STATUS_READ_DELAY);
4610 	if (ret)
4611 		return ret;
4612 
4613 	if (drv_data->version >= LLCC_VERSION_4_1_0_0)
4614 		ret = regmap_write(drv_data->bcast_regmap, act_clear_reg,
4615 					ACT_CLEAR);
4616 
4617 	return ret;
4618 }
4619 
4620 /**
4621  * llcc_slice_activate - Activate the llcc slice
4622  * @desc: Pointer to llcc slice descriptor
4623  *
4624  * A value of zero will be returned on success and a negative errno will
4625  * be returned in error cases
4626  */
4627 int llcc_slice_activate(struct llcc_slice_desc *desc)
4628 {
4629 	int ret;
4630 	u32 act_ctrl_val;
4631 
4632 	if (IS_ERR(drv_data))
4633 		return PTR_ERR(drv_data);
4634 
4635 	if (IS_ERR_OR_NULL(desc))
4636 		return -EINVAL;
4637 
4638 	guard(mutex)(&drv_data->lock);
4639 	/* Already active; try to take another reference. */
4640 	if (refcount_inc_not_zero(&desc->refcount))
4641 		return 0;
4642 
4643 	act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT;
4644 	ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
4645 				  DEACTIVATE);
4646 	if (ret)
4647 		return ret;
4648 
4649 	/* Set first reference */
4650 	refcount_set(&desc->refcount, 1);
4651 
4652 	return 0;
4653 }
4654 EXPORT_SYMBOL_GPL(llcc_slice_activate);
4655 
4656 /**
4657  * llcc_slice_deactivate - Deactivate the llcc slice
4658  * @desc: Pointer to llcc slice descriptor
4659  *
4660  * A value of zero will be returned on success and a negative errno will
4661  * be returned in error cases
4662  */
4663 int llcc_slice_deactivate(struct llcc_slice_desc *desc)
4664 {
4665 	u32 act_ctrl_val;
4666 	int ret;
4667 
4668 	if (IS_ERR(drv_data))
4669 		return PTR_ERR(drv_data);
4670 
4671 	if (IS_ERR_OR_NULL(desc))
4672 		return -EINVAL;
4673 
4674 	guard(mutex)(&drv_data->lock);
4675 	/* refcount > 1, drop one ref and we’re done. */
4676 	if (refcount_dec_not_one(&desc->refcount))
4677 		return 0;
4678 
4679 	act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT;
4680 	ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
4681 				  ACTIVATE);
4682 	if (ret)
4683 		return ret;
4684 
4685 	/* Finalize: atomically transition 1 -> 0 */
4686 	WARN_ON_ONCE(!refcount_dec_if_one(&desc->refcount));
4687 
4688 	return 0;
4689 }
4690 EXPORT_SYMBOL_GPL(llcc_slice_deactivate);
4691 
4692 /**
4693  * llcc_get_slice_id - return the slice id
4694  * @desc: Pointer to llcc slice descriptor
4695  */
4696 int llcc_get_slice_id(struct llcc_slice_desc *desc)
4697 {
4698 	if (IS_ERR_OR_NULL(desc))
4699 		return -EINVAL;
4700 
4701 	return desc->slice_id;
4702 }
4703 EXPORT_SYMBOL_GPL(llcc_get_slice_id);
4704 
4705 /**
4706  * llcc_get_slice_size - return the slice id
4707  * @desc: Pointer to llcc slice descriptor
4708  */
4709 size_t llcc_get_slice_size(struct llcc_slice_desc *desc)
4710 {
4711 	if (IS_ERR_OR_NULL(desc))
4712 		return 0;
4713 
4714 	return desc->slice_size;
4715 }
4716 EXPORT_SYMBOL_GPL(llcc_get_slice_size);
4717 
4718 static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config,
4719 				  const struct qcom_llcc_config *cfg)
4720 {
4721 	int ret;
4722 	u32 attr2_cfg;
4723 	u32 attr1_cfg;
4724 	u32 attr0_cfg;
4725 	u32 attr2_val;
4726 	u32 attr1_val;
4727 	u32 attr0_val;
4728 	u32 max_cap_cacheline;
4729 	struct llcc_slice_desc *desc;
4730 
4731 	attr1_val = config->cache_mode;
4732 	attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT;
4733 	attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT;
4734 	attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT;
4735 
4736 	max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap);
4737 
4738 	/*
4739 	 * LLCC instances can vary for each target.
4740 	 * The SW writes to broadcast register which gets propagated
4741 	 * to each llcc instance (llcc0,.. llccN).
4742 	 * Since the size of the memory is divided equally amongst the
4743 	 * llcc instances, we need to configure the max cap accordingly.
4744 	 */
4745 	max_cap_cacheline = max_cap_cacheline / drv_data->num_banks;
4746 	max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
4747 	if (cfg->max_cap_shift)
4748 		attr1_val |= max_cap_cacheline << cfg->max_cap_shift;
4749 	else
4750 		attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT;
4751 
4752 	attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id);
4753 
4754 	ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4755 	if (ret)
4756 		return ret;
4757 
4758 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4759 		attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id);
4760 		attr0_val = config->res_ways;
4761 		attr2_val = config->bonus_ways;
4762 	} else {
4763 		attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK;
4764 		attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT;
4765 	}
4766 
4767 	attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id);
4768 
4769 	ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4770 	if (ret)
4771 		return ret;
4772 
4773 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4774 		ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4775 		if (ret)
4776 			return ret;
4777 	}
4778 
4779 	/* At least SDM845 disallows non-secure writes to these registers */
4780 	if (!cfg->skip_llcc_cfg) {
4781 		u32 disable_cap_alloc, retain_pc;
4782 
4783 		disable_cap_alloc = config->dis_cap_alloc << config->slice_id;
4784 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
4785 					 BIT(config->slice_id), disable_cap_alloc);
4786 		if (ret)
4787 			return ret;
4788 
4789 		if (drv_data->version < LLCC_VERSION_4_1_0_0) {
4790 			retain_pc = config->retain_on_pc << config->slice_id;
4791 			ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
4792 						 BIT(config->slice_id), retain_pc);
4793 			if (ret)
4794 				return ret;
4795 		}
4796 	}
4797 
4798 	if (drv_data->version >= LLCC_VERSION_2_0_0_0) {
4799 		u32 wren;
4800 
4801 		wren = config->write_scid_en << config->slice_id;
4802 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN,
4803 					 BIT(config->slice_id), wren);
4804 		if (ret)
4805 			return ret;
4806 	}
4807 
4808 	if (drv_data->version >= LLCC_VERSION_2_1_0_0) {
4809 		u32 wr_cache_en;
4810 
4811 		wr_cache_en = config->write_scid_cacheable_en << config->slice_id;
4812 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN,
4813 					 BIT(config->slice_id), wr_cache_en);
4814 		if (ret)
4815 			return ret;
4816 	}
4817 
4818 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4819 		u32 stale_en;
4820 		u32 stale_cap_en;
4821 		u32 mru_uncap_en;
4822 		u32 mru_rollover;
4823 		u32 alloc_oneway_en;
4824 		u32 ovcap_en;
4825 		u32 ovcap_prio;
4826 		u32 vict_prio;
4827 
4828 		stale_en = config->stale_en << config->slice_id;
4829 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1,
4830 					 BIT(config->slice_id), stale_en);
4831 		if (ret)
4832 			return ret;
4833 
4834 		stale_cap_en = config->stale_cap_en << config->slice_id;
4835 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2,
4836 					 BIT(config->slice_id), stale_cap_en);
4837 		if (ret)
4838 			return ret;
4839 
4840 		mru_uncap_en = config->mru_uncap_en << config->slice_id;
4841 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3,
4842 					 BIT(config->slice_id), mru_uncap_en);
4843 		if (ret)
4844 			return ret;
4845 
4846 		mru_rollover = config->mru_rollover << config->slice_id;
4847 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4,
4848 					 BIT(config->slice_id), mru_rollover);
4849 		if (ret)
4850 			return ret;
4851 
4852 		alloc_oneway_en = config->alloc_oneway_en << config->slice_id;
4853 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5,
4854 					 BIT(config->slice_id), alloc_oneway_en);
4855 		if (ret)
4856 			return ret;
4857 
4858 		ovcap_en = config->ovcap_en << config->slice_id;
4859 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6,
4860 					 BIT(config->slice_id), ovcap_en);
4861 		if (ret)
4862 			return ret;
4863 
4864 		ovcap_prio = config->ovcap_prio << config->slice_id;
4865 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7,
4866 					 BIT(config->slice_id), ovcap_prio);
4867 		if (ret)
4868 			return ret;
4869 
4870 		vict_prio = config->vict_prio << config->slice_id;
4871 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8,
4872 					 BIT(config->slice_id), vict_prio);
4873 		if (ret)
4874 			return ret;
4875 	}
4876 
4877 	if (config->activate_on_init) {
4878 		desc = llcc_slice_getd(config->usecase_id);
4879 		if (IS_ERR(desc))
4880 			return PTR_ERR(desc);
4881 
4882 		ret = llcc_slice_activate(desc);
4883 	}
4884 
4885 	return ret;
4886 }
4887 
4888 static int _qcom_llcc_cfg_program_v6(const struct llcc_slice_config *config,
4889 				     const struct qcom_llcc_config *cfg)
4890 {
4891 	u32 stale_en, stale_cap_en, mru_uncap_en, mru_rollover;
4892 	u32 alloc_oneway_en, ovcap_en, ovcap_prio, vict_prio;
4893 	u32 attr0_cfg, attr1_cfg, attr2_cfg, attr3_cfg;
4894 	u32 attr0_val, attr1_val, attr2_val, attr3_val;
4895 	u32 slice_offset, reg_offset;
4896 	struct llcc_slice_desc *desc;
4897 	u32 wren, wr_cache_en;
4898 	int ret;
4899 
4900 	attr0_cfg = LLCC_V6_TRP_ATTR0_CFGn(config->slice_id);
4901 	attr1_cfg = LLCC_V6_TRP_ATTR1_CFGn(config->slice_id);
4902 	attr2_cfg = LLCC_V6_TRP_ATTR2_CFGn(config->slice_id);
4903 	attr3_cfg = LLCC_V6_TRP_ATTR3_CFGn(config->slice_id);
4904 
4905 	attr0_val = config->res_ways;
4906 	attr1_val = config->bonus_ways;
4907 	attr2_val = config->cache_mode;
4908 	attr2_val |= FIELD_PREP(ATTR2_PROBE_TARGET_WAYS_MASK, config->probe_target_ways);
4909 	attr2_val |= FIELD_PREP(ATTR2_FIXED_SIZE_MASK, config->fixed_size);
4910 	attr2_val |= FIELD_PREP(ATTR2_PRIORITY_MASK, config->priority);
4911 
4912 	if (config->parent_slice_id && config->fixed_size) {
4913 		attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id);
4914 		attr2_val |= ATTR2_IN_A_GROUP_MASK;
4915 	}
4916 
4917 	attr3_val = MAX_CAP_TO_BYTES(config->max_cap);
4918 	attr3_val /= drv_data->num_banks;
4919 	attr3_val >>= CACHE_LINE_SIZE_SHIFT;
4920 
4921 	ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4922 	if (ret)
4923 		return ret;
4924 
4925 	ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4926 	if (ret)
4927 		return ret;
4928 
4929 	ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4930 	if (ret)
4931 		return ret;
4932 
4933 	ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val);
4934 	if (ret)
4935 		return ret;
4936 
4937 	slice_offset = config->slice_id % 32;
4938 	reg_offset = (config->slice_id / 32) * 4;
4939 
4940 	wren = config->write_scid_en << slice_offset;
4941 	ret = regmap_update_bits(drv_data->bcast_regmap,
4942 				 cfg->reg_offset[LLCC_TRP_WRS_EN] + reg_offset,
4943 				 BIT(slice_offset), wren);
4944 	if (ret)
4945 		return ret;
4946 
4947 	wr_cache_en = config->write_scid_cacheable_en << slice_offset;
4948 	ret = regmap_update_bits(drv_data->bcast_regmap,
4949 				 cfg->reg_offset[LLCC_TRP_WRS_CACHEABLE_EN] + reg_offset,
4950 				 BIT(slice_offset), wr_cache_en);
4951 	if (ret)
4952 		return ret;
4953 
4954 	stale_en = config->stale_en << slice_offset;
4955 	ret = regmap_update_bits(drv_data->bcast_regmap,
4956 				 cfg->reg_offset[LLCC_TRP_ALGO_STALE_EN] + reg_offset,
4957 				 BIT(slice_offset), stale_en);
4958 	if (ret)
4959 		return ret;
4960 
4961 	stale_cap_en = config->stale_cap_en << slice_offset;
4962 	ret = regmap_update_bits(drv_data->bcast_regmap,
4963 				 cfg->reg_offset[LLCC_TRP_ALGO_STALE_CAP_EN] + reg_offset,
4964 				 BIT(slice_offset), stale_cap_en);
4965 	if (ret)
4966 		return ret;
4967 
4968 	mru_uncap_en = config->mru_uncap_en << slice_offset;
4969 	ret = regmap_update_bits(drv_data->bcast_regmap,
4970 				 cfg->reg_offset[LLCC_TRP_ALGO_MRU0] + reg_offset,
4971 				 BIT(slice_offset), mru_uncap_en);
4972 	if (ret)
4973 		return ret;
4974 
4975 	mru_rollover = config->mru_rollover << slice_offset;
4976 	ret = regmap_update_bits(drv_data->bcast_regmap,
4977 				 cfg->reg_offset[LLCC_TRP_ALGO_MRU1] + reg_offset,
4978 				 BIT(slice_offset), mru_rollover);
4979 	if (ret)
4980 		return ret;
4981 
4982 	alloc_oneway_en = config->alloc_oneway_en << slice_offset;
4983 	ret = regmap_update_bits(drv_data->bcast_regmap,
4984 				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC0] + reg_offset,
4985 				 BIT(slice_offset), alloc_oneway_en);
4986 	if (ret)
4987 		return ret;
4988 
4989 	ovcap_en = config->ovcap_en << slice_offset;
4990 	ret = regmap_update_bits(drv_data->bcast_regmap,
4991 				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC1] + reg_offset,
4992 				 BIT(slice_offset), ovcap_en);
4993 	if (ret)
4994 		return ret;
4995 
4996 	ovcap_prio = config->ovcap_prio << slice_offset;
4997 	ret = regmap_update_bits(drv_data->bcast_regmap,
4998 				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC2] + reg_offset,
4999 				 BIT(slice_offset), ovcap_prio);
5000 	if (ret)
5001 		return ret;
5002 
5003 	vict_prio = config->vict_prio << slice_offset;
5004 	ret = regmap_update_bits(drv_data->bcast_regmap,
5005 				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC3] + reg_offset,
5006 				 BIT(slice_offset), vict_prio);
5007 	if (ret)
5008 		return ret;
5009 
5010 	if (config->activate_on_init) {
5011 		desc = llcc_slice_getd(config->usecase_id);
5012 		if (PTR_ERR_OR_ZERO(desc))
5013 			return -EINVAL;
5014 
5015 		ret = llcc_slice_activate(desc);
5016 	}
5017 
5018 	return ret;
5019 }
5020 
5021 static int qcom_llcc_cfg_program(struct platform_device *pdev,
5022 				 const struct qcom_llcc_config *cfg)
5023 {
5024 	int i;
5025 	u32 sz;
5026 	int ret = 0;
5027 	const struct llcc_slice_config *llcc_table;
5028 
5029 	sz = drv_data->cfg_size;
5030 	llcc_table = drv_data->cfg;
5031 
5032 	if (drv_data->version >= LLCC_VERSION_6_0_0_0) {
5033 		for (i = 0; i < sz; i++) {
5034 			ret = _qcom_llcc_cfg_program_v6(&llcc_table[i], cfg);
5035 			if (ret)
5036 				return ret;
5037 		}
5038 	} else {
5039 		for (i = 0; i < sz; i++) {
5040 			ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg);
5041 			if (ret)
5042 				return ret;
5043 		}
5044 	}
5045 
5046 	return ret;
5047 }
5048 
5049 static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
5050 {
5051 	int ret;
5052 
5053 	ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
5054 	if (ret == -ENOENT || ret == -EOPNOTSUPP) {
5055 		if (num_config > 1)
5056 			return -EINVAL;
5057 		*cfg_index = 0;
5058 		return 0;
5059 	}
5060 
5061 	if (!ret && *cfg_index >= num_config)
5062 		ret = -EINVAL;
5063 
5064 	return ret;
5065 }
5066 
5067 static void qcom_llcc_remove(struct platform_device *pdev)
5068 {
5069 	/* Set the global pointer to a error code to avoid referencing it */
5070 	drv_data = ERR_PTR(-ENODEV);
5071 }
5072 
5073 static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index,
5074 					  const char *name)
5075 {
5076 	void __iomem *base;
5077 	struct regmap_config llcc_regmap_config = {
5078 		.reg_bits = 32,
5079 		.reg_stride = 4,
5080 		.val_bits = 32,
5081 	};
5082 
5083 	base = devm_platform_ioremap_resource(pdev, index);
5084 	if (IS_ERR(base))
5085 		return ERR_CAST(base);
5086 
5087 	llcc_regmap_config.name = name;
5088 	return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config);
5089 }
5090 
5091 static int qcom_llcc_probe(struct platform_device *pdev)
5092 {
5093 	u32 num_banks;
5094 	struct device *dev = &pdev->dev;
5095 	int ret, i;
5096 	struct platform_device *llcc_edac;
5097 	const struct qcom_sct_config *cfgs;
5098 	const struct qcom_llcc_config *cfg;
5099 	const struct llcc_slice_config *llcc_cfg;
5100 	u32 sz;
5101 	u8 cfg_index;
5102 	u32 version;
5103 	struct regmap *regmap;
5104 
5105 	if (!IS_ERR(drv_data))
5106 		return -EBUSY;
5107 
5108 	drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
5109 	if (!drv_data) {
5110 		ret = -ENOMEM;
5111 		goto err;
5112 	}
5113 
5114 	/* Initialize the first LLCC bank regmap */
5115 	regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base");
5116 	if (IS_ERR(regmap)) {
5117 		ret = PTR_ERR(regmap);
5118 		goto err;
5119 	}
5120 
5121 	cfgs = of_device_get_match_data(&pdev->dev);
5122 	if (!cfgs) {
5123 		ret = -EINVAL;
5124 		goto err;
5125 	}
5126 	ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
5127 	if (ret)
5128 		goto err;
5129 	cfg = &cfgs->llcc_config[cfg_index];
5130 
5131 	if (cfg->num_banks) {
5132 		num_banks = cfg->num_banks;
5133 	} else {
5134 		ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
5135 		if (ret)
5136 			goto err;
5137 
5138 		num_banks &= LLCC_LB_CNT_MASK;
5139 		num_banks >>= LLCC_LB_CNT_SHIFT;
5140 	}
5141 
5142 	drv_data->num_banks = num_banks;
5143 
5144 	drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL);
5145 	if (!drv_data->regmaps) {
5146 		ret = -ENOMEM;
5147 		goto err;
5148 	}
5149 
5150 	drv_data->regmaps[0] = regmap;
5151 
5152 	/* Initialize rest of LLCC bank regmaps */
5153 	for (i = 1; i < num_banks; i++) {
5154 		char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i);
5155 
5156 		drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base);
5157 		if (IS_ERR(drv_data->regmaps[i])) {
5158 			ret = PTR_ERR(drv_data->regmaps[i]);
5159 			goto err;
5160 		}
5161 	}
5162 
5163 	drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
5164 	if (IS_ERR(drv_data->bcast_regmap)) {
5165 		if (cfg->no_broadcast_register) {
5166 			drv_data->bcast_regmap = regmap;
5167 		} else {
5168 			ret = PTR_ERR(drv_data->bcast_regmap);
5169 			goto err;
5170 		}
5171 	}
5172 
5173 	/* Extract version of the IP */
5174 	ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO],
5175 			  &version);
5176 	if (ret)
5177 		goto err;
5178 
5179 	drv_data->version = version;
5180 
5181 	/* Applicable only when drv_data->version >= 4.1 */
5182 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
5183 		drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
5184 		if (IS_ERR(drv_data->bcast_and_regmap)) {
5185 			ret = PTR_ERR(drv_data->bcast_and_regmap);
5186 			if (ret == -EINVAL)
5187 				drv_data->bcast_and_regmap = NULL;
5188 			else
5189 				goto err;
5190 		}
5191 	}
5192 
5193 	llcc_cfg = cfg->sct_data;
5194 	sz = cfg->size;
5195 	drv_data->desc = devm_kcalloc(dev, sz, sizeof(struct llcc_slice_desc), GFP_KERNEL);
5196 	if (!drv_data->desc) {
5197 		ret = -ENOMEM;
5198 		goto err;
5199 	}
5200 
5201 	for (i = 0; i < sz; i++) {
5202 		drv_data->desc[i].slice_id = llcc_cfg[i].slice_id;
5203 		drv_data->desc[i].slice_size = llcc_cfg[i].max_cap;
5204 		refcount_set(&drv_data->desc[i].refcount, 0);
5205 	}
5206 
5207 	drv_data->cfg = llcc_cfg;
5208 	drv_data->cfg_size = sz;
5209 	drv_data->edac_reg_offset = cfg->edac_reg_offset;
5210 	drv_data->ecc_irq_configured = cfg->irq_configured;
5211 	mutex_init(&drv_data->lock);
5212 	platform_set_drvdata(pdev, drv_data);
5213 
5214 	ret = qcom_llcc_cfg_program(pdev, cfg);
5215 	if (ret)
5216 		goto err;
5217 
5218 	drv_data->ecc_irq = platform_get_irq_optional(pdev, 0);
5219 
5220 	/*
5221 	 * On some platforms, the access to EDAC registers will be locked by
5222 	 * the bootloader. So probing the EDAC driver will result in a crash.
5223 	 * Hence, disable the creation of EDAC platform device for the
5224 	 * problematic platforms.
5225 	 */
5226 	if (!cfg->no_edac) {
5227 		llcc_edac = platform_device_register_data(&pdev->dev,
5228 						"qcom_llcc_edac", -1, drv_data,
5229 						sizeof(*drv_data));
5230 		if (IS_ERR(llcc_edac))
5231 			dev_err(dev, "Failed to register llcc edac driver\n");
5232 	}
5233 
5234 	return 0;
5235 err:
5236 	drv_data = ERR_PTR(-ENODEV);
5237 	return ret;
5238 }
5239 
5240 static const struct of_device_id qcom_llcc_of_match[] = {
5241 	{ .compatible = "qcom,glymur-llcc", .data = &glymur_cfgs },
5242 	{ .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs},
5243 	{ .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs},
5244 	{ .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
5245 	{ .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs},
5246 	{ .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
5247 	{ .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
5248 	{ .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs },
5249 	{ .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs },
5250 	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
5251 	{ .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
5252 	{ .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
5253 	{ .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
5254 	{ .compatible = "qcom,sdm670-llcc", .data = &sdm670_cfgs },
5255 	{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
5256 	{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
5257 	{ .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
5258 	{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
5259 	{ .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
5260 	{ .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
5261 	{ .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
5262 	{ .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
5263 	{ .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
5264 	{ .compatible = "qcom,sm8750-llcc", .data = &sm8750_cfgs },
5265 	{ .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
5266 	{ }
5267 };
5268 MODULE_DEVICE_TABLE(of, qcom_llcc_of_match);
5269 
5270 static struct platform_driver qcom_llcc_driver = {
5271 	.driver = {
5272 		.name = "qcom-llcc",
5273 		.of_match_table = qcom_llcc_of_match,
5274 	},
5275 	.probe = qcom_llcc_probe,
5276 	.remove = qcom_llcc_remove,
5277 };
5278 module_platform_driver(qcom_llcc_driver);
5279 
5280 MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller");
5281 MODULE_LICENSE("GPL v2");
5282