1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2018 Ruslan Bukin <br@bsdpad.com>
5 * All rights reserved.
6 *
7 * This software was developed by SRI International and the University of
8 * Cambridge Computer Laboratory (Department of Computer Science and
9 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
10 * DARPA SSITH research programme.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34 #include <sys/cdefs.h>
35 #include "opt_ddb.h"
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/bus.h>
40 #include <sys/conf.h>
41 #include <sys/kdb.h>
42 #include <machine/bus.h>
43 #include <machine/sbi.h>
44
45 #include <dev/uart/uart.h>
46 #include <dev/uart/uart_cpu.h>
47 #include <dev/uart/uart_cpu_fdt.h>
48 #include <dev/uart/uart_bus.h>
49 #include <dev/uart/uart_dev_lowrisc.h>
50
51 #include "uart_if.h"
52
53 #define DEFAULT_BAUD_RATE 115200
54
55 /*
56 * Low-level UART interface.
57 */
58 static int lowrisc_uart_probe(struct uart_bas *bas);
59 static void lowrisc_uart_init(struct uart_bas *bas, int, int, int, int);
60 static void lowrisc_uart_term(struct uart_bas *bas);
61 static void lowrisc_uart_putc(struct uart_bas *bas, int);
62 static int lowrisc_uart_rxready(struct uart_bas *bas);
63 static int lowrisc_uart_getc(struct uart_bas *bas, struct mtx *);
64
65 static struct uart_ops uart_lowrisc_uart_ops = {
66 .probe = lowrisc_uart_probe,
67 .init = lowrisc_uart_init,
68 .term = lowrisc_uart_term,
69 .putc = lowrisc_uart_putc,
70 .rxready = lowrisc_uart_rxready,
71 .getc = lowrisc_uart_getc,
72 };
73
74 static int
lowrisc_uart_probe(struct uart_bas * bas)75 lowrisc_uart_probe(struct uart_bas *bas)
76 {
77
78 return (0);
79 }
80
81 static u_int
lowrisc_uart_getbaud(struct uart_bas * bas)82 lowrisc_uart_getbaud(struct uart_bas *bas)
83 {
84
85 return (DEFAULT_BAUD_RATE);
86 }
87
88 static void
lowrisc_uart_init(struct uart_bas * bas,int baudrate,int databits,int stopbits,int parity)89 lowrisc_uart_init(struct uart_bas *bas, int baudrate, int databits,
90 int stopbits, int parity)
91 {
92
93 /* TODO */
94 }
95
96 static void
lowrisc_uart_term(struct uart_bas * bas)97 lowrisc_uart_term(struct uart_bas *bas)
98 {
99
100 /* TODO */
101 }
102
103 static void
lowrisc_uart_putc(struct uart_bas * bas,int c)104 lowrisc_uart_putc(struct uart_bas *bas, int c)
105 {
106
107 while (GETREG(bas, UART_DR) & DR_TX_FIFO_FULL)
108 ;
109
110 SETREG(bas, UART_DR, c);
111 }
112
113 static int
lowrisc_uart_rxready(struct uart_bas * bas)114 lowrisc_uart_rxready(struct uart_bas *bas)
115 {
116
117 if (GETREG(bas, UART_DR) & DR_RX_FIFO_EMPTY)
118 return (0);
119
120 return (1);
121 }
122
123 static int
lowrisc_uart_getc(struct uart_bas * bas,struct mtx * hwmtx)124 lowrisc_uart_getc(struct uart_bas *bas, struct mtx *hwmtx)
125 {
126 uint32_t reg;
127
128 uart_lock(hwmtx);
129 SETREG(bas, UART_INT_STATUS, INT_STATUS_ACK);
130 reg = GETREG(bas, UART_DR);
131 uart_unlock(hwmtx);
132
133 return (reg & 0xff);
134 }
135
136 /*
137 * High-level UART interface.
138 */
139 struct lowrisc_uart_softc {
140 struct uart_softc base;
141 };
142
143 static int lowrisc_uart_bus_attach(struct uart_softc *);
144 static int lowrisc_uart_bus_detach(struct uart_softc *);
145 static int lowrisc_uart_bus_flush(struct uart_softc *, int);
146 static int lowrisc_uart_bus_getsig(struct uart_softc *);
147 static int lowrisc_uart_bus_ioctl(struct uart_softc *, int, intptr_t);
148 static int lowrisc_uart_bus_ipend(struct uart_softc *);
149 static int lowrisc_uart_bus_param(struct uart_softc *, int, int, int, int);
150 static int lowrisc_uart_bus_probe(struct uart_softc *);
151 static int lowrisc_uart_bus_receive(struct uart_softc *);
152 static int lowrisc_uart_bus_setsig(struct uart_softc *, int);
153 static int lowrisc_uart_bus_transmit(struct uart_softc *);
154 static void lowrisc_uart_bus_grab(struct uart_softc *);
155 static void lowrisc_uart_bus_ungrab(struct uart_softc *);
156
157 static kobj_method_t lowrisc_uart_methods[] = {
158 KOBJMETHOD(uart_attach, lowrisc_uart_bus_attach),
159 KOBJMETHOD(uart_detach, lowrisc_uart_bus_detach),
160 KOBJMETHOD(uart_flush, lowrisc_uart_bus_flush),
161 KOBJMETHOD(uart_getsig, lowrisc_uart_bus_getsig),
162 KOBJMETHOD(uart_ioctl, lowrisc_uart_bus_ioctl),
163 KOBJMETHOD(uart_ipend, lowrisc_uart_bus_ipend),
164 KOBJMETHOD(uart_param, lowrisc_uart_bus_param),
165 KOBJMETHOD(uart_probe, lowrisc_uart_bus_probe),
166 KOBJMETHOD(uart_receive, lowrisc_uart_bus_receive),
167 KOBJMETHOD(uart_setsig, lowrisc_uart_bus_setsig),
168 KOBJMETHOD(uart_transmit, lowrisc_uart_bus_transmit),
169 KOBJMETHOD(uart_grab, lowrisc_uart_bus_grab),
170 KOBJMETHOD(uart_ungrab, lowrisc_uart_bus_ungrab),
171 { 0, 0 }
172 };
173
174 static struct uart_class uart_lowrisc_class = {
175 "lowrisc",
176 lowrisc_uart_methods,
177 sizeof(struct lowrisc_uart_softc),
178 .uc_ops = &uart_lowrisc_uart_ops,
179 .uc_range = 0x100,
180 .uc_rclk = 12500000, /* TODO: get value from clock manager */
181 .uc_rshift = 0
182 };
183
184 static struct ofw_compat_data compat_data[] = {
185 {"lowrisc-fake", (uintptr_t)&uart_lowrisc_class},
186 {NULL, (uintptr_t)NULL},
187 };
188 UART_FDT_CLASS_AND_DEVICE(compat_data);
189
190 static int
lowrisc_uart_bus_attach(struct uart_softc * sc)191 lowrisc_uart_bus_attach(struct uart_softc *sc)
192 {
193 struct uart_bas *bas;
194 struct uart_devinfo *di;
195
196 bas = &sc->sc_bas;
197 if (sc->sc_sysdev != NULL) {
198 di = sc->sc_sysdev;
199 lowrisc_uart_init(bas, di->baudrate, di->databits, di->stopbits,
200 di->parity);
201 } else
202 lowrisc_uart_init(bas, DEFAULT_BAUD_RATE, 8, 1, 0);
203
204 (void)lowrisc_uart_bus_getsig(sc);
205
206 /* TODO: clear all pending interrupts. */
207
208 return (0);
209 }
210
211 static int
lowrisc_uart_bus_detach(struct uart_softc * sc)212 lowrisc_uart_bus_detach(struct uart_softc *sc)
213 {
214
215 /* TODO */
216
217 return (0);
218 }
219
220 static int
lowrisc_uart_bus_flush(struct uart_softc * sc,int what)221 lowrisc_uart_bus_flush(struct uart_softc *sc, int what)
222 {
223
224 /* TODO */
225
226 return (0);
227 }
228
229 static int
lowrisc_uart_bus_getsig(struct uart_softc * sc)230 lowrisc_uart_bus_getsig(struct uart_softc *sc)
231 {
232
233 /* TODO */
234
235 return (0);
236 }
237
238 static int
lowrisc_uart_bus_ioctl(struct uart_softc * sc,int request,intptr_t data)239 lowrisc_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
240 {
241 struct uart_bas *bas;
242 int error;
243
244 bas = &sc->sc_bas;
245 error = 0;
246 uart_lock(sc->sc_hwmtx);
247 switch (request) {
248 case UART_IOCTL_BREAK:
249 /* TODO */
250 break;
251 case UART_IOCTL_BAUD:
252 *(u_int*)data = lowrisc_uart_getbaud(bas);
253 break;
254 default:
255 error = EINVAL;
256 break;
257 }
258 uart_unlock(sc->sc_hwmtx);
259
260 return (error);
261 }
262
263 static int
lowrisc_uart_bus_ipend(struct uart_softc * sc)264 lowrisc_uart_bus_ipend(struct uart_softc *sc)
265 {
266 struct uart_bas *bas;
267 int ipend;
268
269 bas = &sc->sc_bas;
270
271 ipend = 0;
272
273 uart_lock(sc->sc_hwmtx);
274 if ((GETREG(bas, UART_DR) & DR_RX_FIFO_EMPTY) == 0)
275 ipend |= SER_INT_RXREADY;
276 SETREG(bas, UART_INT_STATUS, INT_STATUS_ACK);
277 uart_unlock(sc->sc_hwmtx);
278
279 return (ipend);
280 }
281
282 static int
lowrisc_uart_bus_param(struct uart_softc * sc,int baudrate,int databits,int stopbits,int parity)283 lowrisc_uart_bus_param(struct uart_softc *sc, int baudrate, int databits,
284 int stopbits, int parity)
285 {
286
287 uart_lock(sc->sc_hwmtx);
288 lowrisc_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity);
289 uart_unlock(sc->sc_hwmtx);
290
291 return (0);
292 }
293
294 static int
lowrisc_uart_bus_probe(struct uart_softc * sc)295 lowrisc_uart_bus_probe(struct uart_softc *sc)
296 {
297 int error;
298
299 error = lowrisc_uart_probe(&sc->sc_bas);
300 if (error)
301 return (error);
302
303 /*
304 * On input we can read up to the full fifo size at once. On output, we
305 * want to write only as much as the programmed tx low water level,
306 * because that's all we can be certain we have room for in the fifo
307 * when we get a tx-ready interrupt.
308 */
309 sc->sc_rxfifosz = 2048;
310 sc->sc_txfifosz = 2048;
311
312 device_set_desc(sc->sc_dev, "lowRISC UART");
313
314 return (0);
315 }
316
317 static int
lowrisc_uart_bus_receive(struct uart_softc * sc)318 lowrisc_uart_bus_receive(struct uart_softc *sc)
319 {
320 struct uart_bas *bas;
321 uint32_t reg;
322
323 bas = &sc->sc_bas;
324
325 uart_lock(sc->sc_hwmtx);
326
327 do {
328 if (uart_rx_full(sc)) {
329 /* No space left in the input buffer */
330 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
331 break;
332 }
333 reg = GETREG(bas, UART_DR);
334 SETREG(bas, UART_INT_STATUS, INT_STATUS_ACK);
335 uart_rx_put(sc, reg & 0xff);
336 } while ((reg & DR_RX_FIFO_EMPTY) == 0);
337
338 uart_unlock(sc->sc_hwmtx);
339
340 return (0);
341 }
342
343 static int
lowrisc_uart_bus_setsig(struct uart_softc * sc,int sig)344 lowrisc_uart_bus_setsig(struct uart_softc *sc, int sig)
345 {
346
347 return (0);
348 }
349
350 static int
lowrisc_uart_bus_transmit(struct uart_softc * sc)351 lowrisc_uart_bus_transmit(struct uart_softc *sc)
352 {
353 struct uart_bas *bas;
354 int i;
355
356 bas = &sc->sc_bas;
357
358 uart_lock(sc->sc_hwmtx);
359 for (i = 0; i < sc->sc_txdatasz; i++) {
360 while (GETREG(bas, UART_DR) & DR_TX_FIFO_FULL)
361 ;
362 SETREG(bas, UART_DR, sc->sc_txbuf[i] & 0xff);
363 }
364 uart_unlock(sc->sc_hwmtx);
365
366 return (0);
367 }
368
369 static void
lowrisc_uart_bus_grab(struct uart_softc * sc)370 lowrisc_uart_bus_grab(struct uart_softc *sc)
371 {
372
373 uart_lock(sc->sc_hwmtx);
374 /* TODO */
375 uart_unlock(sc->sc_hwmtx);
376 }
377
378 static void
lowrisc_uart_bus_ungrab(struct uart_softc * sc)379 lowrisc_uart_bus_ungrab(struct uart_softc *sc)
380 {
381
382 uart_lock(sc->sc_hwmtx);
383 /* TODO */
384 uart_unlock(sc->sc_hwmtx);
385 }
386