1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #include <linux/firmware.h>
19
20 #include "qmi.h"
21 #include "htc.h"
22 #include "wmi.h"
23 #include "hal.h"
24 #include "dp.h"
25 #include "ce.h"
26 #include "mac.h"
27 #include "hw.h"
28 #include "hal_rx.h"
29 #include "reg.h"
30 #include "thermal.h"
31 #include "dbring.h"
32 #include "spectral.h"
33 #include "wow.h"
34 #include "fw.h"
35
36 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
37
38 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
39
40 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
41
42 /* Pending management packets threshold for dropping probe responses */
43 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
44
45 #define ATH11K_INVALID_HW_MAC_ID 0xFF
46 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
47
48 /* SMBIOS type containing Board Data File Name Extension */
49 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
50
51 /* SMBIOS type structure length (excluding strings-set) */
52 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
53
54 /* The magic used by QCA spec */
55 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
56
57 extern unsigned int ath11k_frame_mode;
58 extern bool ath11k_ftm_mode;
59
60 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
61
62 #define ATH11K_MON_TIMER_INTERVAL 10
63 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
64 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
65 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
66 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
67 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
68 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
69
70 enum ath11k_supported_bw {
71 ATH11K_BW_20 = 0,
72 ATH11K_BW_40 = 1,
73 ATH11K_BW_80 = 2,
74 ATH11K_BW_160 = 3,
75 };
76
77 enum ath11k_bdf_search {
78 ATH11K_BDF_SEARCH_DEFAULT,
79 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
80 };
81
82 enum wme_ac {
83 WME_AC_BE,
84 WME_AC_BK,
85 WME_AC_VI,
86 WME_AC_VO,
87 WME_NUM_AC
88 };
89
90 #define ATH11K_HT_MCS_MAX 7
91 #define ATH11K_VHT_MCS_MAX 9
92 #define ATH11K_HE_MCS_MAX 11
93
94 enum ath11k_crypt_mode {
95 /* Only use hardware crypto engine */
96 ATH11K_CRYPT_MODE_HW,
97 /* Only use software crypto */
98 ATH11K_CRYPT_MODE_SW,
99 };
100
ath11k_tid_to_ac(u32 tid)101 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
102 {
103 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
104 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
105 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
106 WME_AC_VO);
107 }
108
109 enum ath11k_skb_flags {
110 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
111 ATH11K_SKB_CIPHER_SET = BIT(1),
112 };
113
114 struct ath11k_skb_cb {
115 dma_addr_t paddr;
116 u8 eid;
117 u8 flags;
118 u32 cipher;
119 struct ath11k *ar;
120 struct ieee80211_vif *vif;
121 } __packed;
122
123 struct ath11k_skb_rxcb {
124 dma_addr_t paddr;
125 bool is_first_msdu;
126 bool is_last_msdu;
127 bool is_continuation;
128 bool is_mcbc;
129 bool is_eapol;
130 struct hal_rx_desc *rx_desc;
131 u8 err_rel_src;
132 u8 err_code;
133 u8 mac_id;
134 u8 unmapped;
135 u8 is_frag;
136 u8 tid;
137 u16 peer_id;
138 u16 seq_no;
139 };
140
141 enum ath11k_hw_rev {
142 ATH11K_HW_IPQ8074,
143 ATH11K_HW_QCA6390_HW20,
144 ATH11K_HW_IPQ6018_HW10,
145 ATH11K_HW_QCN9074_HW10,
146 ATH11K_HW_WCN6855_HW20,
147 ATH11K_HW_WCN6855_HW21,
148 ATH11K_HW_WCN6750_HW10,
149 ATH11K_HW_IPQ5018_HW10,
150 ATH11K_HW_QCA2066_HW21,
151 };
152
153 enum ath11k_firmware_mode {
154 /* the default mode, standard 802.11 functionality */
155 ATH11K_FIRMWARE_MODE_NORMAL,
156
157 /* factory tests etc */
158 ATH11K_FIRMWARE_MODE_FTM,
159
160 /* Cold boot calibration */
161 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
162 };
163
164 extern bool ath11k_cold_boot_cal;
165
166 #define ATH11K_IRQ_NUM_MAX 52
167 #define ATH11K_EXT_IRQ_NUM_MAX 16
168
169 struct ath11k_ext_irq_grp {
170 struct ath11k_base *ab;
171 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
172 u32 num_irq;
173 u32 grp_id;
174 u64 timestamp;
175 bool napi_enabled;
176 struct napi_struct napi;
177 struct net_device *napi_ndev;
178 };
179
180 enum ath11k_smbios_cc_type {
181 /* disable country code setting from SMBIOS */
182 ATH11K_SMBIOS_CC_DISABLE = 0,
183
184 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
185 ATH11K_SMBIOS_CC_ISO = 1,
186
187 /* worldwide regdomain */
188 ATH11K_SMBIOS_CC_WW = 2,
189 };
190
191 struct ath11k_smbios_bdf {
192 struct dmi_header hdr;
193
194 u8 features_disabled;
195
196 /* enum ath11k_smbios_cc_type */
197 u8 country_code_flag;
198
199 /* To set specific country, you need to set country code
200 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
201 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
202 * 0x53). To set country to INDONESIA, then country code value =
203 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
204 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
205 * setting.
206 */
207 u16 cc_code;
208
209 u8 bdf_enabled;
210 u8 bdf_ext[];
211 } __packed;
212
213 #define HEHANDLE_CAP_PHYINFO_SIZE 3
214 #define HECAP_PHYINFO_SIZE 9
215 #define HECAP_MACINFO_SIZE 5
216 #define HECAP_TXRX_MCS_NSS_SIZE 2
217 #define HECAP_PPET16_PPET8_MAX_SIZE 25
218
219 #define HE_PPET16_PPET8_SIZE 8
220
221 /* 802.11ax PPE (PPDU packet Extension) threshold */
222 struct he_ppe_threshold {
223 u32 numss_m1;
224 u32 ru_mask;
225 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
226 };
227
228 struct ath11k_he {
229 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
230 u32 hecap_rxmcsnssmap;
231 u32 hecap_txmcsnssmap;
232 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
233 struct he_ppe_threshold hecap_ppet;
234 u32 heop_param;
235 };
236
237 #define MAX_RADIOS 3
238
239 /* ipq5018 hw param macros */
240 #define MAX_RADIOS_5018 1
241 #define CE_CNT_5018 6
242 #define TARGET_CE_CNT_5018 9
243 #define SVC_CE_MAP_LEN_5018 17
244 #define RXDMA_PER_PDEV_5018 1
245
246 enum {
247 WMI_HOST_TP_SCALE_MAX = 0,
248 WMI_HOST_TP_SCALE_50 = 1,
249 WMI_HOST_TP_SCALE_25 = 2,
250 WMI_HOST_TP_SCALE_12 = 3,
251 WMI_HOST_TP_SCALE_MIN = 4,
252 WMI_HOST_TP_SCALE_SIZE = 5,
253 };
254
255 enum ath11k_scan_state {
256 ATH11K_SCAN_IDLE,
257 ATH11K_SCAN_STARTING,
258 ATH11K_SCAN_RUNNING,
259 ATH11K_SCAN_ABORTING,
260 };
261
262 enum ath11k_11d_state {
263 ATH11K_11D_IDLE,
264 ATH11K_11D_PREPARING,
265 ATH11K_11D_RUNNING,
266 };
267
268 enum ath11k_dev_flags {
269 ATH11K_CAC_RUNNING,
270 ATH11K_FLAG_CORE_REGISTERED,
271 ATH11K_FLAG_CRASH_FLUSH,
272 ATH11K_FLAG_RAW_MODE,
273 ATH11K_FLAG_HW_CRYPTO_DISABLED,
274 ATH11K_FLAG_BTCOEX,
275 ATH11K_FLAG_RECOVERY,
276 ATH11K_FLAG_UNREGISTERING,
277 ATH11K_FLAG_REGISTERED,
278 ATH11K_FLAG_QMI_FAIL,
279 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
280 ATH11K_FLAG_CE_IRQ_ENABLED,
281 ATH11K_FLAG_EXT_IRQ_ENABLED,
282 ATH11K_FLAG_FIXED_MEM_RGN,
283 ATH11K_FLAG_DEVICE_INIT_DONE,
284 ATH11K_FLAG_MULTI_MSI_VECTORS,
285 ATH11K_FLAG_FTM_SEGMENTED,
286 };
287
288 enum ath11k_monitor_flags {
289 ATH11K_FLAG_MONITOR_CONF_ENABLED,
290 ATH11K_FLAG_MONITOR_STARTED,
291 ATH11K_FLAG_MONITOR_VDEV_CREATED,
292 };
293
294 #define ATH11K_IPV6_UC_TYPE 0
295 #define ATH11K_IPV6_AC_TYPE 1
296
297 #define ATH11K_IPV6_MAX_COUNT 16
298 #define ATH11K_IPV4_MAX_COUNT 2
299
300 struct ath11k_arp_ns_offload {
301 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
302 u32 ipv4_count;
303 u32 ipv6_count;
304 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
305 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
306 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
307 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
308 u8 mac_addr[ETH_ALEN];
309 };
310
311 struct ath11k_rekey_data {
312 u8 kck[NL80211_KCK_LEN];
313 u8 kek[NL80211_KCK_LEN];
314 u64 replay_ctr;
315 bool enable_offload;
316 };
317
318 /**
319 * struct ath11k_chan_power_info - TPE containing power info per channel chunk
320 * @chan_cfreq: channel center freq (MHz)
321 * e.g.
322 * channel 37/20 MHz, it is 6135
323 * channel 37/40 MHz, it is 6125
324 * channel 37/80 MHz, it is 6145
325 * channel 37/160 MHz, it is 6185
326 * @tx_power: transmit power (dBm)
327 */
328 struct ath11k_chan_power_info {
329 u16 chan_cfreq;
330 s8 tx_power;
331 };
332
333 /* ath11k only deals with 160 MHz, so 8 subchannels */
334 #define ATH11K_NUM_PWR_LEVELS 8
335
336 /**
337 * struct ath11k_reg_tpc_power_info - regulatory TPC power info
338 * @is_psd_power: is PSD power or not
339 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD
340 * @ap_power_type: type of power (SP/LPI/VLP)
341 * @num_pwr_levels: number of power levels
342 * @reg_max: Array of maximum TX power (dBm) per PSD value
343 * @ap_constraint_power: AP constraint power (dBm)
344 * @tpe: TPE values processed from TPE IE
345 * @chan_power_info: power info to send to firmware
346 */
347 struct ath11k_reg_tpc_power_info {
348 bool is_psd_power;
349 u8 eirp_power;
350 enum wmi_reg_6ghz_ap_type ap_power_type;
351 u8 num_pwr_levels;
352 u8 reg_max[ATH11K_NUM_PWR_LEVELS];
353 u8 ap_constraint_power;
354 s8 tpe[ATH11K_NUM_PWR_LEVELS];
355 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS];
356 };
357
358 struct ath11k_vif {
359 u32 vdev_id;
360 enum wmi_vdev_type vdev_type;
361 enum wmi_vdev_subtype vdev_subtype;
362 u32 beacon_interval;
363 u32 dtim_period;
364 u16 ast_hash;
365 u16 ast_idx;
366 u16 tcl_metadata;
367 u8 hal_addr_search_flags;
368 u8 search_type;
369
370 struct ath11k *ar;
371 struct ieee80211_vif *vif;
372
373 u16 tx_seq_no;
374 struct wmi_wmm_params_all_arg wmm_params;
375 struct list_head list;
376 union {
377 struct {
378 u32 uapsd;
379 } sta;
380 struct {
381 /* 127 stations; wmi limit */
382 u8 tim_bitmap[16];
383 u8 tim_len;
384 u32 ssid_len;
385 u8 ssid[IEEE80211_MAX_SSID_LEN];
386 bool hidden_ssid;
387 /* P2P_IE with NoA attribute for P2P_GO case */
388 u32 noa_len;
389 u8 *noa_data;
390 } ap;
391 } u;
392
393 bool is_started;
394 bool is_up;
395 bool ftm_responder;
396 bool spectral_enabled;
397 bool ps;
398 u32 aid;
399 u8 bssid[ETH_ALEN];
400 struct cfg80211_bitrate_mask bitrate_mask;
401 struct delayed_work connection_loss_work;
402 struct work_struct bcn_tx_work;
403 int num_legacy_stations;
404 int rtscts_prot_mode;
405 int txpower;
406 bool rsnie_present;
407 bool wpaie_present;
408 bool bcca_zero_sent;
409 bool do_not_send_tmpl;
410 struct ath11k_arp_ns_offload arp_ns_offload;
411 struct ath11k_rekey_data rekey_data;
412
413 struct ath11k_reg_tpc_power_info reg_tpc_info;
414
415 /* Must be last - ends in a flexible-array member.
416 *
417 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
418 * especially because it has a flexible array. Find a better way.
419 */
420 struct ieee80211_chanctx_conf chanctx;
421 };
422
423 struct ath11k_vif_iter {
424 u32 vdev_id;
425 struct ath11k_vif *arvif;
426 };
427
428 struct ath11k_rx_peer_stats {
429 u64 num_msdu;
430 u64 num_mpdu_fcs_ok;
431 u64 num_mpdu_fcs_err;
432 u64 tcp_msdu_count;
433 u64 udp_msdu_count;
434 u64 other_msdu_count;
435 u64 ampdu_msdu_count;
436 u64 non_ampdu_msdu_count;
437 u64 stbc_count;
438 u64 beamformed_count;
439 u64 mcs_count[HAL_RX_MAX_MCS + 1];
440 u64 nss_count[HAL_RX_MAX_NSS];
441 u64 bw_count[HAL_RX_BW_MAX];
442 u64 gi_count[HAL_RX_GI_MAX];
443 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
444 u64 tid_count[IEEE80211_NUM_TIDS + 1];
445 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
446 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
447 u64 rx_duration;
448 u64 dcm_count;
449 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
450 };
451
452 #define ATH11K_HE_MCS_NUM 12
453 #define ATH11K_VHT_MCS_NUM 10
454 #define ATH11K_BW_NUM 4
455 #define ATH11K_NSS_NUM 4
456 #define ATH11K_LEGACY_NUM 12
457 #define ATH11K_GI_NUM 4
458 #define ATH11K_HT_MCS_NUM 32
459
460 enum ath11k_pkt_rx_err {
461 ATH11K_PKT_RX_ERR_FCS,
462 ATH11K_PKT_RX_ERR_TKIP,
463 ATH11K_PKT_RX_ERR_CRYPT,
464 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
465 ATH11K_PKT_RX_ERR_MAX,
466 };
467
468 enum ath11k_ampdu_subfrm_num {
469 ATH11K_AMPDU_SUBFRM_NUM_10,
470 ATH11K_AMPDU_SUBFRM_NUM_20,
471 ATH11K_AMPDU_SUBFRM_NUM_30,
472 ATH11K_AMPDU_SUBFRM_NUM_40,
473 ATH11K_AMPDU_SUBFRM_NUM_50,
474 ATH11K_AMPDU_SUBFRM_NUM_60,
475 ATH11K_AMPDU_SUBFRM_NUM_MORE,
476 ATH11K_AMPDU_SUBFRM_NUM_MAX,
477 };
478
479 enum ath11k_amsdu_subfrm_num {
480 ATH11K_AMSDU_SUBFRM_NUM_1,
481 ATH11K_AMSDU_SUBFRM_NUM_2,
482 ATH11K_AMSDU_SUBFRM_NUM_3,
483 ATH11K_AMSDU_SUBFRM_NUM_4,
484 ATH11K_AMSDU_SUBFRM_NUM_MORE,
485 ATH11K_AMSDU_SUBFRM_NUM_MAX,
486 };
487
488 enum ath11k_counter_type {
489 ATH11K_COUNTER_TYPE_BYTES,
490 ATH11K_COUNTER_TYPE_PKTS,
491 ATH11K_COUNTER_TYPE_MAX,
492 };
493
494 enum ath11k_stats_type {
495 ATH11K_STATS_TYPE_SUCC,
496 ATH11K_STATS_TYPE_FAIL,
497 ATH11K_STATS_TYPE_RETRY,
498 ATH11K_STATS_TYPE_AMPDU,
499 ATH11K_STATS_TYPE_MAX,
500 };
501
502 struct ath11k_htt_data_stats {
503 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
504 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
505 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
506 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
507 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
508 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
509 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
510 };
511
512 struct ath11k_htt_tx_stats {
513 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
514 u64 tx_duration;
515 u64 ba_fails;
516 u64 ack_fails;
517 };
518
519 struct ath11k_per_ppdu_tx_stats {
520 u16 succ_pkts;
521 u16 failed_pkts;
522 u16 retry_pkts;
523 u32 succ_bytes;
524 u32 failed_bytes;
525 u32 retry_bytes;
526 };
527
528 DECLARE_EWMA(avg_rssi, 10, 8)
529
530 struct ath11k_sta {
531 struct ath11k_vif *arvif;
532
533 /* the following are protected by ar->data_lock */
534 u32 changed; /* IEEE80211_RC_* */
535 u32 bw;
536 u32 nss;
537 u32 smps;
538 enum hal_pn_type pn_type;
539
540 struct work_struct update_wk;
541 struct work_struct set_4addr_wk;
542 struct rate_info txrate;
543 u32 peer_nss;
544 struct rate_info last_txrate;
545 u64 rx_duration;
546 u64 tx_duration;
547 u8 rssi_comb;
548 struct ewma_avg_rssi avg_rssi;
549 s8 rssi_beacon;
550 s8 chain_signal[IEEE80211_MAX_CHAINS];
551 struct ath11k_htt_tx_stats *tx_stats;
552 struct ath11k_rx_peer_stats *rx_stats;
553
554 #ifdef CONFIG_MAC80211_DEBUGFS
555 /* protected by conf_mutex */
556 bool aggr_mode;
557 #endif
558
559 bool use_4addr_set;
560 u16 tcl_metadata;
561
562 /* Protected with ar->data_lock */
563 enum ath11k_wmi_peer_ps_state peer_ps_state;
564 u64 ps_start_time;
565 u64 ps_start_jiffies;
566 u64 ps_total_duration;
567 bool peer_current_ps_valid;
568
569 u32 bw_prev;
570 };
571
572 #define ATH11K_MIN_5G_FREQ 4150
573 #define ATH11K_MIN_6G_FREQ 5925
574 #define ATH11K_MAX_6G_FREQ 7115
575 #define ATH11K_NUM_CHANS 102
576 #define ATH11K_MAX_5G_CHAN 177
577
578 enum ath11k_state {
579 ATH11K_STATE_OFF,
580 ATH11K_STATE_ON,
581 ATH11K_STATE_RESTARTING,
582 ATH11K_STATE_RESTARTED,
583 ATH11K_STATE_WEDGED,
584 ATH11K_STATE_FTM,
585 /* Add other states as required */
586 };
587
588 /* Antenna noise floor */
589 #define ATH11K_DEFAULT_NOISE_FLOOR -95
590
591 #define ATH11K_INVALID_RSSI_FULL -1
592
593 #define ATH11K_INVALID_RSSI_EMPTY -128
594
595 struct ath11k_fw_stats {
596 struct dentry *debugfs_fwstats;
597 u32 pdev_id;
598 u32 stats_id;
599 struct list_head pdevs;
600 struct list_head vdevs;
601 struct list_head bcn;
602 };
603
604 struct ath11k_dbg_htt_stats {
605 u8 type;
606 u8 reset;
607 struct debug_htt_stats_req *stats_req;
608 /* protects shared stats req buffer */
609 spinlock_t lock;
610 };
611
612 #define MAX_MODULE_ID_BITMAP_WORDS 16
613
614 struct ath11k_debug {
615 struct dentry *debugfs_pdev;
616 struct ath11k_dbg_htt_stats htt_stats;
617 u32 extd_tx_stats;
618 u32 extd_rx_stats;
619 u32 pktlog_filter;
620 u32 pktlog_mode;
621 u32 pktlog_peer_valid;
622 u8 pktlog_peer_addr[ETH_ALEN];
623 u32 rx_filter;
624 u32 mem_offset;
625 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
626 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
627 };
628
629 struct ath11k_per_peer_tx_stats {
630 u32 succ_bytes;
631 u32 retry_bytes;
632 u32 failed_bytes;
633 u16 succ_pkts;
634 u16 retry_pkts;
635 u16 failed_pkts;
636 u32 duration;
637 u8 ba_fails;
638 bool is_ampdu;
639 };
640
641 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
642 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
643
644 struct ath11k {
645 struct ath11k_base *ab;
646 struct ath11k_pdev *pdev;
647 struct ieee80211_hw *hw;
648 struct ath11k_pdev_wmi *wmi;
649 struct ath11k_pdev_dp dp;
650 u8 mac_addr[ETH_ALEN];
651 struct ath11k_he ar_he;
652 enum ath11k_state state;
653 bool supports_6ghz;
654 struct {
655 struct completion started;
656 struct completion completed;
657 struct completion on_channel;
658 struct delayed_work timeout;
659 enum ath11k_scan_state state;
660 bool is_roc;
661 int vdev_id;
662 int roc_freq;
663 bool roc_notify;
664 } scan;
665
666 struct {
667 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
668 struct ieee80211_sband_iftype_data
669 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
670 } mac;
671
672 unsigned long dev_flags;
673 unsigned int filter_flags;
674 unsigned long monitor_flags;
675 u32 min_tx_power;
676 u32 max_tx_power;
677 u32 txpower_limit_2g;
678 u32 txpower_limit_5g;
679 u32 txpower_scale;
680 u32 power_scale;
681 u32 chan_tx_pwr;
682 u32 num_stations;
683 u32 max_num_stations;
684 /* To synchronize concurrent synchronous mac80211 callback operations,
685 * concurrent debugfs configuration and concurrent FW statistics events.
686 */
687 struct mutex conf_mutex;
688 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
689 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
690 * channel context data, survey info, test mode data.
691 */
692 spinlock_t data_lock;
693
694 struct list_head arvifs;
695 /* should never be NULL; needed for regular htt rx */
696 struct ieee80211_channel *rx_channel;
697
698 /* valid during scan; needed for mgmt rx during scan */
699 struct ieee80211_channel *scan_channel;
700
701 u8 cfg_tx_chainmask;
702 u8 cfg_rx_chainmask;
703 u8 num_rx_chains;
704 u8 num_tx_chains;
705 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
706 u8 pdev_idx;
707 u8 lmac_id;
708
709 struct completion peer_assoc_done;
710 struct completion peer_delete_done;
711
712 int install_key_status;
713 struct completion install_key_done;
714
715 int last_wmi_vdev_start_status;
716 struct completion vdev_setup_done;
717 struct completion vdev_delete_done;
718
719 int num_peers;
720 int max_num_peers;
721 u32 num_started_vdevs;
722 u32 num_created_vdevs;
723 unsigned long long allocated_vdev_map;
724
725 struct idr txmgmt_idr;
726 /* protects txmgmt_idr data */
727 spinlock_t txmgmt_idr_lock;
728 atomic_t num_pending_mgmt_tx;
729 wait_queue_head_t txmgmt_empty_waitq;
730
731 /* cycle count is reported twice for each visited channel during scan.
732 * access protected by data_lock
733 */
734 u32 survey_last_rx_clear_count;
735 u32 survey_last_cycle_count;
736
737 /* Channel info events are expected to come in pairs without and with
738 * COMPLETE flag set respectively for each channel visit during scan.
739 *
740 * However there are deviations from this rule. This flag is used to
741 * avoid reporting garbage data.
742 */
743 bool ch_info_can_report_survey;
744 struct survey_info survey[ATH11K_NUM_CHANS];
745 struct completion bss_survey_done;
746
747 struct work_struct regd_update_work;
748
749 struct work_struct wmi_mgmt_tx_work;
750 struct sk_buff_head wmi_mgmt_tx_queue;
751
752 struct ath11k_wow wow;
753 struct completion target_suspend;
754 bool target_suspend_ack;
755 struct ath11k_per_peer_tx_stats peer_tx_stats;
756 struct list_head ppdu_stats_info;
757 u32 ppdu_stat_list_depth;
758
759 struct ath11k_per_peer_tx_stats cached_stats;
760 u32 last_ppdu_id;
761 u32 cached_ppdu_id;
762 int monitor_vdev_id;
763 struct completion fw_mode_reset;
764 u8 ftm_msgref;
765 #ifdef CONFIG_ATH11K_DEBUGFS
766 struct ath11k_debug debug;
767 #endif
768 #ifdef CONFIG_ATH11K_SPECTRAL
769 struct ath11k_spectral spectral;
770 #endif
771 bool dfs_block_radar_events;
772 struct ath11k_thermal thermal;
773 u32 vdev_id_11d_scan;
774 struct completion completed_11d_scan;
775 enum ath11k_11d_state state_11d;
776 bool regdom_set_by_user;
777 int hw_rate_code;
778 u8 twt_enabled;
779 bool nlo_enabled;
780 u8 alpha2[REG_ALPHA2_LEN + 1];
781 struct ath11k_fw_stats fw_stats;
782 struct completion fw_stats_complete;
783 bool fw_stats_done;
784
785 /* protected by conf_mutex */
786 bool ps_state_enable;
787 bool ps_timekeeper_enable;
788 s8 max_allowed_tx_power;
789 };
790
791 struct ath11k_band_cap {
792 u32 phy_id;
793 u32 max_bw_supported;
794 u32 ht_cap_info;
795 u32 he_cap_info[2];
796 u32 he_mcs;
797 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
798 struct ath11k_ppe_threshold he_ppet;
799 u16 he_6ghz_capa;
800 };
801
802 struct ath11k_pdev_cap {
803 u32 supported_bands;
804 u32 ampdu_density;
805 u32 vht_cap;
806 u32 vht_mcs;
807 u32 he_mcs;
808 u32 tx_chain_mask;
809 u32 rx_chain_mask;
810 u32 tx_chain_mask_shift;
811 u32 rx_chain_mask_shift;
812 struct ath11k_band_cap band[NUM_NL80211_BANDS];
813 bool nss_ratio_enabled;
814 u8 nss_ratio_info;
815 };
816
817 struct ath11k_pdev {
818 struct ath11k *ar;
819 u32 pdev_id;
820 struct ath11k_pdev_cap cap;
821 u8 mac_addr[ETH_ALEN];
822 };
823
824 struct ath11k_board_data {
825 const struct firmware *fw;
826 const void *data;
827 size_t len;
828 };
829
830 struct ath11k_pci_ops {
831 int (*wakeup)(struct ath11k_base *ab);
832 void (*release)(struct ath11k_base *ab);
833 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
834 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
835 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
836 };
837
838 /* IPQ8074 HW channel counters frequency value in hertz */
839 #define IPQ8074_CC_FREQ_HERTZ 320000
840
841 struct ath11k_bp_stats {
842 /* Head Pointer reported by the last HTT Backpressure event for the ring */
843 u16 hp;
844
845 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
846 u16 tp;
847
848 /* Number of Backpressure events received for the ring */
849 u32 count;
850
851 /* Last recorded event timestamp */
852 unsigned long jiffies;
853 };
854
855 struct ath11k_dp_ring_bp_stats {
856 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
857 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
858 };
859
860 struct ath11k_soc_dp_tx_err_stats {
861 /* TCL Ring Descriptor unavailable */
862 u32 desc_na[DP_TCL_NUM_RING_MAX];
863 /* Other failures during dp_tx due to mem allocation failure
864 * idr unavailable etc.
865 */
866 atomic_t misc_fail;
867 };
868
869 struct ath11k_soc_dp_stats {
870 u32 err_ring_pkts;
871 u32 invalid_rbm;
872 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
873 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
874 u32 hal_reo_error[DP_REO_DST_RING_MAX];
875 struct ath11k_soc_dp_tx_err_stats tx_err;
876 struct ath11k_dp_ring_bp_stats bp_stats;
877 };
878
879 struct ath11k_msi_user {
880 char *name;
881 int num_vectors;
882 u32 base_vector;
883 };
884
885 struct ath11k_msi_config {
886 int total_vectors;
887 int total_users;
888 struct ath11k_msi_user *users;
889 u16 hw_rev;
890 };
891
892 /* Master structure to hold the hw data which may be used in core module */
893 struct ath11k_base {
894 enum ath11k_hw_rev hw_rev;
895 enum ath11k_firmware_mode fw_mode;
896 struct platform_device *pdev;
897 struct device *dev;
898 struct ath11k_qmi qmi;
899 struct ath11k_wmi_base wmi_ab;
900 struct completion fw_ready;
901 int num_radios;
902 /* HW channel counters frequency value in hertz common to all MACs */
903 u32 cc_freq_hz;
904
905 struct ath11k_htc htc;
906
907 struct ath11k_dp dp;
908
909 void __iomem *mem;
910 void __iomem *mem_ce;
911 unsigned long mem_len;
912
913 struct {
914 enum ath11k_bus bus;
915 const struct ath11k_hif_ops *ops;
916 } hif;
917
918 struct {
919 struct completion wakeup_completed;
920 } wow;
921
922 struct ath11k_ce ce;
923 struct timer_list rx_replenish_retry;
924 struct ath11k_hal hal;
925 /* To synchronize core_start/core_stop */
926 struct mutex core_lock;
927 /* Protects data like peers */
928 spinlock_t base_lock;
929 struct ath11k_pdev pdevs[MAX_RADIOS];
930 struct {
931 enum WMI_HOST_WLAN_BAND supported_bands;
932 u32 pdev_id;
933 } target_pdev_ids[MAX_RADIOS];
934 u8 target_pdev_count;
935 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
936 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
937 unsigned long long free_vdev_map;
938
939 /* To synchronize rhash tbl write operation */
940 struct mutex tbl_mtx_lock;
941
942 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
943 struct rhashtable *rhead_peer_addr;
944 struct rhashtable_params rhash_peer_addr_param;
945
946 /* The rhashtable containing struct ath11k_peer keyed by id */
947 struct rhashtable *rhead_peer_id;
948 struct rhashtable_params rhash_peer_id_param;
949
950 struct list_head peers;
951 wait_queue_head_t peer_mapping_wq;
952 u8 mac_addr[ETH_ALEN];
953 int irq_num[ATH11K_IRQ_NUM_MAX];
954 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
955 struct ath11k_targ_cap target_caps;
956 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
957 bool pdevs_macaddr_valid;
958
959 struct ath11k_hw_params hw_params;
960
961 const struct firmware *cal_file;
962
963 /* Below regd's are protected by ab->data_lock */
964 /* This is the regd set for every radio
965 * by the firmware during initialization
966 */
967 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
968 /* This regd is set during dynamic country setting
969 * This may or may not be used during the runtime
970 */
971 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
972 struct cur_regulatory_info *reg_info_store;
973
974 /* Current DFS Regulatory */
975 enum ath11k_dfs_region dfs_region;
976 #ifdef CONFIG_ATH11K_DEBUGFS
977 struct dentry *debugfs_soc;
978 #endif
979 struct ath11k_soc_dp_stats soc_stats;
980
981 unsigned long dev_flags;
982 struct completion driver_recovery;
983 struct workqueue_struct *workqueue;
984 struct work_struct restart_work;
985 struct work_struct update_11d_work;
986 u8 new_alpha2[3];
987 struct workqueue_struct *workqueue_aux;
988 struct work_struct reset_work;
989 atomic_t reset_count;
990 atomic_t recovery_count;
991 atomic_t recovery_start_count;
992 bool is_reset;
993 struct completion reset_complete;
994 struct completion reconfigure_complete;
995 struct completion recovery_start;
996 /* continuous recovery fail count */
997 atomic_t fail_cont_count;
998 unsigned long reset_fail_timeout;
999 struct {
1000 /* protected by data_lock */
1001 u32 fw_crash_counter;
1002 } stats;
1003 u32 pktlog_defs_checksum;
1004
1005 struct ath11k_dbring_cap *db_caps;
1006 u32 num_db_cap;
1007
1008 /* To synchronize 11d scan vdev id */
1009 struct mutex vdev_id_11d_lock;
1010 struct timer_list mon_reap_timer;
1011
1012 struct completion htc_suspend;
1013
1014 struct {
1015 enum ath11k_bdf_search bdf_search;
1016 u32 vendor;
1017 u32 device;
1018 u32 subsystem_vendor;
1019 u32 subsystem_device;
1020 } id;
1021
1022 struct {
1023 struct {
1024 const struct ath11k_msi_config *config;
1025 u32 ep_base_data;
1026 u32 irqs[32];
1027 u32 addr_lo;
1028 u32 addr_hi;
1029 } msi;
1030
1031 const struct ath11k_pci_ops *ops;
1032 } pci;
1033
1034 struct {
1035 u32 api_version;
1036
1037 const struct firmware *fw;
1038 const u8 *amss_data;
1039 size_t amss_len;
1040 const u8 *m3_data;
1041 size_t m3_len;
1042
1043 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
1044 } fw;
1045
1046 #ifdef CONFIG_NL80211_TESTMODE
1047 struct {
1048 u32 data_pos;
1049 u32 expected_seq;
1050 u8 *eventdata;
1051 } testmode;
1052 #endif
1053
1054 /* must be last */
1055 u8 drv_priv[] __aligned(sizeof(void *));
1056 };
1057
1058 struct ath11k_fw_stats_pdev {
1059 struct list_head list;
1060
1061 /* PDEV stats */
1062 s32 ch_noise_floor;
1063 /* Cycles spent transmitting frames */
1064 u32 tx_frame_count;
1065 /* Cycles spent receiving frames */
1066 u32 rx_frame_count;
1067 /* Total channel busy time, evidently */
1068 u32 rx_clear_count;
1069 /* Total on-channel time */
1070 u32 cycle_count;
1071 u32 phy_err_count;
1072 u32 chan_tx_power;
1073 u32 ack_rx_bad;
1074 u32 rts_bad;
1075 u32 rts_good;
1076 u32 fcs_bad;
1077 u32 no_beacons;
1078 u32 mib_int_count;
1079
1080 /* PDEV TX stats */
1081 /* Num HTT cookies queued to dispatch list */
1082 s32 comp_queued;
1083 /* Num HTT cookies dispatched */
1084 s32 comp_delivered;
1085 /* Num MSDU queued to WAL */
1086 s32 msdu_enqued;
1087 /* Num MPDU queue to WAL */
1088 s32 mpdu_enqued;
1089 /* Num MSDUs dropped by WMM limit */
1090 s32 wmm_drop;
1091 /* Num Local frames queued */
1092 s32 local_enqued;
1093 /* Num Local frames done */
1094 s32 local_freed;
1095 /* Num queued to HW */
1096 s32 hw_queued;
1097 /* Num PPDU reaped from HW */
1098 s32 hw_reaped;
1099 /* Num underruns */
1100 s32 underrun;
1101 /* Num hw paused */
1102 u32 hw_paused;
1103 /* Num PPDUs cleaned up in TX abort */
1104 s32 tx_abort;
1105 /* Num MPDUs requeued by SW */
1106 s32 mpdus_requeued;
1107 /* excessive retries */
1108 u32 tx_ko;
1109 u32 tx_xretry;
1110 /* data hw rate code */
1111 u32 data_rc;
1112 /* Scheduler self triggers */
1113 u32 self_triggers;
1114 /* frames dropped due to excessive sw retries */
1115 u32 sw_retry_failure;
1116 /* illegal rate phy errors */
1117 u32 illgl_rate_phy_err;
1118 /* wal pdev continuous xretry */
1119 u32 pdev_cont_xretry;
1120 /* wal pdev tx timeouts */
1121 u32 pdev_tx_timeout;
1122 /* wal pdev resets */
1123 u32 pdev_resets;
1124 /* frames dropped due to non-availability of stateless TIDs */
1125 u32 stateless_tid_alloc_failure;
1126 /* PhY/BB underrun */
1127 u32 phy_underrun;
1128 /* MPDU is more than txop limit */
1129 u32 txop_ovf;
1130 /* Num sequences posted */
1131 u32 seq_posted;
1132 /* Num sequences failed in queueing */
1133 u32 seq_failed_queueing;
1134 /* Num sequences completed */
1135 u32 seq_completed;
1136 /* Num sequences restarted */
1137 u32 seq_restarted;
1138 /* Num of MU sequences posted */
1139 u32 mu_seq_posted;
1140 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1141 * (Reset,channel change)
1142 */
1143 s32 mpdus_sw_flush;
1144 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1145 s32 mpdus_hw_filter;
1146 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1147 * PPDU_duration based on rate, dyn_bw)
1148 */
1149 s32 mpdus_truncated;
1150 /* Num MPDUs that was tried but didn't receive ACK or BA */
1151 s32 mpdus_ack_failed;
1152 /* Num MPDUs that was dropped du to expiry. */
1153 s32 mpdus_expired;
1154
1155 /* PDEV RX stats */
1156 /* Cnts any change in ring routing mid-ppdu */
1157 s32 mid_ppdu_route_change;
1158 /* Total number of statuses processed */
1159 s32 status_rcvd;
1160 /* Extra frags on rings 0-3 */
1161 s32 r0_frags;
1162 s32 r1_frags;
1163 s32 r2_frags;
1164 s32 r3_frags;
1165 /* MSDUs / MPDUs delivered to HTT */
1166 s32 htt_msdus;
1167 s32 htt_mpdus;
1168 /* MSDUs / MPDUs delivered to local stack */
1169 s32 loc_msdus;
1170 s32 loc_mpdus;
1171 /* AMSDUs that have more MSDUs than the status ring size */
1172 s32 oversize_amsdu;
1173 /* Number of PHY errors */
1174 s32 phy_errs;
1175 /* Number of PHY errors drops */
1176 s32 phy_err_drop;
1177 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1178 s32 mpdu_errs;
1179 /* Num overflow errors */
1180 s32 rx_ovfl_errs;
1181 };
1182
1183 struct ath11k_fw_stats_vdev {
1184 struct list_head list;
1185
1186 u32 vdev_id;
1187 u32 beacon_snr;
1188 u32 data_snr;
1189 u32 num_tx_frames[WLAN_MAX_AC];
1190 u32 num_rx_frames;
1191 u32 num_tx_frames_retries[WLAN_MAX_AC];
1192 u32 num_tx_frames_failures[WLAN_MAX_AC];
1193 u32 num_rts_fail;
1194 u32 num_rts_success;
1195 u32 num_rx_err;
1196 u32 num_rx_discard;
1197 u32 num_tx_not_acked;
1198 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1199 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1200 };
1201
1202 struct ath11k_fw_stats_bcn {
1203 struct list_head list;
1204
1205 u32 vdev_id;
1206 u32 tx_bcn_succ_cnt;
1207 u32 tx_bcn_outage_cnt;
1208 };
1209
1210 void ath11k_fw_stats_init(struct ath11k *ar);
1211 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1212 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1213 void ath11k_fw_stats_bcn_free(struct list_head *head);
1214 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1215
1216 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1217 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1218 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1219
1220 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1221 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1222
1223 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1224 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1225
1226 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1227 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1228 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1229 int ath11k_core_pre_init(struct ath11k_base *ab);
1230 int ath11k_core_init(struct ath11k_base *ath11k);
1231 void ath11k_core_deinit(struct ath11k_base *ath11k);
1232 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1233 enum ath11k_bus bus);
1234 void ath11k_core_free(struct ath11k_base *ath11k);
1235 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1236 struct ath11k_board_data *bd);
1237 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1238 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1239 struct ath11k_board_data *bd,
1240 const char *name);
1241 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1242 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1243 int ath11k_core_check_smbios(struct ath11k_base *ab);
1244 void ath11k_core_halt(struct ath11k *ar);
1245 int ath11k_core_resume(struct ath11k_base *ab);
1246 int ath11k_core_suspend(struct ath11k_base *ab);
1247 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1248 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1249
1250 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1251 const char *filename);
1252
ath11k_scan_state_str(enum ath11k_scan_state state)1253 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1254 {
1255 switch (state) {
1256 case ATH11K_SCAN_IDLE:
1257 return "idle";
1258 case ATH11K_SCAN_STARTING:
1259 return "starting";
1260 case ATH11K_SCAN_RUNNING:
1261 return "running";
1262 case ATH11K_SCAN_ABORTING:
1263 return "aborting";
1264 }
1265
1266 return "unknown";
1267 }
1268
ATH11K_SKB_CB(struct sk_buff * skb)1269 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1270 {
1271 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1272 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1273 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1274 }
1275
ATH11K_SKB_RXCB(struct sk_buff * skb)1276 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1277 {
1278 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1279 return (struct ath11k_skb_rxcb *)skb->cb;
1280 }
1281
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1282 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1283 {
1284 return (struct ath11k_vif *)vif->drv_priv;
1285 }
1286
ath11k_sta_to_arsta(struct ieee80211_sta * sta)1287 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
1288 {
1289 return (struct ath11k_sta *)sta->drv_priv;
1290 }
1291
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1292 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1293 int mac_id)
1294 {
1295 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1296 }
1297
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1298 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1299 const char *filename,
1300 void *buf, size_t buf_len)
1301 {
1302 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1303 ab->hw_params.fw.dir, filename);
1304 }
1305
ath11k_bus_str(enum ath11k_bus bus)1306 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1307 {
1308 switch (bus) {
1309 case ATH11K_BUS_PCI:
1310 return "pci";
1311 case ATH11K_BUS_AHB:
1312 return "ahb";
1313 }
1314
1315 return "unknown";
1316 }
1317
1318 #endif /* _CORE_H_ */
1319