1 /* Copyright 2021 Advanced Micro Devices, Inc. All rights reserved. 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the "Software"), 5 * to deal in the Software without restriction, including without limitation 6 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 * and/or sell copies of the Software, and to permit persons to whom the 8 * Software is furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 * OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * Authors: AMD 22 * 23 */ 24 25 #include "link_enc_cfg.h" 26 #include "resource.h" 27 #include "link.h" 28 29 #define DC_LOGGER dc->ctx->logger 30 31 /* Check whether stream is supported by DIG link encoders. */ 32 static bool is_dig_link_enc_stream(struct dc_stream_state *stream) 33 { 34 bool is_dig_stream = false; 35 struct link_encoder *link_enc = NULL; 36 int i; 37 38 /* Loop over created link encoder objects. */ 39 if (stream) { 40 for (i = 0; i < stream->ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) { 41 link_enc = stream->ctx->dc->res_pool->link_encoders[i]; 42 43 /* Need to check link signal type rather than stream signal type which may not 44 * yet match. 45 */ 46 if (link_enc && ((uint32_t)stream->link->connector_signal & link_enc->output_signals)) { 47 is_dig_stream = true; 48 break; 49 } 50 } 51 } 52 return is_dig_stream; 53 } 54 55 static struct link_enc_assignment get_assignment(struct dc *dc, int i) 56 { 57 struct link_enc_assignment assignment; 58 59 if (dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_TRANSIENT) 60 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i]; 61 else /* LINK_ENC_CFG_STEADY */ 62 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 63 64 return assignment; 65 } 66 67 /* Return stream using DIG link encoder resource. NULL if unused. */ 68 static struct dc_stream_state *get_stream_using_link_enc( 69 struct dc_state *state, 70 enum engine_id eng_id) 71 { 72 struct dc_stream_state *stream = NULL; 73 int i; 74 75 for (i = 0; i < state->stream_count; i++) { 76 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 77 78 if ((assignment.valid == true) && (assignment.eng_id == eng_id)) { 79 stream = state->streams[i]; 80 break; 81 } 82 } 83 84 return stream; 85 } 86 87 static void remove_link_enc_assignment( 88 struct dc_state *state, 89 struct dc_stream_state *stream, 90 enum engine_id eng_id) 91 { 92 int eng_idx; 93 int i; 94 95 if (eng_id != ENGINE_ID_UNKNOWN) { 96 eng_idx = eng_id - ENGINE_ID_DIGA; 97 98 /* stream ptr of stream in dc_state used to update correct entry in 99 * link_enc_assignments table. 100 */ 101 for (i = 0; i < MAX_PIPES; i++) { 102 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 103 104 if (assignment.valid && assignment.stream == stream) { 105 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid = false; 106 /* Only add link encoder back to availability pool if not being 107 * used by any other stream (i.e. removing SST stream or last MST stream). 108 */ 109 if (get_stream_using_link_enc(state, eng_id) == NULL) 110 state->res_ctx.link_enc_cfg_ctx.link_enc_avail[eng_idx] = eng_id; 111 112 stream->link_enc = NULL; 113 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].eng_id = ENGINE_ID_UNKNOWN; 114 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL; 115 dc_stream_release(stream); 116 break; 117 } 118 } 119 } 120 } 121 122 static void add_link_enc_assignment( 123 struct dc_state *state, 124 struct dc_stream_state *stream, 125 enum engine_id eng_id) 126 { 127 int eng_idx; 128 int i; 129 130 if (eng_id != ENGINE_ID_UNKNOWN) { 131 eng_idx = eng_id - ENGINE_ID_DIGA; 132 133 /* stream ptr of stream in dc_state used to update correct entry in 134 * link_enc_assignments table. 135 */ 136 for (i = 0; i < state->stream_count; i++) { 137 if (stream == state->streams[i]) { 138 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i] = (struct link_enc_assignment){ 139 .valid = true, 140 .ep_id = (struct display_endpoint_id) { 141 .link_id = stream->link->link_id, 142 .ep_type = stream->link->ep_type}, 143 .eng_id = eng_id, 144 .stream = stream}; 145 dc_stream_retain(stream); 146 state->res_ctx.link_enc_cfg_ctx.link_enc_avail[eng_idx] = ENGINE_ID_UNKNOWN; 147 stream->link_enc = stream->ctx->dc->res_pool->link_encoders[eng_idx]; 148 break; 149 } 150 } 151 152 /* Attempted to add an encoder assignment for a stream not in dc_state. */ 153 ASSERT(i != state->stream_count); 154 } 155 } 156 157 /* Return first available DIG link encoder. */ 158 static enum engine_id find_first_avail_link_enc( 159 const struct dc_context *ctx, 160 const struct dc_state *state, 161 enum engine_id eng_id_requested) 162 { 163 enum engine_id eng_id = ENGINE_ID_UNKNOWN; 164 int i; 165 166 if (eng_id_requested != ENGINE_ID_UNKNOWN) { 167 168 for (i = 0; i < ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) { 169 eng_id = state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i]; 170 if (eng_id == eng_id_requested) 171 return eng_id; 172 } 173 } 174 175 eng_id = ENGINE_ID_UNKNOWN; 176 177 for (i = 0; i < ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) { 178 eng_id = state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i]; 179 if (eng_id != ENGINE_ID_UNKNOWN) 180 break; 181 } 182 183 return eng_id; 184 } 185 186 /* Check for availability of link encoder eng_id. */ 187 static bool is_avail_link_enc(struct dc_state *state, enum engine_id eng_id, struct dc_stream_state *stream) 188 { 189 bool is_avail = false; 190 int eng_idx = eng_id - ENGINE_ID_DIGA; 191 192 /* An encoder is available if it is still in the availability pool. */ 193 if (eng_id != ENGINE_ID_UNKNOWN && state->res_ctx.link_enc_cfg_ctx.link_enc_avail[eng_idx] != ENGINE_ID_UNKNOWN) { 194 is_avail = true; 195 } else { 196 struct dc_stream_state *stream_assigned = NULL; 197 198 /* MST streams share the same link and should share the same encoder. 199 * If a stream that has already been assigned a link encoder uses as the 200 * same link as the stream checking for availability, it is an MST stream 201 * and should use the same link encoder. 202 */ 203 stream_assigned = get_stream_using_link_enc(state, eng_id); 204 if (stream_assigned && stream != stream_assigned && stream->link == stream_assigned->link) 205 is_avail = true; 206 } 207 208 return is_avail; 209 } 210 211 /* Test for display_endpoint_id equality. */ 212 static bool are_ep_ids_equal(struct display_endpoint_id *lhs, struct display_endpoint_id *rhs) 213 { 214 bool are_equal = false; 215 216 if (lhs->link_id.id == rhs->link_id.id && 217 lhs->link_id.enum_id == rhs->link_id.enum_id && 218 lhs->link_id.type == rhs->link_id.type && 219 lhs->ep_type == rhs->ep_type) 220 are_equal = true; 221 222 return are_equal; 223 } 224 225 static struct link_encoder *get_link_enc_used_by_link( 226 struct dc_state *state, 227 const struct dc_link *link) 228 { 229 struct link_encoder *link_enc = NULL; 230 struct display_endpoint_id ep_id; 231 int i; 232 233 ep_id = (struct display_endpoint_id) { 234 .link_id = link->link_id, 235 .ep_type = link->ep_type}; 236 237 for (i = 0; i < MAX_PIPES; i++) { 238 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 239 if (assignment.eng_id == ENGINE_ID_UNKNOWN) 240 continue; 241 242 if (assignment.valid == true && are_ep_ids_equal(&assignment.ep_id, &ep_id)) 243 link_enc = link->dc->res_pool->link_encoders[assignment.eng_id - ENGINE_ID_DIGA]; 244 } 245 246 return link_enc; 247 } 248 /* Clear all link encoder assignments. */ 249 static void clear_enc_assignments(const struct dc *dc, struct dc_state *state) 250 { 251 int i; 252 253 for (i = 0; i < MAX_PIPES; i++) { 254 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid = false; 255 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].eng_id = ENGINE_ID_UNKNOWN; 256 if (state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream != NULL) { 257 dc_stream_release(state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream); 258 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL; 259 } 260 } 261 262 for (i = 0; i < dc->res_pool->res_cap->num_dig_link_enc; i++) { 263 if (dc->res_pool->link_encoders[i]) 264 state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i] = (enum engine_id) i; 265 else 266 state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i] = ENGINE_ID_UNKNOWN; 267 } 268 } 269 270 void link_enc_cfg_init( 271 const struct dc *dc, 272 struct dc_state *state) 273 { 274 clear_enc_assignments(dc, state); 275 276 state->res_ctx.link_enc_cfg_ctx.mode = LINK_ENC_CFG_STEADY; 277 } 278 279 void link_enc_cfg_copy(const struct dc_state *src_ctx, struct dc_state *dst_ctx) 280 { 281 memcpy(&dst_ctx->res_ctx.link_enc_cfg_ctx, 282 &src_ctx->res_ctx.link_enc_cfg_ctx, 283 sizeof(dst_ctx->res_ctx.link_enc_cfg_ctx)); 284 } 285 286 void link_enc_cfg_link_encs_assign( 287 struct dc *dc, 288 struct dc_state *state, 289 struct dc_stream_state *streams[], 290 uint8_t stream_count) 291 { 292 enum engine_id eng_id = ENGINE_ID_UNKNOWN, eng_id_req = ENGINE_ID_UNKNOWN; 293 int i; 294 int j; 295 296 ASSERT(state->stream_count == stream_count); 297 ASSERT(dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_STEADY); 298 299 /* Release DIG link encoder resources before running assignment algorithm. */ 300 for (i = 0; i < dc->current_state->stream_count; i++) 301 dc->res_pool->funcs->link_enc_unassign(state, dc->current_state->streams[i]); 302 303 for (i = 0; i < MAX_PIPES; i++) 304 ASSERT(state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid == false); 305 306 /* (a) Assign DIG link encoders to physical (unmappable) endpoints first. */ 307 for (i = 0; i < stream_count; i++) { 308 struct dc_stream_state *stream = streams[i]; 309 310 /* skip it if the link is mappable endpoint. */ 311 if (stream->link->is_dig_mapping_flexible) 312 continue; 313 314 /* Skip stream if not supported by DIG link encoder. */ 315 if (!is_dig_link_enc_stream(stream)) 316 continue; 317 318 /* Physical endpoints have a fixed mapping to DIG link encoders. */ 319 eng_id = stream->link->eng_id; 320 add_link_enc_assignment(state, stream, eng_id); 321 } 322 323 /* (b) Retain previous assignments for mappable endpoints if encoders still available. */ 324 eng_id = ENGINE_ID_UNKNOWN; 325 326 if (state != dc->current_state) { 327 struct dc_state *prev_state = dc->current_state; 328 329 for (i = 0; i < stream_count; i++) { 330 struct dc_stream_state *stream = state->streams[i]; 331 332 /* Skip it if the link is NOT mappable endpoint. */ 333 if (!stream->link->is_dig_mapping_flexible) 334 continue; 335 336 /* Skip stream if not supported by DIG link encoder. */ 337 if (!is_dig_link_enc_stream(stream)) 338 continue; 339 340 for (j = 0; j < prev_state->stream_count; j++) { 341 struct dc_stream_state *prev_stream = prev_state->streams[j]; 342 343 if (stream == prev_stream && stream->link == prev_stream->link && 344 prev_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[j].valid) { 345 eng_id = prev_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[j].eng_id; 346 347 if (is_avail_link_enc(state, eng_id, stream)) 348 add_link_enc_assignment(state, stream, eng_id); 349 } 350 } 351 } 352 } 353 354 /* (c) Then assign encoders to remaining mappable endpoints. */ 355 eng_id = ENGINE_ID_UNKNOWN; 356 357 for (i = 0; i < stream_count; i++) { 358 struct dc_stream_state *stream = streams[i]; 359 struct link_encoder *link_enc = NULL; 360 361 /* Skip it if the link is NOT mappable endpoint. */ 362 if (!stream->link->is_dig_mapping_flexible) 363 continue; 364 365 /* Skip if encoder assignment retained in step (b) above. */ 366 if (stream->link_enc) 367 continue; 368 369 /* Skip stream if not supported by DIG link encoder. */ 370 if (!is_dig_link_enc_stream(stream)) { 371 ASSERT(stream->link->is_dig_mapping_flexible != true); 372 continue; 373 } 374 375 /* Mappable endpoints have a flexible mapping to DIG link encoders. */ 376 377 /* For MST, multiple streams will share the same link / display 378 * endpoint. These streams should use the same link encoder 379 * assigned to that endpoint. 380 */ 381 link_enc = get_link_enc_used_by_link(state, stream->link); 382 if (link_enc == NULL) { 383 384 if (stream->link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA && 385 stream->link->dpia_preferred_eng_id != ENGINE_ID_UNKNOWN) 386 eng_id_req = stream->link->dpia_preferred_eng_id; 387 388 eng_id = find_first_avail_link_enc(stream->ctx, state, eng_id_req); 389 } 390 else 391 eng_id = link_enc->preferred_engine; 392 393 add_link_enc_assignment(state, stream, eng_id); 394 } 395 396 link_enc_cfg_validate(dc, state); 397 398 /* Update transient assignments. */ 399 for (i = 0; i < MAX_PIPES; i++) { 400 dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i] = 401 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 402 } 403 404 /* Log encoder assignments. */ 405 for (i = 0; i < MAX_PIPES; i++) { 406 struct link_enc_assignment assignment = 407 dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 408 409 if (assignment.valid) 410 DC_LOG_DEBUG("%s: CUR %s(%d) - enc_id(%d)\n", 411 __func__, 412 assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? "PHY" : "DPIA", 413 assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? 414 assignment.ep_id.link_id.enum_id : 415 assignment.ep_id.link_id.enum_id - 1, 416 assignment.eng_id); 417 } 418 for (i = 0; i < MAX_PIPES; i++) { 419 struct link_enc_assignment assignment = 420 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 421 422 if (assignment.valid) 423 DC_LOG_DEBUG("%s: NEW %s(%d) - enc_id(%d)\n", 424 __func__, 425 assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? "PHY" : "DPIA", 426 assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? 427 assignment.ep_id.link_id.enum_id : 428 assignment.ep_id.link_id.enum_id - 1, 429 assignment.eng_id); 430 } 431 432 /* Current state mode will be set to steady once this state committed. */ 433 state->res_ctx.link_enc_cfg_ctx.mode = LINK_ENC_CFG_STEADY; 434 } 435 436 void link_enc_cfg_link_enc_unassign( 437 struct dc_state *state, 438 struct dc_stream_state *stream) 439 { 440 enum engine_id eng_id = ENGINE_ID_UNKNOWN; 441 442 if (stream->link_enc) 443 eng_id = stream->link_enc->preferred_engine; 444 445 remove_link_enc_assignment(state, stream, eng_id); 446 } 447 448 bool link_enc_cfg_is_transmitter_mappable( 449 struct dc *dc, 450 struct link_encoder *link_enc) 451 { 452 bool is_mappable = false; 453 enum engine_id eng_id = link_enc->preferred_engine; 454 struct dc_stream_state *stream = link_enc_cfg_get_stream_using_link_enc(dc, eng_id); 455 456 if (stream) 457 is_mappable = stream->link->is_dig_mapping_flexible; 458 459 return is_mappable; 460 } 461 462 struct dc_stream_state *link_enc_cfg_get_stream_using_link_enc( 463 struct dc *dc, 464 enum engine_id eng_id) 465 { 466 struct dc_stream_state *stream = NULL; 467 int i; 468 469 for (i = 0; i < MAX_PIPES; i++) { 470 struct link_enc_assignment assignment = get_assignment(dc, i); 471 472 if ((assignment.valid == true) && (assignment.eng_id == eng_id)) { 473 stream = assignment.stream; 474 break; 475 } 476 } 477 478 return stream; 479 } 480 481 struct dc_link *link_enc_cfg_get_link_using_link_enc( 482 struct dc *dc, 483 enum engine_id eng_id) 484 { 485 struct dc_link *link = NULL; 486 struct dc_stream_state *stream = NULL; 487 488 stream = link_enc_cfg_get_stream_using_link_enc(dc, eng_id); 489 490 if (stream) 491 link = stream->link; 492 493 return link; 494 } 495 496 struct link_encoder *link_enc_cfg_get_link_enc_used_by_link( 497 struct dc *dc, 498 const struct dc_link *link) 499 { 500 struct link_encoder *link_enc = NULL; 501 struct display_endpoint_id ep_id; 502 int i; 503 504 ep_id = (struct display_endpoint_id) { 505 .link_id = link->link_id, 506 .ep_type = link->ep_type}; 507 508 for (i = 0; i < MAX_PIPES; i++) { 509 struct link_enc_assignment assignment = get_assignment(dc, i); 510 if (assignment.eng_id == ENGINE_ID_UNKNOWN) 511 continue; 512 513 if (assignment.valid == true && are_ep_ids_equal(&assignment.ep_id, &ep_id)) { 514 link_enc = link->dc->res_pool->link_encoders[assignment.eng_id - ENGINE_ID_DIGA]; 515 break; 516 } 517 } 518 519 return link_enc; 520 } 521 522 struct link_encoder *link_enc_cfg_get_next_avail_link_enc(struct dc *dc) 523 { 524 struct link_encoder *link_enc = NULL; 525 enum engine_id encs_assigned[MAX_DIG_LINK_ENCODERS]; 526 int i; 527 528 for (i = 0; i < MAX_DIG_LINK_ENCODERS; i++) 529 encs_assigned[i] = ENGINE_ID_UNKNOWN; 530 531 /* Add assigned encoders to list. */ 532 for (i = 0; i < MAX_PIPES; i++) { 533 struct link_enc_assignment assignment = get_assignment(dc, i); 534 535 if (assignment.valid && assignment.eng_id != ENGINE_ID_UNKNOWN) 536 encs_assigned[assignment.eng_id - ENGINE_ID_DIGA] = assignment.eng_id; 537 } 538 539 for (i = 0; i < dc->res_pool->res_cap->num_dig_link_enc; i++) { 540 if (encs_assigned[i] == ENGINE_ID_UNKNOWN && 541 dc->res_pool->link_encoders[i] != NULL) { 542 link_enc = dc->res_pool->link_encoders[i]; 543 break; 544 } 545 } 546 547 return link_enc; 548 } 549 550 struct link_encoder *link_enc_cfg_get_link_enc( 551 const struct dc_link *link) 552 { 553 struct link_encoder *link_enc = NULL; 554 555 /* Links supporting dynamically assigned link encoder will be assigned next 556 * available encoder if one not already assigned. 557 */ 558 if (link->is_dig_mapping_flexible && 559 link->dc->res_pool->funcs->link_encs_assign) { 560 link_enc = link_enc_cfg_get_link_enc_used_by_link(link->ctx->dc, link); 561 if (link_enc == NULL) 562 link_enc = link_enc_cfg_get_next_avail_link_enc( 563 link->ctx->dc); 564 } else 565 link_enc = link->link_enc; 566 567 return link_enc; 568 } 569 570 struct link_encoder *link_enc_cfg_get_link_enc_used_by_stream_current( 571 struct dc *dc, 572 const struct dc_stream_state *stream) 573 { 574 struct link_encoder *link_enc = NULL; 575 struct display_endpoint_id ep_id; 576 int i; 577 578 ep_id = (struct display_endpoint_id) { 579 .link_id = stream->link->link_id, 580 .ep_type = stream->link->ep_type}; 581 582 for (i = 0; i < MAX_PIPES; i++) { 583 struct link_enc_assignment assignment = 584 dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 585 586 if (assignment.eng_id == ENGINE_ID_UNKNOWN) 587 continue; 588 589 if (assignment.valid == true && are_ep_ids_equal(&assignment.ep_id, &ep_id)) { 590 link_enc = stream->link->dc->res_pool->link_encoders[assignment.eng_id - ENGINE_ID_DIGA]; 591 break; 592 } 593 } 594 595 return link_enc; 596 } 597 598 bool link_enc_cfg_is_link_enc_avail(struct dc *dc, enum engine_id eng_id, struct dc_link *link) 599 { 600 bool is_avail = true; 601 int i; 602 603 /* An encoder is not available if it has already been assigned to a different endpoint. */ 604 for (i = 0; i < MAX_PIPES; i++) { 605 struct link_enc_assignment assignment = get_assignment(dc, i); 606 struct display_endpoint_id ep_id = (struct display_endpoint_id) { 607 .link_id = link->link_id, 608 .ep_type = link->ep_type}; 609 610 if (assignment.valid && assignment.eng_id == eng_id && !are_ep_ids_equal(&ep_id, &assignment.ep_id)) { 611 is_avail = false; 612 break; 613 } 614 } 615 616 return is_avail; 617 } 618 619 bool link_enc_cfg_validate(struct dc *dc, struct dc_state *state) 620 { 621 bool is_valid = false; 622 bool valid_entries = true; 623 bool valid_stream_ptrs = true; 624 bool valid_uniqueness = true; 625 bool valid_avail = true; 626 bool valid_streams = true; 627 int i, j; 628 uint8_t valid_count = 0; 629 uint8_t dig_stream_count = 0; 630 int eng_ids_per_ep_id[MAX_PIPES] = {0}; 631 int ep_ids_per_eng_id[MAX_PIPES] = {0}; 632 int valid_bitmap = 0; 633 634 /* (1) No. valid entries same as stream count. */ 635 for (i = 0; i < MAX_PIPES; i++) { 636 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 637 638 if (assignment.valid) 639 valid_count++; 640 641 if (is_dig_link_enc_stream(state->streams[i])) 642 dig_stream_count++; 643 } 644 if (valid_count != dig_stream_count) 645 valid_entries = false; 646 647 /* (2) Matching stream ptrs. */ 648 for (i = 0; i < MAX_PIPES; i++) { 649 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 650 651 if (assignment.valid) { 652 if (assignment.stream != state->streams[i]) 653 valid_stream_ptrs = false; 654 } 655 } 656 657 /* (3) Each endpoint assigned unique encoder. */ 658 for (i = 0; i < MAX_PIPES; i++) { 659 struct link_enc_assignment assignment_i = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 660 661 if (assignment_i.valid) { 662 struct display_endpoint_id ep_id_i = assignment_i.ep_id; 663 664 eng_ids_per_ep_id[i]++; 665 ep_ids_per_eng_id[i]++; 666 for (j = 0; j < MAX_PIPES; j++) { 667 struct link_enc_assignment assignment_j = 668 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[j]; 669 670 if (j == i) 671 continue; 672 673 if (assignment_j.valid) { 674 struct display_endpoint_id ep_id_j = assignment_j.ep_id; 675 676 if (are_ep_ids_equal(&ep_id_i, &ep_id_j) && 677 assignment_i.eng_id != assignment_j.eng_id) { 678 valid_uniqueness = false; 679 eng_ids_per_ep_id[i]++; 680 } else if (!are_ep_ids_equal(&ep_id_i, &ep_id_j) && 681 assignment_i.eng_id == assignment_j.eng_id) { 682 valid_uniqueness = false; 683 ep_ids_per_eng_id[i]++; 684 } 685 } 686 } 687 } 688 } 689 690 /* (4) Assigned encoders not in available pool. */ 691 for (i = 0; i < MAX_PIPES; i++) { 692 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; 693 694 if (assignment.valid) { 695 for (j = 0; j < dc->res_pool->res_cap->num_dig_link_enc; j++) { 696 if (state->res_ctx.link_enc_cfg_ctx.link_enc_avail[j] == assignment.eng_id) { 697 valid_avail = false; 698 break; 699 } 700 } 701 } 702 } 703 704 /* (5) All streams have valid link encoders. */ 705 for (i = 0; i < state->stream_count; i++) { 706 struct dc_stream_state *stream = state->streams[i]; 707 708 if (is_dig_link_enc_stream(stream) && stream->link_enc == NULL) { 709 valid_streams = false; 710 break; 711 } 712 } 713 714 is_valid = valid_entries && valid_stream_ptrs && valid_uniqueness && valid_avail && valid_streams; 715 ASSERT(is_valid); 716 717 if (is_valid == false) { 718 valid_bitmap = 719 (valid_entries & 0x1) | 720 ((valid_stream_ptrs & 0x1) << 1) | 721 ((valid_uniqueness & 0x1) << 2) | 722 ((valid_avail & 0x1) << 3) | 723 ((valid_streams & 0x1) << 4); 724 DC_LOG_ERROR("%s: Invalid link encoder assignments - 0x%x\n", __func__, valid_bitmap); 725 } 726 727 return is_valid; 728 } 729 730 void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state *new_state) 731 { 732 int i = 0; 733 int num_transient_assignments = 0; 734 735 for (i = 0; i < MAX_PIPES; i++) { 736 if (current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i].valid) 737 num_transient_assignments++; 738 } 739 740 /* Only enter transient mode if the new encoder assignments are valid. */ 741 if (new_state->stream_count == num_transient_assignments) { 742 current_state->res_ctx.link_enc_cfg_ctx.mode = LINK_ENC_CFG_TRANSIENT; 743 DC_LOG_DEBUG("%s: current_state(%p) mode(%d)\n", __func__, current_state, LINK_ENC_CFG_TRANSIENT); 744 } 745 } 746