1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2011-2012 Stefan Bethke.
5 * Copyright (c) 2012 Adrian Chadd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
36 #include <sys/socket.h>
37 #include <sys/sockio.h>
38 #include <sys/sysctl.h>
39 #include <sys/systm.h>
40
41 #include <net/if.h>
42 #include <net/if_var.h>
43 #include <net/if_arp.h>
44 #include <net/ethernet.h>
45 #include <net/if_dl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
48
49 #include <machine/bus.h>
50 #include <dev/iicbus/iic.h>
51 #include <dev/iicbus/iiconf.h>
52 #include <dev/iicbus/iicbus.h>
53 #include <dev/mii/mii.h>
54 #include <dev/mii/miivar.h>
55 #include <dev/mdio/mdio.h>
56
57 #include <dev/etherswitch/etherswitch.h>
58
59 #include <dev/etherswitch/arswitch/arswitchreg.h>
60 #include <dev/etherswitch/arswitch/arswitchvar.h>
61 #include <dev/etherswitch/arswitch/arswitch_reg.h>
62 #include <dev/etherswitch/arswitch/arswitch_phy.h>
63 #include <dev/etherswitch/arswitch/arswitch_vlans.h>
64
65 #include <dev/etherswitch/arswitch/arswitch_8216.h>
66 #include <dev/etherswitch/arswitch/arswitch_8226.h>
67 #include <dev/etherswitch/arswitch/arswitch_8316.h>
68 #include <dev/etherswitch/arswitch/arswitch_8327.h>
69
70 #include "mdio_if.h"
71 #include "miibus_if.h"
72 #include "etherswitch_if.h"
73
74 /* Map ETHERSWITCH_PORT_LED_* to Atheros pattern codes */
75 static int led_pattern_table[] = {
76 [ETHERSWITCH_PORT_LED_DEFAULT] = 0x3,
77 [ETHERSWITCH_PORT_LED_ON] = 0x2,
78 [ETHERSWITCH_PORT_LED_OFF] = 0x0,
79 [ETHERSWITCH_PORT_LED_BLINK] = 0x1
80 };
81
82 static inline int arswitch_portforphy(int phy);
83 static void arswitch_tick(void *arg);
84 static int arswitch_ifmedia_upd(if_t);
85 static void arswitch_ifmedia_sts(if_t, struct ifmediareq *);
86 static int ar8xxx_port_vlan_setup(struct arswitch_softc *sc,
87 etherswitch_port_t *p);
88 static int ar8xxx_port_vlan_get(struct arswitch_softc *sc,
89 etherswitch_port_t *p);
90 static int arswitch_setled(struct arswitch_softc *sc, int phy, int led,
91 int style);
92
93 static int
arswitch_probe(device_t dev)94 arswitch_probe(device_t dev)
95 {
96 struct arswitch_softc *sc;
97 uint32_t id;
98 char *chipname;
99
100 sc = device_get_softc(dev);
101 bzero(sc, sizeof(*sc));
102 sc->page = -1;
103
104 /* AR8xxx probe */
105 id = arswitch_readreg(dev, AR8X16_REG_MASK_CTRL);
106 sc->chip_rev = (id & AR8X16_MASK_CTRL_REV_MASK);
107 sc->chip_ver = (id & AR8X16_MASK_CTRL_VER_MASK) >> AR8X16_MASK_CTRL_VER_SHIFT;
108 switch (id & (AR8X16_MASK_CTRL_VER_MASK | AR8X16_MASK_CTRL_REV_MASK)) {
109 case 0x0101:
110 chipname = "AR8216";
111 sc->sc_switchtype = AR8X16_SWITCH_AR8216;
112 break;
113 case 0x0201:
114 chipname = "AR8226";
115 sc->sc_switchtype = AR8X16_SWITCH_AR8226;
116 break;
117 /* 0x0301 - AR8236 */
118 case 0x1000:
119 case 0x1001:
120 chipname = "AR8316";
121 sc->sc_switchtype = AR8X16_SWITCH_AR8316;
122 break;
123 case 0x1202:
124 case 0x1204:
125 chipname = "AR8327";
126 sc->sc_switchtype = AR8X16_SWITCH_AR8327;
127 sc->mii_lo_first = 1;
128 break;
129 default:
130 chipname = NULL;
131 }
132
133 DPRINTF(sc, ARSWITCH_DBG_ANY, "chipname=%s, id=%08x\n", chipname, id);
134 if (chipname != NULL) {
135 device_set_descf(dev,
136 "Atheros %s Ethernet Switch (ver %d rev %d)",
137 chipname, sc->chip_ver, sc->chip_rev);
138 return (BUS_PROBE_DEFAULT);
139 }
140 return (ENXIO);
141 }
142
143 static int
arswitch_attach_phys(struct arswitch_softc * sc)144 arswitch_attach_phys(struct arswitch_softc *sc)
145 {
146 int phy, err = 0;
147 char name[IFNAMSIZ];
148
149 /* PHYs need an interface, so we generate a dummy one */
150 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev));
151 for (phy = 0; phy < sc->numphys; phy++) {
152 sc->ifp[phy] = if_alloc(IFT_ETHER);
153 if_setsoftc(sc->ifp[phy], sc);
154 if_setflagbits(sc->ifp[phy], IFF_UP | IFF_BROADCAST |
155 IFF_DRV_RUNNING | IFF_SIMPLEX, 0);
156 sc->ifname[phy] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
157 bcopy(name, sc->ifname[phy], strlen(name)+1);
158 if_initname(sc->ifp[phy], sc->ifname[phy],
159 arswitch_portforphy(phy));
160 err = mii_attach(sc->sc_dev, &sc->miibus[phy], sc->ifp[phy],
161 arswitch_ifmedia_upd, arswitch_ifmedia_sts, \
162 BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
163 #if 0
164 DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
165 device_get_nameunit(sc->miibus[phy]),
166 sc->ifp[phy]->if_xname);
167 #endif
168 if (err != 0) {
169 device_printf(sc->sc_dev,
170 "attaching PHY %d failed\n",
171 phy);
172 return (err);
173 }
174
175 if (AR8X16_IS_SWITCH(sc, AR8327)) {
176 int led;
177 char ledname[IFNAMSIZ+4];
178
179 for (led = 0; led < 3; led++) {
180 sprintf(ledname, "%s%dled%d", name,
181 arswitch_portforphy(phy), led+1);
182 sc->dev_led[phy][led].sc = sc;
183 sc->dev_led[phy][led].phy = phy;
184 sc->dev_led[phy][led].lednum = led;
185 }
186 }
187 }
188 return (0);
189 }
190
191 static int
arswitch_reset(device_t dev)192 arswitch_reset(device_t dev)
193 {
194
195 arswitch_writereg(dev, AR8X16_REG_MASK_CTRL,
196 AR8X16_MASK_CTRL_SOFT_RESET);
197 DELAY(1000);
198 if (arswitch_readreg(dev, AR8X16_REG_MASK_CTRL) &
199 AR8X16_MASK_CTRL_SOFT_RESET) {
200 device_printf(dev, "unable to reset switch\n");
201 return (-1);
202 }
203 return (0);
204 }
205
206 static int
arswitch_set_vlan_mode(struct arswitch_softc * sc,uint32_t mode)207 arswitch_set_vlan_mode(struct arswitch_softc *sc, uint32_t mode)
208 {
209
210 /* Check for invalid modes. */
211 if ((mode & sc->info.es_vlan_caps) != mode)
212 return (EINVAL);
213
214 switch (mode) {
215 case ETHERSWITCH_VLAN_DOT1Q:
216 sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
217 break;
218 case ETHERSWITCH_VLAN_PORT:
219 sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
220 break;
221 default:
222 sc->vlan_mode = 0;
223 }
224
225 /* Reset VLANs. */
226 sc->hal.arswitch_vlan_init_hw(sc);
227
228 return (0);
229 }
230
231 static void
ar8xxx_port_init(struct arswitch_softc * sc,int port)232 ar8xxx_port_init(struct arswitch_softc *sc, int port)
233 {
234
235 /* Port0 - CPU */
236 if (port == AR8X16_PORT_CPU) {
237 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(0),
238 (AR8X16_IS_SWITCH(sc, AR8216) ?
239 AR8X16_PORT_STS_SPEED_100 : AR8X16_PORT_STS_SPEED_1000) |
240 (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_RXFLOW) |
241 (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_TXFLOW) |
242 AR8X16_PORT_STS_RXMAC |
243 AR8X16_PORT_STS_TXMAC |
244 AR8X16_PORT_STS_DUPLEX);
245 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0),
246 arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0)) &
247 ~AR8X16_PORT_CTRL_HEADER);
248 } else {
249 /* Set ports to auto negotiation. */
250 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(port),
251 AR8X16_PORT_STS_LINK_AUTO);
252 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port),
253 arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port)) &
254 ~AR8X16_PORT_CTRL_HEADER);
255 }
256 }
257
258 static int
ar8xxx_atu_wait_ready(struct arswitch_softc * sc)259 ar8xxx_atu_wait_ready(struct arswitch_softc *sc)
260 {
261 int ret;
262
263 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
264
265 ret = arswitch_waitreg(sc->sc_dev,
266 AR8216_REG_ATU,
267 AR8216_ATU_ACTIVE,
268 0,
269 1000);
270
271 return (ret);
272 }
273
274 /*
275 * Flush all ATU entries.
276 */
277 static int
ar8xxx_atu_flush(struct arswitch_softc * sc)278 ar8xxx_atu_flush(struct arswitch_softc *sc)
279 {
280 int ret;
281
282 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
283
284 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: flushing all ports\n", __func__);
285
286 ret = ar8xxx_atu_wait_ready(sc);
287 if (ret)
288 device_printf(sc->sc_dev, "%s: waitreg failed\n", __func__);
289
290 if (!ret)
291 arswitch_writereg(sc->sc_dev,
292 AR8216_REG_ATU,
293 AR8216_ATU_OP_FLUSH | AR8216_ATU_ACTIVE);
294
295 return (ret);
296 }
297
298 /*
299 * Flush ATU entries for a single port.
300 */
301 static int
ar8xxx_atu_flush_port(struct arswitch_softc * sc,int port)302 ar8xxx_atu_flush_port(struct arswitch_softc *sc, int port)
303 {
304 int ret, val;
305
306 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: flushing port %d\n", __func__,
307 port);
308
309 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
310
311 /* Flush unicast entries on port */
312 val = AR8216_ATU_OP_FLUSH_UNICAST;
313
314 /* TODO: bit 4 indicates whether to flush dynamic (0) or static (1) */
315
316 /* Which port */
317 val |= SM(port, AR8216_ATU_PORT_NUM);
318
319 ret = ar8xxx_atu_wait_ready(sc);
320 if (ret)
321 device_printf(sc->sc_dev, "%s: waitreg failed\n", __func__);
322
323 if (!ret)
324 arswitch_writereg(sc->sc_dev,
325 AR8216_REG_ATU,
326 val | AR8216_ATU_ACTIVE);
327
328 return (ret);
329 }
330
331 /*
332 * XXX TODO: flush a single MAC address.
333 */
334
335 /*
336 * Fetch a single entry from the ATU.
337 */
338 static int
ar8xxx_atu_fetch_table(struct arswitch_softc * sc,etherswitch_atu_entry_t * e,int atu_fetch_op)339 ar8xxx_atu_fetch_table(struct arswitch_softc *sc, etherswitch_atu_entry_t *e,
340 int atu_fetch_op)
341 {
342 uint32_t ret0, ret1, ret2, val;
343
344 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
345
346 switch (atu_fetch_op) {
347 case 0:
348 /* Initialise things for the first fetch */
349
350 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: initializing\n", __func__);
351 (void) ar8xxx_atu_wait_ready(sc);
352
353 arswitch_writereg(sc->sc_dev,
354 AR8216_REG_ATU, AR8216_ATU_OP_GET_NEXT);
355 arswitch_writereg(sc->sc_dev,
356 AR8216_REG_ATU_DATA, 0);
357 arswitch_writereg(sc->sc_dev,
358 AR8216_REG_ATU_CTRL2, 0);
359
360 return (0);
361 case 1:
362 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: reading next\n", __func__);
363 /*
364 * Attempt to read the next address entry; don't modify what
365 * is there in AT_ADDR{4,5} as its used for the next fetch
366 */
367 (void) ar8xxx_atu_wait_ready(sc);
368
369 /* Begin the next read event; not modifying anything */
370 val = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU);
371 val |= AR8216_ATU_ACTIVE;
372 arswitch_writereg(sc->sc_dev, AR8216_REG_ATU, val);
373
374 /* Wait for it to complete */
375 (void) ar8xxx_atu_wait_ready(sc);
376
377 /* Fetch the ethernet address and ATU status */
378 ret0 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU);
379 ret1 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU_DATA);
380 ret2 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU_CTRL2);
381
382 /* If the status is zero, then we're done */
383 if (MS(ret2, AR8216_ATU_CTRL2_AT_STATUS) == 0)
384 return (-1);
385
386 /* MAC address */
387 e->es_macaddr[5] = MS(ret0, AR8216_ATU_ADDR5);
388 e->es_macaddr[4] = MS(ret0, AR8216_ATU_ADDR4);
389 e->es_macaddr[3] = MS(ret1, AR8216_ATU_ADDR3);
390 e->es_macaddr[2] = MS(ret1, AR8216_ATU_ADDR2);
391 e->es_macaddr[1] = MS(ret1, AR8216_ATU_ADDR1);
392 e->es_macaddr[0] = MS(ret1, AR8216_ATU_ADDR0);
393
394 /* Bitmask of ports this entry is for */
395 e->es_portmask = MS(ret2, AR8216_ATU_CTRL2_DESPORT);
396
397 /* TODO: other flags that are interesting */
398
399 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: MAC %6D portmask 0x%08x\n",
400 __func__,
401 e->es_macaddr, ":", e->es_portmask);
402 return (0);
403 default:
404 return (-1);
405 }
406 return (-1);
407 }
408
409 /*
410 * Configure aging register defaults.
411 */
412 static int
ar8xxx_atu_learn_default(struct arswitch_softc * sc)413 ar8xxx_atu_learn_default(struct arswitch_softc *sc)
414 {
415 int ret;
416 uint32_t val;
417
418 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: resetting learning\n", __func__);
419
420 /*
421 * For now, configure the aging defaults:
422 *
423 * + ARP_EN - enable "acknowledgement" of ARP frames - they are
424 * forwarded to the CPU port
425 * + LEARN_CHANGE_EN - hash table violations when learning MAC addresses
426 * will force an entry to be expired/updated and a new one to be
427 * programmed in.
428 * + AGE_EN - enable address table aging
429 * + AGE_TIME - set to 5 minutes
430 */
431 val = 0;
432 val |= AR8216_ATU_CTRL_ARP_EN;
433 val |= AR8216_ATU_CTRL_LEARN_CHANGE;
434 val |= AR8216_ATU_CTRL_AGE_EN;
435 val |= 0x2b; /* 5 minutes; bits 15:0 */
436
437 ret = arswitch_writereg(sc->sc_dev,
438 AR8216_REG_ATU_CTRL,
439 val);
440
441 if (ret)
442 device_printf(sc->sc_dev, "%s: writereg failed\n", __func__);
443
444 return (ret);
445 }
446
447 /*
448 * XXX TODO: add another routine to configure the leaky behaviour
449 * when unknown frames are received. These must be consistent
450 * between ethernet switches.
451 */
452
453 /*
454 * Fetch the configured switch MAC address.
455 */
456 static int
ar8xxx_hw_get_switch_macaddr(struct arswitch_softc * sc,struct ether_addr * ea)457 ar8xxx_hw_get_switch_macaddr(struct arswitch_softc *sc, struct ether_addr *ea)
458 {
459 uint32_t ret0, ret1;
460 char *s;
461
462 s = (void *) ea;
463
464 ret0 = arswitch_readreg(sc->sc_dev, AR8X16_REG_SW_MAC_ADDR0);
465 ret1 = arswitch_readreg(sc->sc_dev, AR8X16_REG_SW_MAC_ADDR1);
466
467 s[5] = MS(ret0, AR8X16_REG_SW_MAC_ADDR0_BYTE5);
468 s[4] = MS(ret0, AR8X16_REG_SW_MAC_ADDR0_BYTE4);
469 s[3] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE3);
470 s[2] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE2);
471 s[1] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE1);
472 s[0] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE0);
473
474 return (0);
475 }
476
477 /*
478 * Set the switch mac address.
479 */
480 static int
ar8xxx_hw_set_switch_macaddr(struct arswitch_softc * sc,const struct ether_addr * ea)481 ar8xxx_hw_set_switch_macaddr(struct arswitch_softc *sc,
482 const struct ether_addr *ea)
483 {
484
485 return (ENXIO);
486 }
487
488 /*
489 * XXX TODO: this attach routine does NOT free all memory, resources
490 * upon failure!
491 */
492 static int
arswitch_attach(device_t dev)493 arswitch_attach(device_t dev)
494 {
495 struct arswitch_softc *sc = device_get_softc(dev);
496 struct sysctl_ctx_list *ctx;
497 struct sysctl_oid *tree;
498 int err = 0;
499 int port;
500
501 /* sc->sc_switchtype is already decided in arswitch_probe() */
502 sc->sc_dev = dev;
503 mtx_init(&sc->sc_mtx, "arswitch", NULL, MTX_DEF);
504 sc->page = -1;
505 strlcpy(sc->info.es_name, device_get_desc(dev),
506 sizeof(sc->info.es_name));
507
508 /* Debugging */
509 ctx = device_get_sysctl_ctx(sc->sc_dev);
510 tree = device_get_sysctl_tree(sc->sc_dev);
511 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
512 "debug", CTLFLAG_RW, &sc->sc_debug, 0,
513 "control debugging printfs");
514
515 /* Allocate a 128 entry ATU table; hopefully its big enough! */
516 /* XXX TODO: make this per chip */
517 sc->atu.entries = malloc(sizeof(etherswitch_atu_entry_t) * 128,
518 M_DEVBUF, M_NOWAIT);
519 if (sc->atu.entries == NULL) {
520 device_printf(sc->sc_dev, "%s: failed to allocate ATU table\n",
521 __func__);
522 return (ENXIO);
523 }
524 sc->atu.count = 0;
525 sc->atu.size = 128;
526
527 /* Default HAL methods */
528 sc->hal.arswitch_port_init = ar8xxx_port_init;
529 sc->hal.arswitch_port_vlan_setup = ar8xxx_port_vlan_setup;
530 sc->hal.arswitch_port_vlan_get = ar8xxx_port_vlan_get;
531 sc->hal.arswitch_vlan_init_hw = ar8xxx_reset_vlans;
532 sc->hal.arswitch_hw_get_switch_macaddr = ar8xxx_hw_get_switch_macaddr;
533 sc->hal.arswitch_hw_set_switch_macaddr = ar8xxx_hw_set_switch_macaddr;
534
535 sc->hal.arswitch_vlan_getvgroup = ar8xxx_getvgroup;
536 sc->hal.arswitch_vlan_setvgroup = ar8xxx_setvgroup;
537
538 sc->hal.arswitch_vlan_get_pvid = ar8xxx_get_pvid;
539 sc->hal.arswitch_vlan_set_pvid = ar8xxx_set_pvid;
540
541 sc->hal.arswitch_get_dot1q_vlan = ar8xxx_get_dot1q_vlan;
542 sc->hal.arswitch_set_dot1q_vlan = ar8xxx_set_dot1q_vlan;
543 sc->hal.arswitch_flush_dot1q_vlan = ar8xxx_flush_dot1q_vlan;
544 sc->hal.arswitch_purge_dot1q_vlan = ar8xxx_purge_dot1q_vlan;
545 sc->hal.arswitch_get_port_vlan = ar8xxx_get_port_vlan;
546 sc->hal.arswitch_set_port_vlan = ar8xxx_set_port_vlan;
547
548 sc->hal.arswitch_atu_flush = ar8xxx_atu_flush;
549 sc->hal.arswitch_atu_flush_port = ar8xxx_atu_flush_port;
550 sc->hal.arswitch_atu_learn_default = ar8xxx_atu_learn_default;
551 sc->hal.arswitch_atu_fetch_table = ar8xxx_atu_fetch_table;
552
553 sc->hal.arswitch_phy_read = arswitch_readphy_internal;
554 sc->hal.arswitch_phy_write = arswitch_writephy_internal;
555
556 /*
557 * Attach switch related functions
558 */
559 if (AR8X16_IS_SWITCH(sc, AR8216))
560 ar8216_attach(sc);
561 else if (AR8X16_IS_SWITCH(sc, AR8226))
562 ar8226_attach(sc);
563 else if (AR8X16_IS_SWITCH(sc, AR8316))
564 ar8316_attach(sc);
565 else if (AR8X16_IS_SWITCH(sc, AR8327))
566 ar8327_attach(sc);
567 else {
568 DPRINTF(sc, ARSWITCH_DBG_ANY,
569 "%s: unknown switch (%d)?\n", __func__, sc->sc_switchtype);
570 return (ENXIO);
571 }
572
573 /* Common defaults. */
574 sc->info.es_nports = 5; /* XXX technically 6, but 6th not used */
575
576 /* XXX Defaults for externally connected AR8316 */
577 sc->numphys = 4;
578 sc->phy4cpu = 1;
579 sc->is_rgmii = 1;
580 sc->is_gmii = 0;
581 sc->is_mii = 0;
582
583 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
584 "numphys", &sc->numphys);
585 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
586 "phy4cpu", &sc->phy4cpu);
587 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
588 "is_rgmii", &sc->is_rgmii);
589 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
590 "is_gmii", &sc->is_gmii);
591 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
592 "is_mii", &sc->is_mii);
593
594 if (sc->numphys > AR8X16_NUM_PHYS)
595 sc->numphys = AR8X16_NUM_PHYS;
596
597 /* Reset the switch. */
598 if (arswitch_reset(dev)) {
599 DPRINTF(sc, ARSWITCH_DBG_ANY,
600 "%s: arswitch_reset: failed\n", __func__);
601 return (ENXIO);
602 }
603
604 err = sc->hal.arswitch_hw_setup(sc);
605 if (err != 0) {
606 DPRINTF(sc, ARSWITCH_DBG_ANY,
607 "%s: hw_setup: err=%d\n", __func__, err);
608 return (err);
609 }
610
611 err = sc->hal.arswitch_hw_global_setup(sc);
612 if (err != 0) {
613 DPRINTF(sc, ARSWITCH_DBG_ANY,
614 "%s: hw_global_setup: err=%d\n", __func__, err);
615 return (err);
616 }
617
618 /*
619 * Configure the default address table learning parameters for this
620 * switch.
621 */
622 err = sc->hal.arswitch_atu_learn_default(sc);
623 if (err != 0) {
624 DPRINTF(sc, ARSWITCH_DBG_ANY,
625 "%s: atu_learn_default: err=%d\n", __func__, err);
626 return (err);
627 }
628
629 /* Initialize the switch ports. */
630 for (port = 0; port <= sc->numphys; port++) {
631 sc->hal.arswitch_port_init(sc, port);
632 }
633
634 /*
635 * Attach the PHYs and complete the bus enumeration.
636 */
637 err = arswitch_attach_phys(sc);
638 if (err != 0) {
639 DPRINTF(sc, ARSWITCH_DBG_ANY,
640 "%s: attach_phys: err=%d\n", __func__, err);
641 return (err);
642 }
643
644 /* Default to ingress filters off. */
645 err = arswitch_set_vlan_mode(sc, 0);
646 if (err != 0) {
647 DPRINTF(sc, ARSWITCH_DBG_ANY,
648 "%s: set_vlan_mode: err=%d\n", __func__, err);
649 return (err);
650 }
651
652 bus_identify_children(dev);
653 bus_enumerate_hinted_children(dev);
654 bus_attach_children(dev);
655
656 callout_init_mtx(&sc->callout_tick, &sc->sc_mtx, 0);
657
658 ARSWITCH_LOCK(sc);
659 arswitch_tick(sc);
660 ARSWITCH_UNLOCK(sc);
661
662 return (err);
663 }
664
665 static int
arswitch_detach(device_t dev)666 arswitch_detach(device_t dev)
667 {
668 struct arswitch_softc *sc = device_get_softc(dev);
669 int error, i;
670
671 callout_drain(&sc->callout_tick);
672
673 error = bus_generic_detach(dev);
674 if (error != 0)
675 return (error);
676
677 for (i=0; i < sc->numphys; i++) {
678 if (sc->ifp[i] != NULL)
679 if_free(sc->ifp[i]);
680 free(sc->ifname[i], M_DEVBUF);
681 }
682
683 free(sc->atu.entries, M_DEVBUF);
684
685 mtx_destroy(&sc->sc_mtx);
686
687 return (0);
688 }
689
690 /*
691 * Convert PHY number to port number. PHY0 is connected to port 1, PHY1 to
692 * port 2, etc.
693 */
694 static inline int
arswitch_portforphy(int phy)695 arswitch_portforphy(int phy)
696 {
697 return (phy+1);
698 }
699
700 static inline struct mii_data *
arswitch_miiforport(struct arswitch_softc * sc,int port)701 arswitch_miiforport(struct arswitch_softc *sc, int port)
702 {
703 int phy = port-1;
704
705 if (phy < 0 || phy >= sc->numphys)
706 return (NULL);
707 return (device_get_softc(sc->miibus[phy]));
708 }
709
710 static inline if_t
arswitch_ifpforport(struct arswitch_softc * sc,int port)711 arswitch_ifpforport(struct arswitch_softc *sc, int port)
712 {
713 int phy = port-1;
714
715 if (phy < 0 || phy >= sc->numphys)
716 return (NULL);
717 return (sc->ifp[phy]);
718 }
719
720 /*
721 * Convert port status to ifmedia.
722 */
723 static void
arswitch_update_ifmedia(int portstatus,u_int * media_status,u_int * media_active)724 arswitch_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
725 {
726 *media_active = IFM_ETHER;
727 *media_status = IFM_AVALID;
728
729 if ((portstatus & AR8X16_PORT_STS_LINK_UP) != 0)
730 *media_status |= IFM_ACTIVE;
731 else {
732 *media_active |= IFM_NONE;
733 return;
734 }
735 switch (portstatus & AR8X16_PORT_STS_SPEED_MASK) {
736 case AR8X16_PORT_STS_SPEED_10:
737 *media_active |= IFM_10_T;
738 break;
739 case AR8X16_PORT_STS_SPEED_100:
740 *media_active |= IFM_100_TX;
741 break;
742 case AR8X16_PORT_STS_SPEED_1000:
743 *media_active |= IFM_1000_T;
744 break;
745 }
746 if ((portstatus & AR8X16_PORT_STS_DUPLEX) == 0)
747 *media_active |= IFM_FDX;
748 else
749 *media_active |= IFM_HDX;
750 if ((portstatus & AR8X16_PORT_STS_TXFLOW) != 0)
751 *media_active |= IFM_ETH_TXPAUSE;
752 if ((portstatus & AR8X16_PORT_STS_RXFLOW) != 0)
753 *media_active |= IFM_ETH_RXPAUSE;
754 }
755
756 /*
757 * Poll the status for all PHYs. We're using the switch port status because
758 * thats a lot quicker to read than talking to all the PHYs. Care must be
759 * taken that the resulting ifmedia_active is identical to what the PHY will
760 * compute, or gratuitous link status changes will occur whenever the PHYs
761 * update function is called.
762 */
763 static void
arswitch_miipollstat(struct arswitch_softc * sc)764 arswitch_miipollstat(struct arswitch_softc *sc)
765 {
766 int i;
767 struct mii_data *mii;
768 struct mii_softc *miisc;
769 int portstatus;
770 int port_flap = 0;
771
772 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
773
774 for (i = 0; i < sc->numphys; i++) {
775 if (sc->miibus[i] == NULL)
776 continue;
777 mii = device_get_softc(sc->miibus[i]);
778 /* XXX This would be nice to have abstracted out to be per-chip */
779 /* AR8327/AR8337 has a different register base */
780 if (AR8X16_IS_SWITCH(sc, AR8327))
781 portstatus = arswitch_readreg(sc->sc_dev,
782 AR8327_REG_PORT_STATUS(arswitch_portforphy(i)));
783 else
784 portstatus = arswitch_readreg(sc->sc_dev,
785 AR8X16_REG_PORT_STS(arswitch_portforphy(i)));
786 #if 1
787 DPRINTF(sc, ARSWITCH_DBG_POLL, "p[%d]=0x%08x (%b)\n",
788 i,
789 portstatus,
790 portstatus,
791 "\20\3TXMAC\4RXMAC\5TXFLOW\6RXFLOW\7"
792 "DUPLEX\11LINK_UP\12LINK_AUTO\13LINK_PAUSE");
793 #endif
794 /*
795 * If the current status is down, but we have a link
796 * status showing up, we need to do an ATU flush.
797 */
798 if ((mii->mii_media_status & IFM_ACTIVE) == 0 &&
799 (portstatus & AR8X16_PORT_STS_LINK_UP) != 0) {
800 device_printf(sc->sc_dev, "%s: port %d: port -> UP\n",
801 __func__,
802 i);
803 port_flap = 1;
804 }
805 /*
806 * and maybe if a port goes up->down?
807 */
808 if ((mii->mii_media_status & IFM_ACTIVE) != 0 &&
809 (portstatus & AR8X16_PORT_STS_LINK_UP) == 0) {
810 device_printf(sc->sc_dev, "%s: port %d: port -> DOWN\n",
811 __func__,
812 i);
813 port_flap = 1;
814 }
815 arswitch_update_ifmedia(portstatus, &mii->mii_media_status,
816 &mii->mii_media_active);
817 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
818 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) !=
819 miisc->mii_inst)
820 continue;
821 mii_phy_update(miisc, MII_POLLSTAT);
822 }
823 }
824
825 /* If a port went from down->up, flush the ATU */
826 if (port_flap)
827 sc->hal.arswitch_atu_flush(sc);
828 }
829
830 static void
arswitch_tick(void * arg)831 arswitch_tick(void *arg)
832 {
833 struct arswitch_softc *sc = arg;
834
835 arswitch_miipollstat(sc);
836 callout_reset(&sc->callout_tick, hz, arswitch_tick, sc);
837 }
838
839 static void
arswitch_lock(device_t dev)840 arswitch_lock(device_t dev)
841 {
842 struct arswitch_softc *sc = device_get_softc(dev);
843
844 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
845 ARSWITCH_LOCK(sc);
846 }
847
848 static void
arswitch_unlock(device_t dev)849 arswitch_unlock(device_t dev)
850 {
851 struct arswitch_softc *sc = device_get_softc(dev);
852
853 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
854 ARSWITCH_UNLOCK(sc);
855 }
856
857 static etherswitch_info_t *
arswitch_getinfo(device_t dev)858 arswitch_getinfo(device_t dev)
859 {
860 struct arswitch_softc *sc = device_get_softc(dev);
861
862 return (&sc->info);
863 }
864
865 static int
ar8xxx_port_vlan_get(struct arswitch_softc * sc,etherswitch_port_t * p)866 ar8xxx_port_vlan_get(struct arswitch_softc *sc, etherswitch_port_t *p)
867 {
868 uint32_t reg;
869
870 ARSWITCH_LOCK(sc);
871
872 /* Retrieve the PVID. */
873 sc->hal.arswitch_vlan_get_pvid(sc, p->es_port, &p->es_pvid);
874
875 /* Port flags. */
876 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(p->es_port));
877 if (reg & AR8X16_PORT_CTRL_DOUBLE_TAG)
878 p->es_flags |= ETHERSWITCH_PORT_DOUBLE_TAG;
879 reg >>= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
880 if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD)
881 p->es_flags |= ETHERSWITCH_PORT_ADDTAG;
882 if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP)
883 p->es_flags |= ETHERSWITCH_PORT_STRIPTAG;
884 ARSWITCH_UNLOCK(sc);
885
886 return (0);
887 }
888
889 static int
arswitch_is_cpuport(struct arswitch_softc * sc,int port)890 arswitch_is_cpuport(struct arswitch_softc *sc, int port)
891 {
892
893 return ((port == AR8X16_PORT_CPU) ||
894 ((AR8X16_IS_SWITCH(sc, AR8327) &&
895 port == AR8327_PORT_GMAC6)));
896 }
897
898 static int
arswitch_getport(device_t dev,etherswitch_port_t * p)899 arswitch_getport(device_t dev, etherswitch_port_t *p)
900 {
901 struct arswitch_softc *sc;
902 struct mii_data *mii;
903 struct ifmediareq *ifmr;
904 int err;
905
906 sc = device_get_softc(dev);
907 /* XXX +1 is for AR8327; should make this configurable! */
908 if (p->es_port < 0 || p->es_port > sc->info.es_nports)
909 return (ENXIO);
910
911 err = sc->hal.arswitch_port_vlan_get(sc, p);
912 if (err != 0)
913 return (err);
914
915 mii = arswitch_miiforport(sc, p->es_port);
916 if (arswitch_is_cpuport(sc, p->es_port)) {
917 /* fill in fixed values for CPU port */
918 /* XXX is this valid in all cases? */
919 p->es_flags |= ETHERSWITCH_PORT_CPU;
920 ifmr = &p->es_ifmr;
921 ifmr->ifm_count = 0;
922 ifmr->ifm_current = ifmr->ifm_active =
923 IFM_ETHER | IFM_1000_T | IFM_FDX;
924 ifmr->ifm_mask = 0;
925 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
926 } else if (mii != NULL) {
927 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
928 &mii->mii_media, SIOCGIFMEDIA);
929 if (err)
930 return (err);
931 } else {
932 return (ENXIO);
933 }
934
935 if (!arswitch_is_cpuport(sc, p->es_port) &&
936 AR8X16_IS_SWITCH(sc, AR8327)) {
937 int led;
938 p->es_nleds = 3;
939
940 for (led = 0; led < p->es_nleds; led++)
941 {
942 int style;
943 uint32_t val;
944
945 /* Find the right style enum for our pattern */
946 val = arswitch_readreg(dev,
947 ar8327_led_mapping[p->es_port-1][led].reg);
948 val = (val>>ar8327_led_mapping[p->es_port-1][led].shift)&0x03;
949
950 for (style = 0; style < ETHERSWITCH_PORT_LED_MAX; style++)
951 {
952 if (led_pattern_table[style] == val) break;
953 }
954
955 /* can't happen */
956 if (style == ETHERSWITCH_PORT_LED_MAX)
957 style = ETHERSWITCH_PORT_LED_DEFAULT;
958
959 p->es_led[led] = style;
960 }
961 } else
962 {
963 p->es_nleds = 0;
964 }
965
966 return (0);
967 }
968
969 static int
ar8xxx_port_vlan_setup(struct arswitch_softc * sc,etherswitch_port_t * p)970 ar8xxx_port_vlan_setup(struct arswitch_softc *sc, etherswitch_port_t *p)
971 {
972 uint32_t reg;
973 int err;
974
975 ARSWITCH_LOCK(sc);
976
977 /* Set the PVID. */
978 if (p->es_pvid != 0)
979 sc->hal.arswitch_vlan_set_pvid(sc, p->es_port, p->es_pvid);
980
981 /* Mutually exclusive. */
982 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG &&
983 p->es_flags & ETHERSWITCH_PORT_STRIPTAG) {
984 ARSWITCH_UNLOCK(sc);
985 return (EINVAL);
986 }
987
988 reg = 0;
989 if (p->es_flags & ETHERSWITCH_PORT_DOUBLE_TAG)
990 reg |= AR8X16_PORT_CTRL_DOUBLE_TAG;
991 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG)
992 reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD <<
993 AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
994 if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG)
995 reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP <<
996 AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
997
998 err = arswitch_modifyreg(sc->sc_dev,
999 AR8X16_REG_PORT_CTRL(p->es_port),
1000 0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT |
1001 AR8X16_PORT_CTRL_DOUBLE_TAG, reg);
1002
1003 ARSWITCH_UNLOCK(sc);
1004 return (err);
1005 }
1006
1007 static int
arswitch_setport(device_t dev,etherswitch_port_t * p)1008 arswitch_setport(device_t dev, etherswitch_port_t *p)
1009 {
1010 int err, i;
1011 struct arswitch_softc *sc;
1012 struct ifmedia *ifm;
1013 struct mii_data *mii;
1014 if_t ifp;
1015
1016 sc = device_get_softc(dev);
1017 if (p->es_port < 0 || p->es_port > sc->info.es_nports)
1018 return (ENXIO);
1019
1020 /* Port flags. */
1021 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
1022 err = sc->hal.arswitch_port_vlan_setup(sc, p);
1023 if (err)
1024 return (err);
1025 }
1026
1027 /* Do not allow media or led changes on CPU port. */
1028 if (arswitch_is_cpuport(sc, p->es_port))
1029 return (0);
1030
1031 if (AR8X16_IS_SWITCH(sc, AR8327))
1032 {
1033 for (i = 0; i < 3; i++)
1034 {
1035 int err;
1036 err = arswitch_setled(sc, p->es_port-1, i, p->es_led[i]);
1037 if (err)
1038 return (err);
1039 }
1040 }
1041
1042 mii = arswitch_miiforport(sc, p->es_port);
1043 if (mii == NULL)
1044 return (ENXIO);
1045
1046 ifp = arswitch_ifpforport(sc, p->es_port);
1047
1048 ifm = &mii->mii_media;
1049 return (ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA));
1050 }
1051
1052 static int
arswitch_setled(struct arswitch_softc * sc,int phy,int led,int style)1053 arswitch_setled(struct arswitch_softc *sc, int phy, int led, int style)
1054 {
1055 int shift;
1056 int err;
1057
1058 if (phy < 0 || phy > sc->numphys)
1059 return EINVAL;
1060
1061 if (style < 0 || style > ETHERSWITCH_PORT_LED_MAX)
1062 return (EINVAL);
1063
1064 ARSWITCH_LOCK(sc);
1065
1066 shift = ar8327_led_mapping[phy][led].shift;
1067 err = (arswitch_modifyreg(sc->sc_dev,
1068 ar8327_led_mapping[phy][led].reg,
1069 0x03 << shift, led_pattern_table[style] << shift));
1070 ARSWITCH_UNLOCK(sc);
1071
1072 return (err);
1073 }
1074
1075 static void
arswitch_statchg(device_t dev)1076 arswitch_statchg(device_t dev)
1077 {
1078 struct arswitch_softc *sc = device_get_softc(dev);
1079
1080 DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__);
1081 }
1082
1083 static int
arswitch_ifmedia_upd(if_t ifp)1084 arswitch_ifmedia_upd(if_t ifp)
1085 {
1086 struct arswitch_softc *sc = if_getsoftc(ifp);
1087 struct mii_data *mii = arswitch_miiforport(sc, if_getdunit(ifp));
1088
1089 if (mii == NULL)
1090 return (ENXIO);
1091 mii_mediachg(mii);
1092 return (0);
1093 }
1094
1095 static void
arswitch_ifmedia_sts(if_t ifp,struct ifmediareq * ifmr)1096 arswitch_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
1097 {
1098 struct arswitch_softc *sc = if_getsoftc(ifp);
1099 struct mii_data *mii = arswitch_miiforport(sc, if_getdunit(ifp));
1100
1101 DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__);
1102
1103 if (mii == NULL)
1104 return;
1105 mii_pollstat(mii);
1106 ifmr->ifm_active = mii->mii_media_active;
1107 ifmr->ifm_status = mii->mii_media_status;
1108 }
1109
1110 static int
arswitch_getconf(device_t dev,etherswitch_conf_t * conf)1111 arswitch_getconf(device_t dev, etherswitch_conf_t *conf)
1112 {
1113 struct arswitch_softc *sc;
1114 int ret;
1115
1116 sc = device_get_softc(dev);
1117
1118 /* Return the VLAN mode. */
1119 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
1120 conf->vlan_mode = sc->vlan_mode;
1121
1122 /* Return the switch ethernet address. */
1123 ret = sc->hal.arswitch_hw_get_switch_macaddr(sc,
1124 &conf->switch_macaddr);
1125 if (ret == 0) {
1126 conf->cmd |= ETHERSWITCH_CONF_SWITCH_MACADDR;
1127 }
1128
1129 return (0);
1130 }
1131
1132 static int
arswitch_setconf(device_t dev,etherswitch_conf_t * conf)1133 arswitch_setconf(device_t dev, etherswitch_conf_t *conf)
1134 {
1135 struct arswitch_softc *sc;
1136 int err;
1137
1138 sc = device_get_softc(dev);
1139
1140 /* Set the VLAN mode. */
1141 if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) {
1142 err = arswitch_set_vlan_mode(sc, conf->vlan_mode);
1143 if (err != 0)
1144 return (err);
1145 }
1146
1147 /* TODO: Set the switch ethernet address. */
1148
1149 return (0);
1150 }
1151
1152 static int
arswitch_atu_flush_all(device_t dev)1153 arswitch_atu_flush_all(device_t dev)
1154 {
1155 struct arswitch_softc *sc;
1156 int err;
1157
1158 sc = device_get_softc(dev);
1159 ARSWITCH_LOCK(sc);
1160 err = sc->hal.arswitch_atu_flush(sc);
1161 /* Invalidate cached ATU */
1162 sc->atu.count = 0;
1163 ARSWITCH_UNLOCK(sc);
1164 return (err);
1165 }
1166
1167 static int
arswitch_atu_flush_port(device_t dev,int port)1168 arswitch_atu_flush_port(device_t dev, int port)
1169 {
1170 struct arswitch_softc *sc;
1171 int err;
1172
1173 sc = device_get_softc(dev);
1174 ARSWITCH_LOCK(sc);
1175 err = sc->hal.arswitch_atu_flush_port(sc, port);
1176 /* Invalidate cached ATU */
1177 sc->atu.count = 0;
1178 ARSWITCH_UNLOCK(sc);
1179 return (err);
1180 }
1181
1182 static int
arswitch_atu_fetch_table(device_t dev,etherswitch_atu_table_t * table)1183 arswitch_atu_fetch_table(device_t dev, etherswitch_atu_table_t *table)
1184 {
1185 struct arswitch_softc *sc;
1186 int err, nitems;
1187
1188 sc = device_get_softc(dev);
1189
1190 ARSWITCH_LOCK(sc);
1191 /* Initial setup */
1192 nitems = 0;
1193 err = sc->hal.arswitch_atu_fetch_table(sc, NULL, 0);
1194
1195 /* fetch - ideally yes we'd fetch into a separate table then switch */
1196 while (err == 0 && nitems < sc->atu.size) {
1197 err = sc->hal.arswitch_atu_fetch_table(sc,
1198 &sc->atu.entries[nitems], 1);
1199 if (err == 0) {
1200 sc->atu.entries[nitems].id = nitems;
1201 nitems++;
1202 }
1203 }
1204 sc->atu.count = nitems;
1205 ARSWITCH_UNLOCK(sc);
1206
1207 table->es_nitems = nitems;
1208
1209 return (0);
1210 }
1211
1212 static int
arswitch_atu_fetch_table_entry(device_t dev,etherswitch_atu_entry_t * e)1213 arswitch_atu_fetch_table_entry(device_t dev, etherswitch_atu_entry_t *e)
1214 {
1215 struct arswitch_softc *sc;
1216 int id;
1217
1218 sc = device_get_softc(dev);
1219 id = e->id;
1220
1221 ARSWITCH_LOCK(sc);
1222 if (id > sc->atu.count) {
1223 ARSWITCH_UNLOCK(sc);
1224 return (ENOENT);
1225 }
1226
1227 memcpy(e, &sc->atu.entries[id], sizeof(*e));
1228 ARSWITCH_UNLOCK(sc);
1229 return (0);
1230 }
1231
1232 static int
arswitch_getvgroup(device_t dev,etherswitch_vlangroup_t * e)1233 arswitch_getvgroup(device_t dev, etherswitch_vlangroup_t *e)
1234 {
1235 struct arswitch_softc *sc = device_get_softc(dev);
1236
1237 return (sc->hal.arswitch_vlan_getvgroup(sc, e));
1238 }
1239
1240 static int
arswitch_setvgroup(device_t dev,etherswitch_vlangroup_t * e)1241 arswitch_setvgroup(device_t dev, etherswitch_vlangroup_t *e)
1242 {
1243 struct arswitch_softc *sc = device_get_softc(dev);
1244
1245 return (sc->hal.arswitch_vlan_setvgroup(sc, e));
1246 }
1247
1248 static int
arswitch_readphy(device_t dev,int phy,int reg)1249 arswitch_readphy(device_t dev, int phy, int reg)
1250 {
1251 struct arswitch_softc *sc = device_get_softc(dev);
1252
1253 return (sc->hal.arswitch_phy_read(dev, phy, reg));
1254 }
1255
1256 static int
arswitch_writephy(device_t dev,int phy,int reg,int val)1257 arswitch_writephy(device_t dev, int phy, int reg, int val)
1258 {
1259 struct arswitch_softc *sc = device_get_softc(dev);
1260
1261 return (sc->hal.arswitch_phy_write(dev, phy, reg, val));
1262 }
1263
1264 static device_method_t arswitch_methods[] = {
1265 /* Device interface */
1266 DEVMETHOD(device_probe, arswitch_probe),
1267 DEVMETHOD(device_attach, arswitch_attach),
1268 DEVMETHOD(device_detach, arswitch_detach),
1269
1270 /* bus interface */
1271 DEVMETHOD(bus_add_child, device_add_child_ordered),
1272
1273 /* MII interface */
1274 DEVMETHOD(miibus_readreg, arswitch_readphy),
1275 DEVMETHOD(miibus_writereg, arswitch_writephy),
1276 DEVMETHOD(miibus_statchg, arswitch_statchg),
1277
1278 /* MDIO interface */
1279 DEVMETHOD(mdio_readreg, arswitch_readphy),
1280 DEVMETHOD(mdio_writereg, arswitch_writephy),
1281
1282 /* etherswitch interface */
1283 DEVMETHOD(etherswitch_lock, arswitch_lock),
1284 DEVMETHOD(etherswitch_unlock, arswitch_unlock),
1285 DEVMETHOD(etherswitch_getinfo, arswitch_getinfo),
1286 DEVMETHOD(etherswitch_readreg, arswitch_readreg),
1287 DEVMETHOD(etherswitch_writereg, arswitch_writereg),
1288 DEVMETHOD(etherswitch_readphyreg, arswitch_readphy),
1289 DEVMETHOD(etherswitch_writephyreg, arswitch_writephy),
1290 DEVMETHOD(etherswitch_getport, arswitch_getport),
1291 DEVMETHOD(etherswitch_setport, arswitch_setport),
1292 DEVMETHOD(etherswitch_getvgroup, arswitch_getvgroup),
1293 DEVMETHOD(etherswitch_setvgroup, arswitch_setvgroup),
1294 DEVMETHOD(etherswitch_getconf, arswitch_getconf),
1295 DEVMETHOD(etherswitch_setconf, arswitch_setconf),
1296 DEVMETHOD(etherswitch_flush_all, arswitch_atu_flush_all),
1297 DEVMETHOD(etherswitch_flush_port, arswitch_atu_flush_port),
1298 DEVMETHOD(etherswitch_fetch_table, arswitch_atu_fetch_table),
1299 DEVMETHOD(etherswitch_fetch_table_entry, arswitch_atu_fetch_table_entry),
1300
1301 DEVMETHOD_END
1302 };
1303
1304 DEFINE_CLASS_0(arswitch, arswitch_driver, arswitch_methods,
1305 sizeof(struct arswitch_softc));
1306
1307 DRIVER_MODULE(arswitch, mdio, arswitch_driver, 0, 0);
1308 DRIVER_MODULE(miibus, arswitch, miibus_driver, 0, 0);
1309 DRIVER_MODULE(mdio, arswitch, mdio_driver, 0, 0);
1310 DRIVER_MODULE(etherswitch, arswitch, etherswitch_driver, 0, 0);
1311 MODULE_VERSION(arswitch, 1);
1312 MODULE_DEPEND(arswitch, miibus, 1, 1, 1); /* XXX which versions? */
1313 MODULE_DEPEND(arswitch, etherswitch, 1, 1, 1); /* XXX which versions? */
1314