xref: /linux/drivers/gpu/drm/xe/xe_oa_types.h (revision 3fd6c59042dbba50391e30862beac979491145fe)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2023-2024 Intel Corporation
4  */
5 
6 #ifndef _XE_OA_TYPES_H_
7 #define _XE_OA_TYPES_H_
8 
9 #include <linux/bitops.h>
10 #include <linux/idr.h>
11 #include <linux/mutex.h>
12 #include <linux/types.h>
13 
14 #include <uapi/drm/xe_drm.h>
15 #include "regs/xe_reg_defs.h"
16 #include "xe_hw_engine_types.h"
17 
18 #define XE_OA_BUFFER_SIZE SZ_16M
19 
20 enum xe_oa_report_header {
21 	HDR_32_BIT = 0,
22 	HDR_64_BIT,
23 };
24 
25 enum xe_oa_format_name {
26 	XE_OA_FORMAT_C4_B8,
27 
28 	/* Gen8+ */
29 	XE_OA_FORMAT_A12,
30 	XE_OA_FORMAT_A12_B8_C8,
31 	XE_OA_FORMAT_A32u40_A4u32_B8_C8,
32 
33 	/* DG2 */
34 	XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
35 	XE_OA_FORMAT_A24u40_A14u32_B8_C8,
36 
37 	/* DG2/MTL OAC */
38 	XE_OAC_FORMAT_A24u64_B8_C8,
39 	XE_OAC_FORMAT_A22u32_R2u32_B8_C8,
40 
41 	/* MTL OAM */
42 	XE_OAM_FORMAT_MPEC8u64_B8_C8,
43 	XE_OAM_FORMAT_MPEC8u32_B8_C8,
44 
45 	/* Xe2+ */
46 	XE_OA_FORMAT_PEC64u64,
47 	XE_OA_FORMAT_PEC64u64_B8_C8,
48 	XE_OA_FORMAT_PEC64u32,
49 	XE_OA_FORMAT_PEC32u64_G1,
50 	XE_OA_FORMAT_PEC32u32_G1,
51 	XE_OA_FORMAT_PEC32u64_G2,
52 	XE_OA_FORMAT_PEC32u32_G2,
53 	XE_OA_FORMAT_PEC36u64_G1_32_G2_4,
54 	XE_OA_FORMAT_PEC36u64_G1_4_G2_32,
55 
56 	__XE_OA_FORMAT_MAX,
57 };
58 
59 /**
60  * struct xe_oa_format - Format fields for supported OA formats. OA format
61  * properties are specified in PRM/Bspec 52198 and 60942
62  */
63 struct xe_oa_format {
64 	/** @counter_select: counter select value (see Bspec 52198/60942) */
65 	u32 counter_select;
66 	/** @size: record size as written by HW (multiple of 64 byte cachelines) */
67 	int size;
68 	/** @type: of enum @drm_xe_oa_format_type */
69 	int type;
70 	/** @header: 32 or 64 bit report headers */
71 	enum xe_oa_report_header header;
72 	/** @counter_size: counter size value (see Bspec 60942) */
73 	u16 counter_size;
74 	/** @bc_report: BC report value (see Bspec 60942) */
75 	u16 bc_report;
76 };
77 
78 /** struct xe_oa_regs - Registers for each OA unit */
79 struct xe_oa_regs {
80 	u32 base;
81 	struct xe_reg oa_head_ptr;
82 	struct xe_reg oa_tail_ptr;
83 	struct xe_reg oa_buffer;
84 	struct xe_reg oa_ctx_ctrl;
85 	struct xe_reg oa_ctrl;
86 	struct xe_reg oa_debug;
87 	struct xe_reg oa_status;
88 	u32 oa_ctrl_counter_select_mask;
89 };
90 
91 /**
92  * struct xe_oa_unit - Hardware OA unit
93  */
94 struct xe_oa_unit {
95 	/** @oa_unit_id: identifier for the OA unit */
96 	u16 oa_unit_id;
97 
98 	/** @type: Type of OA unit - OAM, OAG etc. */
99 	enum drm_xe_oa_unit_type type;
100 
101 	/** @regs: OA registers for programming the OA unit */
102 	struct xe_oa_regs regs;
103 
104 	/** @num_engines: number of engines attached to this OA unit */
105 	u32 num_engines;
106 
107 	/** @exclusive_stream: The stream currently using the OA unit */
108 	struct xe_oa_stream *exclusive_stream;
109 };
110 
111 /**
112  * struct xe_oa_gt - OA per-gt information
113  */
114 struct xe_oa_gt {
115 	/** @gt_lock: lock protecting create/destroy OA streams */
116 	struct mutex gt_lock;
117 
118 	/** @num_oa_units: number of oa units for each gt */
119 	u32 num_oa_units;
120 
121 	/** @oa_unit: array of oa_units */
122 	struct xe_oa_unit *oa_unit;
123 };
124 
125 /**
126  * struct xe_oa - OA device level information
127  */
128 struct xe_oa {
129 	/** @xe: back pointer to xe device */
130 	struct xe_device *xe;
131 
132 	/** @metrics_kobj: kobj for metrics sysfs */
133 	struct kobject *metrics_kobj;
134 
135 	/** @metrics_lock: lock protecting add/remove configs */
136 	struct mutex metrics_lock;
137 
138 	/** @metrics_idr: List of dynamic configurations (struct xe_oa_config) */
139 	struct idr metrics_idr;
140 
141 	/** @ctx_oactxctrl_offset: offset of OACTXCONTROL register in context image */
142 	u32 ctx_oactxctrl_offset[XE_ENGINE_CLASS_MAX];
143 
144 	/** @oa_formats: tracks all OA formats across platforms */
145 	const struct xe_oa_format *oa_formats;
146 
147 	/** @format_mask: tracks valid OA formats for a platform */
148 	unsigned long format_mask[BITS_TO_LONGS(__XE_OA_FORMAT_MAX)];
149 
150 	/** @oa_unit_ids: tracks oa unit ids assigned across gt's */
151 	u16 oa_unit_ids;
152 };
153 
154 /** @xe_oa_buffer: State of the stream OA buffer */
155 struct xe_oa_buffer {
156 	/** @format: data format */
157 	const struct xe_oa_format *format;
158 
159 	/** @format: xe_bo backing the OA buffer */
160 	struct xe_bo *bo;
161 
162 	/** @vaddr: mapped vaddr of the OA buffer */
163 	u8 *vaddr;
164 
165 	/** @ptr_lock: Lock protecting reads/writes to head/tail pointers */
166 	spinlock_t ptr_lock;
167 
168 	/** @head: Cached head to read from */
169 	u32 head;
170 
171 	/** @tail: The last verified cached tail where HW has completed writing */
172 	u32 tail;
173 
174 	/** @circ_size: The effective circular buffer size, for Xe2+ */
175 	u32 circ_size;
176 };
177 
178 /**
179  * struct xe_oa_stream - state for a single open stream FD
180  */
181 struct xe_oa_stream {
182 	/** @oa: xe_oa backpointer */
183 	struct xe_oa *oa;
184 
185 	/** @gt: gt associated with the oa stream */
186 	struct xe_gt *gt;
187 
188 	/** @hwe: hardware engine associated with this oa stream */
189 	struct xe_hw_engine *hwe;
190 
191 	/** @stream_lock: Lock serializing stream operations */
192 	struct mutex stream_lock;
193 
194 	/** @sample: true if DRM_XE_OA_PROP_SAMPLE_OA is provided */
195 	bool sample;
196 
197 	/** @exec_q: Exec queue corresponding to DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID */
198 	struct xe_exec_queue *exec_q;
199 
200 	/** @k_exec_q: kernel exec_q used for OA programming batch submissions */
201 	struct xe_exec_queue *k_exec_q;
202 
203 	/** @enabled: Whether the stream is currently enabled */
204 	bool enabled;
205 
206 	/** @oa_config: OA configuration used by the stream */
207 	struct xe_oa_config *oa_config;
208 
209 	/** @oa_config_bos: List of struct @xe_oa_config_bo's */
210 	struct llist_head oa_config_bos;
211 
212 	/** @poll_check_timer: Timer to periodically check for data in the OA buffer */
213 	struct hrtimer poll_check_timer;
214 
215 	/** @poll_wq: Wait queue for waiting for OA data to be available */
216 	wait_queue_head_t poll_wq;
217 
218 	/** @pollin: Whether there is data available to read */
219 	bool pollin;
220 
221 	/** @periodic: Whether periodic sampling is currently enabled */
222 	bool periodic;
223 
224 	/** @period_exponent: OA unit sampling frequency is derived from this */
225 	int period_exponent;
226 
227 	/** @oa_buffer: OA buffer for the stream */
228 	struct xe_oa_buffer oa_buffer;
229 
230 	/** @poll_period_ns: hrtimer period for checking OA buffer for available data */
231 	u64 poll_period_ns;
232 
233 	/** @override_gucrc: GuC RC has been overridden for the OA stream */
234 	bool override_gucrc;
235 
236 	/** @oa_status: temporary storage for oa_status register value */
237 	u32 oa_status;
238 
239 	/** @no_preempt: Whether preemption and timeslicing is disabled for stream exec_q */
240 	u32 no_preempt;
241 
242 	/** @xef: xe_file with which the stream was opened */
243 	struct xe_file *xef;
244 
245 	/** @last_fence: fence to use in stream destroy when needed */
246 	struct dma_fence *last_fence;
247 
248 	/** @num_syncs: size of @syncs array */
249 	u32 num_syncs;
250 
251 	/** @syncs: syncs to wait on and to signal */
252 	struct xe_sync_entry *syncs;
253 };
254 #endif
255