1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * TI K3 SoC info driver
4 *
5 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
6 */
7
8 #include <linux/mfd/syscon.h>
9 #include <linux/of.h>
10 #include <linux/of_address.h>
11 #include <linux/regmap.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/string.h>
15 #include <linux/sys_soc.h>
16
17 #define CTRLMMR_WKUP_JTAGID_REG 0
18 /*
19 * Bits:
20 * 31-28 VARIANT Device variant
21 * 27-12 PARTNO Part number
22 * 11-1 MFG Indicates TI as manufacturer (0x17)
23 * 0 Always 1
24 */
25 #define CTRLMMR_WKUP_JTAGID_VARIANT_SHIFT (28)
26 #define CTRLMMR_WKUP_JTAGID_VARIANT_MASK GENMASK(31, 28)
27
28 #define CTRLMMR_WKUP_JTAGID_PARTNO_SHIFT (12)
29 #define CTRLMMR_WKUP_JTAGID_PARTNO_MASK GENMASK(27, 12)
30
31 #define CTRLMMR_WKUP_JTAGID_MFG_SHIFT (1)
32 #define CTRLMMR_WKUP_JTAGID_MFG_MASK GENMASK(11, 1)
33
34 #define CTRLMMR_WKUP_JTAGID_MFG_TI 0x17
35
36 #define JTAG_ID_PARTNO_AM65X 0xBB5A
37 #define JTAG_ID_PARTNO_J721E 0xBB64
38 #define JTAG_ID_PARTNO_J7200 0xBB6D
39 #define JTAG_ID_PARTNO_AM64X 0xBB38
40 #define JTAG_ID_PARTNO_J721S2 0xBB75
41 #define JTAG_ID_PARTNO_AM62X 0xBB7E
42 #define JTAG_ID_PARTNO_J784S4 0xBB80
43 #define JTAG_ID_PARTNO_AM62AX 0xBB8D
44 #define JTAG_ID_PARTNO_AM62PX 0xBB9D
45 #define JTAG_ID_PARTNO_J722S 0xBBA0
46 #define JTAG_ID_PARTNO_AM62LX 0xBBA7
47
48 static const struct k3_soc_id {
49 unsigned int id;
50 const char *family_name;
51 } k3_soc_ids[] = {
52 { JTAG_ID_PARTNO_AM65X, "AM65X" },
53 { JTAG_ID_PARTNO_J721E, "J721E" },
54 { JTAG_ID_PARTNO_J7200, "J7200" },
55 { JTAG_ID_PARTNO_AM64X, "AM64X" },
56 { JTAG_ID_PARTNO_J721S2, "J721S2"},
57 { JTAG_ID_PARTNO_AM62X, "AM62X" },
58 { JTAG_ID_PARTNO_J784S4, "J784S4" },
59 { JTAG_ID_PARTNO_AM62AX, "AM62AX" },
60 { JTAG_ID_PARTNO_AM62PX, "AM62PX" },
61 { JTAG_ID_PARTNO_J722S, "J722S" },
62 { JTAG_ID_PARTNO_AM62LX, "AM62LX" },
63 };
64
65 static const char * const j721e_rev_string_map[] = {
66 "1.0", "1.1", "2.0",
67 };
68
69 static int
k3_chipinfo_partno_to_names(unsigned int partno,struct soc_device_attribute * soc_dev_attr)70 k3_chipinfo_partno_to_names(unsigned int partno,
71 struct soc_device_attribute *soc_dev_attr)
72 {
73 int i;
74
75 for (i = 0; i < ARRAY_SIZE(k3_soc_ids); i++)
76 if (partno == k3_soc_ids[i].id) {
77 soc_dev_attr->family = k3_soc_ids[i].family_name;
78 return 0;
79 }
80
81 return -ENODEV;
82 }
83
84 static int
k3_chipinfo_variant_to_sr(unsigned int partno,unsigned int variant,struct soc_device_attribute * soc_dev_attr)85 k3_chipinfo_variant_to_sr(unsigned int partno, unsigned int variant,
86 struct soc_device_attribute *soc_dev_attr)
87 {
88 switch (partno) {
89 case JTAG_ID_PARTNO_J721E:
90 if (variant >= ARRAY_SIZE(j721e_rev_string_map))
91 goto err_unknown_variant;
92 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%s",
93 j721e_rev_string_map[variant]);
94 break;
95 default:
96 variant++;
97 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%x.0",
98 variant);
99 }
100
101 if (!soc_dev_attr->revision)
102 return -ENOMEM;
103
104 return 0;
105
106 err_unknown_variant:
107 return -ENODEV;
108 }
109
110 static const struct regmap_config k3_chipinfo_regmap_cfg = {
111 .reg_bits = 32,
112 .val_bits = 32,
113 .reg_stride = 4,
114 };
115
k3_chipinfo_probe(struct platform_device * pdev)116 static int k3_chipinfo_probe(struct platform_device *pdev)
117 {
118 struct device_node *node = pdev->dev.of_node;
119 struct soc_device_attribute *soc_dev_attr;
120 struct device *dev = &pdev->dev;
121 struct soc_device *soc_dev;
122 struct regmap *regmap;
123 void __iomem *base;
124 u32 partno_id;
125 u32 variant;
126 u32 jtag_id;
127 u32 mfg;
128 int ret;
129
130 base = devm_platform_ioremap_resource(pdev, 0);
131 if (IS_ERR(base))
132 return PTR_ERR(base);
133
134 regmap = regmap_init_mmio(dev, base, &k3_chipinfo_regmap_cfg);
135 if (IS_ERR(regmap))
136 return PTR_ERR(regmap);
137
138 ret = regmap_read(regmap, CTRLMMR_WKUP_JTAGID_REG, &jtag_id);
139 if (ret < 0)
140 return ret;
141
142 mfg = (jtag_id & CTRLMMR_WKUP_JTAGID_MFG_MASK) >>
143 CTRLMMR_WKUP_JTAGID_MFG_SHIFT;
144
145 if (mfg != CTRLMMR_WKUP_JTAGID_MFG_TI) {
146 dev_err(dev, "Invalid MFG SoC\n");
147 return -ENODEV;
148 }
149
150 variant = (jtag_id & CTRLMMR_WKUP_JTAGID_VARIANT_MASK) >>
151 CTRLMMR_WKUP_JTAGID_VARIANT_SHIFT;
152
153 partno_id = (jtag_id & CTRLMMR_WKUP_JTAGID_PARTNO_MASK) >>
154 CTRLMMR_WKUP_JTAGID_PARTNO_SHIFT;
155
156 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
157 if (!soc_dev_attr)
158 return -ENOMEM;
159
160 ret = k3_chipinfo_partno_to_names(partno_id, soc_dev_attr);
161 if (ret) {
162 dev_err(dev, "Unknown SoC JTAGID[0x%08X]: %d\n", jtag_id, ret);
163 goto err;
164 }
165
166 ret = k3_chipinfo_variant_to_sr(partno_id, variant, soc_dev_attr);
167 if (ret) {
168 dev_err(dev, "Unknown SoC SR[0x%08X]: %d\n", jtag_id, ret);
169 goto err;
170 }
171
172 node = of_find_node_by_path("/");
173 of_property_read_string(node, "model", &soc_dev_attr->machine);
174 of_node_put(node);
175
176 soc_dev = soc_device_register(soc_dev_attr);
177 if (IS_ERR(soc_dev)) {
178 ret = PTR_ERR(soc_dev);
179 goto err_free_rev;
180 }
181
182 dev_info(dev, "Family:%s rev:%s JTAGID[0x%08x] Detected\n",
183 soc_dev_attr->family,
184 soc_dev_attr->revision, jtag_id);
185
186 return 0;
187
188 err_free_rev:
189 kfree(soc_dev_attr->revision);
190 err:
191 kfree(soc_dev_attr);
192 return ret;
193 }
194
195 static const struct of_device_id k3_chipinfo_of_match[] = {
196 { .compatible = "ti,am654-chipid", },
197 { /* sentinel */ },
198 };
199
200 static struct platform_driver k3_chipinfo_driver = {
201 .driver = {
202 .name = "k3-chipinfo",
203 .of_match_table = k3_chipinfo_of_match,
204 },
205 .probe = k3_chipinfo_probe,
206 };
207
k3_chipinfo_init(void)208 static int __init k3_chipinfo_init(void)
209 {
210 return platform_driver_register(&k3_chipinfo_driver);
211 }
212 subsys_initcall(k3_chipinfo_init);
213