1 /****************************************************************************** 2 3 Copyright (c) 2013-2018, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 34 #include "ixl_pf_iov.h" 35 36 /* Private functions */ 37 static void ixl_vf_map_vsi_queue(struct i40e_hw *hw, struct ixl_vf *vf, int qnum, uint32_t val); 38 static void ixl_vf_disable_queue_intr(struct i40e_hw *hw, uint32_t vfint_reg); 39 static void ixl_vf_unregister_intr(struct i40e_hw *hw, uint32_t vpint_reg); 40 41 static int ixl_vc_opcode_level(uint16_t opcode); 42 43 static int ixl_vf_mac_valid(struct ixl_vf *vf, const uint8_t *addr); 44 static int ixl_vf_mac_index(struct ixl_vf *vf, const uint8_t *addr); 45 static int ixl_vf_program_mac(struct ixl_vf *vf, const uint8_t *addr); 46 static void ixl_vf_remove_mac(struct ixl_vf *vf, int index); 47 static int ixl_vf_set_vlan_filter(struct ixl_pf *pf, struct ixl_vf *vf, 48 uint16_t vlan, bool add); 49 50 static int ixl_vf_alloc_vsi(struct ixl_pf *pf, struct ixl_vf *vf); 51 static int ixl_vf_setup_vsi(struct ixl_pf *pf, struct ixl_vf *vf); 52 static void ixl_vf_map_queues(struct ixl_pf *pf, struct ixl_vf *vf); 53 static int ixl_vf_vsi_release(struct ixl_pf *pf, struct ixl_vsi *vsi); 54 static int ixl_vf_release_resources(struct ixl_pf *pf, struct ixl_vf *vf); 55 static int ixl_flush_pcie(struct ixl_pf *pf, struct ixl_vf *vf); 56 static int ixl_reset_vf(struct ixl_pf *pf, struct ixl_vf *vf); 57 static int ixl_reinit_vf(struct ixl_pf *pf, struct ixl_vf *vf); 58 static void ixl_send_vf_msg(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op, enum i40e_status_code status, void *msg, uint16_t len); 59 static void ixl_send_vf_ack(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op); 60 static void ixl_send_vf_nack_msg(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op, enum i40e_status_code status, const char *file, int line); 61 static void ixl_vf_version_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 62 static void ixl_vf_reset_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 63 static void ixl_vf_get_resources_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 64 static int ixl_vf_config_tx_queue(struct ixl_pf *pf, struct ixl_vf *vf, struct virtchnl_txq_info *info); 65 static int ixl_vf_config_rx_queue(struct ixl_pf *pf, struct ixl_vf *vf, struct virtchnl_rxq_info *info); 66 static bool ixl_vf_tx_queue_valid(struct ixl_pf *pf, const struct virtchnl_txq_info *info); 67 static bool ixl_vf_rx_queue_valid(struct ixl_pf *pf, const struct virtchnl_rxq_info *info); 68 static void ixl_vf_config_vsi_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 69 static void ixl_vf_set_qctl(struct ixl_pf *pf, const struct virtchnl_vector_map *vector, enum i40e_queue_type cur_type, uint16_t cur_queue, 70 enum i40e_queue_type *last_type, uint16_t *last_queue); 71 static void ixl_vf_config_vector(struct ixl_pf *pf, struct ixl_vf *vf, const struct virtchnl_vector_map *vector); 72 static void ixl_vf_config_irq_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 73 static void ixl_vf_enable_queues_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 74 static void ixl_vf_disable_queues_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 75 static void ixl_vf_add_mac_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 76 static void ixl_vf_del_mac_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 77 static enum i40e_status_code ixl_vf_enable_vlan_strip(struct ixl_pf *pf, struct ixl_vf *vf); 78 static void ixl_vf_add_vlan_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 79 static void ixl_vf_del_vlan_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 80 static void ixl_vf_config_promisc_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 81 static void ixl_vf_get_stats_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, uint16_t msg_size); 82 static int ixl_vf_reserve_queues(struct ixl_pf *pf, struct ixl_vf *vf, int num_queues); 83 static int ixl_config_pf_vsi_loopback(struct ixl_pf *pf, bool enable); 84 static int ixl_setup_iov_switch(struct ixl_pf *pf); 85 86 static int ixl_adminq_err_to_errno(enum i40e_admin_queue_err err); 87 88 #define IXL_VF_MAX_RING_XL710 8160 89 90 /* 91 * TODO: Move pieces of this into iflib and call the rest in a handler? 92 * 93 * e.g. ixl_if_iov_set_schema 94 * 95 * It's odd to do pci_iov_detach() there while doing pci_iov_attach() 96 * in the driver. 97 */ 98 void 99 ixl_initialize_sriov(struct ixl_pf *pf) 100 { 101 device_t dev = pf->dev; 102 struct i40e_hw *hw = &pf->hw; 103 nvlist_t *pf_schema, *vf_schema; 104 int iov_error; 105 106 pf_schema = pci_iov_schema_alloc_node(); 107 vf_schema = pci_iov_schema_alloc_node(); 108 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); 109 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", 110 IOV_SCHEMA_HASDEFAULT, TRUE); 111 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", 112 IOV_SCHEMA_HASDEFAULT, FALSE); 113 pci_iov_schema_add_bool(vf_schema, "allow-promisc", 114 IOV_SCHEMA_HASDEFAULT, FALSE); 115 pci_iov_schema_add_vlan(vf_schema, "vlan", IOV_SCHEMA_HASDEFAULT, 116 VF_VLAN_TRUNK); 117 pci_iov_schema_add_uint16(vf_schema, "num-queues", 118 IOV_SCHEMA_HASDEFAULT, 119 max(1, min(hw->func_caps.num_msix_vectors_vf - 1, IAVF_MAX_QUEUES))); 120 121 iov_error = pci_iov_attach(dev, pf_schema, vf_schema); 122 if (iov_error != 0) { 123 device_printf(dev, 124 "Failed to initialize SR-IOV (error=%d)\n", 125 iov_error); 126 } else { 127 pf->iov_attached = true; 128 device_printf(dev, "SR-IOV ready\n"); 129 } 130 131 pf->vc_debug_lvl = 1; 132 } 133 134 /* 135 * Allocate the VSI for a VF. 136 */ 137 static int 138 ixl_vf_alloc_vsi(struct ixl_pf *pf, struct ixl_vf *vf) 139 { 140 device_t dev; 141 struct i40e_hw *hw; 142 struct i40e_vsi_context vsi_ctx; 143 int error, i; 144 enum i40e_status_code code; 145 146 hw = &pf->hw; 147 dev = pf->dev; 148 149 vsi_ctx.pf_num = hw->pf_id; 150 vsi_ctx.uplink_seid = pf->veb_seid; 151 vsi_ctx.connection_type = IXL_VSI_DATA_PORT; 152 vsi_ctx.vf_num = hw->func_caps.vf_base_id + vf->vf_num; 153 vsi_ctx.flags = I40E_AQ_VSI_TYPE_VF; 154 155 bzero(&vsi_ctx.info, sizeof(vsi_ctx.info)); 156 157 vsi_ctx.info.valid_sections = htole16(I40E_AQ_VSI_PROP_SWITCH_VALID); 158 if (pf->enable_vf_loopback) 159 vsi_ctx.info.switch_id = 160 htole16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 161 162 vsi_ctx.info.valid_sections |= htole16(I40E_AQ_VSI_PROP_SECURITY_VALID); 163 vsi_ctx.info.sec_flags = I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK; 164 if (vf->vf_flags & VF_FLAG_MAC_ANTI_SPOOF) 165 vsi_ctx.info.sec_flags |= I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK; 166 167 vsi_ctx.info.valid_sections |= htole16(I40E_AQ_VSI_PROP_VLAN_VALID); 168 if (vf->default_vlan != 0) { 169 vsi_ctx.info.pvid = htole16(vf->default_vlan); 170 vsi_ctx.info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 171 I40E_AQ_VSI_PVLAN_INSERT_PVID | 172 I40E_AQ_VSI_PVLAN_EMOD_STR; 173 } else { 174 vsi_ctx.info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 175 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 176 } 177 178 vsi_ctx.info.valid_sections |= 179 htole16(I40E_AQ_VSI_PROP_QUEUE_MAP_VALID); 180 vsi_ctx.info.mapping_flags = htole16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 181 182 /* XXX: Only scattered allocation is supported for VFs right now */ 183 for (i = 0; i < vf->qtag.num_active; i++) 184 vsi_ctx.info.queue_mapping[i] = vf->qtag.qidx[i]; 185 for (; i < nitems(vsi_ctx.info.queue_mapping); i++) 186 vsi_ctx.info.queue_mapping[i] = htole16(I40E_AQ_VSI_QUEUE_MASK); 187 188 vsi_ctx.info.tc_mapping[0] = htole16( 189 (0 << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 190 ((fls(vf->qtag.num_allocated) - 1) << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT)); 191 192 code = i40e_aq_add_vsi(hw, &vsi_ctx, NULL); 193 if (code != I40E_SUCCESS) 194 return (ixl_adminq_err_to_errno(hw->aq.asq_last_status)); 195 vf->vsi.seid = vsi_ctx.seid; 196 vf->vsi.vsi_num = vsi_ctx.vsi_number; 197 vf->vsi.num_rx_queues = vf->qtag.num_active; 198 vf->vsi.num_tx_queues = vf->qtag.num_active; 199 200 code = i40e_aq_get_vsi_params(hw, &vsi_ctx, NULL); 201 if (code != I40E_SUCCESS) { 202 error = ixl_adminq_err_to_errno(hw->aq.asq_last_status); 203 goto fail; 204 } 205 206 code = i40e_aq_config_vsi_bw_limit(hw, vf->vsi.seid, 0, 0, NULL); 207 if (code != I40E_SUCCESS) { 208 error = ixl_adminq_err_to_errno(hw->aq.asq_last_status); 209 device_printf(dev, "Failed to disable BW limit: %d\n", 210 error); 211 goto fail; 212 } 213 214 memcpy(&vf->vsi.info, &vsi_ctx.info, sizeof(vf->vsi.info)); 215 /* A newly allocated hardware VSI starts a new statistics epoch. */ 216 ixl_vsi_reset_stats(&vf->vsi); 217 return (0); 218 219 fail: 220 i40e_aq_delete_element(hw, vf->vsi.seid, NULL); 221 vf->vsi.seid = 0; 222 vf->vsi.vsi_num = 0; 223 return (error); 224 } 225 226 static int 227 ixl_vf_setup_vsi(struct ixl_pf *pf, struct ixl_vf *vf) 228 { 229 int error; 230 231 vf->vsi.flags |= IXL_FLAGS_IS_VF; 232 233 error = ixl_vf_alloc_vsi(pf, vf); 234 if (error != 0) 235 return (error); 236 237 vf->vsi.dev = pf->dev; 238 239 ixl_init_filters(&vf->vsi); 240 /* 241 * For a trunk VSI, VLAN anti-spoofing requires an explicit VLAN 0 242 * membership for untagged and priority-tagged traffic. 243 */ 244 error = ixl_vf_set_vlan_filter(pf, vf, vf->default_vlan, true); 245 if (error != 0) { 246 ixl_free_filters(&vf->vsi.ftl); 247 vf->vsi.num_hw_filters = 0; 248 i40e_aq_delete_element(&pf->hw, vf->vsi.seid, NULL); 249 vf->vsi.seid = 0; 250 vf->vsi.vsi_num = 0; 251 return (error); 252 } 253 return (0); 254 } 255 256 static void 257 ixl_vf_map_vsi_queue(struct i40e_hw *hw, struct ixl_vf *vf, int qnum, 258 uint32_t val) 259 { 260 uint32_t qtable; 261 int index, shift; 262 263 /* 264 * Two queues are mapped in a single register, so we have to do some 265 * gymnastics to convert the queue number into a register index and 266 * shift. 267 */ 268 index = qnum / 2; 269 shift = (qnum % 2) * I40E_VSILAN_QTABLE_QINDEX_1_SHIFT; 270 271 qtable = i40e_read_rx_ctl(hw, I40E_VSILAN_QTABLE(index, vf->vsi.vsi_num)); 272 qtable &= ~(I40E_VSILAN_QTABLE_QINDEX_0_MASK << shift); 273 qtable |= val << shift; 274 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(index, vf->vsi.vsi_num), qtable); 275 } 276 277 static void 278 ixl_vf_map_queues(struct ixl_pf *pf, struct ixl_vf *vf) 279 { 280 struct i40e_hw *hw; 281 uint32_t qtable; 282 int i; 283 284 hw = &pf->hw; 285 286 /* 287 * Contiguous mappings aren't actually supported by the hardware, 288 * so we have to use non-contiguous mappings. 289 */ 290 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->vsi.vsi_num), 291 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK); 292 293 /* Enable LAN traffic on this VF */ 294 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_num), 295 I40E_VPLAN_MAPENA_TXRX_ENA_MASK); 296 297 /* Program index of each VF queue into PF queue space 298 * (This is only needed if QTABLE is enabled) */ 299 for (i = 0; i < vf->vsi.num_tx_queues; i++) { 300 qtable = ixl_pf_qidx_from_vsi_qidx(&vf->qtag, i) << 301 I40E_VPLAN_QTABLE_QINDEX_SHIFT; 302 303 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num), qtable); 304 } 305 for (; i < IXL_MAX_VSI_QUEUES; i++) 306 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num), 307 I40E_VPLAN_QTABLE_QINDEX_MASK); 308 309 /* Map queues allocated to VF to its VSI; 310 * This mapping matches the VF-wide mapping since the VF 311 * is only given a single VSI */ 312 for (i = 0; i < vf->vsi.num_tx_queues; i++) 313 ixl_vf_map_vsi_queue(hw, vf, i, 314 ixl_pf_qidx_from_vsi_qidx(&vf->qtag, i)); 315 316 /* Set rest of VSI queues as unused. */ 317 for (; i < IXL_MAX_VSI_QUEUES; i++) 318 ixl_vf_map_vsi_queue(hw, vf, i, 319 I40E_VSILAN_QTABLE_QINDEX_0_MASK); 320 321 ixl_flush(hw); 322 } 323 324 static int 325 ixl_vf_vsi_release(struct ixl_pf *pf, struct ixl_vsi *vsi) 326 { 327 struct i40e_hw *hw; 328 enum i40e_status_code status; 329 int error; 330 331 hw = &pf->hw; 332 333 if (vsi->seid == 0) 334 return (0); 335 336 status = i40e_aq_delete_element(hw, vsi->seid, NULL); 337 if (status != I40E_SUCCESS) { 338 error = ixl_adminq_err_to_errno(hw->aq.asq_last_status); 339 device_printf(pf->dev, "Failed to release VF VSI %u: %d\n", 340 vsi->seid, error); 341 return (error); 342 } 343 vsi->seid = 0; 344 vsi->vsi_num = 0; 345 return (0); 346 } 347 348 static void 349 ixl_vf_disable_queue_intr(struct i40e_hw *hw, uint32_t vfint_reg) 350 { 351 352 wr32(hw, vfint_reg, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK); 353 ixl_flush(hw); 354 } 355 356 static void 357 ixl_vf_unregister_intr(struct i40e_hw *hw, uint32_t vpint_reg) 358 { 359 360 wr32(hw, vpint_reg, I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK | 361 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK); 362 ixl_flush(hw); 363 } 364 365 static int 366 ixl_vf_release_resources(struct ixl_pf *pf, struct ixl_vf *vf) 367 { 368 struct i40e_hw *hw; 369 uint32_t vfint_reg, vpint_reg; 370 int error, i; 371 372 hw = &pf->hw; 373 374 error = ixl_vf_vsi_release(pf, &vf->vsi); 375 376 /* Index 0 has a special register. */ 377 ixl_vf_disable_queue_intr(hw, I40E_VFINT_DYN_CTL0(vf->vf_num)); 378 379 for (i = 1; i < hw->func_caps.num_msix_vectors_vf; i++) { 380 vfint_reg = IXL_VFINT_DYN_CTLN_REG(hw, i , vf->vf_num); 381 ixl_vf_disable_queue_intr(hw, vfint_reg); 382 } 383 384 /* Index 0 has a special register. */ 385 ixl_vf_unregister_intr(hw, I40E_VPINT_LNKLST0(vf->vf_num)); 386 387 for (i = 1; i < hw->func_caps.num_msix_vectors_vf; i++) { 388 vpint_reg = IXL_VPINT_LNKLSTN_REG(hw, i, vf->vf_num); 389 ixl_vf_unregister_intr(hw, vpint_reg); 390 } 391 392 vf->vsi.num_tx_queues = 0; 393 vf->vsi.num_rx_queues = 0; 394 return (error); 395 } 396 397 static int 398 ixl_flush_pcie(struct ixl_pf *pf, struct ixl_vf *vf) 399 { 400 struct i40e_hw *hw; 401 int i; 402 uint16_t global_vf_num; 403 uint32_t ciad; 404 405 hw = &pf->hw; 406 global_vf_num = hw->func_caps.vf_base_id + vf->vf_num; 407 408 wr32(hw, I40E_PF_PCI_CIAA, IXL_PF_PCI_CIAA_VF_DEVICE_STATUS | 409 (global_vf_num << I40E_PF_PCI_CIAA_VF_NUM_SHIFT)); 410 for (i = 0; i < IXL_VF_RESET_TIMEOUT; i++) { 411 ciad = rd32(hw, I40E_PF_PCI_CIAD); 412 if ((ciad & IXL_PF_PCI_CIAD_VF_TRANS_PENDING_MASK) == 0) 413 return (0); 414 DELAY(1); 415 } 416 417 return (ETIMEDOUT); 418 } 419 420 static int 421 ixl_reset_vf(struct ixl_pf *pf, struct ixl_vf *vf) 422 { 423 struct i40e_hw *hw; 424 uint32_t vfrtrig; 425 int error; 426 427 hw = &pf->hw; 428 429 ixl_dbg_iov(pf, "Resetting VF-%d\n", vf->vf_num); 430 431 vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num)); 432 vfrtrig |= I40E_VPGEN_VFRTRIG_VFSWR_MASK; 433 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig); 434 ixl_flush(hw); 435 436 error = ixl_reinit_vf(pf, vf); 437 if (error != 0) 438 return (error); 439 440 ixl_dbg_iov(pf, "Resetting VF-%d done.\n", vf->vf_num); 441 return (0); 442 } 443 444 static int 445 ixl_reinit_vf(struct ixl_pf *pf, struct ixl_vf *vf) 446 { 447 struct i40e_hw *hw; 448 uint32_t vfrstat, vfrtrig; 449 int i, error; 450 451 hw = &pf->hw; 452 vf->vf_flags &= ~VF_FLAG_INITIALIZED; 453 454 for (i = 0; i < IXL_VF_RESET_TIMEOUT; i++) { 455 DELAY(10); 456 457 vfrstat = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_num)); 458 if (vfrstat & I40E_VPGEN_VFRSTAT_VFRD_MASK) 459 break; 460 } 461 462 if (i == IXL_VF_RESET_TIMEOUT) { 463 device_printf(pf->dev, "VF %d failed to reset\n", vf->vf_num); 464 return (ETIMEDOUT); 465 } 466 467 if (vf->vsi.seid != 0) { 468 error = ixl_disable_rings(pf, &vf->vsi, &vf->qtag); 469 if (error != 0) 470 return (error); 471 } 472 ixl_pf_qmgr_clear_queue_flags(&vf->qtag); 473 474 error = ixl_vf_release_resources(pf, vf); 475 if (error != 0) 476 return (error); 477 478 error = ixl_flush_pcie(pf, vf); 479 if (error != 0) { 480 device_printf(pf->dev, 481 "Timed out waiting for PCIe activity to stop on VF-%d\n", 482 vf->vf_num); 483 return (error); 484 } 485 486 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), VIRTCHNL_VFR_COMPLETED); 487 vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num)); 488 vfrtrig &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK; 489 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig); 490 491 ixl_free_filters(&vf->vsi.ftl); 492 vf->vsi.num_hw_filters = 0; 493 vf->vsi.num_macs = 0; 494 vf->vsi.num_vlans = 0; 495 bit_nclear(vf->vsi.vlans_map, 0, IXL_VLANS_MAP_LEN - 1); 496 vf->num_mac_filters = 0; 497 498 error = ixl_vf_setup_vsi(pf, vf); 499 if (error != 0) 500 return (error); 501 ixl_vf_map_queues(pf, vf); 502 503 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), VIRTCHNL_VFR_VFACTIVE); 504 ixl_flush(hw); 505 vf->mdd_blocked = false; 506 vf->mdd_event_pending = false; 507 vf->mdd_reset_pending = false; 508 return (0); 509 } 510 511 static int 512 ixl_vc_opcode_level(uint16_t opcode) 513 { 514 switch (opcode) { 515 case VIRTCHNL_OP_GET_STATS: 516 return (10); 517 default: 518 return (5); 519 } 520 } 521 522 static void 523 ixl_send_vf_msg(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op, 524 enum i40e_status_code status, void *msg, uint16_t len) 525 { 526 struct i40e_hw *hw; 527 int global_vf_id; 528 529 hw = &pf->hw; 530 global_vf_id = hw->func_caps.vf_base_id + vf->vf_num; 531 532 I40E_VC_DEBUG(pf, ixl_vc_opcode_level(op), 533 "Sending msg (op=%s[%d], status=%d) to VF-%d\n", 534 ixl_vc_opcode_str(op), op, status, vf->vf_num); 535 536 i40e_aq_send_msg_to_vf(hw, global_vf_id, op, status, msg, len, NULL); 537 } 538 539 static void 540 ixl_send_vf_ack(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op) 541 { 542 543 ixl_send_vf_msg(pf, vf, op, I40E_SUCCESS, NULL, 0); 544 } 545 546 static void 547 ixl_send_vf_nack_msg(struct ixl_pf *pf, struct ixl_vf *vf, uint16_t op, 548 enum i40e_status_code status, const char *file, int line) 549 { 550 551 I40E_VC_DEBUG(pf, 1, 552 "Sending NACK (op=%s[%d], err=%s[%d]) to VF-%d from %s:%d\n", 553 ixl_vc_opcode_str(op), op, i40e_stat_str(&pf->hw, status), 554 status, vf->vf_num, file, line); 555 ixl_send_vf_msg(pf, vf, op, status, NULL, 0); 556 } 557 558 static void 559 ixl_vf_version_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 560 uint16_t msg_size) 561 { 562 struct virtchnl_version_info *recv_vf_version; 563 device_t dev = pf->dev; 564 565 recv_vf_version = (struct virtchnl_version_info *)msg; 566 567 /* VFs running the 1.0 API expect to get 1.0 back */ 568 if (VF_IS_V10(recv_vf_version)) { 569 vf->version.major = 1; 570 vf->version.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS; 571 } else { 572 vf->version.major = VIRTCHNL_VERSION_MAJOR; 573 vf->version.minor = VIRTCHNL_VERSION_MINOR; 574 575 if ((recv_vf_version->major != VIRTCHNL_VERSION_MAJOR) || 576 (recv_vf_version->minor != VIRTCHNL_VERSION_MINOR)) 577 device_printf(dev, 578 "%s: VF-%d requested version (%d.%d) differs from PF version (%d.%d)\n", 579 __func__, vf->vf_num, 580 recv_vf_version->major, recv_vf_version->minor, 581 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR); 582 } 583 584 ixl_send_vf_msg(pf, vf, VIRTCHNL_OP_VERSION, I40E_SUCCESS, 585 &vf->version, sizeof(vf->version)); 586 } 587 588 static void 589 ixl_vf_reset_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 590 uint16_t msg_size) 591 { 592 int error; 593 594 error = ixl_reset_vf(pf, vf); 595 if (error != 0) 596 device_printf(pf->dev, "Failed to reset VF-%d: %d\n", 597 vf->vf_num, error); 598 599 /* No response to a reset message. */ 600 } 601 602 static void 603 ixl_vf_get_resources_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 604 uint16_t msg_size) 605 { 606 struct virtchnl_vf_resource reply; 607 608 bzero(&reply, sizeof(reply)); 609 610 if (vf->version.minor == VIRTCHNL_VERSION_MINOR_NO_VF_CAPS) 611 reply.vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2 | 612 VIRTCHNL_VF_OFFLOAD_RSS_REG | 613 VIRTCHNL_VF_OFFLOAD_VLAN; 614 else 615 /* Force VF RSS setup by PF in 1.1+ VFs */ 616 reply.vf_cap_flags = *(u32 *)msg & ( 617 VIRTCHNL_VF_OFFLOAD_L2 | 618 VIRTCHNL_VF_OFFLOAD_RSS_PF | 619 VIRTCHNL_VF_OFFLOAD_VLAN); 620 621 reply.num_vsis = 1; 622 reply.num_queue_pairs = vf->vsi.num_tx_queues; 623 reply.max_vectors = pf->hw.func_caps.num_msix_vectors_vf; 624 reply.rss_key_size = 52; 625 reply.rss_lut_size = 64; 626 reply.vsi_res[0].vsi_id = vf->vsi.vsi_num; 627 reply.vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV; 628 reply.vsi_res[0].num_queue_pairs = vf->vsi.num_tx_queues; 629 memcpy(reply.vsi_res[0].default_mac_addr, vf->mac, ETHER_ADDR_LEN); 630 631 ixl_send_vf_msg(pf, vf, VIRTCHNL_OP_GET_VF_RESOURCES, 632 I40E_SUCCESS, &reply, sizeof(reply)); 633 vf->vf_flags |= VF_FLAG_INITIALIZED; 634 } 635 636 static int 637 ixl_vf_config_tx_queue(struct ixl_pf *pf, struct ixl_vf *vf, 638 struct virtchnl_txq_info *info) 639 { 640 struct i40e_hw *hw; 641 struct i40e_hmc_obj_txq txq; 642 uint16_t global_queue_num, global_vf_num; 643 enum i40e_status_code status; 644 uint32_t qtx_ctl; 645 646 hw = &pf->hw; 647 global_queue_num = ixl_pf_qidx_from_vsi_qidx(&vf->qtag, info->queue_id); 648 global_vf_num = hw->func_caps.vf_base_id + vf->vf_num; 649 bzero(&txq, sizeof(txq)); 650 651 DDPRINTF(pf->dev, "VF %d: PF TX queue %d / VF TX queue %d (Global VF %d)\n", 652 vf->vf_num, global_queue_num, info->queue_id, global_vf_num); 653 654 status = i40e_clear_lan_tx_queue_context(hw, global_queue_num); 655 if (status != I40E_SUCCESS) 656 return (EINVAL); 657 658 txq.base = info->dma_ring_addr / IXL_TX_CTX_BASE_UNITS; 659 660 txq.head_wb_ena = info->headwb_enabled; 661 txq.head_wb_addr = info->dma_headwb_addr; 662 txq.qlen = info->ring_len; 663 txq.rdylist = le16_to_cpu(vf->vsi.info.qs_handle[0]); 664 txq.rdylist_act = 0; 665 666 status = i40e_set_lan_tx_queue_context(hw, global_queue_num, &txq); 667 if (status != I40E_SUCCESS) 668 return (EINVAL); 669 670 qtx_ctl = I40E_QTX_CTL_VF_QUEUE | 671 (hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) | 672 (global_vf_num << I40E_QTX_CTL_VFVM_INDX_SHIFT); 673 wr32(hw, I40E_QTX_CTL(global_queue_num), qtx_ctl); 674 ixl_flush(hw); 675 676 ixl_pf_qmgr_mark_queue_configured(&vf->qtag, info->queue_id, true); 677 678 return (0); 679 } 680 681 static uint32_t 682 ixl_vf_max_ring(const struct i40e_hw *hw) 683 { 684 685 if (hw->mac.type == I40E_MAC_XL710) 686 return (IXL_VF_MAX_RING_XL710); 687 return (IXL_MAX_RING); 688 } 689 690 static bool 691 ixl_vf_tx_queue_valid(struct ixl_pf *pf, 692 const struct virtchnl_txq_info *info) 693 { 694 695 if (info->ring_len < IXL_MIN_RING || 696 info->ring_len > ixl_vf_max_ring(&pf->hw) || 697 info->ring_len % 8 != 0 || 698 info->dma_ring_addr == 0 || 699 info->dma_ring_addr % IXL_TX_CTX_BASE_UNITS != 0 || 700 info->headwb_enabled > 1) 701 return (false); 702 if (info->headwb_enabled != 0 && 703 (info->dma_headwb_addr == 0 || info->dma_headwb_addr % 4 != 0)) 704 return (false); 705 return (true); 706 } 707 708 static int 709 ixl_vf_config_rx_queue(struct ixl_pf *pf, struct ixl_vf *vf, 710 struct virtchnl_rxq_info *info) 711 { 712 struct i40e_hw *hw; 713 struct i40e_hmc_obj_rxq rxq; 714 uint16_t global_queue_num; 715 enum i40e_status_code status; 716 717 hw = &pf->hw; 718 global_queue_num = ixl_pf_qidx_from_vsi_qidx(&vf->qtag, info->queue_id); 719 bzero(&rxq, sizeof(rxq)); 720 721 DDPRINTF(pf->dev, "VF %d: PF RX queue %d / VF RX queue %d\n", 722 vf->vf_num, global_queue_num, info->queue_id); 723 724 if (info->databuffer_size > IXL_VF_MAX_BUFFER) 725 return (EINVAL); 726 727 if (info->max_pkt_size > IXL_VF_MAX_FRAME || 728 info->max_pkt_size < ETHER_MIN_LEN) 729 return (EINVAL); 730 731 if (info->splithdr_enabled) { 732 if (info->hdr_size > IXL_VF_MAX_HDR_BUFFER) 733 return (EINVAL); 734 735 rxq.hsplit_0 = info->rx_split_pos & 736 (I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 | 737 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP | 738 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP | 739 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP); 740 rxq.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT; 741 742 rxq.dtype = 2; 743 } 744 745 status = i40e_clear_lan_rx_queue_context(hw, global_queue_num); 746 if (status != I40E_SUCCESS) 747 return (EINVAL); 748 749 rxq.base = info->dma_ring_addr / IXL_RX_CTX_BASE_UNITS; 750 rxq.qlen = info->ring_len; 751 752 rxq.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT; 753 754 rxq.dsize = 1; 755 rxq.crcstrip = 1; 756 rxq.l2tsel = 1; 757 758 rxq.rxmax = info->max_pkt_size; 759 rxq.tphrdesc_ena = 1; 760 rxq.tphwdesc_ena = 1; 761 rxq.tphdata_ena = 1; 762 rxq.tphhead_ena = 1; 763 rxq.lrxqthresh = 1; 764 rxq.prefena = 1; 765 766 status = i40e_set_lan_rx_queue_context(hw, global_queue_num, &rxq); 767 if (status != I40E_SUCCESS) 768 return (EINVAL); 769 770 ixl_pf_qmgr_mark_queue_configured(&vf->qtag, info->queue_id, false); 771 772 return (0); 773 } 774 775 static bool 776 ixl_vf_rx_queue_valid(struct ixl_pf *pf, 777 const struct virtchnl_rxq_info *info) 778 { 779 780 if (info->ring_len < IXL_MIN_RING || 781 info->ring_len > ixl_vf_max_ring(&pf->hw) || 782 info->ring_len % IXL_RING_INCREMENT != 0 || 783 info->dma_ring_addr == 0 || 784 info->dma_ring_addr % IXL_RX_CTX_BASE_UNITS != 0) 785 return (false); 786 if (info->databuffer_size == 0 || 787 info->databuffer_size > IXL_VF_MAX_BUFFER || 788 info->databuffer_size % (1U << I40E_RXQ_CTX_DBUFF_SHIFT) != 0) 789 return (false); 790 if (info->max_pkt_size > IXL_VF_MAX_FRAME || 791 info->max_pkt_size < ETHER_MIN_LEN) 792 return (false); 793 if (info->splithdr_enabled > 1) 794 return (false); 795 if (info->splithdr_enabled != 0 && 796 (info->hdr_size == 0 || info->hdr_size > IXL_VF_MAX_HDR_BUFFER || 797 info->hdr_size % (1U << I40E_RXQ_CTX_HBUFF_SHIFT) != 0)) 798 return (false); 799 return (true); 800 } 801 802 static void 803 ixl_vf_config_vsi_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 804 uint16_t msg_size) 805 { 806 struct virtchnl_vsi_queue_config_info *info; 807 struct virtchnl_queue_pair_info *pair; 808 int i; 809 810 info = msg; 811 if (info->num_queue_pairs == 0 || info->num_queue_pairs > vf->vsi.num_tx_queues) { 812 device_printf(pf->dev, "VF %d: invalid # of qpairs (msg has %d, VSI has %d)\n", 813 vf->vf_num, info->num_queue_pairs, vf->vsi.num_tx_queues); 814 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES, 815 I40E_ERR_PARAM); 816 return; 817 } 818 819 if (info->vsi_id != vf->vsi.vsi_num) { 820 device_printf(pf->dev, "VF %d: VSI id in recvd message (%d) does not match expected id (%d)\n", 821 vf->vf_num, info->vsi_id, vf->vsi.vsi_num); 822 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES, 823 I40E_ERR_PARAM); 824 return; 825 } 826 827 for (i = 0; i < info->num_queue_pairs; i++) { 828 pair = &info->qpair[i]; 829 830 if (pair->txq.vsi_id != vf->vsi.vsi_num || 831 pair->rxq.vsi_id != vf->vsi.vsi_num || 832 pair->txq.queue_id != pair->rxq.queue_id || 833 pair->txq.queue_id >= vf->vsi.num_tx_queues || 834 !ixl_vf_tx_queue_valid(pf, &pair->txq) || 835 !ixl_vf_rx_queue_valid(pf, &pair->rxq)) { 836 837 i40e_send_vf_nack(pf, vf, 838 VIRTCHNL_OP_CONFIG_VSI_QUEUES, I40E_ERR_PARAM); 839 return; 840 } 841 } 842 843 for (i = 0; i < info->num_queue_pairs; i++) { 844 pair = &info->qpair[i]; 845 846 if (ixl_vf_config_tx_queue(pf, vf, &pair->txq) != 0) { 847 i40e_send_vf_nack(pf, vf, 848 VIRTCHNL_OP_CONFIG_VSI_QUEUES, I40E_ERR_PARAM); 849 return; 850 } 851 852 if (ixl_vf_config_rx_queue(pf, vf, &pair->rxq) != 0) { 853 i40e_send_vf_nack(pf, vf, 854 VIRTCHNL_OP_CONFIG_VSI_QUEUES, I40E_ERR_PARAM); 855 return; 856 } 857 } 858 859 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES); 860 } 861 862 static void 863 ixl_vf_set_qctl(struct ixl_pf *pf, 864 const struct virtchnl_vector_map *vector, 865 enum i40e_queue_type cur_type, uint16_t cur_queue, 866 enum i40e_queue_type *last_type, uint16_t *last_queue) 867 { 868 uint32_t offset, qctl; 869 uint16_t itr_indx; 870 871 if (cur_type == I40E_QUEUE_TYPE_RX) { 872 offset = I40E_QINT_RQCTL(cur_queue); 873 itr_indx = vector->rxitr_idx; 874 } else { 875 offset = I40E_QINT_TQCTL(cur_queue); 876 itr_indx = vector->txitr_idx; 877 } 878 879 qctl = htole32((vector->vector_id << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 880 (*last_type << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) | 881 (*last_queue << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) | 882 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 883 (itr_indx << I40E_QINT_RQCTL_ITR_INDX_SHIFT)); 884 885 wr32(&pf->hw, offset, qctl); 886 887 *last_type = cur_type; 888 *last_queue = cur_queue; 889 } 890 891 static void 892 ixl_vf_config_vector(struct ixl_pf *pf, struct ixl_vf *vf, 893 const struct virtchnl_vector_map *vector) 894 { 895 struct i40e_hw *hw; 896 u_int qindex; 897 enum i40e_queue_type type, last_type; 898 uint32_t lnklst_reg; 899 uint16_t rxq_map, txq_map, cur_queue, last_queue; 900 901 hw = &pf->hw; 902 903 rxq_map = vector->rxq_map; 904 txq_map = vector->txq_map; 905 906 last_queue = IXL_END_OF_INTR_LNKLST; 907 last_type = I40E_QUEUE_TYPE_RX; 908 909 /* 910 * The datasheet says to optimize performance, RX queues and TX queues 911 * should be interleaved in the interrupt linked list, so we process 912 * both at once here. 913 */ 914 while ((rxq_map != 0) || (txq_map != 0)) { 915 if (txq_map != 0) { 916 qindex = ffs(txq_map) - 1; 917 type = I40E_QUEUE_TYPE_TX; 918 cur_queue = ixl_pf_qidx_from_vsi_qidx(&vf->qtag, qindex); 919 ixl_vf_set_qctl(pf, vector, type, cur_queue, 920 &last_type, &last_queue); 921 txq_map &= ~(1 << qindex); 922 } 923 924 if (rxq_map != 0) { 925 qindex = ffs(rxq_map) - 1; 926 type = I40E_QUEUE_TYPE_RX; 927 cur_queue = ixl_pf_qidx_from_vsi_qidx(&vf->qtag, qindex); 928 ixl_vf_set_qctl(pf, vector, type, cur_queue, 929 &last_type, &last_queue); 930 rxq_map &= ~(1 << qindex); 931 } 932 } 933 934 if (vector->vector_id == 0) 935 lnklst_reg = I40E_VPINT_LNKLST0(vf->vf_num); 936 else 937 lnklst_reg = IXL_VPINT_LNKLSTN_REG(hw, vector->vector_id, 938 vf->vf_num); 939 wr32(hw, lnklst_reg, 940 (last_queue << I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT) | 941 (last_type << I40E_VPINT_LNKLST0_FIRSTQ_TYPE_SHIFT)); 942 943 ixl_flush(hw); 944 } 945 946 static void 947 ixl_vf_config_irq_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 948 uint16_t msg_size) 949 { 950 struct virtchnl_irq_map_info *map; 951 struct virtchnl_vector_map *vector; 952 struct i40e_hw *hw; 953 int i, largest_txq, largest_rxq; 954 955 hw = &pf->hw; 956 map = msg; 957 958 for (i = 0; i < map->num_vectors; i++) { 959 vector = &map->vecmap[i]; 960 961 if ((vector->vector_id >= hw->func_caps.num_msix_vectors_vf) || 962 vector->vsi_id != vf->vsi.vsi_num) { 963 i40e_send_vf_nack(pf, vf, 964 VIRTCHNL_OP_CONFIG_IRQ_MAP, I40E_ERR_PARAM); 965 return; 966 } 967 968 if (vector->rxq_map != 0) { 969 largest_rxq = fls(vector->rxq_map) - 1; 970 if (largest_rxq >= vf->vsi.num_rx_queues) { 971 i40e_send_vf_nack(pf, vf, 972 VIRTCHNL_OP_CONFIG_IRQ_MAP, 973 I40E_ERR_PARAM); 974 return; 975 } 976 } 977 978 if (vector->txq_map != 0) { 979 largest_txq = fls(vector->txq_map) - 1; 980 if (largest_txq >= vf->vsi.num_tx_queues) { 981 i40e_send_vf_nack(pf, vf, 982 VIRTCHNL_OP_CONFIG_IRQ_MAP, 983 I40E_ERR_PARAM); 984 return; 985 } 986 } 987 988 if (vector->rxitr_idx > IXL_MAX_ITR_IDX || 989 vector->txitr_idx > IXL_MAX_ITR_IDX) { 990 i40e_send_vf_nack(pf, vf, 991 VIRTCHNL_OP_CONFIG_IRQ_MAP, 992 I40E_ERR_PARAM); 993 return; 994 } 995 996 } 997 998 for (i = 0; i < map->num_vectors; i++) 999 ixl_vf_config_vector(pf, vf, &map->vecmap[i]); 1000 1001 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_CONFIG_IRQ_MAP); 1002 } 1003 1004 static void 1005 ixl_vf_enable_queues_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1006 uint16_t msg_size) 1007 { 1008 struct virtchnl_queue_select *select; 1009 uint32_t queue_mask; 1010 int error = 0; 1011 1012 select = msg; 1013 1014 queue_mask = (1U << vf->qtag.num_active) - 1; 1015 if (select->vsi_id != vf->vsi.vsi_num || 1016 (select->rx_queues == 0 && select->tx_queues == 0) || 1017 ((select->rx_queues | select->tx_queues) & ~queue_mask) != 0) { 1018 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ENABLE_QUEUES, 1019 I40E_ERR_PARAM); 1020 return; 1021 } 1022 for (int i = 0; i < vf->qtag.num_active; i++) { 1023 if (((select->tx_queues & (1U << i)) != 0 && 1024 !ixl_pf_qmgr_is_queue_configured(&vf->qtag, i, true)) || 1025 ((select->rx_queues & (1U << i)) != 0 && 1026 !ixl_pf_qmgr_is_queue_configured(&vf->qtag, i, false))) { 1027 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ENABLE_QUEUES, 1028 I40E_ERR_PARAM); 1029 return; 1030 } 1031 } 1032 1033 /* Enable TX rings selected by the VF */ 1034 for (int i = 0; i < vf->qtag.num_active; i++) { 1035 if ((1U << i) & select->tx_queues) { 1036 /* Warn if this queue is already marked as enabled */ 1037 if (ixl_pf_qmgr_is_queue_enabled(&vf->qtag, i, true)) 1038 ixl_dbg_iov(pf, "VF %d: TX ring %d is already enabled!\n", 1039 vf->vf_num, i); 1040 1041 error = ixl_enable_tx_ring(pf, &vf->qtag, i); 1042 if (error) 1043 break; 1044 else 1045 ixl_pf_qmgr_mark_queue_enabled(&vf->qtag, i, true); 1046 } 1047 } 1048 1049 /* Enable RX rings selected by the VF */ 1050 for (int i = 0; i < vf->qtag.num_active; i++) { 1051 if ((1U << i) & select->rx_queues) { 1052 /* Warn if this queue is already marked as enabled */ 1053 if (ixl_pf_qmgr_is_queue_enabled(&vf->qtag, i, false)) 1054 ixl_dbg_iov(pf, "VF %d: RX ring %d is already enabled!\n", 1055 vf->vf_num, i); 1056 error = ixl_enable_rx_ring(pf, &vf->qtag, i); 1057 if (error) 1058 break; 1059 else 1060 ixl_pf_qmgr_mark_queue_enabled(&vf->qtag, i, false); 1061 } 1062 } 1063 1064 if (error) { 1065 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ENABLE_QUEUES, 1066 I40E_ERR_TIMEOUT); 1067 return; 1068 } 1069 1070 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_ENABLE_QUEUES); 1071 } 1072 1073 static void 1074 ixl_vf_disable_queues_msg(struct ixl_pf *pf, struct ixl_vf *vf, 1075 void *msg, uint16_t msg_size) 1076 { 1077 struct virtchnl_queue_select *select; 1078 uint32_t queue_mask; 1079 int error = 0; 1080 1081 select = msg; 1082 1083 queue_mask = (1U << vf->qtag.num_active) - 1; 1084 if (select->vsi_id != vf->vsi.vsi_num || 1085 (select->rx_queues == 0 && select->tx_queues == 0) || 1086 ((select->rx_queues | select->tx_queues) & ~queue_mask) != 0) { 1087 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DISABLE_QUEUES, 1088 I40E_ERR_PARAM); 1089 return; 1090 } 1091 1092 /* Disable TX rings selected by the VF */ 1093 for (int i = 0; i < vf->qtag.num_active; i++) { 1094 if ((1U << i) & select->tx_queues) { 1095 /* Skip this queue if it hasn't been configured */ 1096 if (!ixl_pf_qmgr_is_queue_configured(&vf->qtag, i, true)) 1097 continue; 1098 /* Warn if this queue is already marked as disabled */ 1099 if (!ixl_pf_qmgr_is_queue_enabled(&vf->qtag, i, true)) { 1100 ixl_dbg_iov(pf, "VF %d: TX ring %d is already disabled!\n", 1101 vf->vf_num, i); 1102 continue; 1103 } 1104 error = ixl_disable_tx_ring(pf, &vf->qtag, i); 1105 if (error) 1106 break; 1107 else 1108 ixl_pf_qmgr_mark_queue_disabled(&vf->qtag, i, true); 1109 } 1110 } 1111 1112 /* Enable RX rings selected by the VF */ 1113 for (int i = 0; i < vf->qtag.num_active; i++) { 1114 if ((1U << i) & select->rx_queues) { 1115 /* Skip this queue if it hasn't been configured */ 1116 if (!ixl_pf_qmgr_is_queue_configured(&vf->qtag, i, false)) 1117 continue; 1118 /* Warn if this queue is already marked as disabled */ 1119 if (!ixl_pf_qmgr_is_queue_enabled(&vf->qtag, i, false)) { 1120 ixl_dbg_iov(pf, "VF %d: RX ring %d is already disabled!\n", 1121 vf->vf_num, i); 1122 continue; 1123 } 1124 error = ixl_disable_rx_ring(pf, &vf->qtag, i); 1125 if (error) 1126 break; 1127 else 1128 ixl_pf_qmgr_mark_queue_disabled(&vf->qtag, i, false); 1129 } 1130 } 1131 1132 if (error) { 1133 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DISABLE_QUEUES, 1134 I40E_ERR_TIMEOUT); 1135 return; 1136 } 1137 1138 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_DISABLE_QUEUES); 1139 } 1140 1141 static int 1142 ixl_vf_mac_valid(struct ixl_vf *vf, const uint8_t *addr) 1143 { 1144 1145 if (ETHER_IS_ZERO(addr) || ETHER_IS_BROADCAST(addr)) 1146 return (EINVAL); 1147 1148 /* 1149 * If the VF is not allowed to change its MAC address, don't let it 1150 * set a MAC filter for an address that is not a multicast address and 1151 * is not its assigned MAC. 1152 */ 1153 if (!(vf->vf_flags & VF_FLAG_SET_MAC_CAP) && 1154 !(ETHER_IS_MULTICAST(addr) || ixl_ether_is_equal(addr, vf->mac))) 1155 return (EPERM); 1156 1157 return (0); 1158 } 1159 1160 static int 1161 ixl_vf_mac_index(struct ixl_vf *vf, const uint8_t *addr) 1162 { 1163 int i; 1164 1165 for (i = 0; i < vf->num_mac_filters; i++) { 1166 if (ixl_ether_is_equal(vf->mac_filters[i], addr)) 1167 return (i); 1168 } 1169 return (-1); 1170 } 1171 1172 static int 1173 ixl_vf_program_mac(struct ixl_vf *vf, const uint8_t *addr) 1174 { 1175 struct ixl_vsi *vsi; 1176 int vlan; 1177 1178 vsi = &vf->vsi; 1179 if (vf->default_vlan != 0) { 1180 ixl_add_filter(vsi, addr, vf->default_vlan); 1181 if (ixl_find_filter(&vsi->ftl, addr, vf->default_vlan) == NULL) 1182 return (ENOMEM); 1183 return (0); 1184 } 1185 if (vsi->num_vlans == 0) { 1186 ixl_add_filter(vsi, addr, IXL_VLAN_ANY); 1187 if (ixl_find_filter(&vsi->ftl, addr, IXL_VLAN_ANY) == NULL) 1188 return (ENOMEM); 1189 return (0); 1190 } 1191 1192 ixl_add_vlan_filters(vsi, addr); 1193 if (ixl_find_filter(&vsi->ftl, addr, 0) == NULL) 1194 return (ENOMEM); 1195 for (vlan = 1; vlan < IXL_VLANS_MAP_LEN; vlan++) { 1196 if (bit_test(vsi->vlans_map, vlan) && 1197 ixl_find_filter(&vsi->ftl, addr, vlan) == NULL) 1198 return (ENOMEM); 1199 } 1200 return (0); 1201 } 1202 1203 static void 1204 ixl_vf_remove_mac(struct ixl_vf *vf, int index) 1205 { 1206 1207 ixl_del_all_vlan_filters(&vf->vsi, vf->mac_filters[index]); 1208 if (index + 1 < vf->num_mac_filters) { 1209 memmove(vf->mac_filters[index], vf->mac_filters[index + 1], 1210 (vf->num_mac_filters - index - 1) * ETHER_ADDR_LEN); 1211 } 1212 vf->num_mac_filters--; 1213 vf->vsi.num_macs = vf->num_mac_filters; 1214 } 1215 1216 static int 1217 ixl_vf_set_vlan_filter(struct ixl_pf *pf, struct ixl_vf *vf, 1218 uint16_t vlan, bool add) 1219 { 1220 struct i40e_aqc_add_remove_vlan_element_data element; 1221 enum i40e_status_code status; 1222 1223 bzero(&element, sizeof(element)); 1224 element.vlan_tag = htole16(vlan); 1225 if (add) 1226 status = i40e_aq_add_vlan(&pf->hw, vf->vsi.seid, &element, 1227 1, NULL); 1228 else 1229 status = i40e_aq_remove_vlan(&pf->hw, vf->vsi.seid, &element, 1230 1, NULL); 1231 if (status != I40E_SUCCESS) 1232 return (ixl_adminq_err_to_errno(pf->hw.aq.asq_last_status)); 1233 return (0); 1234 } 1235 1236 static void 1237 ixl_vf_add_mac_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1238 uint16_t msg_size) 1239 { 1240 struct virtchnl_ether_addr_list *addr_list; 1241 struct virtchnl_ether_addr *addr; 1242 struct ixl_vsi *vsi; 1243 int i, j, new_total, old_num; 1244 1245 vsi = &vf->vsi; 1246 addr_list = msg; 1247 1248 if (addr_list->vsi_id != vsi->vsi_num) { 1249 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_ETH_ADDR, 1250 I40E_ERR_PARAM); 1251 return; 1252 } 1253 1254 new_total = vf->num_mac_filters; 1255 for (i = 0; i < addr_list->num_elements; i++) { 1256 if (ixl_vf_mac_valid(vf, addr_list->list[i].addr) != 0) { 1257 i40e_send_vf_nack(pf, vf, 1258 VIRTCHNL_OP_ADD_ETH_ADDR, I40E_ERR_PARAM); 1259 return; 1260 } 1261 for (j = 0; j < i; j++) { 1262 if (ixl_ether_is_equal(addr_list->list[i].addr, 1263 addr_list->list[j].addr)) 1264 break; 1265 } 1266 if (j == i && ixl_vf_mac_index(vf, 1267 addr_list->list[i].addr) < 0) 1268 new_total++; 1269 } 1270 if (new_total > IXL_VF_MAX_MAC_FILTERS) { 1271 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_ETH_ADDR, 1272 I40E_ERR_NO_MEMORY); 1273 return; 1274 } 1275 1276 old_num = vf->num_mac_filters; 1277 for (i = 0; i < addr_list->num_elements; i++) { 1278 addr = &addr_list->list[i]; 1279 if (ixl_vf_mac_index(vf, addr->addr) >= 0) 1280 continue; 1281 if (ixl_vf_program_mac(vf, addr->addr) != 0) 1282 goto fail; 1283 bcopy(addr->addr, vf->mac_filters[vf->num_mac_filters], 1284 ETHER_ADDR_LEN); 1285 vf->num_mac_filters++; 1286 } 1287 vsi->num_macs = vf->num_mac_filters; 1288 1289 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_ADD_ETH_ADDR); 1290 return; 1291 1292 fail: 1293 ixl_del_all_vlan_filters(vsi, addr->addr); 1294 while (vf->num_mac_filters > old_num) 1295 ixl_vf_remove_mac(vf, vf->num_mac_filters - 1); 1296 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_ETH_ADDR, 1297 I40E_ERR_NO_MEMORY); 1298 } 1299 1300 static void 1301 ixl_vf_del_mac_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1302 uint16_t msg_size) 1303 { 1304 struct virtchnl_ether_addr_list *addr_list; 1305 struct virtchnl_ether_addr *addr; 1306 struct ixl_vsi *vsi; 1307 int i, j; 1308 1309 vsi = &vf->vsi; 1310 addr_list = msg; 1311 1312 if (addr_list->vsi_id != vsi->vsi_num) { 1313 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DEL_ETH_ADDR, 1314 I40E_ERR_PARAM); 1315 return; 1316 } 1317 1318 for (i = 0; i < addr_list->num_elements; i++) { 1319 addr = &addr_list->list[i]; 1320 if (ETHER_IS_ZERO(addr->addr) || ETHER_IS_BROADCAST(addr->addr)) { 1321 i40e_send_vf_nack(pf, vf, 1322 VIRTCHNL_OP_DEL_ETH_ADDR, I40E_ERR_PARAM); 1323 return; 1324 } 1325 if (ixl_vf_mac_index(vf, addr->addr) < 0) { 1326 i40e_send_vf_nack(pf, vf, 1327 VIRTCHNL_OP_DEL_ETH_ADDR, I40E_ERR_PARAM); 1328 return; 1329 } 1330 for (j = 0; j < i; j++) { 1331 if (ixl_ether_is_equal(addr->addr, 1332 addr_list->list[j].addr)) { 1333 i40e_send_vf_nack(pf, vf, 1334 VIRTCHNL_OP_DEL_ETH_ADDR, I40E_ERR_PARAM); 1335 return; 1336 } 1337 } 1338 } 1339 1340 for (i = 0; i < addr_list->num_elements; i++) { 1341 addr = &addr_list->list[i]; 1342 ixl_vf_remove_mac(vf, ixl_vf_mac_index(vf, addr->addr)); 1343 } 1344 1345 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_DEL_ETH_ADDR); 1346 } 1347 1348 static enum i40e_status_code 1349 ixl_vf_enable_vlan_strip(struct ixl_pf *pf, struct ixl_vf *vf) 1350 { 1351 struct i40e_vsi_context vsi_ctx; 1352 1353 vsi_ctx.seid = vf->vsi.seid; 1354 1355 bzero(&vsi_ctx.info, sizeof(vsi_ctx.info)); 1356 vsi_ctx.info.valid_sections = htole16(I40E_AQ_VSI_PROP_VLAN_VALID); 1357 vsi_ctx.info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 1358 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 1359 return (i40e_aq_update_vsi_params(&pf->hw, &vsi_ctx, NULL)); 1360 } 1361 1362 static void 1363 ixl_vf_add_vlan_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1364 uint16_t msg_size) 1365 { 1366 struct virtchnl_vlan_filter_list *filter_list; 1367 enum i40e_status_code code; 1368 uint16_t added[IXL_VF_MAX_VLAN_FILTERS]; 1369 int i, j, nadded; 1370 1371 filter_list = msg; 1372 1373 if (filter_list->vsi_id != vf->vsi.vsi_num) { 1374 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_VLAN, 1375 I40E_ERR_PARAM); 1376 return; 1377 } 1378 1379 if (!(vf->vf_flags & VF_FLAG_VLAN_CAP)) { 1380 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_VLAN, 1381 I40E_ERR_PARAM); 1382 return; 1383 } 1384 1385 nadded = 0; 1386 for (i = 0; i < filter_list->num_elements; i++) { 1387 if (filter_list->vlan_id[i] > EVL_VLID_MASK) { 1388 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_VLAN, 1389 I40E_ERR_PARAM); 1390 return; 1391 } 1392 if (filter_list->vlan_id[i] == 0 || 1393 bit_test(vf->vsi.vlans_map, filter_list->vlan_id[i])) 1394 continue; 1395 for (j = 0; j < nadded; j++) { 1396 if (added[j] == filter_list->vlan_id[i]) 1397 break; 1398 } 1399 if (j == nadded && nadded == IXL_VF_MAX_VLAN_FILTERS) { 1400 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_VLAN, 1401 I40E_ERR_NO_MEMORY); 1402 return; 1403 } 1404 if (j == nadded) 1405 added[nadded++] = filter_list->vlan_id[i]; 1406 } 1407 if (vf->vsi.num_vlans + nadded > IXL_VF_MAX_VLAN_FILTERS) { 1408 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_VLAN, 1409 I40E_ERR_NO_MEMORY); 1410 return; 1411 } 1412 1413 code = ixl_vf_enable_vlan_strip(pf, vf); 1414 if (code != I40E_SUCCESS) { 1415 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_VLAN, 1416 I40E_ERR_PARAM); 1417 return; 1418 } 1419 1420 for (i = 0; i < nadded; i++) { 1421 if (ixl_vf_set_vlan_filter(pf, vf, added[i], true) != 0) 1422 goto fail_vlan; 1423 } 1424 for (i = 0; i < nadded; i++) { 1425 vf->vsi.num_vlans++; 1426 bit_set(vf->vsi.vlans_map, added[i]); 1427 for (j = 0; j < vf->num_mac_filters; j++) { 1428 ixl_add_filter(&vf->vsi, vf->mac_filters[j], added[i]); 1429 if (ixl_find_filter(&vf->vsi.ftl, 1430 vf->mac_filters[j], added[i]) == NULL) 1431 goto fail_filters; 1432 } 1433 } 1434 1435 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_ADD_VLAN); 1436 return; 1437 1438 fail_filters: 1439 for (j = 0; j < vf->num_mac_filters; j++) 1440 ixl_del_all_vlan_filters(&vf->vsi, vf->mac_filters[j]); 1441 for (j = 0; j <= i; j++) { 1442 bit_clear(vf->vsi.vlans_map, added[j]); 1443 vf->vsi.num_vlans--; 1444 } 1445 for (j = 0; j < vf->num_mac_filters; j++) 1446 (void)ixl_vf_program_mac(vf, vf->mac_filters[j]); 1447 i = nadded; 1448 fail_vlan: 1449 while (i-- > 0) 1450 (void)ixl_vf_set_vlan_filter(pf, vf, added[i], false); 1451 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_ADD_VLAN, 1452 I40E_ERR_ADMIN_QUEUE_ERROR); 1453 } 1454 1455 static void 1456 ixl_vf_del_vlan_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1457 uint16_t msg_size) 1458 { 1459 struct virtchnl_vlan_filter_list *filter_list; 1460 uint16_t removed[IXL_VF_MAX_VLAN_FILTERS]; 1461 int i, j, nremoved; 1462 1463 filter_list = msg; 1464 1465 if (filter_list->vsi_id != vf->vsi.vsi_num) { 1466 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DEL_VLAN, 1467 I40E_ERR_PARAM); 1468 return; 1469 } 1470 1471 nremoved = 0; 1472 for (i = 0; i < filter_list->num_elements; i++) { 1473 if (filter_list->vlan_id[i] > EVL_VLID_MASK) { 1474 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DEL_VLAN, 1475 I40E_ERR_PARAM); 1476 return; 1477 } 1478 if (filter_list->vlan_id[i] == 0) 1479 continue; 1480 if (!bit_test(vf->vsi.vlans_map, 1481 filter_list->vlan_id[i])) { 1482 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DEL_VLAN, 1483 I40E_ERR_PARAM); 1484 return; 1485 } 1486 for (j = 0; j < nremoved; j++) { 1487 if (removed[j] == filter_list->vlan_id[i]) { 1488 i40e_send_vf_nack(pf, vf, 1489 VIRTCHNL_OP_DEL_VLAN, I40E_ERR_PARAM); 1490 return; 1491 } 1492 } 1493 removed[nremoved++] = filter_list->vlan_id[i]; 1494 } 1495 1496 if (!(vf->vf_flags & VF_FLAG_VLAN_CAP)) { 1497 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DEL_VLAN, 1498 I40E_ERR_PARAM); 1499 return; 1500 } 1501 1502 for (i = 0; i < nremoved; i++) { 1503 if (ixl_vf_set_vlan_filter(pf, vf, removed[i], false) != 0) 1504 goto fail; 1505 } 1506 for (i = 0; i < nremoved; i++) { 1507 bit_clear(vf->vsi.vlans_map, removed[i]); 1508 vf->vsi.num_vlans--; 1509 for (j = 0; j < vf->num_mac_filters; j++) 1510 ixl_del_filter(&vf->vsi, vf->mac_filters[j], removed[i]); 1511 } 1512 1513 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_DEL_VLAN); 1514 return; 1515 1516 fail: 1517 while (i-- > 0) 1518 (void)ixl_vf_set_vlan_filter(pf, vf, removed[i], true); 1519 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_DEL_VLAN, 1520 I40E_ERR_ADMIN_QUEUE_ERROR); 1521 } 1522 1523 static void 1524 ixl_vf_config_promisc_msg(struct ixl_pf *pf, struct ixl_vf *vf, 1525 void *msg, uint16_t msg_size) 1526 { 1527 struct virtchnl_promisc_info *info; 1528 struct i40e_hw *hw = &pf->hw; 1529 enum i40e_status_code code; 1530 1531 if (!(vf->vf_flags & VF_FLAG_PROMISC_CAP)) { 1532 /* 1533 * Do the same thing as the Linux PF driver -- lie to the VF 1534 */ 1535 ixl_send_vf_ack(pf, vf, 1536 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE); 1537 return; 1538 } 1539 1540 info = msg; 1541 if (info->vsi_id != vf->vsi.vsi_num) { 1542 i40e_send_vf_nack(pf, vf, 1543 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, I40E_ERR_PARAM); 1544 return; 1545 } 1546 1547 code = i40e_aq_set_vsi_unicast_promiscuous(hw, vf->vsi.seid, 1548 info->flags & FLAG_VF_UNICAST_PROMISC, NULL, TRUE); 1549 if (code != I40E_SUCCESS) { 1550 device_printf(pf->dev, "i40e_aq_set_vsi_unicast_promiscuous (seid %d) failed: status %s," 1551 " error %s\n", vf->vsi.seid, i40e_stat_str(hw, code), 1552 i40e_aq_str(hw, hw->aq.asq_last_status)); 1553 i40e_send_vf_nack(pf, vf, 1554 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, I40E_ERR_PARAM); 1555 return; 1556 } 1557 1558 code = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi.seid, 1559 info->flags & FLAG_VF_MULTICAST_PROMISC, NULL); 1560 if (code != I40E_SUCCESS) { 1561 device_printf(pf->dev, "i40e_aq_set_vsi_multicast_promiscuous (seid %d) failed: status %s," 1562 " error %s\n", vf->vsi.seid, i40e_stat_str(hw, code), 1563 i40e_aq_str(hw, hw->aq.asq_last_status)); 1564 i40e_send_vf_nack(pf, vf, 1565 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, I40E_ERR_PARAM); 1566 return; 1567 } 1568 1569 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE); 1570 } 1571 1572 static void 1573 ixl_vf_get_stats_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1574 uint16_t msg_size) 1575 { 1576 struct virtchnl_queue_select *queue; 1577 1578 queue = msg; 1579 if (queue->vsi_id != vf->vsi.vsi_num) { 1580 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_GET_STATS, 1581 I40E_ERR_PARAM); 1582 return; 1583 } 1584 1585 ixl_update_eth_stats(&vf->vsi); 1586 1587 ixl_send_vf_msg(pf, vf, VIRTCHNL_OP_GET_STATS, 1588 I40E_SUCCESS, &vf->vsi.eth_stats, sizeof(vf->vsi.eth_stats)); 1589 } 1590 1591 static void 1592 ixl_vf_config_rss_key_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1593 uint16_t msg_size) 1594 { 1595 struct i40e_hw *hw; 1596 struct virtchnl_rss_key *key; 1597 struct i40e_aqc_get_set_rss_key_data key_data; 1598 enum i40e_status_code status; 1599 1600 hw = &pf->hw; 1601 1602 key = msg; 1603 1604 if (key->key_len != 52) { 1605 device_printf(pf->dev, "VF %d: Key size in msg (%d) does not match required size (%d)\n", 1606 vf->vf_num, key->key_len, 52); 1607 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_KEY, 1608 I40E_ERR_PARAM); 1609 return; 1610 } 1611 1612 if (key->vsi_id != vf->vsi.vsi_num) { 1613 device_printf(pf->dev, "VF %d: VSI id in recvd message (%d) does not match expected id (%d)\n", 1614 vf->vf_num, key->vsi_id, vf->vsi.vsi_num); 1615 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_KEY, 1616 I40E_ERR_PARAM); 1617 return; 1618 } 1619 1620 /* Fill out hash using MAC-dependent method */ 1621 if (hw->mac.type == I40E_MAC_X722) { 1622 bzero(&key_data, sizeof(key_data)); 1623 if (key->key_len <= 40) 1624 bcopy(key->key, key_data.standard_rss_key, key->key_len); 1625 else { 1626 bcopy(key->key, key_data.standard_rss_key, 40); 1627 bcopy(&key->key[40], key_data.extended_hash_key, key->key_len - 40); 1628 } 1629 status = i40e_aq_set_rss_key(hw, vf->vsi.vsi_num, &key_data); 1630 if (status) { 1631 device_printf(pf->dev, "i40e_aq_set_rss_key status %s, error %s\n", 1632 i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status)); 1633 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_KEY, 1634 I40E_ERR_ADMIN_QUEUE_ERROR); 1635 return; 1636 } 1637 } else { 1638 for (int i = 0; i < (key->key_len / 4); i++) 1639 i40e_write_rx_ctl(hw, I40E_VFQF_HKEY1(i, vf->vf_num), ((u32 *)key->key)[i]); 1640 } 1641 1642 DDPRINTF(pf->dev, "VF %d: Programmed key starting with 0x%x ok!", 1643 vf->vf_num, key->key[0]); 1644 1645 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_KEY); 1646 } 1647 1648 static void 1649 ixl_vf_config_rss_lut_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1650 uint16_t msg_size) 1651 { 1652 struct i40e_hw *hw; 1653 struct virtchnl_rss_lut *lut; 1654 enum i40e_status_code status; 1655 1656 hw = &pf->hw; 1657 1658 lut = msg; 1659 1660 if (lut->lut_entries != 64) { 1661 device_printf(pf->dev, "VF %d: # of LUT entries in msg (%d) does not match required size (%d)\n", 1662 vf->vf_num, lut->lut_entries, 64); 1663 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_LUT, 1664 I40E_ERR_PARAM); 1665 return; 1666 } 1667 for (int i = 0; i < lut->lut_entries; i++) { 1668 if (lut->lut[i] >= vf->vsi.num_rx_queues) { 1669 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_LUT, 1670 I40E_ERR_PARAM); 1671 return; 1672 } 1673 } 1674 1675 if (lut->vsi_id != vf->vsi.vsi_num) { 1676 device_printf(pf->dev, "VF %d: VSI id in recvd message (%d) does not match expected id (%d)\n", 1677 vf->vf_num, lut->vsi_id, vf->vsi.vsi_num); 1678 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_LUT, 1679 I40E_ERR_PARAM); 1680 return; 1681 } 1682 1683 /* Fill out LUT using MAC-dependent method */ 1684 if (hw->mac.type == I40E_MAC_X722) { 1685 status = i40e_aq_set_rss_lut(hw, vf->vsi.vsi_num, false, lut->lut, lut->lut_entries); 1686 if (status) { 1687 device_printf(pf->dev, "i40e_aq_set_rss_lut status %s, error %s\n", 1688 i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status)); 1689 i40e_send_vf_nack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_LUT, 1690 I40E_ERR_ADMIN_QUEUE_ERROR); 1691 return; 1692 } 1693 } else { 1694 for (int i = 0; i < (lut->lut_entries / 4); i++) 1695 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf->vf_num), ((u32 *)lut->lut)[i]); 1696 } 1697 1698 DDPRINTF(pf->dev, "VF %d: Programmed LUT starting with 0x%x and length %d ok!", 1699 vf->vf_num, lut->lut[0], lut->lut_entries); 1700 1701 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_CONFIG_RSS_LUT); 1702 } 1703 1704 static void 1705 ixl_vf_set_rss_hena_msg(struct ixl_pf *pf, struct ixl_vf *vf, void *msg, 1706 uint16_t msg_size) 1707 { 1708 struct i40e_hw *hw; 1709 struct virtchnl_rss_hena *hena; 1710 1711 hw = &pf->hw; 1712 hena = msg; 1713 1714 /* Set HENA */ 1715 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_num), (u32)hena->hena); 1716 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_num), (u32)(hena->hena >> 32)); 1717 1718 DDPRINTF(pf->dev, "VF %d: Programmed HENA with 0x%016lx", 1719 vf->vf_num, hena->hena); 1720 1721 ixl_send_vf_ack(pf, vf, VIRTCHNL_OP_SET_RSS_HENA); 1722 } 1723 1724 static void 1725 ixl_notify_vf_link_state(struct ixl_pf *pf, struct ixl_vf *vf) 1726 { 1727 struct virtchnl_pf_event event; 1728 struct i40e_hw *hw; 1729 1730 hw = &pf->hw; 1731 event.event = VIRTCHNL_EVENT_LINK_CHANGE; 1732 event.severity = PF_EVENT_SEVERITY_INFO; 1733 event.event_data.link_event.link_status = pf->vsi.link_active; 1734 event.event_data.link_event.link_speed = 1735 i40e_virtchnl_link_speed(hw->phy.link_info.link_speed); 1736 1737 ixl_send_vf_msg(pf, vf, VIRTCHNL_OP_EVENT, I40E_SUCCESS, &event, 1738 sizeof(event)); 1739 } 1740 1741 void 1742 ixl_broadcast_link_state(struct ixl_pf *pf) 1743 { 1744 int i; 1745 1746 for (i = 0; i < pf->num_vfs; i++) 1747 ixl_notify_vf_link_state(pf, &pf->vfs[i]); 1748 } 1749 1750 void 1751 ixl_handle_vf_msg(struct ixl_pf *pf, struct i40e_arq_event_info *event) 1752 { 1753 device_t dev = pf->dev; 1754 struct ixl_vf *vf; 1755 uint16_t vf_num, msg_size; 1756 uint32_t opcode; 1757 void *msg; 1758 int err; 1759 1760 vf_num = le16toh(event->desc.retval) - pf->hw.func_caps.vf_base_id; 1761 opcode = le32toh(event->desc.cookie_high); 1762 1763 if (vf_num >= pf->num_vfs) { 1764 device_printf(pf->dev, "Got msg from illegal VF: %d\n", vf_num); 1765 return; 1766 } 1767 1768 vf = &pf->vfs[vf_num]; 1769 msg = event->msg_buf; 1770 msg_size = event->msg_len; 1771 1772 I40E_VC_DEBUG(pf, ixl_vc_opcode_level(opcode), 1773 "Got msg %s(%d) from%sVF-%d of size %d\n", 1774 ixl_vc_opcode_str(opcode), opcode, 1775 (vf->vf_flags & VF_FLAG_ENABLED) ? " " : " disabled ", 1776 vf_num, msg_size); 1777 1778 /* Only a reset outside the virtchnl dispatcher may unblock the VF. */ 1779 if (vf->mdd_blocked) 1780 return; 1781 1782 /* Perform basic checks on the msg */ 1783 err = virtchnl_vc_validate_vf_msg(&vf->version, opcode, msg, msg_size); 1784 if (err) { 1785 device_printf(dev, "%s: Received invalid msg from VF-%d: opcode %d, len %d, error %d\n", 1786 __func__, vf->vf_num, opcode, msg_size, err); 1787 i40e_send_vf_nack(pf, vf, opcode, I40E_ERR_PARAM); 1788 return; 1789 } 1790 1791 /* This must be a stray msg from a previously destroyed VF. */ 1792 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 1793 return; 1794 1795 switch (opcode) { 1796 case VIRTCHNL_OP_VERSION: 1797 ixl_vf_version_msg(pf, vf, msg, msg_size); 1798 break; 1799 case VIRTCHNL_OP_RESET_VF: 1800 ixl_vf_reset_msg(pf, vf, msg, msg_size); 1801 break; 1802 case VIRTCHNL_OP_GET_VF_RESOURCES: 1803 ixl_vf_get_resources_msg(pf, vf, msg, msg_size); 1804 /* Notify VF of link state after it obtains queues, as this is 1805 * the last thing it will do as part of initialization 1806 */ 1807 ixl_notify_vf_link_state(pf, vf); 1808 break; 1809 case VIRTCHNL_OP_CONFIG_VSI_QUEUES: 1810 ixl_vf_config_vsi_msg(pf, vf, msg, msg_size); 1811 break; 1812 case VIRTCHNL_OP_CONFIG_IRQ_MAP: 1813 ixl_vf_config_irq_msg(pf, vf, msg, msg_size); 1814 break; 1815 case VIRTCHNL_OP_ENABLE_QUEUES: 1816 ixl_vf_enable_queues_msg(pf, vf, msg, msg_size); 1817 /* Notify VF of link state after it obtains queues, as this is 1818 * the last thing it will do as part of initialization 1819 */ 1820 ixl_notify_vf_link_state(pf, vf); 1821 break; 1822 case VIRTCHNL_OP_DISABLE_QUEUES: 1823 ixl_vf_disable_queues_msg(pf, vf, msg, msg_size); 1824 break; 1825 case VIRTCHNL_OP_ADD_ETH_ADDR: 1826 ixl_vf_add_mac_msg(pf, vf, msg, msg_size); 1827 break; 1828 case VIRTCHNL_OP_DEL_ETH_ADDR: 1829 ixl_vf_del_mac_msg(pf, vf, msg, msg_size); 1830 break; 1831 case VIRTCHNL_OP_ADD_VLAN: 1832 ixl_vf_add_vlan_msg(pf, vf, msg, msg_size); 1833 break; 1834 case VIRTCHNL_OP_DEL_VLAN: 1835 ixl_vf_del_vlan_msg(pf, vf, msg, msg_size); 1836 break; 1837 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: 1838 ixl_vf_config_promisc_msg(pf, vf, msg, msg_size); 1839 break; 1840 case VIRTCHNL_OP_GET_STATS: 1841 ixl_vf_get_stats_msg(pf, vf, msg, msg_size); 1842 break; 1843 case VIRTCHNL_OP_CONFIG_RSS_KEY: 1844 ixl_vf_config_rss_key_msg(pf, vf, msg, msg_size); 1845 break; 1846 case VIRTCHNL_OP_CONFIG_RSS_LUT: 1847 ixl_vf_config_rss_lut_msg(pf, vf, msg, msg_size); 1848 break; 1849 case VIRTCHNL_OP_SET_RSS_HENA: 1850 ixl_vf_set_rss_hena_msg(pf, vf, msg, msg_size); 1851 break; 1852 1853 /* These two opcodes have been superseded by CONFIG_VSI_QUEUES. */ 1854 case VIRTCHNL_OP_CONFIG_TX_QUEUE: 1855 case VIRTCHNL_OP_CONFIG_RX_QUEUE: 1856 default: 1857 i40e_send_vf_nack(pf, vf, opcode, I40E_ERR_NOT_IMPLEMENTED); 1858 break; 1859 } 1860 } 1861 1862 /* Handle any VFs that have reset themselves via a Function Level Reset(FLR). */ 1863 void 1864 ixl_handle_vflr(struct ixl_pf *pf) 1865 { 1866 struct ixl_vf *vf; 1867 struct i40e_hw *hw; 1868 uint16_t global_vf_num; 1869 uint32_t vflrstat_index, vflrstat_mask, vflrstat, icr0; 1870 int i; 1871 1872 hw = &pf->hw; 1873 1874 ixl_dbg_iov(pf, "%s: begin\n", __func__); 1875 1876 /* Re-enable VFLR interrupt cause so driver doesn't miss a 1877 * reset interrupt for another VF */ 1878 icr0 = rd32(hw, I40E_PFINT_ICR0_ENA); 1879 icr0 |= I40E_PFINT_ICR0_ENA_VFLR_MASK; 1880 wr32(hw, I40E_PFINT_ICR0_ENA, icr0); 1881 ixl_flush(hw); 1882 1883 for (i = 0; i < pf->num_vfs; i++) { 1884 global_vf_num = hw->func_caps.vf_base_id + i; 1885 1886 vf = &pf->vfs[i]; 1887 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 1888 continue; 1889 1890 vflrstat_index = IXL_GLGEN_VFLRSTAT_INDEX(global_vf_num); 1891 vflrstat_mask = IXL_GLGEN_VFLRSTAT_MASK(global_vf_num); 1892 vflrstat = rd32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index)); 1893 if (vflrstat & vflrstat_mask) { 1894 wr32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index), 1895 vflrstat_mask); 1896 1897 ixl_dbg_iov(pf, "Reinitializing VF-%d\n", i); 1898 if (ixl_reinit_vf(pf, vf) != 0) 1899 device_printf(pf->dev, 1900 "Failed to reinitialize VF-%d\n", i); 1901 else 1902 ixl_dbg_iov(pf, 1903 "Reinitializing VF-%d done\n", i); 1904 } 1905 } 1906 1907 } 1908 1909 static int 1910 ixl_adminq_err_to_errno(enum i40e_admin_queue_err err) 1911 { 1912 1913 switch (err) { 1914 case I40E_AQ_RC_EPERM: 1915 return (EPERM); 1916 case I40E_AQ_RC_ENOENT: 1917 return (ENOENT); 1918 case I40E_AQ_RC_ESRCH: 1919 return (ESRCH); 1920 case I40E_AQ_RC_EINTR: 1921 return (EINTR); 1922 case I40E_AQ_RC_EIO: 1923 return (EIO); 1924 case I40E_AQ_RC_ENXIO: 1925 return (ENXIO); 1926 case I40E_AQ_RC_E2BIG: 1927 return (E2BIG); 1928 case I40E_AQ_RC_EAGAIN: 1929 return (EAGAIN); 1930 case I40E_AQ_RC_ENOMEM: 1931 return (ENOMEM); 1932 case I40E_AQ_RC_EACCES: 1933 return (EACCES); 1934 case I40E_AQ_RC_EFAULT: 1935 return (EFAULT); 1936 case I40E_AQ_RC_EBUSY: 1937 return (EBUSY); 1938 case I40E_AQ_RC_EEXIST: 1939 return (EEXIST); 1940 case I40E_AQ_RC_EINVAL: 1941 return (EINVAL); 1942 case I40E_AQ_RC_ENOTTY: 1943 return (ENOTTY); 1944 case I40E_AQ_RC_ENOSPC: 1945 return (ENOSPC); 1946 case I40E_AQ_RC_ENOSYS: 1947 return (ENOSYS); 1948 case I40E_AQ_RC_ERANGE: 1949 return (ERANGE); 1950 case I40E_AQ_RC_EFLUSHED: 1951 return (EINVAL); /* No exact equivalent in errno.h */ 1952 case I40E_AQ_RC_BAD_ADDR: 1953 return (EFAULT); 1954 case I40E_AQ_RC_EMODE: 1955 return (EPERM); 1956 case I40E_AQ_RC_EFBIG: 1957 return (EFBIG); 1958 default: 1959 return (EINVAL); 1960 } 1961 } 1962 1963 static int 1964 ixl_config_pf_vsi_loopback(struct ixl_pf *pf, bool enable) 1965 { 1966 struct i40e_hw *hw = &pf->hw; 1967 device_t dev = pf->dev; 1968 struct ixl_vsi *vsi = &pf->vsi; 1969 struct i40e_vsi_context ctxt; 1970 int error; 1971 1972 memset(&ctxt, 0, sizeof(ctxt)); 1973 1974 ctxt.seid = vsi->seid; 1975 if (pf->veb_seid != 0) 1976 ctxt.uplink_seid = pf->veb_seid; 1977 ctxt.pf_num = hw->pf_id; 1978 ctxt.connection_type = IXL_VSI_DATA_PORT; 1979 1980 ctxt.info.valid_sections = htole16(I40E_AQ_VSI_PROP_SWITCH_VALID); 1981 ctxt.info.switch_id = (enable) ? 1982 htole16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB) : 0; 1983 1984 /* error is set to 0 on success */ 1985 error = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 1986 if (error) { 1987 device_printf(dev, "i40e_aq_update_vsi_params() failed, error %d," 1988 " aq_error %d\n", error, hw->aq.asq_last_status); 1989 } 1990 1991 return (error); 1992 } 1993 1994 static int 1995 ixl_setup_iov_switch(struct ixl_pf *pf) 1996 { 1997 struct i40e_hw *hw; 1998 struct ixl_vsi *pf_vsi; 1999 enum i40e_status_code status; 2000 int error; 2001 2002 hw = &pf->hw; 2003 pf_vsi = &pf->vsi; 2004 status = i40e_aq_add_veb(hw, pf_vsi->uplink_seid, pf_vsi->seid, 2005 1, false, &pf->veb_seid, false, NULL); 2006 if (status != I40E_SUCCESS) { 2007 error = ixl_adminq_err_to_errno(hw->aq.asq_last_status); 2008 device_printf(pf->dev, 2009 "i40e_aq_add_veb failed; status %s error %s\n", 2010 i40e_stat_str(hw, status), 2011 i40e_aq_str(hw, hw->aq.asq_last_status)); 2012 return (error); 2013 } 2014 if (pf->enable_vf_loopback) { 2015 error = ixl_config_pf_vsi_loopback(pf, true); 2016 if (error != 0) 2017 goto fail; 2018 } 2019 2020 /* Adding a VEB reinstalls the firmware's default PF filters. */ 2021 ixl_del_default_hw_filters(pf_vsi); 2022 ixl_reconfigure_filters(pf_vsi); 2023 return (0); 2024 2025 fail: 2026 i40e_aq_delete_element(hw, pf->veb_seid, NULL); 2027 pf->veb_seid = 0; 2028 return (error); 2029 } 2030 2031 void 2032 ixl_notify_vfs_reset(struct ixl_pf *pf) 2033 { 2034 struct virtchnl_pf_event event; 2035 struct ixl_vf *vf; 2036 int i; 2037 2038 if (pf->num_vfs == 0 || !i40e_check_asq_alive(&pf->hw)) 2039 return; 2040 bzero(&event, sizeof(event)); 2041 event.event = VIRTCHNL_EVENT_RESET_IMPENDING; 2042 event.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM; 2043 for (i = 0; i < pf->num_vfs; i++) { 2044 vf = &pf->vfs[i]; 2045 if (vf->vf_flags & VF_FLAG_ENABLED) { 2046 ixl_send_vf_msg(pf, vf, VIRTCHNL_OP_EVENT, 2047 I40E_SUCCESS, &event, sizeof(event)); 2048 } 2049 } 2050 } 2051 2052 int 2053 ixl_reset_vf_on_mdd(struct ixl_pf *pf, uint16_t vfnum) 2054 { 2055 struct virtchnl_pf_event event; 2056 struct ixl_vf *vf; 2057 2058 if (vfnum >= pf->num_vfs) 2059 return (EINVAL); 2060 vf = &pf->vfs[vfnum]; 2061 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2062 return (ENXIO); 2063 2064 bzero(&event, sizeof(event)); 2065 event.event = VIRTCHNL_EVENT_RESET_IMPENDING; 2066 event.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM; 2067 ixl_send_vf_msg(pf, vf, VIRTCHNL_OP_EVENT, I40E_SUCCESS, 2068 &event, sizeof(event)); 2069 return (ixl_reset_vf(pf, vf)); 2070 } 2071 2072 /* 2073 * Hold every configured VF in reset and drain its PCIe transactions. 2074 * Starting all VF resets before polling amortizes the hardware reset delay 2075 * across the set. This is used both before the device reset and while its 2076 * replacement firmware topology is constructed. 2077 */ 2078 static int 2079 ixl_hold_vfs_in_reset(struct ixl_pf *pf) 2080 { 2081 struct i40e_hw *hw; 2082 struct ixl_vf *vf; 2083 uint32_t vfrstat, vfrtrig; 2084 int error, first_error, i, retry; 2085 bool all_done; 2086 2087 hw = &pf->hw; 2088 for (i = 0; i < pf->num_vfs; i++) { 2089 vf = &pf->vfs[i]; 2090 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2091 continue; 2092 vf->vf_flags &= ~VF_FLAG_INITIALIZED; 2093 vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num)); 2094 vfrtrig |= I40E_VPGEN_VFRTRIG_VFSWR_MASK; 2095 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig); 2096 } 2097 ixl_flush(hw); 2098 2099 first_error = 0; 2100 for (i = 0; i < pf->num_vfs; i++) { 2101 vf = &pf->vfs[i]; 2102 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2103 continue; 2104 error = ixl_flush_pcie(pf, vf); 2105 if (error != 0) { 2106 device_printf(pf->dev, 2107 "Timed out draining PCIe transactions on VF-%d\n", i); 2108 if (first_error == 0) 2109 first_error = error; 2110 } 2111 } 2112 2113 for (retry = 0; retry < IXL_VF_RESET_TIMEOUT; retry++) { 2114 DELAY(1000); 2115 all_done = true; 2116 for (i = 0; i < pf->num_vfs; i++) { 2117 vf = &pf->vfs[i]; 2118 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2119 continue; 2120 vfrstat = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_num)); 2121 if (!(vfrstat & I40E_VPGEN_VFRSTAT_VFRD_MASK)) { 2122 all_done = false; 2123 break; 2124 } 2125 } 2126 if (all_done) 2127 return (first_error); 2128 } 2129 2130 for (i = 0; i < pf->num_vfs; i++) { 2131 vf = &pf->vfs[i]; 2132 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2133 continue; 2134 vfrstat = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_num)); 2135 if (!(vfrstat & I40E_VPGEN_VFRSTAT_VFRD_MASK)) 2136 device_printf(pf->dev, 2137 "VF-%d failed to enter reset\n", i); 2138 } 2139 return (first_error != 0 ? first_error : ETIMEDOUT); 2140 } 2141 2142 /* 2143 * Stop VF DMA during the reset-warning interval, before VF drivers may 2144 * release their buffers. Holding VFR also prevents an uncooperative VF 2145 * from re-enabling a queue before the device reset begins. 2146 */ 2147 int 2148 ixl_quiesce_vfs_for_reset(struct ixl_pf *pf) 2149 { 2150 struct ixl_vf *vf; 2151 int error, first_error, i; 2152 2153 if (pf->num_vfs == 0) 2154 return (0); 2155 first_error = ixl_hold_vfs_in_reset(pf); 2156 2157 for (i = 0; i < pf->num_vfs; i++) { 2158 vf = &pf->vfs[i]; 2159 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2160 continue; 2161 error = ixl_disable_rings(pf, &vf->vsi, &vf->qtag); 2162 if (error != 0 && first_error == 0) 2163 first_error = error; 2164 } 2165 /* Hardware may need up to 50 ms to finish disabling RX queues. */ 2166 DELAY(50000); 2167 2168 for (i = 0; i < pf->num_vfs; i++) { 2169 vf = &pf->vfs[i]; 2170 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2171 continue; 2172 error = ixl_flush_pcie(pf, vf); 2173 if (error != 0) { 2174 device_printf(pf->dev, 2175 "PCIe transactions remain pending on VF-%d\n", i); 2176 if (first_error == 0) 2177 first_error = error; 2178 } 2179 } 2180 return (first_error); 2181 } 2182 2183 int 2184 ixl_rebuild_vfs_after_reset(struct ixl_pf *pf) 2185 { 2186 struct i40e_hw *hw; 2187 struct ixl_vf *vf; 2188 uint32_t vfrtrig; 2189 int error, first_error, i; 2190 2191 hw = &pf->hw; 2192 pf->veb_seid = 0; 2193 /* The reset-warning path already stopped and drained the old rings. */ 2194 error = ixl_hold_vfs_in_reset(pf); 2195 for (i = 0; i < pf->num_vfs; i++) { 2196 vf = &pf->vfs[i]; 2197 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2198 continue; 2199 2200 vf->vf_flags &= ~VF_FLAG_INITIALIZED; 2201 vf->vsi.seid = 0; 2202 vf->vsi.vsi_num = 0; 2203 vf->vsi.num_tx_queues = 0; 2204 vf->vsi.num_rx_queues = 0; 2205 bzero(&vf->vsi.info, sizeof(vf->vsi.info)); 2206 ixl_pf_qmgr_clear_queue_flags(&vf->qtag); 2207 ixl_free_filters(&vf->vsi.ftl); 2208 vf->vsi.num_hw_filters = 0; 2209 vf->vsi.num_macs = 0; 2210 vf->vsi.num_vlans = 0; 2211 bit_nclear(vf->vsi.vlans_map, 0, 2212 IXL_VLANS_MAP_LEN - 1); 2213 vf->num_mac_filters = 0; 2214 vf->mdd_blocked = false; 2215 vf->mdd_event_pending = false; 2216 vf->mdd_reset_pending = false; 2217 } 2218 if (error != 0) 2219 return (error); 2220 2221 error = ixl_setup_iov_switch(pf); 2222 if (error != 0) 2223 return (error); 2224 2225 first_error = 0; 2226 for (i = 0; i < pf->num_vfs; i++) { 2227 vf = &pf->vfs[i]; 2228 if (!(vf->vf_flags & VF_FLAG_ENABLED)) 2229 continue; 2230 2231 /* 2232 * VFR resets the VF queue-mapping registers. Release it before 2233 * programming the replacement VSI and mappings, but do not publish 2234 * VFACTIVE until reconstruction is complete. 2235 */ 2236 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), 2237 VIRTCHNL_VFR_COMPLETED); 2238 vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num)); 2239 vfrtrig &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK; 2240 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig); 2241 2242 error = ixl_vf_setup_vsi(pf, vf); 2243 if (error != 0) { 2244 device_printf(pf->dev, 2245 "Failed to rebuild VF-%d: %d\n", i, error); 2246 vfrtrig |= I40E_VPGEN_VFRTRIG_VFSWR_MASK; 2247 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig); 2248 if (first_error == 0) 2249 first_error = error; 2250 continue; 2251 } 2252 ixl_vf_map_queues(pf, vf); 2253 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), 2254 VIRTCHNL_VFR_VFACTIVE); 2255 } 2256 ixl_flush(hw); 2257 return (first_error); 2258 } 2259 2260 int 2261 ixl_if_iov_init(if_ctx_t ctx, uint16_t num_vfs, const nvlist_t *params) 2262 { 2263 struct ixl_pf *pf = iflib_get_softc(ctx); 2264 int error, i; 2265 2266 pf->vfs = malloc(sizeof(struct ixl_vf) * num_vfs, M_IXL, M_NOWAIT | 2267 M_ZERO); 2268 if (pf->vfs == NULL) { 2269 error = ENOMEM; 2270 goto fail; 2271 } 2272 for (i = 0; i < num_vfs; i++) 2273 sysctl_ctx_init(&pf->vfs[i].vsi.sysctl_ctx); 2274 2275 error = ixl_setup_iov_switch(pf); 2276 if (error != 0) 2277 goto fail; 2278 2279 pf->num_vfs = num_vfs; 2280 return (0); 2281 2282 fail: 2283 free(pf->vfs, M_IXL); 2284 pf->vfs = NULL; 2285 return (error); 2286 } 2287 2288 void 2289 ixl_if_iov_uninit(if_ctx_t ctx) 2290 { 2291 struct ixl_pf *pf = iflib_get_softc(ctx); 2292 struct i40e_hw *hw; 2293 struct ixl_vf *vfs; 2294 int error, i, num_vfs; 2295 2296 hw = &pf->hw; 2297 2298 for (i = 0; i < pf->num_vfs; i++) { 2299 error = ixl_vf_release_resources(pf, &pf->vfs[i]); 2300 if (error == 0) { 2301 if (pf->vfs[i].qtag.qmgr != NULL) 2302 ixl_pf_qmgr_release(&pf->qmgr, 2303 &pf->vfs[i].qtag); 2304 ixl_dbg_iov(pf, "VF %d: %d released\n", i, 2305 pf->vfs[i].qtag.num_allocated); 2306 } else { 2307 device_printf(pf->dev, 2308 "retaining VF-%d queue allocation after failed " 2309 "VSI release\n", i); 2310 } 2311 ixl_free_filters(&pf->vfs[i].vsi.ftl); 2312 ixl_dbg_iov(pf, "Unallocated total: %d\n", ixl_pf_qmgr_get_num_free(&pf->qmgr)); 2313 } 2314 2315 if (pf->veb_seid != 0) { 2316 i40e_aq_delete_element(hw, pf->veb_seid, NULL); 2317 pf->veb_seid = 0; 2318 } 2319 /* Reset PF VSI loopback mode */ 2320 if (pf->enable_vf_loopback) 2321 ixl_config_pf_vsi_loopback(pf, false); 2322 2323 vfs = pf->vfs; 2324 num_vfs = pf->num_vfs; 2325 2326 pf->vfs = NULL; 2327 pf->num_vfs = 0; 2328 2329 /* sysctl_ctx_free might sleep, but this func is called w/ an sx lock */ 2330 for (i = 0; i < num_vfs; i++) 2331 sysctl_ctx_free(&vfs[i].vsi.sysctl_ctx); 2332 free(vfs, M_IXL); 2333 } 2334 2335 static int 2336 ixl_vf_reserve_queues(struct ixl_pf *pf, struct ixl_vf *vf, int num_queues) 2337 { 2338 device_t dev = pf->dev; 2339 int error; 2340 2341 /* Validate, and clamp value if invalid */ 2342 if (num_queues < 1 || num_queues > 16) 2343 device_printf(dev, "Invalid num-queues (%d) for VF %d\n", 2344 num_queues, vf->vf_num); 2345 if (num_queues < 1) { 2346 device_printf(dev, "Setting VF %d num-queues to 1\n", vf->vf_num); 2347 num_queues = 1; 2348 } else if (num_queues > IAVF_MAX_QUEUES) { 2349 device_printf(dev, "Setting VF %d num-queues to %d\n", vf->vf_num, IAVF_MAX_QUEUES); 2350 num_queues = IAVF_MAX_QUEUES; 2351 } 2352 error = ixl_pf_qmgr_alloc_scattered(&pf->qmgr, num_queues, &vf->qtag); 2353 if (error) { 2354 device_printf(dev, "Error allocating %d queues for VF %d's VSI\n", 2355 num_queues, vf->vf_num); 2356 return (ENOSPC); 2357 } 2358 2359 ixl_dbg_iov(pf, "VF %d: %d allocated, %d active\n", 2360 vf->vf_num, vf->qtag.num_allocated, vf->qtag.num_active); 2361 ixl_dbg_iov(pf, "Unallocated total: %d\n", ixl_pf_qmgr_get_num_free(&pf->qmgr)); 2362 2363 return (0); 2364 } 2365 2366 int 2367 ixl_if_iov_vf_add(if_ctx_t ctx, uint16_t vfnum, const nvlist_t *params) 2368 { 2369 struct ixl_pf *pf = iflib_get_softc(ctx); 2370 char sysctl_name[IXL_QUEUE_NAME_LEN]; 2371 struct sysctl_ctx_list sysctl_ctx; 2372 struct ixl_vf *vf; 2373 const uint8_t *mac; 2374 size_t size; 2375 int cleanup_error, error; 2376 int vf_num_queues; 2377 uint64_t configured_vlan; 2378 2379 if (vfnum >= pf->num_vfs) 2380 return (EINVAL); 2381 configured_vlan = nvlist_get_number(params, "vlan"); 2382 if (configured_vlan == 0 || configured_vlan > VF_VLAN_TRUNK) 2383 return (EINVAL); 2384 vf = &pf->vfs[vfnum]; 2385 if (vf->vf_flags & VF_FLAG_ENABLED) 2386 return (EBUSY); 2387 /* Preserve the context initialized for every VF slot in iov_init. */ 2388 sysctl_ctx = vf->vsi.sysctl_ctx; 2389 bzero(vf, sizeof(*vf)); 2390 vf->vsi.sysctl_ctx = sysctl_ctx; 2391 vf->vf_num = vfnum; 2392 vf->vsi.back = pf; 2393 vf->vf_flags = VF_FLAG_ENABLED; 2394 vf->default_vlan = configured_vlan == VF_VLAN_TRUNK ? 0 : 2395 (uint16_t)configured_vlan; 2396 2397 /* Reserve queue allocation from PF */ 2398 vf_num_queues = nvlist_get_number(params, "num-queues"); 2399 error = ixl_vf_reserve_queues(pf, vf, vf_num_queues); 2400 if (error != 0) 2401 goto out; 2402 2403 if (nvlist_exists_binary(params, "mac-addr")) { 2404 mac = nvlist_get_binary(params, "mac-addr", &size); 2405 if (size != ETHER_ADDR_LEN || ETHER_IS_ZERO(mac) || 2406 ETHER_IS_MULTICAST(mac)) { 2407 error = EINVAL; 2408 goto out; 2409 } 2410 bcopy(mac, vf->mac, ETHER_ADDR_LEN); 2411 2412 if (nvlist_get_bool(params, "allow-set-mac")) 2413 vf->vf_flags |= VF_FLAG_SET_MAC_CAP; 2414 } else 2415 /* 2416 * If the administrator has not specified a MAC address then 2417 * we must allow the VF to choose one. 2418 */ 2419 vf->vf_flags |= VF_FLAG_SET_MAC_CAP; 2420 2421 if (nvlist_get_bool(params, "mac-anti-spoof")) 2422 vf->vf_flags |= VF_FLAG_MAC_ANTI_SPOOF; 2423 2424 if (nvlist_get_bool(params, "allow-promisc")) 2425 vf->vf_flags |= VF_FLAG_PROMISC_CAP; 2426 2427 if (vf->default_vlan == 0) 2428 vf->vf_flags |= VF_FLAG_VLAN_CAP; 2429 2430 /* VF needs to be reset before it can be used */ 2431 error = ixl_reset_vf(pf, vf); 2432 out: 2433 if (error == 0) { 2434 snprintf(sysctl_name, sizeof(sysctl_name), "vf%d", vfnum); 2435 ixl_vsi_add_sysctls(&vf->vsi, sysctl_name, false); 2436 } else { 2437 cleanup_error = ixl_vf_release_resources(pf, vf); 2438 ixl_free_filters(&vf->vsi.ftl); 2439 if (cleanup_error == 0 && vf->qtag.qmgr != NULL) 2440 ixl_pf_qmgr_release(&pf->qmgr, &vf->qtag); 2441 else if (cleanup_error != 0) 2442 device_printf(pf->dev, 2443 "retaining VF-%u queue allocation after failed " 2444 "VSI release\n", vfnum); 2445 vf->vf_flags = 0; 2446 } 2447 2448 return (error); 2449 } 2450