Searched defs:isAdd (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 601 isAdd = false; in EncodeAddrModeOpValues() local
982 isAdd = false; // 'U' bit is set as part of the fixup. in getAddrModeImm12OpValue() local
1043 bool isAdd = Imm >= 0; getT2ScaledImmOpValue() local
1092 bool isAdd = Imm >= 0; getMveAddrModeQOpValue() local
1119 bool isAdd = true; getT2AddrModeImm8s4OpValue() local
1162 bool isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm7, Fixups, STI); getT2AddrModeImm7s4OpValue() local
1290 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; getLdStSORegOpValue() local
1324 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add; getAddrMode2OffsetOpValue() local
1345 bool isAdd = MO1.getImm() != 0; getPostIdxRegOpValue() local
1360 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; getAddrMode3OffsetOpValue() local
1396 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; getAddrMode3OpValue() local
1456 bool isAdd; getAddrMode5OpValue() local
1496 bool isAdd; getAddrMode5FP16OpValue() local
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| H A D | ARMAsmBackend.cpp | 527 bool isAdd = true; in adjustFixupValue() local
758 bool isAdd = true; in adjustFixupValue() local
778 bool isAdd = true; in adjustFixupValue() local
805 bool isAdd = true; in adjustFixupValue() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenInstruction.h | 253 bool isAdd : 1; variable
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 279 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd() function
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 429 bool isAdd() const { in isAdd() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 900 bool isAdd; member
3332 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local
3343 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local
3906 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg()
5666 bool isAdd = true; in parsePostIdxReg() local
5744 bool isAdd = true; in parseAM3Offset() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUIGroupLP.cpp | 1379 auto isAdd = [](unsigned Opc) { return Opc == AMDGPU::V_ADD_F32_e32; }; in analyzeDAG() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 47625 auto combineMulShlAddOrSub = [&](int Mult, int Shift, bool isAdd) { in combineMulSpecial()
47635 auto combineMulMulAddOrSub = [&](int Mul1, int Mul2, bool isAdd) { in combineMulSpecial()
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