1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
4 * Author: Alex Williamson <alex.williamson@redhat.com>
5 *
6 * Derived from original vfio:
7 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
8 * Author: Tom Lyon, pugs@cisco.com
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/aperture.h>
14 #include <linux/device.h>
15 #include <linux/eventfd.h>
16 #include <linux/file.h>
17 #include <linux/interrupt.h>
18 #include <linux/iommu.h>
19 #include <linux/module.h>
20 #include <linux/mutex.h>
21 #include <linux/notifier.h>
22 #include <linux/pci.h>
23 #include <linux/pfn_t.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/slab.h>
26 #include <linux/types.h>
27 #include <linux/uaccess.h>
28 #include <linux/vgaarb.h>
29 #include <linux/nospec.h>
30 #include <linux/sched/mm.h>
31 #include <linux/iommufd.h>
32 #if IS_ENABLED(CONFIG_EEH)
33 #include <asm/eeh.h>
34 #endif
35
36 #include "vfio_pci_priv.h"
37
38 #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
39 #define DRIVER_DESC "core driver for VFIO based PCI devices"
40
41 static bool nointxmask;
42 static bool disable_vga;
43 static bool disable_idle_d3;
44
45 /* List of PF's that vfio_pci_core_sriov_configure() has been called on */
46 static DEFINE_MUTEX(vfio_pci_sriov_pfs_mutex);
47 static LIST_HEAD(vfio_pci_sriov_pfs);
48
49 struct vfio_pci_dummy_resource {
50 struct resource resource;
51 int index;
52 struct list_head res_next;
53 };
54
55 struct vfio_pci_vf_token {
56 struct mutex lock;
57 uuid_t uuid;
58 int users;
59 };
60
vfio_vga_disabled(void)61 static inline bool vfio_vga_disabled(void)
62 {
63 #ifdef CONFIG_VFIO_PCI_VGA
64 return disable_vga;
65 #else
66 return true;
67 #endif
68 }
69
70 /*
71 * Our VGA arbiter participation is limited since we don't know anything
72 * about the device itself. However, if the device is the only VGA device
73 * downstream of a bridge and VFIO VGA support is disabled, then we can
74 * safely return legacy VGA IO and memory as not decoded since the user
75 * has no way to get to it and routing can be disabled externally at the
76 * bridge.
77 */
vfio_pci_set_decode(struct pci_dev * pdev,bool single_vga)78 static unsigned int vfio_pci_set_decode(struct pci_dev *pdev, bool single_vga)
79 {
80 struct pci_dev *tmp = NULL;
81 unsigned char max_busnr;
82 unsigned int decodes;
83
84 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
85 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
86 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
87
88 max_busnr = pci_bus_max_busnr(pdev->bus);
89 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
90
91 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
92 if (tmp == pdev ||
93 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
94 pci_is_root_bus(tmp->bus))
95 continue;
96
97 if (tmp->bus->number >= pdev->bus->number &&
98 tmp->bus->number <= max_busnr) {
99 pci_dev_put(tmp);
100 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
101 break;
102 }
103 }
104
105 return decodes;
106 }
107
vfio_pci_probe_mmaps(struct vfio_pci_core_device * vdev)108 static void vfio_pci_probe_mmaps(struct vfio_pci_core_device *vdev)
109 {
110 struct resource *res;
111 int i;
112 struct vfio_pci_dummy_resource *dummy_res;
113
114 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
115 int bar = i + PCI_STD_RESOURCES;
116
117 res = &vdev->pdev->resource[bar];
118
119 if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
120 goto no_mmap;
121
122 if (!(res->flags & IORESOURCE_MEM))
123 goto no_mmap;
124
125 /*
126 * The PCI core shouldn't set up a resource with a
127 * type but zero size. But there may be bugs that
128 * cause us to do that.
129 */
130 if (!resource_size(res))
131 goto no_mmap;
132
133 if (resource_size(res) >= PAGE_SIZE) {
134 vdev->bar_mmap_supported[bar] = true;
135 continue;
136 }
137
138 if (!(res->start & ~PAGE_MASK)) {
139 /*
140 * Add a dummy resource to reserve the remainder
141 * of the exclusive page in case that hot-add
142 * device's bar is assigned into it.
143 */
144 dummy_res =
145 kzalloc(sizeof(*dummy_res), GFP_KERNEL_ACCOUNT);
146 if (dummy_res == NULL)
147 goto no_mmap;
148
149 dummy_res->resource.name = "vfio sub-page reserved";
150 dummy_res->resource.start = res->end + 1;
151 dummy_res->resource.end = res->start + PAGE_SIZE - 1;
152 dummy_res->resource.flags = res->flags;
153 if (request_resource(res->parent,
154 &dummy_res->resource)) {
155 kfree(dummy_res);
156 goto no_mmap;
157 }
158 dummy_res->index = bar;
159 list_add(&dummy_res->res_next,
160 &vdev->dummy_resources_list);
161 vdev->bar_mmap_supported[bar] = true;
162 continue;
163 }
164 /*
165 * Here we don't handle the case when the BAR is not page
166 * aligned because we can't expect the BAR will be
167 * assigned into the same location in a page in guest
168 * when we passthrough the BAR. And it's hard to access
169 * this BAR in userspace because we have no way to get
170 * the BAR's location in a page.
171 */
172 no_mmap:
173 vdev->bar_mmap_supported[bar] = false;
174 }
175 }
176
177 struct vfio_pci_group_info;
178 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
179 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
180 struct vfio_pci_group_info *groups,
181 struct iommufd_ctx *iommufd_ctx);
182
183 /*
184 * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
185 * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
186 * If a device implements the former but not the latter we would typically
187 * expect broken_intx_masking be set and require an exclusive interrupt.
188 * However since we do have control of the device's ability to assert INTx,
189 * we can instead pretend that the device does not implement INTx, virtualizing
190 * the pin register to report zero and maintaining DisINTx set on the host.
191 */
vfio_pci_nointx(struct pci_dev * pdev)192 static bool vfio_pci_nointx(struct pci_dev *pdev)
193 {
194 switch (pdev->vendor) {
195 case PCI_VENDOR_ID_INTEL:
196 switch (pdev->device) {
197 /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
198 case 0x1572:
199 case 0x1574:
200 case 0x1580 ... 0x1581:
201 case 0x1583 ... 0x158b:
202 case 0x37d0 ... 0x37d2:
203 /* X550 */
204 case 0x1563:
205 return true;
206 default:
207 return false;
208 }
209 }
210
211 return false;
212 }
213
vfio_pci_probe_power_state(struct vfio_pci_core_device * vdev)214 static void vfio_pci_probe_power_state(struct vfio_pci_core_device *vdev)
215 {
216 struct pci_dev *pdev = vdev->pdev;
217 u16 pmcsr;
218
219 if (!pdev->pm_cap)
220 return;
221
222 pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmcsr);
223
224 vdev->needs_pm_restore = !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET);
225 }
226
227 /*
228 * pci_set_power_state() wrapper handling devices which perform a soft reset on
229 * D3->D0 transition. Save state prior to D0/1/2->D3, stash it on the vdev,
230 * restore when returned to D0. Saved separately from pci_saved_state for use
231 * by PM capability emulation and separately from pci_dev internal saved state
232 * to avoid it being overwritten and consumed around other resets.
233 */
vfio_pci_set_power_state(struct vfio_pci_core_device * vdev,pci_power_t state)234 int vfio_pci_set_power_state(struct vfio_pci_core_device *vdev, pci_power_t state)
235 {
236 struct pci_dev *pdev = vdev->pdev;
237 bool needs_restore = false, needs_save = false;
238 int ret;
239
240 /* Prevent changing power state for PFs with VFs enabled */
241 if (pci_num_vf(pdev) && state > PCI_D0)
242 return -EBUSY;
243
244 if (vdev->needs_pm_restore) {
245 if (pdev->current_state < PCI_D3hot && state >= PCI_D3hot) {
246 pci_save_state(pdev);
247 needs_save = true;
248 }
249
250 if (pdev->current_state >= PCI_D3hot && state <= PCI_D0)
251 needs_restore = true;
252 }
253
254 ret = pci_set_power_state(pdev, state);
255
256 if (!ret) {
257 /* D3 might be unsupported via quirk, skip unless in D3 */
258 if (needs_save && pdev->current_state >= PCI_D3hot) {
259 /*
260 * The current PCI state will be saved locally in
261 * 'pm_save' during the D3hot transition. When the
262 * device state is changed to D0 again with the current
263 * function, then pci_store_saved_state() will restore
264 * the state and will free the memory pointed by
265 * 'pm_save'. There are few cases where the PCI power
266 * state can be changed to D0 without the involvement
267 * of the driver. For these cases, free the earlier
268 * allocated memory first before overwriting 'pm_save'
269 * to prevent the memory leak.
270 */
271 kfree(vdev->pm_save);
272 vdev->pm_save = pci_store_saved_state(pdev);
273 } else if (needs_restore) {
274 pci_load_and_free_saved_state(pdev, &vdev->pm_save);
275 pci_restore_state(pdev);
276 }
277 }
278
279 return ret;
280 }
281
vfio_pci_runtime_pm_entry(struct vfio_pci_core_device * vdev,struct eventfd_ctx * efdctx)282 static int vfio_pci_runtime_pm_entry(struct vfio_pci_core_device *vdev,
283 struct eventfd_ctx *efdctx)
284 {
285 /*
286 * The vdev power related flags are protected with 'memory_lock'
287 * semaphore.
288 */
289 vfio_pci_zap_and_down_write_memory_lock(vdev);
290 if (vdev->pm_runtime_engaged) {
291 up_write(&vdev->memory_lock);
292 return -EINVAL;
293 }
294
295 vdev->pm_runtime_engaged = true;
296 vdev->pm_wake_eventfd_ctx = efdctx;
297 pm_runtime_put_noidle(&vdev->pdev->dev);
298 up_write(&vdev->memory_lock);
299
300 return 0;
301 }
302
vfio_pci_core_pm_entry(struct vfio_device * device,u32 flags,void __user * arg,size_t argsz)303 static int vfio_pci_core_pm_entry(struct vfio_device *device, u32 flags,
304 void __user *arg, size_t argsz)
305 {
306 struct vfio_pci_core_device *vdev =
307 container_of(device, struct vfio_pci_core_device, vdev);
308 int ret;
309
310 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0);
311 if (ret != 1)
312 return ret;
313
314 /*
315 * Inside vfio_pci_runtime_pm_entry(), only the runtime PM usage count
316 * will be decremented. The pm_runtime_put() will be invoked again
317 * while returning from the ioctl and then the device can go into
318 * runtime suspended state.
319 */
320 return vfio_pci_runtime_pm_entry(vdev, NULL);
321 }
322
vfio_pci_core_pm_entry_with_wakeup(struct vfio_device * device,u32 flags,struct vfio_device_low_power_entry_with_wakeup __user * arg,size_t argsz)323 static int vfio_pci_core_pm_entry_with_wakeup(
324 struct vfio_device *device, u32 flags,
325 struct vfio_device_low_power_entry_with_wakeup __user *arg,
326 size_t argsz)
327 {
328 struct vfio_pci_core_device *vdev =
329 container_of(device, struct vfio_pci_core_device, vdev);
330 struct vfio_device_low_power_entry_with_wakeup entry;
331 struct eventfd_ctx *efdctx;
332 int ret;
333
334 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET,
335 sizeof(entry));
336 if (ret != 1)
337 return ret;
338
339 if (copy_from_user(&entry, arg, sizeof(entry)))
340 return -EFAULT;
341
342 if (entry.wakeup_eventfd < 0)
343 return -EINVAL;
344
345 efdctx = eventfd_ctx_fdget(entry.wakeup_eventfd);
346 if (IS_ERR(efdctx))
347 return PTR_ERR(efdctx);
348
349 ret = vfio_pci_runtime_pm_entry(vdev, efdctx);
350 if (ret)
351 eventfd_ctx_put(efdctx);
352
353 return ret;
354 }
355
__vfio_pci_runtime_pm_exit(struct vfio_pci_core_device * vdev)356 static void __vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev)
357 {
358 if (vdev->pm_runtime_engaged) {
359 vdev->pm_runtime_engaged = false;
360 pm_runtime_get_noresume(&vdev->pdev->dev);
361
362 if (vdev->pm_wake_eventfd_ctx) {
363 eventfd_ctx_put(vdev->pm_wake_eventfd_ctx);
364 vdev->pm_wake_eventfd_ctx = NULL;
365 }
366 }
367 }
368
vfio_pci_runtime_pm_exit(struct vfio_pci_core_device * vdev)369 static void vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev)
370 {
371 /*
372 * The vdev power related flags are protected with 'memory_lock'
373 * semaphore.
374 */
375 down_write(&vdev->memory_lock);
376 __vfio_pci_runtime_pm_exit(vdev);
377 up_write(&vdev->memory_lock);
378 }
379
vfio_pci_core_pm_exit(struct vfio_device * device,u32 flags,void __user * arg,size_t argsz)380 static int vfio_pci_core_pm_exit(struct vfio_device *device, u32 flags,
381 void __user *arg, size_t argsz)
382 {
383 struct vfio_pci_core_device *vdev =
384 container_of(device, struct vfio_pci_core_device, vdev);
385 int ret;
386
387 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0);
388 if (ret != 1)
389 return ret;
390
391 /*
392 * The device is always in the active state here due to pm wrappers
393 * around ioctls. If the device had entered a low power state and
394 * pm_wake_eventfd_ctx is valid, vfio_pci_core_runtime_resume() has
395 * already signaled the eventfd and exited low power mode itself.
396 * pm_runtime_engaged protects the redundant call here.
397 */
398 vfio_pci_runtime_pm_exit(vdev);
399 return 0;
400 }
401
402 #ifdef CONFIG_PM
vfio_pci_core_runtime_suspend(struct device * dev)403 static int vfio_pci_core_runtime_suspend(struct device *dev)
404 {
405 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev);
406
407 down_write(&vdev->memory_lock);
408 /*
409 * The user can move the device into D3hot state before invoking
410 * power management IOCTL. Move the device into D0 state here and then
411 * the pci-driver core runtime PM suspend function will move the device
412 * into the low power state. Also, for the devices which have
413 * NoSoftRst-, it will help in restoring the original state
414 * (saved locally in 'vdev->pm_save').
415 */
416 vfio_pci_set_power_state(vdev, PCI_D0);
417 up_write(&vdev->memory_lock);
418
419 /*
420 * If INTx is enabled, then mask INTx before going into the runtime
421 * suspended state and unmask the same in the runtime resume.
422 * If INTx has already been masked by the user, then
423 * vfio_pci_intx_mask() will return false and in that case, INTx
424 * should not be unmasked in the runtime resume.
425 */
426 vdev->pm_intx_masked = ((vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) &&
427 vfio_pci_intx_mask(vdev));
428
429 return 0;
430 }
431
vfio_pci_core_runtime_resume(struct device * dev)432 static int vfio_pci_core_runtime_resume(struct device *dev)
433 {
434 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev);
435
436 /*
437 * Resume with a pm_wake_eventfd_ctx signals the eventfd and exit
438 * low power mode.
439 */
440 down_write(&vdev->memory_lock);
441 if (vdev->pm_wake_eventfd_ctx) {
442 eventfd_signal(vdev->pm_wake_eventfd_ctx);
443 __vfio_pci_runtime_pm_exit(vdev);
444 }
445 up_write(&vdev->memory_lock);
446
447 if (vdev->pm_intx_masked)
448 vfio_pci_intx_unmask(vdev);
449
450 return 0;
451 }
452 #endif /* CONFIG_PM */
453
454 /*
455 * The pci-driver core runtime PM routines always save the device state
456 * before going into suspended state. If the device is going into low power
457 * state with only with runtime PM ops, then no explicit handling is needed
458 * for the devices which have NoSoftRst-.
459 */
460 static const struct dev_pm_ops vfio_pci_core_pm_ops = {
461 SET_RUNTIME_PM_OPS(vfio_pci_core_runtime_suspend,
462 vfio_pci_core_runtime_resume,
463 NULL)
464 };
465
vfio_pci_core_enable(struct vfio_pci_core_device * vdev)466 int vfio_pci_core_enable(struct vfio_pci_core_device *vdev)
467 {
468 struct pci_dev *pdev = vdev->pdev;
469 int ret;
470 u16 cmd;
471 u8 msix_pos;
472
473 if (!disable_idle_d3) {
474 ret = pm_runtime_resume_and_get(&pdev->dev);
475 if (ret < 0)
476 return ret;
477 }
478
479 /* Don't allow our initial saved state to include busmaster */
480 pci_clear_master(pdev);
481
482 ret = pci_enable_device(pdev);
483 if (ret)
484 goto out_power;
485
486 /* If reset fails because of the device lock, fail this path entirely */
487 ret = pci_try_reset_function(pdev);
488 if (ret == -EAGAIN)
489 goto out_disable_device;
490
491 vdev->reset_works = !ret;
492 pci_save_state(pdev);
493 vdev->pci_saved_state = pci_store_saved_state(pdev);
494 if (!vdev->pci_saved_state)
495 pci_dbg(pdev, "%s: Couldn't store saved state\n", __func__);
496
497 if (likely(!nointxmask)) {
498 if (vfio_pci_nointx(pdev)) {
499 pci_info(pdev, "Masking broken INTx support\n");
500 vdev->nointx = true;
501 pci_intx(pdev, 0);
502 } else
503 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
504 }
505
506 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
507 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
508 cmd &= ~PCI_COMMAND_INTX_DISABLE;
509 pci_write_config_word(pdev, PCI_COMMAND, cmd);
510 }
511
512 ret = vfio_pci_zdev_open_device(vdev);
513 if (ret)
514 goto out_free_state;
515
516 ret = vfio_config_init(vdev);
517 if (ret)
518 goto out_free_zdev;
519
520 msix_pos = pdev->msix_cap;
521 if (msix_pos) {
522 u16 flags;
523 u32 table;
524
525 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
526 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
527
528 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
529 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
530 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
531 vdev->has_dyn_msix = pci_msix_can_alloc_dyn(pdev);
532 } else {
533 vdev->msix_bar = 0xFF;
534 vdev->has_dyn_msix = false;
535 }
536
537 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
538 vdev->has_vga = true;
539
540
541 return 0;
542
543 out_free_zdev:
544 vfio_pci_zdev_close_device(vdev);
545 out_free_state:
546 kfree(vdev->pci_saved_state);
547 vdev->pci_saved_state = NULL;
548 out_disable_device:
549 pci_disable_device(pdev);
550 out_power:
551 if (!disable_idle_d3)
552 pm_runtime_put(&pdev->dev);
553 return ret;
554 }
555 EXPORT_SYMBOL_GPL(vfio_pci_core_enable);
556
vfio_pci_core_disable(struct vfio_pci_core_device * vdev)557 void vfio_pci_core_disable(struct vfio_pci_core_device *vdev)
558 {
559 struct pci_dev *pdev = vdev->pdev;
560 struct vfio_pci_dummy_resource *dummy_res, *tmp;
561 struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
562 int i, bar;
563
564 /* For needs_reset */
565 lockdep_assert_held(&vdev->vdev.dev_set->lock);
566
567 /*
568 * This function can be invoked while the power state is non-D0.
569 * This non-D0 power state can be with or without runtime PM.
570 * vfio_pci_runtime_pm_exit() will internally increment the usage
571 * count corresponding to pm_runtime_put() called during low power
572 * feature entry and then pm_runtime_resume() will wake up the device,
573 * if the device has already gone into the suspended state. Otherwise,
574 * the vfio_pci_set_power_state() will change the device power state
575 * to D0.
576 */
577 vfio_pci_runtime_pm_exit(vdev);
578 pm_runtime_resume(&pdev->dev);
579
580 /*
581 * This function calls __pci_reset_function_locked() which internally
582 * can use pci_pm_reset() for the function reset. pci_pm_reset() will
583 * fail if the power state is non-D0. Also, for the devices which
584 * have NoSoftRst-, the reset function can cause the PCI config space
585 * reset without restoring the original state (saved locally in
586 * 'vdev->pm_save').
587 */
588 vfio_pci_set_power_state(vdev, PCI_D0);
589
590 /* Stop the device from further DMA */
591 pci_clear_master(pdev);
592
593 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
594 VFIO_IRQ_SET_ACTION_TRIGGER,
595 vdev->irq_type, 0, 0, NULL);
596
597 /* Device closed, don't need mutex here */
598 list_for_each_entry_safe(ioeventfd, ioeventfd_tmp,
599 &vdev->ioeventfds_list, next) {
600 vfio_virqfd_disable(&ioeventfd->virqfd);
601 list_del(&ioeventfd->next);
602 kfree(ioeventfd);
603 }
604 vdev->ioeventfds_nr = 0;
605
606 vdev->virq_disabled = false;
607
608 for (i = 0; i < vdev->num_regions; i++)
609 vdev->region[i].ops->release(vdev, &vdev->region[i]);
610
611 vdev->num_regions = 0;
612 kfree(vdev->region);
613 vdev->region = NULL; /* don't krealloc a freed pointer */
614
615 vfio_config_free(vdev);
616
617 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
618 bar = i + PCI_STD_RESOURCES;
619 if (!vdev->barmap[bar])
620 continue;
621 pci_iounmap(pdev, vdev->barmap[bar]);
622 pci_release_selected_regions(pdev, 1 << bar);
623 vdev->barmap[bar] = NULL;
624 }
625
626 list_for_each_entry_safe(dummy_res, tmp,
627 &vdev->dummy_resources_list, res_next) {
628 list_del(&dummy_res->res_next);
629 release_resource(&dummy_res->resource);
630 kfree(dummy_res);
631 }
632
633 vdev->needs_reset = true;
634
635 vfio_pci_zdev_close_device(vdev);
636
637 /*
638 * If we have saved state, restore it. If we can reset the device,
639 * even better. Resetting with current state seems better than
640 * nothing, but saving and restoring current state without reset
641 * is just busy work.
642 */
643 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
644 pci_info(pdev, "%s: Couldn't reload saved state\n", __func__);
645
646 if (!vdev->reset_works)
647 goto out;
648
649 pci_save_state(pdev);
650 }
651
652 /*
653 * Disable INTx and MSI, presumably to avoid spurious interrupts
654 * during reset. Stolen from pci_reset_function()
655 */
656 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
657
658 /*
659 * Try to get the locks ourselves to prevent a deadlock. The
660 * success of this is dependent on being able to lock the device,
661 * which is not always possible.
662 * We can not use the "try" reset interface here, which will
663 * overwrite the previously restored configuration information.
664 */
665 if (vdev->reset_works && pci_dev_trylock(pdev)) {
666 if (!__pci_reset_function_locked(pdev))
667 vdev->needs_reset = false;
668 pci_dev_unlock(pdev);
669 }
670
671 pci_restore_state(pdev);
672 out:
673 pci_disable_device(pdev);
674
675 vfio_pci_dev_set_try_reset(vdev->vdev.dev_set);
676
677 /* Put the pm-runtime usage counter acquired during enable */
678 if (!disable_idle_d3)
679 pm_runtime_put(&pdev->dev);
680 }
681 EXPORT_SYMBOL_GPL(vfio_pci_core_disable);
682
vfio_pci_core_close_device(struct vfio_device * core_vdev)683 void vfio_pci_core_close_device(struct vfio_device *core_vdev)
684 {
685 struct vfio_pci_core_device *vdev =
686 container_of(core_vdev, struct vfio_pci_core_device, vdev);
687
688 if (vdev->sriov_pf_core_dev) {
689 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock);
690 WARN_ON(!vdev->sriov_pf_core_dev->vf_token->users);
691 vdev->sriov_pf_core_dev->vf_token->users--;
692 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock);
693 }
694 #if IS_ENABLED(CONFIG_EEH)
695 eeh_dev_release(vdev->pdev);
696 #endif
697 vfio_pci_core_disable(vdev);
698
699 mutex_lock(&vdev->igate);
700 if (vdev->err_trigger) {
701 eventfd_ctx_put(vdev->err_trigger);
702 vdev->err_trigger = NULL;
703 }
704 if (vdev->req_trigger) {
705 eventfd_ctx_put(vdev->req_trigger);
706 vdev->req_trigger = NULL;
707 }
708 mutex_unlock(&vdev->igate);
709 }
710 EXPORT_SYMBOL_GPL(vfio_pci_core_close_device);
711
vfio_pci_core_finish_enable(struct vfio_pci_core_device * vdev)712 void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev)
713 {
714 vfio_pci_probe_mmaps(vdev);
715 #if IS_ENABLED(CONFIG_EEH)
716 eeh_dev_open(vdev->pdev);
717 #endif
718
719 if (vdev->sriov_pf_core_dev) {
720 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock);
721 vdev->sriov_pf_core_dev->vf_token->users++;
722 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock);
723 }
724 }
725 EXPORT_SYMBOL_GPL(vfio_pci_core_finish_enable);
726
vfio_pci_get_irq_count(struct vfio_pci_core_device * vdev,int irq_type)727 static int vfio_pci_get_irq_count(struct vfio_pci_core_device *vdev, int irq_type)
728 {
729 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
730 u8 pin;
731
732 if (!IS_ENABLED(CONFIG_VFIO_PCI_INTX) ||
733 vdev->nointx || vdev->pdev->is_virtfn)
734 return 0;
735
736 pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
737
738 return pin ? 1 : 0;
739 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
740 u8 pos;
741 u16 flags;
742
743 pos = vdev->pdev->msi_cap;
744 if (pos) {
745 pci_read_config_word(vdev->pdev,
746 pos + PCI_MSI_FLAGS, &flags);
747 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
748 }
749 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
750 u8 pos;
751 u16 flags;
752
753 pos = vdev->pdev->msix_cap;
754 if (pos) {
755 pci_read_config_word(vdev->pdev,
756 pos + PCI_MSIX_FLAGS, &flags);
757
758 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
759 }
760 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
761 if (pci_is_pcie(vdev->pdev))
762 return 1;
763 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
764 return 1;
765 }
766
767 return 0;
768 }
769
vfio_pci_count_devs(struct pci_dev * pdev,void * data)770 static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
771 {
772 (*(int *)data)++;
773 return 0;
774 }
775
776 struct vfio_pci_fill_info {
777 struct vfio_device *vdev;
778 struct vfio_pci_dependent_device *devices;
779 int nr_devices;
780 u32 count;
781 u32 flags;
782 };
783
vfio_pci_fill_devs(struct pci_dev * pdev,void * data)784 static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
785 {
786 struct vfio_pci_dependent_device *info;
787 struct vfio_pci_fill_info *fill = data;
788
789 /* The topology changed since we counted devices */
790 if (fill->count >= fill->nr_devices)
791 return -EAGAIN;
792
793 info = &fill->devices[fill->count++];
794 info->segment = pci_domain_nr(pdev->bus);
795 info->bus = pdev->bus->number;
796 info->devfn = pdev->devfn;
797
798 if (fill->flags & VFIO_PCI_HOT_RESET_FLAG_DEV_ID) {
799 struct iommufd_ctx *iommufd = vfio_iommufd_device_ictx(fill->vdev);
800 struct vfio_device_set *dev_set = fill->vdev->dev_set;
801 struct vfio_device *vdev;
802
803 /*
804 * hot-reset requires all affected devices be represented in
805 * the dev_set.
806 */
807 vdev = vfio_find_device_in_devset(dev_set, &pdev->dev);
808 if (!vdev) {
809 info->devid = VFIO_PCI_DEVID_NOT_OWNED;
810 } else {
811 int id = vfio_iommufd_get_dev_id(vdev, iommufd);
812
813 if (id > 0)
814 info->devid = id;
815 else if (id == -ENOENT)
816 info->devid = VFIO_PCI_DEVID_OWNED;
817 else
818 info->devid = VFIO_PCI_DEVID_NOT_OWNED;
819 }
820 /* If devid is VFIO_PCI_DEVID_NOT_OWNED, clear owned flag. */
821 if (info->devid == VFIO_PCI_DEVID_NOT_OWNED)
822 fill->flags &= ~VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED;
823 } else {
824 struct iommu_group *iommu_group;
825
826 iommu_group = iommu_group_get(&pdev->dev);
827 if (!iommu_group)
828 return -EPERM; /* Cannot reset non-isolated devices */
829
830 info->group_id = iommu_group_id(iommu_group);
831 iommu_group_put(iommu_group);
832 }
833
834 return 0;
835 }
836
837 struct vfio_pci_group_info {
838 int count;
839 struct file **files;
840 };
841
vfio_pci_dev_below_slot(struct pci_dev * pdev,struct pci_slot * slot)842 static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
843 {
844 for (; pdev; pdev = pdev->bus->self)
845 if (pdev->bus == slot->bus)
846 return (pdev->slot == slot);
847 return false;
848 }
849
850 struct vfio_pci_walk_info {
851 int (*fn)(struct pci_dev *pdev, void *data);
852 void *data;
853 struct pci_dev *pdev;
854 bool slot;
855 int ret;
856 };
857
vfio_pci_walk_wrapper(struct pci_dev * pdev,void * data)858 static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
859 {
860 struct vfio_pci_walk_info *walk = data;
861
862 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
863 walk->ret = walk->fn(pdev, walk->data);
864
865 return walk->ret;
866 }
867
vfio_pci_for_each_slot_or_bus(struct pci_dev * pdev,int (* fn)(struct pci_dev *,void * data),void * data,bool slot)868 static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
869 int (*fn)(struct pci_dev *,
870 void *data), void *data,
871 bool slot)
872 {
873 struct vfio_pci_walk_info walk = {
874 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
875 };
876
877 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
878
879 return walk.ret;
880 }
881
msix_mmappable_cap(struct vfio_pci_core_device * vdev,struct vfio_info_cap * caps)882 static int msix_mmappable_cap(struct vfio_pci_core_device *vdev,
883 struct vfio_info_cap *caps)
884 {
885 struct vfio_info_cap_header header = {
886 .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
887 .version = 1
888 };
889
890 return vfio_info_add_capability(caps, &header, sizeof(header));
891 }
892
vfio_pci_core_register_dev_region(struct vfio_pci_core_device * vdev,unsigned int type,unsigned int subtype,const struct vfio_pci_regops * ops,size_t size,u32 flags,void * data)893 int vfio_pci_core_register_dev_region(struct vfio_pci_core_device *vdev,
894 unsigned int type, unsigned int subtype,
895 const struct vfio_pci_regops *ops,
896 size_t size, u32 flags, void *data)
897 {
898 struct vfio_pci_region *region;
899
900 region = krealloc(vdev->region,
901 (vdev->num_regions + 1) * sizeof(*region),
902 GFP_KERNEL_ACCOUNT);
903 if (!region)
904 return -ENOMEM;
905
906 vdev->region = region;
907 vdev->region[vdev->num_regions].type = type;
908 vdev->region[vdev->num_regions].subtype = subtype;
909 vdev->region[vdev->num_regions].ops = ops;
910 vdev->region[vdev->num_regions].size = size;
911 vdev->region[vdev->num_regions].flags = flags;
912 vdev->region[vdev->num_regions].data = data;
913
914 vdev->num_regions++;
915
916 return 0;
917 }
918 EXPORT_SYMBOL_GPL(vfio_pci_core_register_dev_region);
919
vfio_pci_info_atomic_cap(struct vfio_pci_core_device * vdev,struct vfio_info_cap * caps)920 static int vfio_pci_info_atomic_cap(struct vfio_pci_core_device *vdev,
921 struct vfio_info_cap *caps)
922 {
923 struct vfio_device_info_cap_pci_atomic_comp cap = {
924 .header.id = VFIO_DEVICE_INFO_CAP_PCI_ATOMIC_COMP,
925 .header.version = 1
926 };
927 struct pci_dev *pdev = pci_physfn(vdev->pdev);
928 u32 devcap2;
929
930 pcie_capability_read_dword(pdev, PCI_EXP_DEVCAP2, &devcap2);
931
932 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP32) &&
933 !pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP32))
934 cap.flags |= VFIO_PCI_ATOMIC_COMP32;
935
936 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP64) &&
937 !pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP64))
938 cap.flags |= VFIO_PCI_ATOMIC_COMP64;
939
940 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP128) &&
941 !pci_enable_atomic_ops_to_root(pdev,
942 PCI_EXP_DEVCAP2_ATOMIC_COMP128))
943 cap.flags |= VFIO_PCI_ATOMIC_COMP128;
944
945 if (!cap.flags)
946 return -ENODEV;
947
948 return vfio_info_add_capability(caps, &cap.header, sizeof(cap));
949 }
950
vfio_pci_ioctl_get_info(struct vfio_pci_core_device * vdev,struct vfio_device_info __user * arg)951 static int vfio_pci_ioctl_get_info(struct vfio_pci_core_device *vdev,
952 struct vfio_device_info __user *arg)
953 {
954 unsigned long minsz = offsetofend(struct vfio_device_info, num_irqs);
955 struct vfio_device_info info = {};
956 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
957 int ret;
958
959 if (copy_from_user(&info, arg, minsz))
960 return -EFAULT;
961
962 if (info.argsz < minsz)
963 return -EINVAL;
964
965 minsz = min_t(size_t, info.argsz, sizeof(info));
966
967 info.flags = VFIO_DEVICE_FLAGS_PCI;
968
969 if (vdev->reset_works)
970 info.flags |= VFIO_DEVICE_FLAGS_RESET;
971
972 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
973 info.num_irqs = VFIO_PCI_NUM_IRQS;
974
975 ret = vfio_pci_info_zdev_add_caps(vdev, &caps);
976 if (ret && ret != -ENODEV) {
977 pci_warn(vdev->pdev,
978 "Failed to setup zPCI info capabilities\n");
979 return ret;
980 }
981
982 ret = vfio_pci_info_atomic_cap(vdev, &caps);
983 if (ret && ret != -ENODEV) {
984 pci_warn(vdev->pdev,
985 "Failed to setup AtomicOps info capability\n");
986 return ret;
987 }
988
989 if (caps.size) {
990 info.flags |= VFIO_DEVICE_FLAGS_CAPS;
991 if (info.argsz < sizeof(info) + caps.size) {
992 info.argsz = sizeof(info) + caps.size;
993 } else {
994 vfio_info_cap_shift(&caps, sizeof(info));
995 if (copy_to_user(arg + 1, caps.buf, caps.size)) {
996 kfree(caps.buf);
997 return -EFAULT;
998 }
999 info.cap_offset = sizeof(*arg);
1000 }
1001
1002 kfree(caps.buf);
1003 }
1004
1005 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
1006 }
1007
vfio_pci_ioctl_get_region_info(struct vfio_pci_core_device * vdev,struct vfio_region_info __user * arg)1008 static int vfio_pci_ioctl_get_region_info(struct vfio_pci_core_device *vdev,
1009 struct vfio_region_info __user *arg)
1010 {
1011 unsigned long minsz = offsetofend(struct vfio_region_info, offset);
1012 struct pci_dev *pdev = vdev->pdev;
1013 struct vfio_region_info info;
1014 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
1015 int i, ret;
1016
1017 if (copy_from_user(&info, arg, minsz))
1018 return -EFAULT;
1019
1020 if (info.argsz < minsz)
1021 return -EINVAL;
1022
1023 switch (info.index) {
1024 case VFIO_PCI_CONFIG_REGION_INDEX:
1025 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1026 info.size = pdev->cfg_size;
1027 info.flags = VFIO_REGION_INFO_FLAG_READ |
1028 VFIO_REGION_INFO_FLAG_WRITE;
1029 break;
1030 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1031 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1032 info.size = pci_resource_len(pdev, info.index);
1033 if (!info.size) {
1034 info.flags = 0;
1035 break;
1036 }
1037
1038 info.flags = VFIO_REGION_INFO_FLAG_READ |
1039 VFIO_REGION_INFO_FLAG_WRITE;
1040 if (vdev->bar_mmap_supported[info.index]) {
1041 info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
1042 if (info.index == vdev->msix_bar) {
1043 ret = msix_mmappable_cap(vdev, &caps);
1044 if (ret)
1045 return ret;
1046 }
1047 }
1048
1049 break;
1050 case VFIO_PCI_ROM_REGION_INDEX: {
1051 void __iomem *io;
1052 size_t size;
1053 u16 cmd;
1054
1055 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1056 info.flags = 0;
1057 info.size = 0;
1058
1059 if (pci_resource_start(pdev, PCI_ROM_RESOURCE)) {
1060 /*
1061 * Check ROM content is valid. Need to enable memory
1062 * decode for ROM access in pci_map_rom().
1063 */
1064 cmd = vfio_pci_memory_lock_and_enable(vdev);
1065 io = pci_map_rom(pdev, &size);
1066 if (io) {
1067 info.flags = VFIO_REGION_INFO_FLAG_READ;
1068 /* Report the BAR size, not the ROM size. */
1069 info.size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1070 pci_unmap_rom(pdev, io);
1071 }
1072 vfio_pci_memory_unlock_and_restore(vdev, cmd);
1073 } else if (pdev->rom && pdev->romlen) {
1074 info.flags = VFIO_REGION_INFO_FLAG_READ;
1075 /* Report BAR size as power of two. */
1076 info.size = roundup_pow_of_two(pdev->romlen);
1077 }
1078
1079 break;
1080 }
1081 case VFIO_PCI_VGA_REGION_INDEX:
1082 if (!vdev->has_vga)
1083 return -EINVAL;
1084
1085 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1086 info.size = 0xc0000;
1087 info.flags = VFIO_REGION_INFO_FLAG_READ |
1088 VFIO_REGION_INFO_FLAG_WRITE;
1089
1090 break;
1091 default: {
1092 struct vfio_region_info_cap_type cap_type = {
1093 .header.id = VFIO_REGION_INFO_CAP_TYPE,
1094 .header.version = 1
1095 };
1096
1097 if (info.index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1098 return -EINVAL;
1099 info.index = array_index_nospec(
1100 info.index, VFIO_PCI_NUM_REGIONS + vdev->num_regions);
1101
1102 i = info.index - VFIO_PCI_NUM_REGIONS;
1103
1104 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1105 info.size = vdev->region[i].size;
1106 info.flags = vdev->region[i].flags;
1107
1108 cap_type.type = vdev->region[i].type;
1109 cap_type.subtype = vdev->region[i].subtype;
1110
1111 ret = vfio_info_add_capability(&caps, &cap_type.header,
1112 sizeof(cap_type));
1113 if (ret)
1114 return ret;
1115
1116 if (vdev->region[i].ops->add_capability) {
1117 ret = vdev->region[i].ops->add_capability(
1118 vdev, &vdev->region[i], &caps);
1119 if (ret)
1120 return ret;
1121 }
1122 }
1123 }
1124
1125 if (caps.size) {
1126 info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
1127 if (info.argsz < sizeof(info) + caps.size) {
1128 info.argsz = sizeof(info) + caps.size;
1129 info.cap_offset = 0;
1130 } else {
1131 vfio_info_cap_shift(&caps, sizeof(info));
1132 if (copy_to_user(arg + 1, caps.buf, caps.size)) {
1133 kfree(caps.buf);
1134 return -EFAULT;
1135 }
1136 info.cap_offset = sizeof(*arg);
1137 }
1138
1139 kfree(caps.buf);
1140 }
1141
1142 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
1143 }
1144
vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device * vdev,struct vfio_irq_info __user * arg)1145 static int vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device *vdev,
1146 struct vfio_irq_info __user *arg)
1147 {
1148 unsigned long minsz = offsetofend(struct vfio_irq_info, count);
1149 struct vfio_irq_info info;
1150
1151 if (copy_from_user(&info, arg, minsz))
1152 return -EFAULT;
1153
1154 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
1155 return -EINVAL;
1156
1157 switch (info.index) {
1158 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
1159 case VFIO_PCI_REQ_IRQ_INDEX:
1160 break;
1161 case VFIO_PCI_ERR_IRQ_INDEX:
1162 if (pci_is_pcie(vdev->pdev))
1163 break;
1164 fallthrough;
1165 default:
1166 return -EINVAL;
1167 }
1168
1169 info.flags = VFIO_IRQ_INFO_EVENTFD;
1170
1171 info.count = vfio_pci_get_irq_count(vdev, info.index);
1172
1173 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
1174 info.flags |=
1175 (VFIO_IRQ_INFO_MASKABLE | VFIO_IRQ_INFO_AUTOMASKED);
1176 else if (info.index != VFIO_PCI_MSIX_IRQ_INDEX || !vdev->has_dyn_msix)
1177 info.flags |= VFIO_IRQ_INFO_NORESIZE;
1178
1179 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
1180 }
1181
vfio_pci_ioctl_set_irqs(struct vfio_pci_core_device * vdev,struct vfio_irq_set __user * arg)1182 static int vfio_pci_ioctl_set_irqs(struct vfio_pci_core_device *vdev,
1183 struct vfio_irq_set __user *arg)
1184 {
1185 unsigned long minsz = offsetofend(struct vfio_irq_set, count);
1186 struct vfio_irq_set hdr;
1187 u8 *data = NULL;
1188 int max, ret = 0;
1189 size_t data_size = 0;
1190
1191 if (copy_from_user(&hdr, arg, minsz))
1192 return -EFAULT;
1193
1194 max = vfio_pci_get_irq_count(vdev, hdr.index);
1195
1196 ret = vfio_set_irqs_validate_and_prepare(&hdr, max, VFIO_PCI_NUM_IRQS,
1197 &data_size);
1198 if (ret)
1199 return ret;
1200
1201 if (data_size) {
1202 data = memdup_user(&arg->data, data_size);
1203 if (IS_ERR(data))
1204 return PTR_ERR(data);
1205 }
1206
1207 mutex_lock(&vdev->igate);
1208
1209 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index, hdr.start,
1210 hdr.count, data);
1211
1212 mutex_unlock(&vdev->igate);
1213 kfree(data);
1214
1215 return ret;
1216 }
1217
vfio_pci_ioctl_reset(struct vfio_pci_core_device * vdev,void __user * arg)1218 static int vfio_pci_ioctl_reset(struct vfio_pci_core_device *vdev,
1219 void __user *arg)
1220 {
1221 int ret;
1222
1223 if (!vdev->reset_works)
1224 return -EINVAL;
1225
1226 vfio_pci_zap_and_down_write_memory_lock(vdev);
1227
1228 /*
1229 * This function can be invoked while the power state is non-D0. If
1230 * pci_try_reset_function() has been called while the power state is
1231 * non-D0, then pci_try_reset_function() will internally set the power
1232 * state to D0 without vfio driver involvement. For the devices which
1233 * have NoSoftRst-, the reset function can cause the PCI config space
1234 * reset without restoring the original state (saved locally in
1235 * 'vdev->pm_save').
1236 */
1237 vfio_pci_set_power_state(vdev, PCI_D0);
1238
1239 ret = pci_try_reset_function(vdev->pdev);
1240 up_write(&vdev->memory_lock);
1241
1242 return ret;
1243 }
1244
vfio_pci_ioctl_get_pci_hot_reset_info(struct vfio_pci_core_device * vdev,struct vfio_pci_hot_reset_info __user * arg)1245 static int vfio_pci_ioctl_get_pci_hot_reset_info(
1246 struct vfio_pci_core_device *vdev,
1247 struct vfio_pci_hot_reset_info __user *arg)
1248 {
1249 unsigned long minsz =
1250 offsetofend(struct vfio_pci_hot_reset_info, count);
1251 struct vfio_pci_dependent_device *devices = NULL;
1252 struct vfio_pci_hot_reset_info hdr;
1253 struct vfio_pci_fill_info fill = {};
1254 bool slot = false;
1255 int ret, count = 0;
1256
1257 if (copy_from_user(&hdr, arg, minsz))
1258 return -EFAULT;
1259
1260 if (hdr.argsz < minsz)
1261 return -EINVAL;
1262
1263 hdr.flags = 0;
1264
1265 /* Can we do a slot or bus reset or neither? */
1266 if (!pci_probe_reset_slot(vdev->pdev->slot))
1267 slot = true;
1268 else if (pci_probe_reset_bus(vdev->pdev->bus))
1269 return -ENODEV;
1270
1271 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1272 &count, slot);
1273 if (ret)
1274 return ret;
1275
1276 if (WARN_ON(!count)) /* Should always be at least one */
1277 return -ERANGE;
1278
1279 if (count > (hdr.argsz - sizeof(hdr)) / sizeof(*devices)) {
1280 hdr.count = count;
1281 ret = -ENOSPC;
1282 goto header;
1283 }
1284
1285 devices = kcalloc(count, sizeof(*devices), GFP_KERNEL);
1286 if (!devices)
1287 return -ENOMEM;
1288
1289 fill.devices = devices;
1290 fill.nr_devices = count;
1291 fill.vdev = &vdev->vdev;
1292
1293 if (vfio_device_cdev_opened(&vdev->vdev))
1294 fill.flags |= VFIO_PCI_HOT_RESET_FLAG_DEV_ID |
1295 VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED;
1296
1297 mutex_lock(&vdev->vdev.dev_set->lock);
1298 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_fill_devs,
1299 &fill, slot);
1300 mutex_unlock(&vdev->vdev.dev_set->lock);
1301 if (ret)
1302 goto out;
1303
1304 if (copy_to_user(arg->devices, devices,
1305 sizeof(*devices) * fill.count)) {
1306 ret = -EFAULT;
1307 goto out;
1308 }
1309
1310 hdr.count = fill.count;
1311 hdr.flags = fill.flags;
1312
1313 header:
1314 if (copy_to_user(arg, &hdr, minsz))
1315 ret = -EFAULT;
1316 out:
1317 kfree(devices);
1318 return ret;
1319 }
1320
1321 static int
vfio_pci_ioctl_pci_hot_reset_groups(struct vfio_pci_core_device * vdev,u32 array_count,bool slot,struct vfio_pci_hot_reset __user * arg)1322 vfio_pci_ioctl_pci_hot_reset_groups(struct vfio_pci_core_device *vdev,
1323 u32 array_count, bool slot,
1324 struct vfio_pci_hot_reset __user *arg)
1325 {
1326 int32_t *group_fds;
1327 struct file **files;
1328 struct vfio_pci_group_info info;
1329 int file_idx, count = 0, ret = 0;
1330
1331 /*
1332 * We can't let userspace give us an arbitrarily large buffer to copy,
1333 * so verify how many we think there could be. Note groups can have
1334 * multiple devices so one group per device is the max.
1335 */
1336 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1337 &count, slot);
1338 if (ret)
1339 return ret;
1340
1341 if (array_count > count)
1342 return -EINVAL;
1343
1344 group_fds = kcalloc(array_count, sizeof(*group_fds), GFP_KERNEL);
1345 files = kcalloc(array_count, sizeof(*files), GFP_KERNEL);
1346 if (!group_fds || !files) {
1347 kfree(group_fds);
1348 kfree(files);
1349 return -ENOMEM;
1350 }
1351
1352 if (copy_from_user(group_fds, arg->group_fds,
1353 array_count * sizeof(*group_fds))) {
1354 kfree(group_fds);
1355 kfree(files);
1356 return -EFAULT;
1357 }
1358
1359 /*
1360 * Get the group file for each fd to ensure the group is held across
1361 * the reset
1362 */
1363 for (file_idx = 0; file_idx < array_count; file_idx++) {
1364 struct file *file = fget(group_fds[file_idx]);
1365
1366 if (!file) {
1367 ret = -EBADF;
1368 break;
1369 }
1370
1371 /* Ensure the FD is a vfio group FD.*/
1372 if (!vfio_file_is_group(file)) {
1373 fput(file);
1374 ret = -EINVAL;
1375 break;
1376 }
1377
1378 files[file_idx] = file;
1379 }
1380
1381 kfree(group_fds);
1382
1383 /* release reference to groups on error */
1384 if (ret)
1385 goto hot_reset_release;
1386
1387 info.count = array_count;
1388 info.files = files;
1389
1390 ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info, NULL);
1391
1392 hot_reset_release:
1393 for (file_idx--; file_idx >= 0; file_idx--)
1394 fput(files[file_idx]);
1395
1396 kfree(files);
1397 return ret;
1398 }
1399
vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device * vdev,struct vfio_pci_hot_reset __user * arg)1400 static int vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device *vdev,
1401 struct vfio_pci_hot_reset __user *arg)
1402 {
1403 unsigned long minsz = offsetofend(struct vfio_pci_hot_reset, count);
1404 struct vfio_pci_hot_reset hdr;
1405 bool slot = false;
1406
1407 if (copy_from_user(&hdr, arg, minsz))
1408 return -EFAULT;
1409
1410 if (hdr.argsz < minsz || hdr.flags)
1411 return -EINVAL;
1412
1413 /* zero-length array is only for cdev opened devices */
1414 if (!!hdr.count == vfio_device_cdev_opened(&vdev->vdev))
1415 return -EINVAL;
1416
1417 /* Can we do a slot or bus reset or neither? */
1418 if (!pci_probe_reset_slot(vdev->pdev->slot))
1419 slot = true;
1420 else if (pci_probe_reset_bus(vdev->pdev->bus))
1421 return -ENODEV;
1422
1423 if (hdr.count)
1424 return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count, slot, arg);
1425
1426 return vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, NULL,
1427 vfio_iommufd_device_ictx(&vdev->vdev));
1428 }
1429
vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device * vdev,struct vfio_device_ioeventfd __user * arg)1430 static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev,
1431 struct vfio_device_ioeventfd __user *arg)
1432 {
1433 unsigned long minsz = offsetofend(struct vfio_device_ioeventfd, fd);
1434 struct vfio_device_ioeventfd ioeventfd;
1435 int count;
1436
1437 if (copy_from_user(&ioeventfd, arg, minsz))
1438 return -EFAULT;
1439
1440 if (ioeventfd.argsz < minsz)
1441 return -EINVAL;
1442
1443 if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK)
1444 return -EINVAL;
1445
1446 count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK;
1447
1448 if (hweight8(count) != 1 || ioeventfd.fd < -1)
1449 return -EINVAL;
1450
1451 return vfio_pci_ioeventfd(vdev, ioeventfd.offset, ioeventfd.data, count,
1452 ioeventfd.fd);
1453 }
1454
vfio_pci_core_ioctl(struct vfio_device * core_vdev,unsigned int cmd,unsigned long arg)1455 long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd,
1456 unsigned long arg)
1457 {
1458 struct vfio_pci_core_device *vdev =
1459 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1460 void __user *uarg = (void __user *)arg;
1461
1462 switch (cmd) {
1463 case VFIO_DEVICE_GET_INFO:
1464 return vfio_pci_ioctl_get_info(vdev, uarg);
1465 case VFIO_DEVICE_GET_IRQ_INFO:
1466 return vfio_pci_ioctl_get_irq_info(vdev, uarg);
1467 case VFIO_DEVICE_GET_PCI_HOT_RESET_INFO:
1468 return vfio_pci_ioctl_get_pci_hot_reset_info(vdev, uarg);
1469 case VFIO_DEVICE_GET_REGION_INFO:
1470 return vfio_pci_ioctl_get_region_info(vdev, uarg);
1471 case VFIO_DEVICE_IOEVENTFD:
1472 return vfio_pci_ioctl_ioeventfd(vdev, uarg);
1473 case VFIO_DEVICE_PCI_HOT_RESET:
1474 return vfio_pci_ioctl_pci_hot_reset(vdev, uarg);
1475 case VFIO_DEVICE_RESET:
1476 return vfio_pci_ioctl_reset(vdev, uarg);
1477 case VFIO_DEVICE_SET_IRQS:
1478 return vfio_pci_ioctl_set_irqs(vdev, uarg);
1479 default:
1480 return -ENOTTY;
1481 }
1482 }
1483 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl);
1484
vfio_pci_core_feature_token(struct vfio_device * device,u32 flags,uuid_t __user * arg,size_t argsz)1485 static int vfio_pci_core_feature_token(struct vfio_device *device, u32 flags,
1486 uuid_t __user *arg, size_t argsz)
1487 {
1488 struct vfio_pci_core_device *vdev =
1489 container_of(device, struct vfio_pci_core_device, vdev);
1490 uuid_t uuid;
1491 int ret;
1492
1493 if (!vdev->vf_token)
1494 return -ENOTTY;
1495 /*
1496 * We do not support GET of the VF Token UUID as this could
1497 * expose the token of the previous device user.
1498 */
1499 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET,
1500 sizeof(uuid));
1501 if (ret != 1)
1502 return ret;
1503
1504 if (copy_from_user(&uuid, arg, sizeof(uuid)))
1505 return -EFAULT;
1506
1507 mutex_lock(&vdev->vf_token->lock);
1508 uuid_copy(&vdev->vf_token->uuid, &uuid);
1509 mutex_unlock(&vdev->vf_token->lock);
1510 return 0;
1511 }
1512
vfio_pci_core_ioctl_feature(struct vfio_device * device,u32 flags,void __user * arg,size_t argsz)1513 int vfio_pci_core_ioctl_feature(struct vfio_device *device, u32 flags,
1514 void __user *arg, size_t argsz)
1515 {
1516 switch (flags & VFIO_DEVICE_FEATURE_MASK) {
1517 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY:
1518 return vfio_pci_core_pm_entry(device, flags, arg, argsz);
1519 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY_WITH_WAKEUP:
1520 return vfio_pci_core_pm_entry_with_wakeup(device, flags,
1521 arg, argsz);
1522 case VFIO_DEVICE_FEATURE_LOW_POWER_EXIT:
1523 return vfio_pci_core_pm_exit(device, flags, arg, argsz);
1524 case VFIO_DEVICE_FEATURE_PCI_VF_TOKEN:
1525 return vfio_pci_core_feature_token(device, flags, arg, argsz);
1526 default:
1527 return -ENOTTY;
1528 }
1529 }
1530 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl_feature);
1531
vfio_pci_rw(struct vfio_pci_core_device * vdev,char __user * buf,size_t count,loff_t * ppos,bool iswrite)1532 static ssize_t vfio_pci_rw(struct vfio_pci_core_device *vdev, char __user *buf,
1533 size_t count, loff_t *ppos, bool iswrite)
1534 {
1535 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
1536 int ret;
1537
1538 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1539 return -EINVAL;
1540
1541 ret = pm_runtime_resume_and_get(&vdev->pdev->dev);
1542 if (ret) {
1543 pci_info_ratelimited(vdev->pdev, "runtime resume failed %d\n",
1544 ret);
1545 return -EIO;
1546 }
1547
1548 switch (index) {
1549 case VFIO_PCI_CONFIG_REGION_INDEX:
1550 ret = vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
1551 break;
1552
1553 case VFIO_PCI_ROM_REGION_INDEX:
1554 if (iswrite)
1555 ret = -EINVAL;
1556 else
1557 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, false);
1558 break;
1559
1560 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1561 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
1562 break;
1563
1564 case VFIO_PCI_VGA_REGION_INDEX:
1565 ret = vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
1566 break;
1567
1568 default:
1569 index -= VFIO_PCI_NUM_REGIONS;
1570 ret = vdev->region[index].ops->rw(vdev, buf,
1571 count, ppos, iswrite);
1572 break;
1573 }
1574
1575 pm_runtime_put(&vdev->pdev->dev);
1576 return ret;
1577 }
1578
vfio_pci_core_read(struct vfio_device * core_vdev,char __user * buf,size_t count,loff_t * ppos)1579 ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf,
1580 size_t count, loff_t *ppos)
1581 {
1582 struct vfio_pci_core_device *vdev =
1583 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1584
1585 if (!count)
1586 return 0;
1587
1588 return vfio_pci_rw(vdev, buf, count, ppos, false);
1589 }
1590 EXPORT_SYMBOL_GPL(vfio_pci_core_read);
1591
vfio_pci_core_write(struct vfio_device * core_vdev,const char __user * buf,size_t count,loff_t * ppos)1592 ssize_t vfio_pci_core_write(struct vfio_device *core_vdev, const char __user *buf,
1593 size_t count, loff_t *ppos)
1594 {
1595 struct vfio_pci_core_device *vdev =
1596 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1597
1598 if (!count)
1599 return 0;
1600
1601 return vfio_pci_rw(vdev, (char __user *)buf, count, ppos, true);
1602 }
1603 EXPORT_SYMBOL_GPL(vfio_pci_core_write);
1604
vfio_pci_zap_bars(struct vfio_pci_core_device * vdev)1605 static void vfio_pci_zap_bars(struct vfio_pci_core_device *vdev)
1606 {
1607 struct vfio_device *core_vdev = &vdev->vdev;
1608 loff_t start = VFIO_PCI_INDEX_TO_OFFSET(VFIO_PCI_BAR0_REGION_INDEX);
1609 loff_t end = VFIO_PCI_INDEX_TO_OFFSET(VFIO_PCI_ROM_REGION_INDEX);
1610 loff_t len = end - start;
1611
1612 unmap_mapping_range(core_vdev->inode->i_mapping, start, len, true);
1613 }
1614
vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device * vdev)1615 void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device *vdev)
1616 {
1617 down_write(&vdev->memory_lock);
1618 vfio_pci_zap_bars(vdev);
1619 }
1620
vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device * vdev)1621 u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device *vdev)
1622 {
1623 u16 cmd;
1624
1625 down_write(&vdev->memory_lock);
1626 pci_read_config_word(vdev->pdev, PCI_COMMAND, &cmd);
1627 if (!(cmd & PCI_COMMAND_MEMORY))
1628 pci_write_config_word(vdev->pdev, PCI_COMMAND,
1629 cmd | PCI_COMMAND_MEMORY);
1630
1631 return cmd;
1632 }
1633
vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device * vdev,u16 cmd)1634 void vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device *vdev, u16 cmd)
1635 {
1636 pci_write_config_word(vdev->pdev, PCI_COMMAND, cmd);
1637 up_write(&vdev->memory_lock);
1638 }
1639
vma_to_pfn(struct vm_area_struct * vma)1640 static unsigned long vma_to_pfn(struct vm_area_struct *vma)
1641 {
1642 struct vfio_pci_core_device *vdev = vma->vm_private_data;
1643 int index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1644 u64 pgoff;
1645
1646 pgoff = vma->vm_pgoff &
1647 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1648
1649 return (pci_resource_start(vdev->pdev, index) >> PAGE_SHIFT) + pgoff;
1650 }
1651
vfio_pci_mmap_huge_fault(struct vm_fault * vmf,unsigned int order)1652 static vm_fault_t vfio_pci_mmap_huge_fault(struct vm_fault *vmf,
1653 unsigned int order)
1654 {
1655 struct vm_area_struct *vma = vmf->vma;
1656 struct vfio_pci_core_device *vdev = vma->vm_private_data;
1657 unsigned long pfn, pgoff = vmf->pgoff - vma->vm_pgoff;
1658 vm_fault_t ret = VM_FAULT_SIGBUS;
1659
1660 pfn = vma_to_pfn(vma) + pgoff;
1661
1662 if (order && (pfn & ((1 << order) - 1) ||
1663 vmf->address & ((PAGE_SIZE << order) - 1) ||
1664 vmf->address + (PAGE_SIZE << order) > vma->vm_end)) {
1665 ret = VM_FAULT_FALLBACK;
1666 goto out;
1667 }
1668
1669 down_read(&vdev->memory_lock);
1670
1671 if (vdev->pm_runtime_engaged || !__vfio_pci_memory_enabled(vdev))
1672 goto out_unlock;
1673
1674 switch (order) {
1675 case 0:
1676 ret = vmf_insert_pfn(vma, vmf->address, pfn);
1677 break;
1678 #ifdef CONFIG_ARCH_SUPPORTS_PMD_PFNMAP
1679 case PMD_ORDER:
1680 ret = vmf_insert_pfn_pmd(vmf,
1681 __pfn_to_pfn_t(pfn, PFN_DEV), false);
1682 break;
1683 #endif
1684 #ifdef CONFIG_ARCH_SUPPORTS_PUD_PFNMAP
1685 case PUD_ORDER:
1686 ret = vmf_insert_pfn_pud(vmf,
1687 __pfn_to_pfn_t(pfn, PFN_DEV), false);
1688 break;
1689 #endif
1690 default:
1691 ret = VM_FAULT_FALLBACK;
1692 }
1693
1694 out_unlock:
1695 up_read(&vdev->memory_lock);
1696 out:
1697 dev_dbg_ratelimited(&vdev->pdev->dev,
1698 "%s(,order = %d) BAR %ld page offset 0x%lx: 0x%x\n",
1699 __func__, order,
1700 vma->vm_pgoff >>
1701 (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT),
1702 pgoff, (unsigned int)ret);
1703
1704 return ret;
1705 }
1706
vfio_pci_mmap_page_fault(struct vm_fault * vmf)1707 static vm_fault_t vfio_pci_mmap_page_fault(struct vm_fault *vmf)
1708 {
1709 return vfio_pci_mmap_huge_fault(vmf, 0);
1710 }
1711
1712 static const struct vm_operations_struct vfio_pci_mmap_ops = {
1713 .fault = vfio_pci_mmap_page_fault,
1714 #ifdef CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP
1715 .huge_fault = vfio_pci_mmap_huge_fault,
1716 #endif
1717 };
1718
vfio_pci_core_mmap(struct vfio_device * core_vdev,struct vm_area_struct * vma)1719 int vfio_pci_core_mmap(struct vfio_device *core_vdev, struct vm_area_struct *vma)
1720 {
1721 struct vfio_pci_core_device *vdev =
1722 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1723 struct pci_dev *pdev = vdev->pdev;
1724 unsigned int index;
1725 u64 phys_len, req_len, pgoff, req_start;
1726 int ret;
1727
1728 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1729
1730 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1731 return -EINVAL;
1732 if (vma->vm_end < vma->vm_start)
1733 return -EINVAL;
1734 if ((vma->vm_flags & VM_SHARED) == 0)
1735 return -EINVAL;
1736 if (index >= VFIO_PCI_NUM_REGIONS) {
1737 int regnum = index - VFIO_PCI_NUM_REGIONS;
1738 struct vfio_pci_region *region = vdev->region + regnum;
1739
1740 if (region->ops && region->ops->mmap &&
1741 (region->flags & VFIO_REGION_INFO_FLAG_MMAP))
1742 return region->ops->mmap(vdev, region, vma);
1743 return -EINVAL;
1744 }
1745 if (index >= VFIO_PCI_ROM_REGION_INDEX)
1746 return -EINVAL;
1747 if (!vdev->bar_mmap_supported[index])
1748 return -EINVAL;
1749
1750 phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
1751 req_len = vma->vm_end - vma->vm_start;
1752 pgoff = vma->vm_pgoff &
1753 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1754 req_start = pgoff << PAGE_SHIFT;
1755
1756 if (req_start + req_len > phys_len)
1757 return -EINVAL;
1758
1759 /*
1760 * Even though we don't make use of the barmap for the mmap,
1761 * we need to request the region and the barmap tracks that.
1762 */
1763 if (!vdev->barmap[index]) {
1764 ret = pci_request_selected_regions(pdev,
1765 1 << index, "vfio-pci");
1766 if (ret)
1767 return ret;
1768
1769 vdev->barmap[index] = pci_iomap(pdev, index, 0);
1770 if (!vdev->barmap[index]) {
1771 pci_release_selected_regions(pdev, 1 << index);
1772 return -ENOMEM;
1773 }
1774 }
1775
1776 vma->vm_private_data = vdev;
1777 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1778 vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
1779
1780 /*
1781 * Set vm_flags now, they should not be changed in the fault handler.
1782 * We want the same flags and page protection (decrypted above) as
1783 * io_remap_pfn_range() would set.
1784 *
1785 * VM_ALLOW_ANY_UNCACHED: The VMA flag is implemented for ARM64,
1786 * allowing KVM stage 2 device mapping attributes to use Normal-NC
1787 * rather than DEVICE_nGnRE, which allows guest mappings
1788 * supporting write-combining attributes (WC). ARM does not
1789 * architecturally guarantee this is safe, and indeed some MMIO
1790 * regions like the GICv2 VCPU interface can trigger uncontained
1791 * faults if Normal-NC is used.
1792 *
1793 * To safely use VFIO in KVM the platform must guarantee full
1794 * safety in the guest where no action taken against a MMIO
1795 * mapping can trigger an uncontained failure. The assumption is
1796 * that most VFIO PCI platforms support this for both mapping types,
1797 * at least in common flows, based on some expectations of how
1798 * PCI IP is integrated. Hence VM_ALLOW_ANY_UNCACHED is set in
1799 * the VMA flags.
1800 */
1801 vm_flags_set(vma, VM_ALLOW_ANY_UNCACHED | VM_IO | VM_PFNMAP |
1802 VM_DONTEXPAND | VM_DONTDUMP);
1803 vma->vm_ops = &vfio_pci_mmap_ops;
1804
1805 return 0;
1806 }
1807 EXPORT_SYMBOL_GPL(vfio_pci_core_mmap);
1808
vfio_pci_core_request(struct vfio_device * core_vdev,unsigned int count)1809 void vfio_pci_core_request(struct vfio_device *core_vdev, unsigned int count)
1810 {
1811 struct vfio_pci_core_device *vdev =
1812 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1813 struct pci_dev *pdev = vdev->pdev;
1814
1815 mutex_lock(&vdev->igate);
1816
1817 if (vdev->req_trigger) {
1818 if (!(count % 10))
1819 pci_notice_ratelimited(pdev,
1820 "Relaying device request to user (#%u)\n",
1821 count);
1822 eventfd_signal(vdev->req_trigger);
1823 } else if (count == 0) {
1824 pci_warn(pdev,
1825 "No device request channel registered, blocked until released by user\n");
1826 }
1827
1828 mutex_unlock(&vdev->igate);
1829 }
1830 EXPORT_SYMBOL_GPL(vfio_pci_core_request);
1831
vfio_pci_validate_vf_token(struct vfio_pci_core_device * vdev,bool vf_token,uuid_t * uuid)1832 static int vfio_pci_validate_vf_token(struct vfio_pci_core_device *vdev,
1833 bool vf_token, uuid_t *uuid)
1834 {
1835 /*
1836 * There's always some degree of trust or collaboration between SR-IOV
1837 * PF and VFs, even if just that the PF hosts the SR-IOV capability and
1838 * can disrupt VFs with a reset, but often the PF has more explicit
1839 * access to deny service to the VF or access data passed through the
1840 * VF. We therefore require an opt-in via a shared VF token (UUID) to
1841 * represent this trust. This both prevents that a VF driver might
1842 * assume the PF driver is a trusted, in-kernel driver, and also that
1843 * a PF driver might be replaced with a rogue driver, unknown to in-use
1844 * VF drivers.
1845 *
1846 * Therefore when presented with a VF, if the PF is a vfio device and
1847 * it is bound to the vfio-pci driver, the user needs to provide a VF
1848 * token to access the device, in the form of appending a vf_token to
1849 * the device name, for example:
1850 *
1851 * "0000:04:10.0 vf_token=bd8d9d2b-5a5f-4f5a-a211-f591514ba1f3"
1852 *
1853 * When presented with a PF which has VFs in use, the user must also
1854 * provide the current VF token to prove collaboration with existing
1855 * VF users. If VFs are not in use, the VF token provided for the PF
1856 * device will act to set the VF token.
1857 *
1858 * If the VF token is provided but unused, an error is generated.
1859 */
1860 if (vdev->pdev->is_virtfn) {
1861 struct vfio_pci_core_device *pf_vdev = vdev->sriov_pf_core_dev;
1862 bool match;
1863
1864 if (!pf_vdev) {
1865 if (!vf_token)
1866 return 0; /* PF is not vfio-pci, no VF token */
1867
1868 pci_info_ratelimited(vdev->pdev,
1869 "VF token incorrectly provided, PF not bound to vfio-pci\n");
1870 return -EINVAL;
1871 }
1872
1873 if (!vf_token) {
1874 pci_info_ratelimited(vdev->pdev,
1875 "VF token required to access device\n");
1876 return -EACCES;
1877 }
1878
1879 mutex_lock(&pf_vdev->vf_token->lock);
1880 match = uuid_equal(uuid, &pf_vdev->vf_token->uuid);
1881 mutex_unlock(&pf_vdev->vf_token->lock);
1882
1883 if (!match) {
1884 pci_info_ratelimited(vdev->pdev,
1885 "Incorrect VF token provided for device\n");
1886 return -EACCES;
1887 }
1888 } else if (vdev->vf_token) {
1889 mutex_lock(&vdev->vf_token->lock);
1890 if (vdev->vf_token->users) {
1891 if (!vf_token) {
1892 mutex_unlock(&vdev->vf_token->lock);
1893 pci_info_ratelimited(vdev->pdev,
1894 "VF token required to access device\n");
1895 return -EACCES;
1896 }
1897
1898 if (!uuid_equal(uuid, &vdev->vf_token->uuid)) {
1899 mutex_unlock(&vdev->vf_token->lock);
1900 pci_info_ratelimited(vdev->pdev,
1901 "Incorrect VF token provided for device\n");
1902 return -EACCES;
1903 }
1904 } else if (vf_token) {
1905 uuid_copy(&vdev->vf_token->uuid, uuid);
1906 }
1907
1908 mutex_unlock(&vdev->vf_token->lock);
1909 } else if (vf_token) {
1910 pci_info_ratelimited(vdev->pdev,
1911 "VF token incorrectly provided, not a PF or VF\n");
1912 return -EINVAL;
1913 }
1914
1915 return 0;
1916 }
1917
1918 #define VF_TOKEN_ARG "vf_token="
1919
vfio_pci_core_match(struct vfio_device * core_vdev,char * buf)1920 int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf)
1921 {
1922 struct vfio_pci_core_device *vdev =
1923 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1924 bool vf_token = false;
1925 uuid_t uuid;
1926 int ret;
1927
1928 if (strncmp(pci_name(vdev->pdev), buf, strlen(pci_name(vdev->pdev))))
1929 return 0; /* No match */
1930
1931 if (strlen(buf) > strlen(pci_name(vdev->pdev))) {
1932 buf += strlen(pci_name(vdev->pdev));
1933
1934 if (*buf != ' ')
1935 return 0; /* No match: non-whitespace after name */
1936
1937 while (*buf) {
1938 if (*buf == ' ') {
1939 buf++;
1940 continue;
1941 }
1942
1943 if (!vf_token && !strncmp(buf, VF_TOKEN_ARG,
1944 strlen(VF_TOKEN_ARG))) {
1945 buf += strlen(VF_TOKEN_ARG);
1946
1947 if (strlen(buf) < UUID_STRING_LEN)
1948 return -EINVAL;
1949
1950 ret = uuid_parse(buf, &uuid);
1951 if (ret)
1952 return ret;
1953
1954 vf_token = true;
1955 buf += UUID_STRING_LEN;
1956 } else {
1957 /* Unknown/duplicate option */
1958 return -EINVAL;
1959 }
1960 }
1961 }
1962
1963 ret = vfio_pci_validate_vf_token(vdev, vf_token, &uuid);
1964 if (ret)
1965 return ret;
1966
1967 return 1; /* Match */
1968 }
1969 EXPORT_SYMBOL_GPL(vfio_pci_core_match);
1970
vfio_pci_bus_notifier(struct notifier_block * nb,unsigned long action,void * data)1971 static int vfio_pci_bus_notifier(struct notifier_block *nb,
1972 unsigned long action, void *data)
1973 {
1974 struct vfio_pci_core_device *vdev = container_of(nb,
1975 struct vfio_pci_core_device, nb);
1976 struct device *dev = data;
1977 struct pci_dev *pdev = to_pci_dev(dev);
1978 struct pci_dev *physfn = pci_physfn(pdev);
1979
1980 if (action == BUS_NOTIFY_ADD_DEVICE &&
1981 pdev->is_virtfn && physfn == vdev->pdev) {
1982 pci_info(vdev->pdev, "Captured SR-IOV VF %s driver_override\n",
1983 pci_name(pdev));
1984 pdev->driver_override = kasprintf(GFP_KERNEL, "%s",
1985 vdev->vdev.ops->name);
1986 WARN_ON(!pdev->driver_override);
1987 } else if (action == BUS_NOTIFY_BOUND_DRIVER &&
1988 pdev->is_virtfn && physfn == vdev->pdev) {
1989 struct pci_driver *drv = pci_dev_driver(pdev);
1990
1991 if (drv && drv != pci_dev_driver(vdev->pdev))
1992 pci_warn(vdev->pdev,
1993 "VF %s bound to driver %s while PF bound to driver %s\n",
1994 pci_name(pdev), drv->name,
1995 pci_dev_driver(vdev->pdev)->name);
1996 }
1997
1998 return 0;
1999 }
2000
vfio_pci_vf_init(struct vfio_pci_core_device * vdev)2001 static int vfio_pci_vf_init(struct vfio_pci_core_device *vdev)
2002 {
2003 struct pci_dev *pdev = vdev->pdev;
2004 struct vfio_pci_core_device *cur;
2005 struct pci_dev *physfn;
2006 int ret;
2007
2008 if (pdev->is_virtfn) {
2009 /*
2010 * If this VF was created by our vfio_pci_core_sriov_configure()
2011 * then we can find the PF vfio_pci_core_device now, and due to
2012 * the locking in pci_disable_sriov() it cannot change until
2013 * this VF device driver is removed.
2014 */
2015 physfn = pci_physfn(vdev->pdev);
2016 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2017 list_for_each_entry(cur, &vfio_pci_sriov_pfs, sriov_pfs_item) {
2018 if (cur->pdev == physfn) {
2019 vdev->sriov_pf_core_dev = cur;
2020 break;
2021 }
2022 }
2023 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2024 return 0;
2025 }
2026
2027 /* Not a SRIOV PF */
2028 if (!pdev->is_physfn)
2029 return 0;
2030
2031 vdev->vf_token = kzalloc(sizeof(*vdev->vf_token), GFP_KERNEL);
2032 if (!vdev->vf_token)
2033 return -ENOMEM;
2034
2035 mutex_init(&vdev->vf_token->lock);
2036 uuid_gen(&vdev->vf_token->uuid);
2037
2038 vdev->nb.notifier_call = vfio_pci_bus_notifier;
2039 ret = bus_register_notifier(&pci_bus_type, &vdev->nb);
2040 if (ret) {
2041 kfree(vdev->vf_token);
2042 return ret;
2043 }
2044 return 0;
2045 }
2046
vfio_pci_vf_uninit(struct vfio_pci_core_device * vdev)2047 static void vfio_pci_vf_uninit(struct vfio_pci_core_device *vdev)
2048 {
2049 if (!vdev->vf_token)
2050 return;
2051
2052 bus_unregister_notifier(&pci_bus_type, &vdev->nb);
2053 WARN_ON(vdev->vf_token->users);
2054 mutex_destroy(&vdev->vf_token->lock);
2055 kfree(vdev->vf_token);
2056 }
2057
vfio_pci_vga_init(struct vfio_pci_core_device * vdev)2058 static int vfio_pci_vga_init(struct vfio_pci_core_device *vdev)
2059 {
2060 struct pci_dev *pdev = vdev->pdev;
2061 int ret;
2062
2063 if (!vfio_pci_is_vga(pdev))
2064 return 0;
2065
2066 ret = aperture_remove_conflicting_pci_devices(pdev, vdev->vdev.ops->name);
2067 if (ret)
2068 return ret;
2069
2070 ret = vga_client_register(pdev, vfio_pci_set_decode);
2071 if (ret)
2072 return ret;
2073 vga_set_legacy_decoding(pdev, vfio_pci_set_decode(pdev, false));
2074 return 0;
2075 }
2076
vfio_pci_vga_uninit(struct vfio_pci_core_device * vdev)2077 static void vfio_pci_vga_uninit(struct vfio_pci_core_device *vdev)
2078 {
2079 struct pci_dev *pdev = vdev->pdev;
2080
2081 if (!vfio_pci_is_vga(pdev))
2082 return;
2083 vga_client_unregister(pdev);
2084 vga_set_legacy_decoding(pdev, VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
2085 VGA_RSRC_LEGACY_IO |
2086 VGA_RSRC_LEGACY_MEM);
2087 }
2088
vfio_pci_core_init_dev(struct vfio_device * core_vdev)2089 int vfio_pci_core_init_dev(struct vfio_device *core_vdev)
2090 {
2091 struct vfio_pci_core_device *vdev =
2092 container_of(core_vdev, struct vfio_pci_core_device, vdev);
2093
2094 vdev->pdev = to_pci_dev(core_vdev->dev);
2095 vdev->irq_type = VFIO_PCI_NUM_IRQS;
2096 mutex_init(&vdev->igate);
2097 spin_lock_init(&vdev->irqlock);
2098 mutex_init(&vdev->ioeventfds_lock);
2099 INIT_LIST_HEAD(&vdev->dummy_resources_list);
2100 INIT_LIST_HEAD(&vdev->ioeventfds_list);
2101 INIT_LIST_HEAD(&vdev->sriov_pfs_item);
2102 init_rwsem(&vdev->memory_lock);
2103 xa_init(&vdev->ctx);
2104
2105 return 0;
2106 }
2107 EXPORT_SYMBOL_GPL(vfio_pci_core_init_dev);
2108
vfio_pci_core_release_dev(struct vfio_device * core_vdev)2109 void vfio_pci_core_release_dev(struct vfio_device *core_vdev)
2110 {
2111 struct vfio_pci_core_device *vdev =
2112 container_of(core_vdev, struct vfio_pci_core_device, vdev);
2113
2114 mutex_destroy(&vdev->igate);
2115 mutex_destroy(&vdev->ioeventfds_lock);
2116 kfree(vdev->region);
2117 kfree(vdev->pm_save);
2118 }
2119 EXPORT_SYMBOL_GPL(vfio_pci_core_release_dev);
2120
vfio_pci_core_register_device(struct vfio_pci_core_device * vdev)2121 int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev)
2122 {
2123 struct pci_dev *pdev = vdev->pdev;
2124 struct device *dev = &pdev->dev;
2125 int ret;
2126
2127 /* Drivers must set the vfio_pci_core_device to their drvdata */
2128 if (WARN_ON(vdev != dev_get_drvdata(dev)))
2129 return -EINVAL;
2130
2131 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
2132 return -EINVAL;
2133
2134 if (vdev->vdev.mig_ops) {
2135 if (!(vdev->vdev.mig_ops->migration_get_state &&
2136 vdev->vdev.mig_ops->migration_set_state &&
2137 vdev->vdev.mig_ops->migration_get_data_size) ||
2138 !(vdev->vdev.migration_flags & VFIO_MIGRATION_STOP_COPY))
2139 return -EINVAL;
2140 }
2141
2142 if (vdev->vdev.log_ops && !(vdev->vdev.log_ops->log_start &&
2143 vdev->vdev.log_ops->log_stop &&
2144 vdev->vdev.log_ops->log_read_and_clear))
2145 return -EINVAL;
2146
2147 /*
2148 * Prevent binding to PFs with VFs enabled, the VFs might be in use
2149 * by the host or other users. We cannot capture the VFs if they
2150 * already exist, nor can we track VF users. Disabling SR-IOV here
2151 * would initiate removing the VFs, which would unbind the driver,
2152 * which is prone to blocking if that VF is also in use by vfio-pci.
2153 * Just reject these PFs and let the user sort it out.
2154 */
2155 if (pci_num_vf(pdev)) {
2156 pci_warn(pdev, "Cannot bind to PF with SR-IOV enabled\n");
2157 return -EBUSY;
2158 }
2159
2160 if (pci_is_root_bus(pdev->bus)) {
2161 ret = vfio_assign_device_set(&vdev->vdev, vdev);
2162 } else if (!pci_probe_reset_slot(pdev->slot)) {
2163 ret = vfio_assign_device_set(&vdev->vdev, pdev->slot);
2164 } else {
2165 /*
2166 * If there is no slot reset support for this device, the whole
2167 * bus needs to be grouped together to support bus-wide resets.
2168 */
2169 ret = vfio_assign_device_set(&vdev->vdev, pdev->bus);
2170 }
2171
2172 if (ret)
2173 return ret;
2174 ret = vfio_pci_vf_init(vdev);
2175 if (ret)
2176 return ret;
2177 ret = vfio_pci_vga_init(vdev);
2178 if (ret)
2179 goto out_vf;
2180
2181 vfio_pci_probe_power_state(vdev);
2182
2183 /*
2184 * pci-core sets the device power state to an unknown value at
2185 * bootup and after being removed from a driver. The only
2186 * transition it allows from this unknown state is to D0, which
2187 * typically happens when a driver calls pci_enable_device().
2188 * We're not ready to enable the device yet, but we do want to
2189 * be able to get to D3. Therefore first do a D0 transition
2190 * before enabling runtime PM.
2191 */
2192 vfio_pci_set_power_state(vdev, PCI_D0);
2193
2194 dev->driver->pm = &vfio_pci_core_pm_ops;
2195 pm_runtime_allow(dev);
2196 if (!disable_idle_d3)
2197 pm_runtime_put(dev);
2198
2199 ret = vfio_register_group_dev(&vdev->vdev);
2200 if (ret)
2201 goto out_power;
2202 return 0;
2203
2204 out_power:
2205 if (!disable_idle_d3)
2206 pm_runtime_get_noresume(dev);
2207
2208 pm_runtime_forbid(dev);
2209 out_vf:
2210 vfio_pci_vf_uninit(vdev);
2211 return ret;
2212 }
2213 EXPORT_SYMBOL_GPL(vfio_pci_core_register_device);
2214
vfio_pci_core_unregister_device(struct vfio_pci_core_device * vdev)2215 void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev)
2216 {
2217 vfio_pci_core_sriov_configure(vdev, 0);
2218
2219 vfio_unregister_group_dev(&vdev->vdev);
2220
2221 vfio_pci_vf_uninit(vdev);
2222 vfio_pci_vga_uninit(vdev);
2223
2224 if (!disable_idle_d3)
2225 pm_runtime_get_noresume(&vdev->pdev->dev);
2226
2227 pm_runtime_forbid(&vdev->pdev->dev);
2228 }
2229 EXPORT_SYMBOL_GPL(vfio_pci_core_unregister_device);
2230
vfio_pci_core_aer_err_detected(struct pci_dev * pdev,pci_channel_state_t state)2231 pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev,
2232 pci_channel_state_t state)
2233 {
2234 struct vfio_pci_core_device *vdev = dev_get_drvdata(&pdev->dev);
2235
2236 mutex_lock(&vdev->igate);
2237
2238 if (vdev->err_trigger)
2239 eventfd_signal(vdev->err_trigger);
2240
2241 mutex_unlock(&vdev->igate);
2242
2243 return PCI_ERS_RESULT_CAN_RECOVER;
2244 }
2245 EXPORT_SYMBOL_GPL(vfio_pci_core_aer_err_detected);
2246
vfio_pci_core_sriov_configure(struct vfio_pci_core_device * vdev,int nr_virtfn)2247 int vfio_pci_core_sriov_configure(struct vfio_pci_core_device *vdev,
2248 int nr_virtfn)
2249 {
2250 struct pci_dev *pdev = vdev->pdev;
2251 int ret = 0;
2252
2253 device_lock_assert(&pdev->dev);
2254
2255 if (nr_virtfn) {
2256 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2257 /*
2258 * The thread that adds the vdev to the list is the only thread
2259 * that gets to call pci_enable_sriov() and we will only allow
2260 * it to be called once without going through
2261 * pci_disable_sriov()
2262 */
2263 if (!list_empty(&vdev->sriov_pfs_item)) {
2264 ret = -EINVAL;
2265 goto out_unlock;
2266 }
2267 list_add_tail(&vdev->sriov_pfs_item, &vfio_pci_sriov_pfs);
2268 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2269
2270 /*
2271 * The PF power state should always be higher than the VF power
2272 * state. The PF can be in low power state either with runtime
2273 * power management (when there is no user) or PCI_PM_CTRL
2274 * register write by the user. If PF is in the low power state,
2275 * then change the power state to D0 first before enabling
2276 * SR-IOV. Also, this function can be called at any time, and
2277 * userspace PCI_PM_CTRL write can race against this code path,
2278 * so protect the same with 'memory_lock'.
2279 */
2280 ret = pm_runtime_resume_and_get(&pdev->dev);
2281 if (ret)
2282 goto out_del;
2283
2284 down_write(&vdev->memory_lock);
2285 vfio_pci_set_power_state(vdev, PCI_D0);
2286 ret = pci_enable_sriov(pdev, nr_virtfn);
2287 up_write(&vdev->memory_lock);
2288 if (ret) {
2289 pm_runtime_put(&pdev->dev);
2290 goto out_del;
2291 }
2292 return nr_virtfn;
2293 }
2294
2295 if (pci_num_vf(pdev)) {
2296 pci_disable_sriov(pdev);
2297 pm_runtime_put(&pdev->dev);
2298 }
2299
2300 out_del:
2301 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2302 list_del_init(&vdev->sriov_pfs_item);
2303 out_unlock:
2304 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2305 return ret;
2306 }
2307 EXPORT_SYMBOL_GPL(vfio_pci_core_sriov_configure);
2308
2309 const struct pci_error_handlers vfio_pci_core_err_handlers = {
2310 .error_detected = vfio_pci_core_aer_err_detected,
2311 };
2312 EXPORT_SYMBOL_GPL(vfio_pci_core_err_handlers);
2313
vfio_dev_in_groups(struct vfio_device * vdev,struct vfio_pci_group_info * groups)2314 static bool vfio_dev_in_groups(struct vfio_device *vdev,
2315 struct vfio_pci_group_info *groups)
2316 {
2317 unsigned int i;
2318
2319 if (!groups)
2320 return false;
2321
2322 for (i = 0; i < groups->count; i++)
2323 if (vfio_file_has_dev(groups->files[i], vdev))
2324 return true;
2325 return false;
2326 }
2327
vfio_pci_is_device_in_set(struct pci_dev * pdev,void * data)2328 static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data)
2329 {
2330 struct vfio_device_set *dev_set = data;
2331
2332 return vfio_find_device_in_devset(dev_set, &pdev->dev) ? 0 : -ENODEV;
2333 }
2334
2335 /*
2336 * vfio-core considers a group to be viable and will create a vfio_device even
2337 * if some devices are bound to drivers like pci-stub or pcieport. Here we
2338 * require all PCI devices to be inside our dev_set since that ensures they stay
2339 * put and that every driver controlling the device can co-ordinate with the
2340 * device reset.
2341 *
2342 * Returns the pci_dev to pass to pci_reset_bus() if every PCI device to be
2343 * reset is inside the dev_set, and pci_reset_bus() can succeed. NULL otherwise.
2344 */
2345 static struct pci_dev *
vfio_pci_dev_set_resettable(struct vfio_device_set * dev_set)2346 vfio_pci_dev_set_resettable(struct vfio_device_set *dev_set)
2347 {
2348 struct pci_dev *pdev;
2349
2350 lockdep_assert_held(&dev_set->lock);
2351
2352 /*
2353 * By definition all PCI devices in the dev_set share the same PCI
2354 * reset, so any pci_dev will have the same outcomes for
2355 * pci_probe_reset_*() and pci_reset_bus().
2356 */
2357 pdev = list_first_entry(&dev_set->device_list,
2358 struct vfio_pci_core_device,
2359 vdev.dev_set_list)->pdev;
2360
2361 /* pci_reset_bus() is supported */
2362 if (pci_probe_reset_slot(pdev->slot) && pci_probe_reset_bus(pdev->bus))
2363 return NULL;
2364
2365 if (vfio_pci_for_each_slot_or_bus(pdev, vfio_pci_is_device_in_set,
2366 dev_set,
2367 !pci_probe_reset_slot(pdev->slot)))
2368 return NULL;
2369 return pdev;
2370 }
2371
vfio_pci_dev_set_pm_runtime_get(struct vfio_device_set * dev_set)2372 static int vfio_pci_dev_set_pm_runtime_get(struct vfio_device_set *dev_set)
2373 {
2374 struct vfio_pci_core_device *cur;
2375 int ret;
2376
2377 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) {
2378 ret = pm_runtime_resume_and_get(&cur->pdev->dev);
2379 if (ret)
2380 goto unwind;
2381 }
2382
2383 return 0;
2384
2385 unwind:
2386 list_for_each_entry_continue_reverse(cur, &dev_set->device_list,
2387 vdev.dev_set_list)
2388 pm_runtime_put(&cur->pdev->dev);
2389
2390 return ret;
2391 }
2392
vfio_pci_dev_set_hot_reset(struct vfio_device_set * dev_set,struct vfio_pci_group_info * groups,struct iommufd_ctx * iommufd_ctx)2393 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
2394 struct vfio_pci_group_info *groups,
2395 struct iommufd_ctx *iommufd_ctx)
2396 {
2397 struct vfio_pci_core_device *vdev;
2398 struct pci_dev *pdev;
2399 int ret;
2400
2401 mutex_lock(&dev_set->lock);
2402
2403 pdev = vfio_pci_dev_set_resettable(dev_set);
2404 if (!pdev) {
2405 ret = -EINVAL;
2406 goto err_unlock;
2407 }
2408
2409 /*
2410 * Some of the devices in the dev_set can be in the runtime suspended
2411 * state. Increment the usage count for all the devices in the dev_set
2412 * before reset and decrement the same after reset.
2413 */
2414 ret = vfio_pci_dev_set_pm_runtime_get(dev_set);
2415 if (ret)
2416 goto err_unlock;
2417
2418 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list) {
2419 bool owned;
2420
2421 /*
2422 * Test whether all the affected devices can be reset by the
2423 * user.
2424 *
2425 * If called from a group opened device and the user provides
2426 * a set of groups, all the devices in the dev_set should be
2427 * contained by the set of groups provided by the user.
2428 *
2429 * If called from a cdev opened device and the user provides
2430 * a zero-length array, all the devices in the dev_set must
2431 * be bound to the same iommufd_ctx as the input iommufd_ctx.
2432 * If there is any device that has not been bound to any
2433 * iommufd_ctx yet, check if its iommu_group has any device
2434 * bound to the input iommufd_ctx. Such devices can be
2435 * considered owned by the input iommufd_ctx as the device
2436 * cannot be owned by another iommufd_ctx when its iommu_group
2437 * is owned.
2438 *
2439 * Otherwise, reset is not allowed.
2440 */
2441 if (iommufd_ctx) {
2442 int devid = vfio_iommufd_get_dev_id(&vdev->vdev,
2443 iommufd_ctx);
2444
2445 owned = (devid > 0 || devid == -ENOENT);
2446 } else {
2447 owned = vfio_dev_in_groups(&vdev->vdev, groups);
2448 }
2449
2450 if (!owned) {
2451 ret = -EINVAL;
2452 break;
2453 }
2454
2455 /*
2456 * Take the memory write lock for each device and zap BAR
2457 * mappings to prevent the user accessing the device while in
2458 * reset. Locking multiple devices is prone to deadlock,
2459 * runaway and unwind if we hit contention.
2460 */
2461 if (!down_write_trylock(&vdev->memory_lock)) {
2462 ret = -EBUSY;
2463 break;
2464 }
2465
2466 vfio_pci_zap_bars(vdev);
2467 }
2468
2469 if (!list_entry_is_head(vdev,
2470 &dev_set->device_list, vdev.dev_set_list)) {
2471 vdev = list_prev_entry(vdev, vdev.dev_set_list);
2472 goto err_undo;
2473 }
2474
2475 /*
2476 * The pci_reset_bus() will reset all the devices in the bus.
2477 * The power state can be non-D0 for some of the devices in the bus.
2478 * For these devices, the pci_reset_bus() will internally set
2479 * the power state to D0 without vfio driver involvement.
2480 * For the devices which have NoSoftRst-, the reset function can
2481 * cause the PCI config space reset without restoring the original
2482 * state (saved locally in 'vdev->pm_save').
2483 */
2484 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list)
2485 vfio_pci_set_power_state(vdev, PCI_D0);
2486
2487 ret = pci_reset_bus(pdev);
2488
2489 vdev = list_last_entry(&dev_set->device_list,
2490 struct vfio_pci_core_device, vdev.dev_set_list);
2491
2492 err_undo:
2493 list_for_each_entry_from_reverse(vdev, &dev_set->device_list,
2494 vdev.dev_set_list)
2495 up_write(&vdev->memory_lock);
2496
2497 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list)
2498 pm_runtime_put(&vdev->pdev->dev);
2499
2500 err_unlock:
2501 mutex_unlock(&dev_set->lock);
2502 return ret;
2503 }
2504
vfio_pci_dev_set_needs_reset(struct vfio_device_set * dev_set)2505 static bool vfio_pci_dev_set_needs_reset(struct vfio_device_set *dev_set)
2506 {
2507 struct vfio_pci_core_device *cur;
2508 bool needs_reset = false;
2509
2510 /* No other VFIO device in the set can be open. */
2511 if (vfio_device_set_open_count(dev_set) > 1)
2512 return false;
2513
2514 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list)
2515 needs_reset |= cur->needs_reset;
2516 return needs_reset;
2517 }
2518
2519 /*
2520 * If a bus or slot reset is available for the provided dev_set and:
2521 * - All of the devices affected by that bus or slot reset are unused
2522 * - At least one of the affected devices is marked dirty via
2523 * needs_reset (such as by lack of FLR support)
2524 * Then attempt to perform that bus or slot reset.
2525 */
vfio_pci_dev_set_try_reset(struct vfio_device_set * dev_set)2526 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set)
2527 {
2528 struct vfio_pci_core_device *cur;
2529 struct pci_dev *pdev;
2530 bool reset_done = false;
2531
2532 if (!vfio_pci_dev_set_needs_reset(dev_set))
2533 return;
2534
2535 pdev = vfio_pci_dev_set_resettable(dev_set);
2536 if (!pdev)
2537 return;
2538
2539 /*
2540 * Some of the devices in the bus can be in the runtime suspended
2541 * state. Increment the usage count for all the devices in the dev_set
2542 * before reset and decrement the same after reset.
2543 */
2544 if (!disable_idle_d3 && vfio_pci_dev_set_pm_runtime_get(dev_set))
2545 return;
2546
2547 if (!pci_reset_bus(pdev))
2548 reset_done = true;
2549
2550 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) {
2551 if (reset_done)
2552 cur->needs_reset = false;
2553
2554 if (!disable_idle_d3)
2555 pm_runtime_put(&cur->pdev->dev);
2556 }
2557 }
2558
vfio_pci_core_set_params(bool is_nointxmask,bool is_disable_vga,bool is_disable_idle_d3)2559 void vfio_pci_core_set_params(bool is_nointxmask, bool is_disable_vga,
2560 bool is_disable_idle_d3)
2561 {
2562 nointxmask = is_nointxmask;
2563 disable_vga = is_disable_vga;
2564 disable_idle_d3 = is_disable_idle_d3;
2565 }
2566 EXPORT_SYMBOL_GPL(vfio_pci_core_set_params);
2567
vfio_pci_core_cleanup(void)2568 static void vfio_pci_core_cleanup(void)
2569 {
2570 vfio_pci_uninit_perm_bits();
2571 }
2572
vfio_pci_core_init(void)2573 static int __init vfio_pci_core_init(void)
2574 {
2575 /* Allocate shared config space permission data used by all devices */
2576 return vfio_pci_init_perm_bits();
2577 }
2578
2579 module_init(vfio_pci_core_init);
2580 module_exit(vfio_pci_core_cleanup);
2581
2582 MODULE_LICENSE("GPL v2");
2583 MODULE_AUTHOR(DRIVER_AUTHOR);
2584 MODULE_DESCRIPTION(DRIVER_DESC);
2585