1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2023 Intel Corporation 4 */ 5 6 #include "intel_de.h" 7 #include "intel_display_regs.h" 8 #include "intel_display_types.h" 9 #include "intel_dpt.h" 10 #include "intel_parent.h" 11 #include "skl_universal_plane_regs.h" 12 13 void intel_dpt_configure(struct intel_crtc *crtc) 14 { 15 struct intel_display *display = to_intel_display(crtc); 16 17 if (DISPLAY_VER(display) == 14) { 18 enum pipe pipe = crtc->pipe; 19 enum plane_id plane_id; 20 21 for_each_plane_id_on_crtc(crtc, plane_id) { 22 if (plane_id == PLANE_CURSOR) 23 continue; 24 25 intel_de_rmw(display, PLANE_CHICKEN(pipe, plane_id), 26 PLANE_CHICKEN_DISABLE_DPT, 27 display->params.enable_dpt ? 0 : 28 PLANE_CHICKEN_DISABLE_DPT); 29 } 30 } else if (DISPLAY_VER(display) == 13) { 31 intel_de_rmw(display, CHICKEN_MISC_2, 32 CHICKEN_MISC_DISABLE_DPT, 33 display->params.enable_dpt ? 0 : 34 CHICKEN_MISC_DISABLE_DPT); 35 } 36 } 37 38 /** 39 * intel_dpt_suspend - suspend the memory mapping for all DPT FBs during system suspend 40 * @display: display device instance 41 * 42 * Suspend the memory mapping during system suspend for all framebuffers which 43 * are mapped to HW via a GGTT->DPT page table. 44 * 45 * This function must be called before the mappings in GGTT are suspended calling 46 * i915_ggtt_suspend(). 47 */ 48 void intel_dpt_suspend(struct intel_display *display) 49 { 50 struct drm_framebuffer *drm_fb; 51 52 if (!HAS_DISPLAY(display)) 53 return; 54 55 mutex_lock(&display->drm->mode_config.fb_lock); 56 57 drm_for_each_fb(drm_fb, display->drm) { 58 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 59 60 if (fb->dpt) 61 intel_parent_dpt_suspend(display, fb->dpt); 62 } 63 64 mutex_unlock(&display->drm->mode_config.fb_lock); 65 } 66 67 /** 68 * intel_dpt_resume - restore the memory mapping for all DPT FBs during system resume 69 * @display: display device instance 70 * 71 * Restore the memory mapping during system resume for all framebuffers which 72 * are mapped to HW via a GGTT->DPT page table. The content of these page 73 * tables are not stored in the hibernation image during S4 and S3RST->S4 74 * transitions, so here we reprogram the PTE entries in those tables. 75 * 76 * This function must be called after the mappings in GGTT have been restored calling 77 * i915_ggtt_resume(). 78 */ 79 void intel_dpt_resume(struct intel_display *display) 80 { 81 struct drm_framebuffer *drm_fb; 82 83 if (!HAS_DISPLAY(display)) 84 return; 85 86 mutex_lock(&display->drm->mode_config.fb_lock); 87 drm_for_each_fb(drm_fb, display->drm) { 88 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 89 90 if (fb->dpt) 91 intel_parent_dpt_resume(display, fb->dpt); 92 } 93 mutex_unlock(&display->drm->mode_config.fb_lock); 94 } 95