1 // SPDX-License-Identifier: GPL-2.0+ 2 3 /* 4 * Copyright 2020,2022 NXP 5 */ 6 7 #include <linux/firmware/imx/svc/misc.h> 8 #include <linux/media-bus-format.h> 9 #include <linux/module.h> 10 #include <linux/of.h> 11 #include <linux/of_graph.h> 12 #include <linux/platform_device.h> 13 14 #include <drm/drm_atomic_state_helper.h> 15 #include <drm/drm_bridge.h> 16 #include <drm/drm_print.h> 17 18 #include <dt-bindings/firmware/imx/rsrc.h> 19 20 #define DRIVER_NAME "imx8qxp-display-pixel-link" 21 #define PL_MAX_MST_ADDR 3 22 #define PL_MAX_NEXT_BRIDGES 2 23 24 struct imx8qxp_pixel_link { 25 struct drm_bridge bridge; 26 struct drm_bridge *next_bridge; 27 struct device *dev; 28 struct imx_sc_ipc *ipc_handle; 29 u8 stream_id; 30 u8 dc_id; 31 u32 sink_rsc; 32 u32 mst_addr; 33 u8 mst_addr_ctrl; 34 u8 mst_en_ctrl; 35 u8 mst_vld_ctrl; 36 u8 sync_ctrl; 37 }; 38 39 static void imx8qxp_pixel_link_enable_mst_en(struct imx8qxp_pixel_link *pl) 40 { 41 int ret; 42 43 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, 44 pl->mst_en_ctrl, true); 45 if (ret) 46 DRM_DEV_ERROR(pl->dev, 47 "failed to enable DC%u stream%u pixel link mst_en: %d\n", 48 pl->dc_id, pl->stream_id, ret); 49 } 50 51 static void imx8qxp_pixel_link_enable_mst_vld(struct imx8qxp_pixel_link *pl) 52 { 53 int ret; 54 55 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, 56 pl->mst_vld_ctrl, true); 57 if (ret) 58 DRM_DEV_ERROR(pl->dev, 59 "failed to enable DC%u stream%u pixel link mst_vld: %d\n", 60 pl->dc_id, pl->stream_id, ret); 61 } 62 63 static void imx8qxp_pixel_link_enable_sync(struct imx8qxp_pixel_link *pl) 64 { 65 int ret; 66 67 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, 68 pl->sync_ctrl, true); 69 if (ret) 70 DRM_DEV_ERROR(pl->dev, 71 "failed to enable DC%u stream%u pixel link sync: %d\n", 72 pl->dc_id, pl->stream_id, ret); 73 } 74 75 static int imx8qxp_pixel_link_disable_mst_en(struct imx8qxp_pixel_link *pl) 76 { 77 int ret; 78 79 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, 80 pl->mst_en_ctrl, false); 81 if (ret) 82 DRM_DEV_ERROR(pl->dev, 83 "failed to disable DC%u stream%u pixel link mst_en: %d\n", 84 pl->dc_id, pl->stream_id, ret); 85 86 return ret; 87 } 88 89 static int imx8qxp_pixel_link_disable_mst_vld(struct imx8qxp_pixel_link *pl) 90 { 91 int ret; 92 93 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, 94 pl->mst_vld_ctrl, false); 95 if (ret) 96 DRM_DEV_ERROR(pl->dev, 97 "failed to disable DC%u stream%u pixel link mst_vld: %d\n", 98 pl->dc_id, pl->stream_id, ret); 99 100 return ret; 101 } 102 103 static int imx8qxp_pixel_link_disable_sync(struct imx8qxp_pixel_link *pl) 104 { 105 int ret; 106 107 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, 108 pl->sync_ctrl, false); 109 if (ret) 110 DRM_DEV_ERROR(pl->dev, 111 "failed to disable DC%u stream%u pixel link sync: %d\n", 112 pl->dc_id, pl->stream_id, ret); 113 114 return ret; 115 } 116 117 static void imx8qxp_pixel_link_set_mst_addr(struct imx8qxp_pixel_link *pl) 118 { 119 int ret; 120 121 ret = imx_sc_misc_set_control(pl->ipc_handle, 122 pl->sink_rsc, pl->mst_addr_ctrl, 123 pl->mst_addr); 124 if (ret) 125 DRM_DEV_ERROR(pl->dev, 126 "failed to set DC%u stream%u pixel link mst addr(%u): %d\n", 127 pl->dc_id, pl->stream_id, pl->mst_addr, ret); 128 } 129 130 static int imx8qxp_pixel_link_bridge_attach(struct drm_bridge *bridge, 131 enum drm_bridge_attach_flags flags) 132 { 133 struct imx8qxp_pixel_link *pl = bridge->driver_private; 134 135 if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) { 136 DRM_DEV_ERROR(pl->dev, 137 "do not support creating a drm_connector\n"); 138 return -EINVAL; 139 } 140 141 return drm_bridge_attach(bridge->encoder, 142 pl->next_bridge, bridge, 143 DRM_BRIDGE_ATTACH_NO_CONNECTOR); 144 } 145 146 static void 147 imx8qxp_pixel_link_bridge_mode_set(struct drm_bridge *bridge, 148 const struct drm_display_mode *mode, 149 const struct drm_display_mode *adjusted_mode) 150 { 151 struct imx8qxp_pixel_link *pl = bridge->driver_private; 152 153 imx8qxp_pixel_link_set_mst_addr(pl); 154 } 155 156 static void imx8qxp_pixel_link_bridge_atomic_enable(struct drm_bridge *bridge, 157 struct drm_atomic_state *state) 158 { 159 struct imx8qxp_pixel_link *pl = bridge->driver_private; 160 161 imx8qxp_pixel_link_enable_mst_en(pl); 162 imx8qxp_pixel_link_enable_mst_vld(pl); 163 imx8qxp_pixel_link_enable_sync(pl); 164 } 165 166 static void imx8qxp_pixel_link_bridge_atomic_disable(struct drm_bridge *bridge, 167 struct drm_atomic_state *state) 168 { 169 struct imx8qxp_pixel_link *pl = bridge->driver_private; 170 171 imx8qxp_pixel_link_disable_mst_en(pl); 172 imx8qxp_pixel_link_disable_mst_vld(pl); 173 imx8qxp_pixel_link_disable_sync(pl); 174 } 175 176 static const u32 imx8qxp_pixel_link_bus_output_fmts[] = { 177 MEDIA_BUS_FMT_RGB888_1X36_CPADLO, 178 MEDIA_BUS_FMT_RGB666_1X36_CPADLO, 179 }; 180 181 static bool imx8qxp_pixel_link_bus_output_fmt_supported(u32 fmt) 182 { 183 int i; 184 185 for (i = 0; i < ARRAY_SIZE(imx8qxp_pixel_link_bus_output_fmts); i++) { 186 if (imx8qxp_pixel_link_bus_output_fmts[i] == fmt) 187 return true; 188 } 189 190 return false; 191 } 192 193 static u32 * 194 imx8qxp_pixel_link_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge, 195 struct drm_bridge_state *bridge_state, 196 struct drm_crtc_state *crtc_state, 197 struct drm_connector_state *conn_state, 198 u32 output_fmt, 199 unsigned int *num_input_fmts) 200 { 201 u32 *input_fmts; 202 203 if (!imx8qxp_pixel_link_bus_output_fmt_supported(output_fmt)) 204 return NULL; 205 206 *num_input_fmts = 1; 207 208 input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL); 209 if (!input_fmts) 210 return NULL; 211 212 input_fmts[0] = output_fmt; 213 214 return input_fmts; 215 } 216 217 static u32 * 218 imx8qxp_pixel_link_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, 219 struct drm_bridge_state *bridge_state, 220 struct drm_crtc_state *crtc_state, 221 struct drm_connector_state *conn_state, 222 unsigned int *num_output_fmts) 223 { 224 *num_output_fmts = ARRAY_SIZE(imx8qxp_pixel_link_bus_output_fmts); 225 return kmemdup(imx8qxp_pixel_link_bus_output_fmts, 226 sizeof(imx8qxp_pixel_link_bus_output_fmts), GFP_KERNEL); 227 } 228 229 static const struct drm_bridge_funcs imx8qxp_pixel_link_bridge_funcs = { 230 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, 231 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, 232 .atomic_reset = drm_atomic_helper_bridge_reset, 233 .attach = imx8qxp_pixel_link_bridge_attach, 234 .mode_set = imx8qxp_pixel_link_bridge_mode_set, 235 .atomic_enable = imx8qxp_pixel_link_bridge_atomic_enable, 236 .atomic_disable = imx8qxp_pixel_link_bridge_atomic_disable, 237 .atomic_get_input_bus_fmts = 238 imx8qxp_pixel_link_bridge_atomic_get_input_bus_fmts, 239 .atomic_get_output_bus_fmts = 240 imx8qxp_pixel_link_bridge_atomic_get_output_bus_fmts, 241 }; 242 243 static int imx8qxp_pixel_link_disable_all_controls(struct imx8qxp_pixel_link *pl) 244 { 245 int ret; 246 247 ret = imx8qxp_pixel_link_disable_mst_en(pl); 248 if (ret) 249 return ret; 250 251 ret = imx8qxp_pixel_link_disable_mst_vld(pl); 252 if (ret) 253 return ret; 254 255 return imx8qxp_pixel_link_disable_sync(pl); 256 } 257 258 static struct drm_bridge * 259 imx8qxp_pixel_link_find_next_bridge(struct imx8qxp_pixel_link *pl) 260 { 261 struct device_node *np = pl->dev->of_node; 262 struct device_node *port, *remote; 263 struct drm_bridge *next_bridge[PL_MAX_NEXT_BRIDGES]; 264 u32 port_id; 265 bool found_port = false; 266 int reg, ep_cnt = 0; 267 /* select the first next bridge by default */ 268 int bridge_sel = 0; 269 270 for (port_id = 1; port_id <= PL_MAX_MST_ADDR + 1; port_id++) { 271 port = of_graph_get_port_by_id(np, port_id); 272 if (!port) 273 continue; 274 275 if (of_device_is_available(port)) { 276 found_port = true; 277 of_node_put(port); 278 break; 279 } 280 281 of_node_put(port); 282 } 283 284 if (!found_port) { 285 DRM_DEV_ERROR(pl->dev, "no available output port\n"); 286 return ERR_PTR(-ENODEV); 287 } 288 289 for (reg = 0; reg < PL_MAX_NEXT_BRIDGES; reg++) { 290 remote = of_graph_get_remote_node(np, port_id, reg); 291 if (!remote) 292 continue; 293 294 if (!of_device_is_available(remote->parent)) { 295 DRM_DEV_DEBUG(pl->dev, 296 "port%u endpoint%u remote parent is not available\n", 297 port_id, reg); 298 of_node_put(remote); 299 continue; 300 } 301 302 next_bridge[ep_cnt] = of_drm_find_bridge(remote); 303 if (!next_bridge[ep_cnt]) { 304 of_node_put(remote); 305 return ERR_PTR(-EPROBE_DEFER); 306 } 307 308 /* specially select the next bridge with companion PXL2DPI */ 309 if (of_property_present(remote, "fsl,companion-pxl2dpi")) 310 bridge_sel = ep_cnt; 311 312 ep_cnt++; 313 314 of_node_put(remote); 315 } 316 317 pl->mst_addr = port_id - 1; 318 319 return next_bridge[bridge_sel]; 320 } 321 322 static int imx8qxp_pixel_link_bridge_probe(struct platform_device *pdev) 323 { 324 struct imx8qxp_pixel_link *pl; 325 struct device *dev = &pdev->dev; 326 struct device_node *np = dev->of_node; 327 int ret; 328 329 pl = devm_kzalloc(dev, sizeof(*pl), GFP_KERNEL); 330 if (!pl) 331 return -ENOMEM; 332 333 ret = imx_scu_get_handle(&pl->ipc_handle); 334 if (ret) { 335 if (ret != -EPROBE_DEFER) 336 DRM_DEV_ERROR(dev, "failed to get SCU ipc handle: %d\n", 337 ret); 338 return ret; 339 } 340 341 ret = of_property_read_u8(np, "fsl,dc-id", &pl->dc_id); 342 if (ret) { 343 DRM_DEV_ERROR(dev, "failed to get DC index: %d\n", ret); 344 return ret; 345 } 346 347 ret = of_property_read_u8(np, "fsl,dc-stream-id", &pl->stream_id); 348 if (ret) { 349 DRM_DEV_ERROR(dev, "failed to get DC stream index: %d\n", ret); 350 return ret; 351 } 352 353 pl->dev = dev; 354 355 pl->sink_rsc = pl->dc_id ? IMX_SC_R_DC_1 : IMX_SC_R_DC_0; 356 357 if (pl->stream_id == 0) { 358 pl->mst_addr_ctrl = IMX_SC_C_PXL_LINK_MST1_ADDR; 359 pl->mst_en_ctrl = IMX_SC_C_PXL_LINK_MST1_ENB; 360 pl->mst_vld_ctrl = IMX_SC_C_PXL_LINK_MST1_VLD; 361 pl->sync_ctrl = IMX_SC_C_SYNC_CTRL0; 362 } else { 363 pl->mst_addr_ctrl = IMX_SC_C_PXL_LINK_MST2_ADDR; 364 pl->mst_en_ctrl = IMX_SC_C_PXL_LINK_MST2_ENB; 365 pl->mst_vld_ctrl = IMX_SC_C_PXL_LINK_MST2_VLD; 366 pl->sync_ctrl = IMX_SC_C_SYNC_CTRL1; 367 } 368 369 /* disable all controls to POR default */ 370 ret = imx8qxp_pixel_link_disable_all_controls(pl); 371 if (ret) 372 return ret; 373 374 pl->next_bridge = imx8qxp_pixel_link_find_next_bridge(pl); 375 if (IS_ERR(pl->next_bridge)) { 376 ret = PTR_ERR(pl->next_bridge); 377 if (ret != -EPROBE_DEFER) 378 DRM_DEV_ERROR(dev, "failed to find next bridge: %d\n", 379 ret); 380 return ret; 381 } 382 383 platform_set_drvdata(pdev, pl); 384 385 pl->bridge.driver_private = pl; 386 pl->bridge.funcs = &imx8qxp_pixel_link_bridge_funcs; 387 pl->bridge.of_node = np; 388 389 drm_bridge_add(&pl->bridge); 390 391 return ret; 392 } 393 394 static void imx8qxp_pixel_link_bridge_remove(struct platform_device *pdev) 395 { 396 struct imx8qxp_pixel_link *pl = platform_get_drvdata(pdev); 397 398 drm_bridge_remove(&pl->bridge); 399 } 400 401 static const struct of_device_id imx8qxp_pixel_link_dt_ids[] = { 402 { .compatible = "fsl,imx8qm-dc-pixel-link", }, 403 { .compatible = "fsl,imx8qxp-dc-pixel-link", }, 404 { /* sentinel */ } 405 }; 406 MODULE_DEVICE_TABLE(of, imx8qxp_pixel_link_dt_ids); 407 408 static struct platform_driver imx8qxp_pixel_link_bridge_driver = { 409 .probe = imx8qxp_pixel_link_bridge_probe, 410 .remove = imx8qxp_pixel_link_bridge_remove, 411 .driver = { 412 .of_match_table = imx8qxp_pixel_link_dt_ids, 413 .name = DRIVER_NAME, 414 }, 415 }; 416 module_platform_driver(imx8qxp_pixel_link_bridge_driver); 417 418 MODULE_DESCRIPTION("i.MX8QXP/QM display pixel link bridge driver"); 419 MODULE_AUTHOR("Liu Ying <victor.liu@nxp.com>"); 420 MODULE_LICENSE("GPL v2"); 421 MODULE_ALIAS("platform:" DRIVER_NAME); 422