1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2021 Western Digital Corporation or its affiliates.
4 * Copyright (C) 2022 Ventana Micro Systems Inc.
5 */
6
7 #define pr_fmt(fmt) "riscv-imsic: " fmt
8 #include <linux/acpi.h>
9 #include <linux/cpu.h>
10 #include <linux/interrupt.h>
11 #include <linux/io.h>
12 #include <linux/irq.h>
13 #include <linux/irqchip.h>
14 #include <linux/irqchip/chained_irq.h>
15 #include <linux/irqchip/riscv-imsic.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/spinlock.h>
19 #include <linux/smp.h>
20
21 #include "irq-riscv-imsic-state.h"
22
23 static int imsic_parent_irq;
24
25 #ifdef CONFIG_SMP
imsic_ipi_send(unsigned int cpu)26 static void imsic_ipi_send(unsigned int cpu)
27 {
28 struct imsic_local_config *local = per_cpu_ptr(imsic->global.local, cpu);
29
30 writel(IMSIC_IPI_ID, local->msi_va);
31 }
32
imsic_ipi_starting_cpu(void)33 static void imsic_ipi_starting_cpu(void)
34 {
35 /* Enable IPIs for current CPU. */
36 __imsic_id_set_enable(IMSIC_IPI_ID);
37 }
38
imsic_ipi_dying_cpu(void)39 static void imsic_ipi_dying_cpu(void)
40 {
41 /* Disable IPIs for current CPU. */
42 __imsic_id_clear_enable(IMSIC_IPI_ID);
43 }
44
imsic_ipi_domain_init(void)45 static int __init imsic_ipi_domain_init(void)
46 {
47 int virq;
48
49 /* Create IMSIC IPI multiplexing */
50 virq = ipi_mux_create(IMSIC_NR_IPI, imsic_ipi_send);
51 if (virq <= 0)
52 return virq < 0 ? virq : -ENOMEM;
53
54 /* Set vIRQ range */
55 riscv_ipi_set_virq_range(virq, IMSIC_NR_IPI);
56
57 /* Announce that IMSIC is providing IPIs */
58 pr_info("%pfwP: providing IPIs using interrupt %d\n", imsic->fwnode, IMSIC_IPI_ID);
59
60 return 0;
61 }
62 #else
imsic_ipi_starting_cpu(void)63 static void imsic_ipi_starting_cpu(void) { }
imsic_ipi_dying_cpu(void)64 static void imsic_ipi_dying_cpu(void) { }
imsic_ipi_domain_init(void)65 static int __init imsic_ipi_domain_init(void) { return 0; }
66 #endif
67
68 /*
69 * To handle an interrupt, we read the TOPEI CSR and write zero in one
70 * instruction. If TOPEI CSR is non-zero then we translate TOPEI.ID to
71 * Linux interrupt number and let Linux IRQ subsystem handle it.
72 */
imsic_handle_irq(struct irq_desc * desc)73 static void imsic_handle_irq(struct irq_desc *desc)
74 {
75 struct irq_chip *chip = irq_desc_get_chip(desc);
76 int cpu = smp_processor_id();
77 struct imsic_vector *vec;
78 unsigned long local_id;
79
80 /*
81 * Process pending local synchronization instead of waiting
82 * for per-CPU local timer to expire.
83 */
84 imsic_local_sync_all(false);
85
86 chained_irq_enter(chip, desc);
87
88 while ((local_id = csr_swap(CSR_TOPEI, 0))) {
89 local_id >>= TOPEI_ID_SHIFT;
90
91 if (local_id == IMSIC_IPI_ID) {
92 if (IS_ENABLED(CONFIG_SMP))
93 ipi_mux_process();
94 continue;
95 }
96
97 if (unlikely(!imsic->base_domain))
98 continue;
99
100 vec = imsic_vector_from_local_id(cpu, local_id);
101 if (!vec) {
102 pr_warn_ratelimited("vector not found for local ID 0x%lx\n", local_id);
103 continue;
104 }
105
106 generic_handle_irq(vec->irq);
107 }
108
109 chained_irq_exit(chip, desc);
110 }
111
imsic_starting_cpu(unsigned int cpu)112 static int imsic_starting_cpu(unsigned int cpu)
113 {
114 /* Mark per-CPU IMSIC state as online */
115 imsic_state_online();
116
117 /* Enable per-CPU parent interrupt */
118 enable_percpu_irq(imsic_parent_irq, irq_get_trigger_type(imsic_parent_irq));
119
120 /* Setup IPIs */
121 imsic_ipi_starting_cpu();
122
123 /*
124 * Interrupts identities might have been enabled/disabled while
125 * this CPU was not running so sync-up local enable/disable state.
126 */
127 imsic_local_sync_all(true);
128
129 /* Enable local interrupt delivery */
130 imsic_local_delivery(true);
131
132 return 0;
133 }
134
imsic_dying_cpu(unsigned int cpu)135 static int imsic_dying_cpu(unsigned int cpu)
136 {
137 /* Cleanup IPIs */
138 imsic_ipi_dying_cpu();
139
140 /* Mark per-CPU IMSIC state as offline */
141 imsic_state_offline();
142
143 return 0;
144 }
145
imsic_early_probe(struct fwnode_handle * fwnode)146 static int __init imsic_early_probe(struct fwnode_handle *fwnode)
147 {
148 struct irq_domain *domain;
149 int rc;
150
151 /* Find parent domain and register chained handler */
152 domain = irq_find_matching_fwnode(riscv_get_intc_hwnode(), DOMAIN_BUS_ANY);
153 if (!domain) {
154 pr_err("%pfwP: Failed to find INTC domain\n", fwnode);
155 return -ENOENT;
156 }
157 imsic_parent_irq = irq_create_mapping(domain, RV_IRQ_EXT);
158 if (!imsic_parent_irq) {
159 pr_err("%pfwP: Failed to create INTC mapping\n", fwnode);
160 return -ENOENT;
161 }
162
163 /* Initialize IPI domain */
164 rc = imsic_ipi_domain_init();
165 if (rc) {
166 pr_err("%pfwP: Failed to initialize IPI domain\n", fwnode);
167 return rc;
168 }
169
170 /* Setup chained handler to the parent domain interrupt */
171 irq_set_chained_handler(imsic_parent_irq, imsic_handle_irq);
172
173 /*
174 * Setup cpuhp state (must be done after setting imsic_parent_irq)
175 *
176 * Don't disable per-CPU IMSIC file when CPU goes offline
177 * because this affects IPI and the masking/unmasking of
178 * virtual IPIs is done via generic IPI-Mux
179 */
180 cpuhp_setup_state(CPUHP_AP_IRQ_RISCV_IMSIC_STARTING, "irqchip/riscv/imsic:starting",
181 imsic_starting_cpu, imsic_dying_cpu);
182
183 return 0;
184 }
185
imsic_early_dt_init(struct device_node * node,struct device_node * parent)186 static int __init imsic_early_dt_init(struct device_node *node, struct device_node *parent)
187 {
188 struct fwnode_handle *fwnode = &node->fwnode;
189 int rc;
190
191 /* Setup IMSIC state */
192 rc = imsic_setup_state(fwnode, NULL);
193 if (rc) {
194 pr_err("%pfwP: failed to setup state (error %d)\n", fwnode, rc);
195 return rc;
196 }
197
198 /* Do early setup of IPIs */
199 rc = imsic_early_probe(fwnode);
200 if (rc)
201 return rc;
202
203 /* Ensure that OF platform device gets probed */
204 of_node_clear_flag(node, OF_POPULATED);
205 return 0;
206 }
207
208 IRQCHIP_DECLARE(riscv_imsic, "riscv,imsics", imsic_early_dt_init);
209
210 #ifdef CONFIG_ACPI
211
212 static struct fwnode_handle *imsic_acpi_fwnode;
213
imsic_acpi_get_fwnode(struct device * dev)214 struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev)
215 {
216 return imsic_acpi_fwnode;
217 }
218
imsic_early_acpi_init(union acpi_subtable_headers * header,const unsigned long end)219 static int __init imsic_early_acpi_init(union acpi_subtable_headers *header,
220 const unsigned long end)
221 {
222 struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)header;
223 int rc;
224
225 imsic_acpi_fwnode = irq_domain_alloc_named_fwnode("imsic");
226 if (!imsic_acpi_fwnode) {
227 pr_err("unable to allocate IMSIC FW node\n");
228 return -ENOMEM;
229 }
230
231 /* Setup IMSIC state */
232 rc = imsic_setup_state(imsic_acpi_fwnode, imsic);
233 if (rc) {
234 pr_err("%pfwP: failed to setup state (error %d)\n", imsic_acpi_fwnode, rc);
235 return rc;
236 }
237
238 /* Do early setup of IMSIC state and IPIs */
239 rc = imsic_early_probe(imsic_acpi_fwnode);
240 if (rc) {
241 irq_domain_free_fwnode(imsic_acpi_fwnode);
242 imsic_acpi_fwnode = NULL;
243 return rc;
244 }
245
246 rc = imsic_platform_acpi_probe(imsic_acpi_fwnode);
247
248 #ifdef CONFIG_PCI
249 if (!rc)
250 pci_msi_register_fwnode_provider(&imsic_acpi_get_fwnode);
251 #endif
252
253 if (rc)
254 pr_err("%pfwP: failed to register IMSIC for MSI functionality (error %d)\n",
255 imsic_acpi_fwnode, rc);
256
257 /*
258 * Even if imsic_platform_acpi_probe() fails, the IPI part of IMSIC can
259 * continue to work. So, no need to return failure. This is similar to
260 * DT where IPI works but MSI probe fails for some reason.
261 */
262 return 0;
263 }
264
265 IRQCHIP_ACPI_DECLARE(riscv_imsic, ACPI_MADT_TYPE_IMSIC, NULL,
266 1, imsic_early_acpi_init);
267 #endif
268