1 /*-
2 * Copyright 2021 Intel Corp
3 * Copyright 2021 Rubicon Communications, LLC (Netgate)
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include "igc_api.h"
8
9 /**
10 * igc_init_mac_params - Initialize MAC function pointers
11 * @hw: pointer to the HW structure
12 *
13 * This function initializes the function pointers for the MAC
14 * set of functions. Called by drivers or by igc_setup_init_funcs.
15 **/
igc_init_mac_params(struct igc_hw * hw)16 s32 igc_init_mac_params(struct igc_hw *hw)
17 {
18 s32 ret_val = IGC_SUCCESS;
19
20 if (hw->mac.ops.init_params) {
21 ret_val = hw->mac.ops.init_params(hw);
22 if (ret_val) {
23 DEBUGOUT("MAC Initialization Error\n");
24 goto out;
25 }
26 } else {
27 DEBUGOUT("mac.init_mac_params was NULL\n");
28 ret_val = -IGC_ERR_CONFIG;
29 }
30
31 out:
32 return ret_val;
33 }
34
35 /**
36 * igc_init_nvm_params - Initialize NVM function pointers
37 * @hw: pointer to the HW structure
38 *
39 * This function initializes the function pointers for the NVM
40 * set of functions. Called by drivers or by igc_setup_init_funcs.
41 **/
igc_init_nvm_params(struct igc_hw * hw)42 s32 igc_init_nvm_params(struct igc_hw *hw)
43 {
44 s32 ret_val = IGC_SUCCESS;
45
46 if (hw->nvm.ops.init_params) {
47 ret_val = hw->nvm.ops.init_params(hw);
48 if (ret_val) {
49 DEBUGOUT("NVM Initialization Error\n");
50 goto out;
51 }
52 } else {
53 DEBUGOUT("nvm.init_nvm_params was NULL\n");
54 ret_val = -IGC_ERR_CONFIG;
55 }
56
57 out:
58 return ret_val;
59 }
60
61 /**
62 * igc_init_phy_params - Initialize PHY function pointers
63 * @hw: pointer to the HW structure
64 *
65 * This function initializes the function pointers for the PHY
66 * set of functions. Called by drivers or by igc_setup_init_funcs.
67 **/
igc_init_phy_params(struct igc_hw * hw)68 s32 igc_init_phy_params(struct igc_hw *hw)
69 {
70 s32 ret_val = IGC_SUCCESS;
71
72 if (hw->phy.ops.init_params) {
73 ret_val = hw->phy.ops.init_params(hw);
74 if (ret_val) {
75 DEBUGOUT("PHY Initialization Error\n");
76 goto out;
77 }
78 } else {
79 DEBUGOUT("phy.init_phy_params was NULL\n");
80 ret_val = -IGC_ERR_CONFIG;
81 }
82
83 out:
84 return ret_val;
85 }
86
87 /**
88 * igc_set_mac_type - Sets MAC type
89 * @hw: pointer to the HW structure
90 *
91 * This function sets the mac type of the adapter based on the
92 * device ID stored in the hw structure.
93 * MUST BE FIRST FUNCTION CALLED (explicitly or through
94 * igc_setup_init_funcs()).
95 **/
igc_set_mac_type(struct igc_hw * hw)96 s32 igc_set_mac_type(struct igc_hw *hw)
97 {
98 struct igc_mac_info *mac = &hw->mac;
99 s32 ret_val = IGC_SUCCESS;
100
101 DEBUGFUNC("igc_set_mac_type");
102
103 switch (hw->device_id) {
104 case IGC_DEV_ID_I225_LM:
105 case IGC_DEV_ID_I225_V:
106 case IGC_DEV_ID_I225_K:
107 case IGC_DEV_ID_I225_I:
108 case IGC_DEV_ID_I220_V:
109 case IGC_DEV_ID_I225_K2:
110 case IGC_DEV_ID_I225_LMVP:
111 case IGC_DEV_ID_I225_IT:
112 case IGC_DEV_ID_I226_LM:
113 case IGC_DEV_ID_I226_V:
114 case IGC_DEV_ID_I226_IT:
115 case IGC_DEV_ID_I221_V:
116 case IGC_DEV_ID_I226_BLANK_NVM:
117 case IGC_DEV_ID_I225_BLANK_NVM:
118 mac->type = igc_i225;
119 break;
120 default:
121 /* Should never have loaded on this device */
122 ret_val = -IGC_ERR_MAC_INIT;
123 break;
124 }
125
126 return ret_val;
127 }
128
129 /**
130 * igc_setup_init_funcs - Initializes function pointers
131 * @hw: pointer to the HW structure
132 * @init_device: true will initialize the rest of the function pointers
133 * getting the device ready for use. FALSE will only set
134 * MAC type and the function pointers for the other init
135 * functions. Passing FALSE will not generate any hardware
136 * reads or writes.
137 *
138 * This function must be called by a driver in order to use the rest
139 * of the 'shared' code files. Called by drivers only.
140 **/
igc_setup_init_funcs(struct igc_hw * hw,bool init_device)141 s32 igc_setup_init_funcs(struct igc_hw *hw, bool init_device)
142 {
143 s32 ret_val;
144
145 /* Can't do much good without knowing the MAC type. */
146 ret_val = igc_set_mac_type(hw);
147 if (ret_val) {
148 DEBUGOUT("ERROR: MAC type could not be set properly.\n");
149 goto out;
150 }
151
152 if (!hw->hw_addr) {
153 DEBUGOUT("ERROR: Registers not mapped\n");
154 ret_val = -IGC_ERR_CONFIG;
155 goto out;
156 }
157
158 /*
159 * Init function pointers to generic implementations. We do this first
160 * allowing a driver module to override it afterward.
161 */
162 igc_init_mac_ops_generic(hw);
163 igc_init_phy_ops_generic(hw);
164 igc_init_nvm_ops_generic(hw);
165
166 /*
167 * Set up the init function pointers. These are functions within the
168 * adapter family file that sets up function pointers for the rest of
169 * the functions in that family.
170 */
171 switch (hw->mac.type) {
172 case igc_i225:
173 igc_init_function_pointers_i225(hw);
174 break;
175 default:
176 DEBUGOUT("Hardware not supported\n");
177 ret_val = -IGC_ERR_CONFIG;
178 break;
179 }
180
181 /*
182 * Initialize the rest of the function pointers. These require some
183 * register reads/writes in some cases.
184 */
185 if (!(ret_val) && init_device) {
186 ret_val = igc_init_mac_params(hw);
187 if (ret_val)
188 goto out;
189
190 ret_val = igc_init_nvm_params(hw);
191 if (ret_val)
192 goto out;
193
194 ret_val = igc_init_phy_params(hw);
195 if (ret_val)
196 goto out;
197 }
198
199 out:
200 return ret_val;
201 }
202
203 /**
204 * igc_get_bus_info - Obtain bus information for adapter
205 * @hw: pointer to the HW structure
206 *
207 * This will obtain information about the HW bus for which the
208 * adapter is attached and stores it in the hw structure. This is a
209 * function pointer entry point called by drivers.
210 **/
igc_get_bus_info(struct igc_hw * hw)211 s32 igc_get_bus_info(struct igc_hw *hw)
212 {
213 if (hw->mac.ops.get_bus_info)
214 return hw->mac.ops.get_bus_info(hw);
215
216 return IGC_SUCCESS;
217 }
218
219 /**
220 * igc_clear_vfta - Clear VLAN filter table
221 * @hw: pointer to the HW structure
222 *
223 * This clears the VLAN filter table on the adapter. This is a function
224 * pointer entry point called by drivers.
225 **/
igc_clear_vfta(struct igc_hw * hw)226 void igc_clear_vfta(struct igc_hw *hw)
227 {
228 if (hw->mac.ops.clear_vfta)
229 hw->mac.ops.clear_vfta(hw);
230 }
231
232 /**
233 * igc_write_vfta - Write value to VLAN filter table
234 * @hw: pointer to the HW structure
235 * @offset: the 32-bit offset in which to write the value to.
236 * @value: the 32-bit value to write at location offset.
237 *
238 * This writes a 32-bit value to a 32-bit offset in the VLAN filter
239 * table. This is a function pointer entry point called by drivers.
240 **/
igc_write_vfta(struct igc_hw * hw,u32 offset,u32 value)241 void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value)
242 {
243 if (hw->mac.ops.write_vfta)
244 hw->mac.ops.write_vfta(hw, offset, value);
245 }
246
247 /**
248 * igc_update_mc_addr_list - Update Multicast addresses
249 * @hw: pointer to the HW structure
250 * @mc_addr_list: array of multicast addresses to program
251 * @mc_addr_count: number of multicast addresses to program
252 *
253 * Updates the Multicast Table Array.
254 * The caller must have a packed mc_addr_list of multicast addresses.
255 **/
igc_update_mc_addr_list(struct igc_hw * hw,u8 * mc_addr_list,u32 mc_addr_count)256 void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list,
257 u32 mc_addr_count)
258 {
259 if (hw->mac.ops.update_mc_addr_list)
260 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list,
261 mc_addr_count);
262 }
263
264 /**
265 * igc_force_mac_fc - Force MAC flow control
266 * @hw: pointer to the HW structure
267 *
268 * Force the MAC's flow control settings. Currently no func pointer exists
269 * and all implementations are handled in the generic version of this
270 * function.
271 **/
igc_force_mac_fc(struct igc_hw * hw)272 s32 igc_force_mac_fc(struct igc_hw *hw)
273 {
274 return igc_force_mac_fc_generic(hw);
275 }
276
277 /**
278 * igc_check_for_link - Check/Store link connection
279 * @hw: pointer to the HW structure
280 *
281 * This checks the link condition of the adapter and stores the
282 * results in the hw->mac structure. This is a function pointer entry
283 * point called by drivers.
284 **/
igc_check_for_link(struct igc_hw * hw)285 s32 igc_check_for_link(struct igc_hw *hw)
286 {
287 if (hw->mac.ops.check_for_link)
288 return hw->mac.ops.check_for_link(hw);
289
290 return -IGC_ERR_CONFIG;
291 }
292
293 /**
294 * igc_reset_hw - Reset hardware
295 * @hw: pointer to the HW structure
296 *
297 * This resets the hardware into a known state. This is a function pointer
298 * entry point called by drivers.
299 **/
igc_reset_hw(struct igc_hw * hw)300 s32 igc_reset_hw(struct igc_hw *hw)
301 {
302 if (hw->mac.ops.reset_hw)
303 return hw->mac.ops.reset_hw(hw);
304
305 return -IGC_ERR_CONFIG;
306 }
307
308 /**
309 * igc_init_hw - Initialize hardware
310 * @hw: pointer to the HW structure
311 *
312 * This inits the hardware readying it for operation. This is a function
313 * pointer entry point called by drivers.
314 **/
igc_init_hw(struct igc_hw * hw)315 s32 igc_init_hw(struct igc_hw *hw)
316 {
317 if (hw->mac.ops.init_hw)
318 return hw->mac.ops.init_hw(hw);
319
320 return -IGC_ERR_CONFIG;
321 }
322
323 /**
324 * igc_setup_link - Configures link and flow control
325 * @hw: pointer to the HW structure
326 *
327 * This configures link and flow control settings for the adapter. This
328 * is a function pointer entry point called by drivers. While modules can
329 * also call this, they probably call their own version of this function.
330 **/
igc_setup_link(struct igc_hw * hw)331 s32 igc_setup_link(struct igc_hw *hw)
332 {
333 if (hw->mac.ops.setup_link)
334 return hw->mac.ops.setup_link(hw);
335
336 return -IGC_ERR_CONFIG;
337 }
338
339 /**
340 * igc_get_speed_and_duplex - Returns current speed and duplex
341 * @hw: pointer to the HW structure
342 * @speed: pointer to a 16-bit value to store the speed
343 * @duplex: pointer to a 16-bit value to store the duplex.
344 *
345 * This returns the speed and duplex of the adapter in the two 'out'
346 * variables passed in. This is a function pointer entry point called
347 * by drivers.
348 **/
igc_get_speed_and_duplex(struct igc_hw * hw,u16 * speed,u16 * duplex)349 s32 igc_get_speed_and_duplex(struct igc_hw *hw, u16 *speed, u16 *duplex)
350 {
351 if (hw->mac.ops.get_link_up_info)
352 return hw->mac.ops.get_link_up_info(hw, speed, duplex);
353
354 return -IGC_ERR_CONFIG;
355 }
356
357 /**
358 * igc_disable_pcie_master - Disable PCI-Express master access
359 * @hw: pointer to the HW structure
360 *
361 * Disables PCI-Express master access and verifies there are no pending
362 * requests. Currently no func pointer exists and all implementations are
363 * handled in the generic version of this function.
364 **/
igc_disable_pcie_master(struct igc_hw * hw)365 s32 igc_disable_pcie_master(struct igc_hw *hw)
366 {
367 return igc_disable_pcie_master_generic(hw);
368 }
369
370 /**
371 * igc_config_collision_dist - Configure collision distance
372 * @hw: pointer to the HW structure
373 *
374 * Configures the collision distance to the default value and is used
375 * during link setup.
376 **/
igc_config_collision_dist(struct igc_hw * hw)377 void igc_config_collision_dist(struct igc_hw *hw)
378 {
379 if (hw->mac.ops.config_collision_dist)
380 hw->mac.ops.config_collision_dist(hw);
381 }
382
383 /**
384 * igc_rar_set - Sets a receive address register
385 * @hw: pointer to the HW structure
386 * @addr: address to set the RAR to
387 * @index: the RAR to set
388 *
389 * Sets a Receive Address Register (RAR) to the specified address.
390 **/
igc_rar_set(struct igc_hw * hw,u8 * addr,u32 index)391 int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index)
392 {
393 if (hw->mac.ops.rar_set)
394 return hw->mac.ops.rar_set(hw, addr, index);
395
396 return IGC_SUCCESS;
397 }
398
399 /**
400 * igc_validate_mdi_setting - Ensures valid MDI/MDIX SW state
401 * @hw: pointer to the HW structure
402 *
403 * Ensures that the MDI/MDIX SW state is valid.
404 **/
igc_validate_mdi_setting(struct igc_hw * hw)405 s32 igc_validate_mdi_setting(struct igc_hw *hw)
406 {
407 if (hw->mac.ops.validate_mdi_setting)
408 return hw->mac.ops.validate_mdi_setting(hw);
409
410 return IGC_SUCCESS;
411 }
412
413 /**
414 * igc_hash_mc_addr - Determines address location in multicast table
415 * @hw: pointer to the HW structure
416 * @mc_addr: Multicast address to hash.
417 *
418 * This hashes an address to determine its location in the multicast
419 * table. Currently no func pointer exists and all implementations
420 * are handled in the generic version of this function.
421 **/
igc_hash_mc_addr(struct igc_hw * hw,u8 * mc_addr)422 u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr)
423 {
424 return igc_hash_mc_addr_generic(hw, mc_addr);
425 }
426
427 /**
428 * igc_check_reset_block - Verifies PHY can be reset
429 * @hw: pointer to the HW structure
430 *
431 * Checks if the PHY is in a state that can be reset or if manageability
432 * has it tied up. This is a function pointer entry point called by drivers.
433 **/
igc_check_reset_block(struct igc_hw * hw)434 s32 igc_check_reset_block(struct igc_hw *hw)
435 {
436 if (hw->phy.ops.check_reset_block)
437 return hw->phy.ops.check_reset_block(hw);
438
439 return IGC_SUCCESS;
440 }
441
442 /**
443 * igc_read_phy_reg - Reads PHY register
444 * @hw: pointer to the HW structure
445 * @offset: the register to read
446 * @data: the buffer to store the 16-bit read.
447 *
448 * Reads the PHY register and returns the value in data.
449 * This is a function pointer entry point called by drivers.
450 **/
igc_read_phy_reg(struct igc_hw * hw,u32 offset,u16 * data)451 s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data)
452 {
453 if (hw->phy.ops.read_reg)
454 return hw->phy.ops.read_reg(hw, offset, data);
455
456 return IGC_SUCCESS;
457 }
458
459 /**
460 * igc_write_phy_reg - Writes PHY register
461 * @hw: pointer to the HW structure
462 * @offset: the register to write
463 * @data: the value to write.
464 *
465 * Writes the PHY register at offset with the value in data.
466 * This is a function pointer entry point called by drivers.
467 **/
igc_write_phy_reg(struct igc_hw * hw,u32 offset,u16 data)468 s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data)
469 {
470 if (hw->phy.ops.write_reg)
471 return hw->phy.ops.write_reg(hw, offset, data);
472
473 return IGC_SUCCESS;
474 }
475
476 /**
477 * igc_release_phy - Generic release PHY
478 * @hw: pointer to the HW structure
479 *
480 * Return if silicon family does not require a semaphore when accessing the
481 * PHY.
482 **/
igc_release_phy(struct igc_hw * hw)483 void igc_release_phy(struct igc_hw *hw)
484 {
485 if (hw->phy.ops.release)
486 hw->phy.ops.release(hw);
487 }
488
489 /**
490 * igc_acquire_phy - Generic acquire PHY
491 * @hw: pointer to the HW structure
492 *
493 * Return success if silicon family does not require a semaphore when
494 * accessing the PHY.
495 **/
igc_acquire_phy(struct igc_hw * hw)496 s32 igc_acquire_phy(struct igc_hw *hw)
497 {
498 if (hw->phy.ops.acquire)
499 return hw->phy.ops.acquire(hw);
500
501 return IGC_SUCCESS;
502 }
503
504 /**
505 * igc_get_phy_info - Retrieves PHY information from registers
506 * @hw: pointer to the HW structure
507 *
508 * This function gets some information from various PHY registers and
509 * populates hw->phy values with it. This is a function pointer entry
510 * point called by drivers.
511 **/
igc_get_phy_info(struct igc_hw * hw)512 s32 igc_get_phy_info(struct igc_hw *hw)
513 {
514 if (hw->phy.ops.get_info)
515 return hw->phy.ops.get_info(hw);
516
517 return IGC_SUCCESS;
518 }
519
520 /**
521 * igc_phy_hw_reset - Hard PHY reset
522 * @hw: pointer to the HW structure
523 *
524 * Performs a hard PHY reset. This is a function pointer entry point called
525 * by drivers.
526 **/
igc_phy_hw_reset(struct igc_hw * hw)527 s32 igc_phy_hw_reset(struct igc_hw *hw)
528 {
529 if (hw->phy.ops.reset)
530 return hw->phy.ops.reset(hw);
531
532 return IGC_SUCCESS;
533 }
534
535 /**
536 * igc_set_d0_lplu_state - Sets low power link up state for D0
537 * @hw: pointer to the HW structure
538 * @active: boolean used to enable/disable lplu
539 *
540 * Success returns 0, Failure returns 1
541 *
542 * The low power link up (lplu) state is set to the power management level D0
543 * and SmartSpeed is disabled when active is true, else clear lplu for D0
544 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
545 * is used during Dx states where the power conservation is most important.
546 * During driver activity, SmartSpeed should be enabled so performance is
547 * maintained. This is a function pointer entry point called by drivers.
548 **/
igc_set_d0_lplu_state(struct igc_hw * hw,bool active)549 s32 igc_set_d0_lplu_state(struct igc_hw *hw, bool active)
550 {
551 if (hw->phy.ops.set_d0_lplu_state)
552 return hw->phy.ops.set_d0_lplu_state(hw, active);
553
554 return IGC_SUCCESS;
555 }
556
557 /**
558 * igc_set_d3_lplu_state - Sets low power link up state for D3
559 * @hw: pointer to the HW structure
560 * @active: boolean used to enable/disable lplu
561 *
562 * Success returns 0, Failure returns 1
563 *
564 * The low power link up (lplu) state is set to the power management level D3
565 * and SmartSpeed is disabled when active is true, else clear lplu for D3
566 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
567 * is used during Dx states where the power conservation is most important.
568 * During driver activity, SmartSpeed should be enabled so performance is
569 * maintained. This is a function pointer entry point called by drivers.
570 **/
igc_set_d3_lplu_state(struct igc_hw * hw,bool active)571 s32 igc_set_d3_lplu_state(struct igc_hw *hw, bool active)
572 {
573 if (hw->phy.ops.set_d3_lplu_state)
574 return hw->phy.ops.set_d3_lplu_state(hw, active);
575
576 return IGC_SUCCESS;
577 }
578
579 /**
580 * igc_read_mac_addr - Reads MAC address
581 * @hw: pointer to the HW structure
582 *
583 * Reads the MAC address out of the adapter and stores it in the HW structure.
584 * Currently no func pointer exists and all implementations are handled in the
585 * generic version of this function.
586 **/
igc_read_mac_addr(struct igc_hw * hw)587 s32 igc_read_mac_addr(struct igc_hw *hw)
588 {
589 if (hw->mac.ops.read_mac_addr)
590 return hw->mac.ops.read_mac_addr(hw);
591
592 return igc_read_mac_addr_generic(hw);
593 }
594
595 /**
596 * igc_read_pba_string - Read device part number string
597 * @hw: pointer to the HW structure
598 * @pba_num: pointer to device part number
599 * @pba_num_size: size of part number buffer
600 *
601 * Reads the product board assembly (PBA) number from the EEPROM and stores
602 * the value in pba_num.
603 * Currently no func pointer exists and all implementations are handled in the
604 * generic version of this function.
605 **/
igc_read_pba_string(struct igc_hw * hw,u8 * pba_num,u32 pba_num_size)606 s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size)
607 {
608 return igc_read_pba_string_generic(hw, pba_num, pba_num_size);
609 }
610
611 /**
612 * igc_validate_nvm_checksum - Verifies NVM (EEPROM) checksum
613 * @hw: pointer to the HW structure
614 *
615 * Validates the NVM checksum is correct. This is a function pointer entry
616 * point called by drivers.
617 **/
igc_validate_nvm_checksum(struct igc_hw * hw)618 s32 igc_validate_nvm_checksum(struct igc_hw *hw)
619 {
620 if (hw->nvm.ops.validate)
621 return hw->nvm.ops.validate(hw);
622
623 return -IGC_ERR_CONFIG;
624 }
625
626 /**
627 * igc_update_nvm_checksum - Updates NVM (EEPROM) checksum
628 * @hw: pointer to the HW structure
629 *
630 * Updates the NVM checksum. Currently no func pointer exists and all
631 * implementations are handled in the generic version of this function.
632 **/
igc_update_nvm_checksum(struct igc_hw * hw)633 s32 igc_update_nvm_checksum(struct igc_hw *hw)
634 {
635 if (hw->nvm.ops.update)
636 return hw->nvm.ops.update(hw);
637
638 return -IGC_ERR_CONFIG;
639 }
640
641 /**
642 * igc_reload_nvm - Reloads EEPROM
643 * @hw: pointer to the HW structure
644 *
645 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
646 * extended control register.
647 **/
igc_reload_nvm(struct igc_hw * hw)648 void igc_reload_nvm(struct igc_hw *hw)
649 {
650 if (hw->nvm.ops.reload)
651 hw->nvm.ops.reload(hw);
652 }
653
654 /**
655 * igc_read_nvm - Reads NVM (EEPROM)
656 * @hw: pointer to the HW structure
657 * @offset: the word offset to read
658 * @words: number of 16-bit words to read
659 * @data: pointer to the properly sized buffer for the data.
660 *
661 * Reads 16-bit chunks of data from the NVM (EEPROM). This is a function
662 * pointer entry point called by drivers.
663 **/
igc_read_nvm(struct igc_hw * hw,u16 offset,u16 words,u16 * data)664 s32 igc_read_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
665 {
666 if (hw->nvm.ops.read)
667 return hw->nvm.ops.read(hw, offset, words, data);
668
669 return -IGC_ERR_CONFIG;
670 }
671
672 /**
673 * igc_write_nvm - Writes to NVM (EEPROM)
674 * @hw: pointer to the HW structure
675 * @offset: the word offset to read
676 * @words: number of 16-bit words to write
677 * @data: pointer to the properly sized buffer for the data.
678 *
679 * Writes 16-bit chunks of data to the NVM (EEPROM). This is a function
680 * pointer entry point called by drivers.
681 **/
igc_write_nvm(struct igc_hw * hw,u16 offset,u16 words,u16 * data)682 s32 igc_write_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
683 {
684 if (hw->nvm.ops.write)
685 return hw->nvm.ops.write(hw, offset, words, data);
686
687 return IGC_SUCCESS;
688 }
689
690 /**
691 * igc_power_up_phy - Restores link in case of PHY power down
692 * @hw: pointer to the HW structure
693 *
694 * The phy may be powered down to save power, to turn off link when the
695 * driver is unloaded, or wake on lan is not enabled (among others).
696 **/
igc_power_up_phy(struct igc_hw * hw)697 void igc_power_up_phy(struct igc_hw *hw)
698 {
699 if (hw->phy.ops.power_up)
700 hw->phy.ops.power_up(hw);
701
702 igc_setup_link(hw);
703 }
704
705 /**
706 * igc_power_down_phy - Power down PHY
707 * @hw: pointer to the HW structure
708 *
709 * The phy may be powered down to save power, to turn off link when the
710 * driver is unloaded, or wake on lan is not enabled (among others).
711 **/
igc_power_down_phy(struct igc_hw * hw)712 void igc_power_down_phy(struct igc_hw *hw)
713 {
714 if (hw->phy.ops.power_down)
715 hw->phy.ops.power_down(hw);
716 }
717
718