1 /* 2 * Copyright 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef _DMUB_DC_SRV_H_ 27 #define _DMUB_DC_SRV_H_ 28 29 #include "dm_services_types.h" 30 #include "dmub/dmub_srv.h" 31 32 struct dmub_srv; 33 struct dc; 34 struct pipe_ctx; 35 struct dc_crtc_timing_adjust; 36 struct dc_crtc_timing; 37 struct dc_state; 38 struct dc_surface_update; 39 40 struct dc_reg_helper_state { 41 bool gather_in_progress; 42 uint32_t same_addr_count; 43 bool should_burst_write; 44 union dmub_rb_cmd cmd_data; 45 unsigned int reg_seq_count; 46 }; 47 48 struct dc_dmub_srv { 49 struct dmub_srv *dmub; 50 struct dc_reg_helper_state reg_helper_offload; 51 52 struct dc_context *ctx; 53 void *dm; 54 55 int32_t idle_exit_counter; 56 union dmub_shared_state_ips_driver_signals driver_signals; 57 bool idle_allowed; 58 bool needs_idle_wake; 59 }; 60 61 void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv); 62 63 bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv); 64 65 bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv, 66 unsigned int count, 67 union dmub_rb_cmd *cmd_list); 68 69 bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv, 70 enum dm_dmub_wait_type wait_type, 71 union dmub_rb_cmd *cmd_list); 72 73 bool dc_dmub_srv_cmd_run(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type); 74 75 bool dc_dmub_srv_cmd_run_list(struct dc_dmub_srv *dc_dmub_srv, unsigned int count, union dmub_rb_cmd *cmd_list, enum dm_dmub_wait_type wait_type); 76 77 bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv, 78 unsigned int stream_mask); 79 80 bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv); 81 82 bool dc_dmub_srv_get_dmub_outbox0_msg(const struct dc *dc, struct dmcub_trace_buf_entry *entry); 83 84 void dc_dmub_trace_event_control(struct dc *dc, bool enable); 85 86 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max); 87 88 void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst); 89 bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool enable_pstate, struct dc_state *context); 90 91 void dc_dmub_srv_query_caps_cmd(struct dc_dmub_srv *dc_dmub_srv); 92 void dc_dmub_srv_get_visual_confirm_color_cmd(struct dc *dc, struct pipe_ctx *pipe_ctx); 93 void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv); 94 void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv); 95 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data); 96 97 bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv, struct dmub_diagnostic_data *dmub_oca); 98 99 void dc_dmub_setup_subvp_dmub_command(struct dc *dc, struct dc_state *context, bool enable); 100 void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv); 101 102 void dc_send_update_cursor_info_to_dmu(struct pipe_ctx *pCtx, uint8_t pipe_idx); 103 bool dc_dmub_check_min_version(struct dmub_srv *srv); 104 105 void dc_dmub_srv_enable_dpia_trace(const struct dc *dc); 106 void dc_dmub_srv_subvp_save_surf_addr(const struct dc_dmub_srv *dc_dmub_srv, const struct dc_plane_address *addr, uint8_t subvp_index); 107 108 bool dc_dmub_srv_is_hw_pwr_up(struct dc_dmub_srv *dc_dmub_srv, bool wait); 109 110 void dc_dmub_srv_apply_idle_power_optimizations(const struct dc *dc, bool allow_idle); 111 112 /** 113 * dc_dmub_srv_set_power_state() - Sets the power state for DMUB service. 114 * 115 * Controls whether messaging the DMCUB or interfacing with it via HW register 116 * interaction is permittable. 117 * 118 * @dc_dmub_srv - The DC DMUB service pointer 119 * @power_state - the DC power state 120 */ 121 void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_cm_power_state power_state); 122 123 /** 124 * dc_dmub_srv_notify_fw_dc_power_state() - Notifies firmware of the DC power state. 125 * 126 * Differs from dc_dmub_srv_set_power_state in that it needs to access HW in order 127 * to message DMCUB of the state transition. Should come after the D0 exit and 128 * before D3 set power state. 129 * 130 * @dc_dmub_srv - The DC DMUB service pointer 131 * @power_state - the DC power state 132 */ 133 void dc_dmub_srv_notify_fw_dc_power_state(struct dc_dmub_srv *dc_dmub_srv, 134 enum dc_acpi_cm_power_state power_state); 135 136 /** 137 * @dc_dmub_srv_should_detect() - Checks if link detection is required. 138 * 139 * While in idle power states we may need driver to manually redetect in 140 * the case of a missing hotplug. Should be called from a polling timer. 141 * 142 * Return: true if redetection is required. 143 */ 144 bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv); 145 146 /** 147 * dc_wake_and_execute_dmub_cmd() - Wrapper for DMUB command execution. 148 * 149 * Refer to dc_wake_and_execute_dmub_cmd_list() for usage and limitations, 150 * This function is a convenience wrapper for a single command execution. 151 * 152 * @ctx: DC context 153 * @cmd: The command to send/receive 154 * @wait_type: The wait behavior for the execution 155 * 156 * Return: true on command submission success, false otherwise 157 */ 158 bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd, 159 enum dm_dmub_wait_type wait_type); 160 161 /** 162 * dc_wake_and_execute_dmub_cmd_list() - Wrapper for DMUB command list execution. 163 * 164 * If the DMCUB hardware was asleep then it wakes the DMUB before 165 * executing the command and attempts to re-enter if the command 166 * submission was successful. 167 * 168 * This should be the preferred command submission interface provided 169 * the DC lock is acquired. 170 * 171 * Entry/exit out of idle power optimizations would need to be 172 * manually performed otherwise through dc_allow_idle_optimizations(). 173 * 174 * @ctx: DC context 175 * @count: Number of commands to send/receive 176 * @cmd: Array of commands to send 177 * @wait_type: The wait behavior for the execution 178 * 179 * Return: true on command submission success, false otherwise 180 */ 181 bool dc_wake_and_execute_dmub_cmd_list(const struct dc_context *ctx, unsigned int count, 182 union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type); 183 184 /** 185 * dc_wake_and_execute_gpint() 186 * 187 * @ctx: DC context 188 * @command_code: The command ID to send to DMCUB 189 * @param: The parameter to message DMCUB 190 * @response: Optional response out value - may be NULL. 191 * @wait_type: The wait behavior for the execution 192 */ 193 bool dc_wake_and_execute_gpint(const struct dc_context *ctx, enum dmub_gpint_command command_code, 194 uint16_t param, uint32_t *response, enum dm_dmub_wait_type wait_type); 195 196 void dc_dmub_srv_fams2_update_config(struct dc *dc, 197 struct dc_state *context, 198 bool enable); 199 void dc_dmub_srv_fams2_drr_update(struct dc *dc, 200 uint32_t tg_inst, 201 uint32_t vtotal_min, 202 uint32_t vtotal_max, 203 uint32_t vtotal_mid, 204 uint32_t vtotal_mid_frame_num, 205 bool program_manual_trigger); 206 void dc_dmub_srv_fams2_passthrough_flip( 207 struct dc *dc, 208 struct dc_state *state, 209 struct dc_stream_state *stream, 210 struct dc_surface_update *srf_updates, 211 int surface_count); 212 213 /** 214 * struct ips_residency_info - struct containing info from dmub_ips_residency_stats 215 * 216 * @ips_mode: The mode of IPS that the follow stats appertain to 217 * @residency_percent: The percentage of time spent in given IPS mode in millipercent 218 * @entry_counter: The number of entries made in to this IPS state 219 * @total_active_time_us: uint32_t array of length 2 representing time in the given IPS mode 220 * in microseconds. Index 0 is lower 32 bits, index 1 is upper 32 bits. 221 * @total_inactive_time_us: uint32_t array of length 2 representing time outside the given IPS mode 222 * in microseconds. Index 0 is lower 32 bits, index 1 is upper 32 bits. 223 * @histogram: Histogram of given IPS state durations - bucket definitions in dmub_ips.c 224 */ 225 struct ips_residency_info { 226 enum dmub_ips_mode ips_mode; 227 unsigned int residency_percent; 228 unsigned int entry_counter; 229 unsigned int total_active_time_us[2]; 230 unsigned int total_inactive_time_us[2]; 231 unsigned int histogram[16]; 232 }; 233 234 /** 235 * bool dc_dmub_srv_ips_residency_cntl() - Controls IPS residency measurement status 236 * 237 * @dc_dmub_srv: The DC DMUB service pointer 238 * @start_measurement: Describes whether to start or stop measurement 239 * 240 * Return: true if GPINT was sent successfully, false otherwise 241 */ 242 bool dc_dmub_srv_ips_residency_cntl(struct dc_dmub_srv *dc_dmub_srv, bool start_measurement); 243 244 /** 245 * bool dc_dmub_srv_ips_query_residency_info() - Queries DMCUB for residency info 246 * 247 * @dc_dmub_srv: The DC DMUB service pointer 248 * @output: Output struct to copy the the residency info to 249 */ 250 void dc_dmub_srv_ips_query_residency_info(struct dc_dmub_srv *dc_dmub_srv, struct ips_residency_info *output); 251 #endif /* _DMUB_DC_SRV_H_ */ 252