1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 /*
29 * Generic IIC eeprom support, modeled after the AT24C family of products.
30 */
31
32 #include "opt_platform.h"
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <sys/resource.h>
41 #include <sys/sx.h>
42 #include <sys/sysctl.h>
43 #include <sys/uio.h>
44 #include <machine/bus.h>
45
46 #ifdef FDT
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49 #endif
50
51 #include <dev/iicbus/iiconf.h>
52 #include <dev/iicbus/iicbus.h>
53
54 #include "iicbus_if.h"
55
56 /*
57 * AT24 parts have a "write page size" that differs per-device, and a "read page
58 * size" that is always equal to the full device size. We define maximum values
59 * here to limit how long we occupy the bus with a single transfer, and because
60 * there are temporary buffers of these sizes allocated on the stack.
61 */
62 #define MAX_RD_SZ 256 /* Largest read size we support */
63 #define MAX_WR_SZ 256 /* Largest write size we support */
64
65 struct icee_softc {
66 device_t dev; /* Myself */
67 struct cdev *cdev; /* user interface */
68 int addr; /* Slave address on the bus */
69 int size; /* How big am I? */
70 int type; /* What address type 8 or 16 bit? */
71 int wr_sz; /* What's the write page size */
72 };
73
74 #ifdef FDT
75 struct eeprom_desc {
76 int type;
77 int size;
78 int wr_sz;
79 const char *name;
80 };
81
82 static struct eeprom_desc type_desc[] = {
83 { 8, 128, 8, "AT24C01"},
84 { 8, 256, 8, "AT24C02"},
85 { 8, 512, 16, "AT24C04"},
86 { 8, 1024, 16, "AT24C08"},
87 { 8, 2 * 1024, 16, "AT24C16"},
88 {16, 4 * 1024, 32, "AT24C32"},
89 {16, 8 * 1024, 32, "AT24C64"},
90 {16, 16 * 1024, 64, "AT24C128"},
91 {16, 32 * 1024, 64, "AT24C256"},
92 {16, 64 * 1024, 128, "AT24C512"},
93 {16, 128 * 1024, 256, "AT24CM01"},
94 };
95
96 static struct ofw_compat_data compat_data[] = {
97 {"atmel,24c01", (uintptr_t)(&type_desc[0])},
98 {"atmel,24c02", (uintptr_t)(&type_desc[1])},
99 {"atmel,24c04", (uintptr_t)(&type_desc[2])},
100 {"atmel,24c08", (uintptr_t)(&type_desc[3])},
101 {"atmel,24c16", (uintptr_t)(&type_desc[4])},
102 {"atmel,24c32", (uintptr_t)(&type_desc[5])},
103 {"atmel,24c64", (uintptr_t)(&type_desc[6])},
104 {"atmel,24c128", (uintptr_t)(&type_desc[7])},
105 {"atmel,24c256", (uintptr_t)(&type_desc[8])},
106 {"atmel,24c512", (uintptr_t)(&type_desc[9])},
107 {"atmel,24c1024", (uintptr_t)(&type_desc[10])},
108 {NULL, (uintptr_t)NULL},
109 };
110 #endif
111
112 #define CDEV2SOFTC(dev) ((dev)->si_drv1)
113
114 /* cdev routines */
115 static d_read_t icee_read;
116 static d_write_t icee_write;
117
118 static struct cdevsw icee_cdevsw =
119 {
120 .d_version = D_VERSION,
121 .d_read = icee_read,
122 .d_write = icee_write
123 };
124
125 static int
icee_probe(device_t dev)126 icee_probe(device_t dev)
127 {
128 #ifdef FDT
129 struct eeprom_desc *d;
130
131 if (!ofw_bus_status_okay(dev))
132 return (ENXIO);
133
134 d = (struct eeprom_desc *)
135 ofw_bus_search_compatible(dev, compat_data)->ocd_data;
136 if (d != NULL) {
137 device_set_desc(dev, d->name);
138 return (BUS_PROBE_DEFAULT);
139 }
140 #endif
141 device_set_desc(dev, "I2C EEPROM");
142 return (BUS_PROBE_NOWILDCARD);
143 }
144
145 static int
icee_init(struct icee_softc * sc)146 icee_init(struct icee_softc *sc)
147 {
148 const char *dname;
149 int dunit;
150 #ifdef FDT
151 struct eeprom_desc *d;
152
153 d = (struct eeprom_desc *)
154 ofw_bus_search_compatible(sc->dev, compat_data)->ocd_data;
155 if (d != NULL) {
156 sc->size = d->size;
157 sc->type = d->type;
158 sc->wr_sz = d->wr_sz;
159 return (0);
160 }
161 #endif
162 dname = device_get_name(sc->dev);
163 dunit = device_get_unit(sc->dev);
164 if (resource_int_value(dname, dunit, "type", &sc->type) != 0)
165 return (ENOENT);
166 if (resource_int_value(dname, dunit, "size", &sc->size) != 0)
167 return (ENOENT);
168 if (resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz) != 0)
169 return (ENOENT);
170 return (0);
171 }
172
173 static int
icee_attach(device_t dev)174 icee_attach(device_t dev)
175 {
176 struct icee_softc *sc = device_get_softc(dev);
177 struct sysctl_ctx_list *ctx;
178 struct sysctl_oid_list *tree;
179
180 sc->dev = dev;
181 sc->addr = iicbus_get_addr(dev);
182 if (icee_init(sc) != 0)
183 return (EINVAL);
184 if (bootverbose)
185 device_printf(dev, "size: %d bytes, addressing: %d-bits\n",
186 sc->size, sc->type);
187 sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT,
188 GID_WHEEL, 0600, "icee%d", device_get_unit(dev));
189 if (sc->cdev == NULL) {
190 return (ENOMEM);
191 }
192 sc->cdev->si_drv1 = sc;
193
194 ctx = device_get_sysctl_ctx(dev);
195 tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
196 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "address_size", CTLFLAG_RD,
197 &sc->type, 0, "Memory array address size in bits");
198 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "device_size", CTLFLAG_RD,
199 &sc->size, 0, "Memory array capacity in bytes");
200 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "write_size", CTLFLAG_RD,
201 &sc->wr_sz, 0, "Memory array page write size in bytes");
202
203 return (0);
204 }
205
206 static int
icee_detach(device_t dev)207 icee_detach(device_t dev)
208 {
209 struct icee_softc *sc = device_get_softc(dev);
210
211 destroy_dev(sc->cdev);
212 return (0);
213 }
214
215 static int
icee_read(struct cdev * dev,struct uio * uio,int ioflag)216 icee_read(struct cdev *dev, struct uio *uio, int ioflag)
217 {
218 struct icee_softc *sc;
219 uint8_t addr[2];
220 uint8_t data[MAX_RD_SZ];
221 int error, i, len, slave;
222 struct iic_msg msgs[2] = {
223 { 0, IIC_M_WR, 1, addr },
224 { 0, IIC_M_RD, 0, data },
225 };
226
227 sc = CDEV2SOFTC(dev);
228 if (uio->uio_offset == sc->size)
229 return (0);
230 if (uio->uio_offset > sc->size)
231 return (EIO);
232 if (sc->type != 8 && sc->type != 16)
233 return (EINVAL);
234 slave = error = 0;
235 while (uio->uio_resid > 0) {
236 if (uio->uio_offset >= sc->size)
237 break;
238 len = MIN(MAX_RD_SZ - (uio->uio_offset & (MAX_RD_SZ - 1)),
239 uio->uio_resid);
240 switch (sc->type) {
241 case 8:
242 slave = (uio->uio_offset >> 7) | sc->addr;
243 msgs[0].len = 1;
244 msgs[1].len = len;
245 addr[0] = uio->uio_offset & 0xff;
246 break;
247 case 16:
248 slave = sc->addr | (uio->uio_offset >> 15);
249 msgs[0].len = 2;
250 msgs[1].len = len;
251 addr[0] = (uio->uio_offset >> 8) & 0xff;
252 addr[1] = uio->uio_offset & 0xff;
253 break;
254 }
255 for (i = 0; i < 2; i++)
256 msgs[i].slave = slave;
257 error = iicbus_transfer_excl(sc->dev, msgs, 2, IIC_INTRWAIT);
258 if (error) {
259 error = iic2errno(error);
260 break;
261 }
262 error = uiomove(data, len, uio);
263 if (error)
264 break;
265 }
266 return (error);
267 }
268
269 /*
270 * Write to the part. We use three transfers here since we're actually
271 * doing a write followed by a read to make sure that the write finished.
272 * It is easier to encode the dummy read here than to break things up
273 * into smaller chunks...
274 */
275 static int
icee_write(struct cdev * dev,struct uio * uio,int ioflag)276 icee_write(struct cdev *dev, struct uio *uio, int ioflag)
277 {
278 struct icee_softc *sc;
279 int error, len, slave, waitlimit;
280 uint8_t data[MAX_WR_SZ + 2];
281 struct iic_msg wr[1] = {
282 { 0, IIC_M_WR, 0, data },
283 };
284 struct iic_msg rd[1] = {
285 { 0, IIC_M_RD, 1, data },
286 };
287
288 sc = CDEV2SOFTC(dev);
289 if (uio->uio_offset >= sc->size)
290 return (EIO);
291 if (sc->type != 8 && sc->type != 16)
292 return (EINVAL);
293
294 slave = error = 0;
295 while (uio->uio_resid > 0) {
296 if (uio->uio_offset >= sc->size)
297 break;
298 len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)),
299 uio->uio_resid);
300 switch (sc->type) {
301 case 8:
302 slave = (uio->uio_offset >> 7) | sc->addr;
303 wr[0].len = 1 + len;
304 data[0] = uio->uio_offset & 0xff;
305 break;
306 case 16:
307 slave = sc->addr | (uio->uio_offset >> 15);
308 wr[0].len = 2 + len;
309 data[0] = (uio->uio_offset >> 8) & 0xff;
310 data[1] = uio->uio_offset & 0xff;
311 break;
312 }
313 wr[0].slave = slave;
314 error = uiomove(data + sc->type / 8, len, uio);
315 if (error)
316 break;
317 error = iicbus_transfer_excl(sc->dev, wr, 1, IIC_INTRWAIT);
318 if (error) {
319 error = iic2errno(error);
320 break;
321 }
322 /* Read after write to wait for write-done. */
323 waitlimit = 10000;
324 rd[0].slave = slave;
325 do {
326 error = iicbus_transfer_excl(sc->dev, rd, 1,
327 IIC_INTRWAIT);
328 } while (waitlimit-- > 0 && error != 0);
329 if (error) {
330 error = iic2errno(error);
331 break;
332 }
333 }
334 return error;
335 }
336
337 static device_method_t icee_methods[] = {
338 DEVMETHOD(device_probe, icee_probe),
339 DEVMETHOD(device_attach, icee_attach),
340 DEVMETHOD(device_detach, icee_detach),
341
342 DEVMETHOD_END
343 };
344
345 static driver_t icee_driver = {
346 "icee",
347 icee_methods,
348 sizeof(struct icee_softc),
349 };
350
351 DRIVER_MODULE(icee, iicbus, icee_driver, 0, 0);
352 MODULE_VERSION(icee, 1);
353 MODULE_DEPEND(icee, iicbus, 1, 1, 1);
354 IICBUS_FDT_PNP_INFO(compat_data);
355