1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2024, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /** 33 * @file ice_lib.h 34 * @brief header for generic device and sysctl functions 35 * 36 * Contains definitions and function declarations for the ice_lib.c file. It 37 * does not depend on the iflib networking stack. 38 */ 39 40 #ifndef _ICE_LIB_H_ 41 #define _ICE_LIB_H_ 42 43 /* include kernel options first */ 44 #include "ice_opts.h" 45 46 #include <sys/types.h> 47 #include <sys/bus.h> 48 #include <sys/rman.h> 49 #include <sys/socket.h> 50 #include <sys/sbuf.h> 51 #include <sys/sysctl.h> 52 #include <sys/syslog.h> 53 #include <sys/module.h> 54 #include <sys/proc.h> 55 56 #include <net/if.h> 57 #include <net/if_var.h> 58 #include <net/if_media.h> 59 #include <net/ethernet.h> 60 #include <net/if_types.h> 61 62 #include <sys/bitstring.h> 63 64 #include "ice_dcb.h" 65 #include "ice_type.h" 66 #include "ice_common.h" 67 #include "ice_flow.h" 68 #include "ice_sched.h" 69 #include "ice_resmgr.h" 70 71 #include "ice_rdma_internal.h" 72 73 #include "ice_rss.h" 74 75 /* Hide debug sysctls unless INVARIANTS is enabled */ 76 #ifdef INVARIANTS 77 #define ICE_CTLFLAG_DEBUG 0 78 #else 79 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP 80 #endif 81 82 /** 83 * for_each_set_bit - For loop over each set bit in a bit string 84 * @bit: storage for the bit index 85 * @data: address of data block to loop over 86 * @nbits: maximum number of bits to loop over 87 * 88 * macro to create a for loop over a bit string, which runs the body once for 89 * each bit that is set in the string. The bit variable will be set to the 90 * index of each set bit in the string, with zero representing the first bit. 91 */ 92 #define for_each_set_bit(bit, data, nbits) \ 93 for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \ 94 (bit) != -1; \ 95 bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit))) 96 97 /** 98 * @var broadcastaddr 99 * @brief broadcast MAC address 100 * 101 * constant defining the broadcast MAC address, used for programming the 102 * broadcast address as a MAC filter for the PF VSI. 103 */ 104 static const u8 broadcastaddr[ETHER_ADDR_LEN] = { 105 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 106 }; 107 108 MALLOC_DECLARE(M_ICE); 109 110 extern const char ice_driver_version[]; 111 extern const uint8_t ice_major_version; 112 extern const uint8_t ice_minor_version; 113 extern const uint8_t ice_patch_version; 114 extern const uint8_t ice_rc_version; 115 116 /* global sysctl indicating whether the Tx FC filter should be enabled */ 117 extern bool ice_enable_tx_fc_filter; 118 119 /* global sysctl indicating whether the Tx LLDP filter should be enabled */ 120 extern bool ice_enable_tx_lldp_filter; 121 122 /* global sysctl indicating whether FW health status events should be enabled */ 123 extern bool ice_enable_health_events; 124 125 /* global sysctl indicating whether to enable 5-layer scheduler topology */ 126 extern bool ice_tx_balance_en; 127 128 /** 129 * @struct ice_bar_info 130 * @brief PCI BAR mapping information 131 * 132 * Contains data about a PCI BAR that the driver has mapped for use. 133 */ 134 struct ice_bar_info { 135 struct resource *res; 136 bus_space_tag_t tag; 137 bus_space_handle_t handle; 138 bus_size_t size; 139 int rid; 140 }; 141 142 /* Alignment for queues */ 143 #define DBA_ALIGN 128 144 145 /* Maximum TSO size is (256K)-1 */ 146 #define ICE_TSO_SIZE ((256*1024) - 1) 147 148 /* Minimum size for TSO MSS */ 149 #define ICE_MIN_TSO_MSS 64 150 151 #define ICE_MAX_TX_SEGS 8 152 #define ICE_MAX_TSO_SEGS 128 153 154 #define ICE_MAX_DMA_SEG_SIZE ((16*1024) - 1) 155 156 #define ICE_MAX_RX_SEGS 5 157 158 #define ICE_MAX_TSO_HDR_SEGS 3 159 160 #define ICE_MSIX_BAR 3 161 #define ICE_MAX_MSIX_VECTORS (GLINT_DYN_CTL_MAX_INDEX + 1) 162 163 #define ICE_DEFAULT_DESC_COUNT 1024 164 #define ICE_MAX_DESC_COUNT 8160 165 #define ICE_MIN_DESC_COUNT 64 166 #define ICE_DESC_COUNT_INCR 32 167 168 /* List of hardware offloads we support */ 169 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP | \ 170 CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP | \ 171 CSUM_IP_TSO | CSUM_IP6_TSO) 172 173 /* Macros to decide what kind of hardware offload to enable */ 174 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP) 175 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP) 176 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP) 177 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO) 178 179 /* List of known RX CSUM offload flags */ 180 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \ 181 CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \ 182 CSUM_COALESCED) 183 184 /* List of interface capabilities supported by ice hardware */ 185 #define ICE_FULL_CAPS \ 186 (IFCAP_TSO4 | IFCAP_TSO6 | \ 187 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \ 188 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \ 189 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \ 190 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \ 191 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO) 192 193 /* Safe mode disables support for hardware checksums and TSO */ 194 #define ICE_SAFE_CAPS \ 195 (ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \ 196 IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM)) 197 198 #define ICE_CAPS(sc) \ 199 (ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS) 200 201 /** 202 * ICE_NVM_ACCESS 203 * @brief Private ioctl command number for NVM access ioctls 204 * 205 * The ioctl command number used by NVM update for accessing the driver for 206 * NVM access commands. 207 */ 208 #define ICE_NVM_ACCESS \ 209 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5) 210 211 /** 212 * ICE_DEBUG_DUMP 213 * @brief Private ioctl command number for retrieving debug dump data 214 * 215 * The ioctl command number used by a userspace tool for accessing the driver for 216 * getting debug dump data from the firmware. 217 */ 218 #define ICE_DEBUG_DUMP \ 219 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6) 220 221 #define ICE_AQ_LEN 1023 222 #define ICE_MBXQ_LEN 512 223 #define ICE_SBQ_LEN 512 224 225 #define ICE_CTRLQ_WORK_LIMIT 256 226 227 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 228 229 /* wait up to 50 microseconds for queue state change */ 230 #define ICE_Q_WAIT_RETRY_LIMIT 5 231 232 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 233 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 234 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 235 236 /* 237 * For now, set this to the hardware maximum. Each function gets a smaller 238 * number assigned to it in hw->func_caps.guar_num_vsi, though there 239 * appears to be no guarantee that is the maximum number that a function 240 * can use. 241 */ 242 #define ICE_MAX_VSI_AVAILABLE 768 243 244 /* Maximum size of a single frame (for Tx and Rx) */ 245 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX 246 247 /* Maximum MTU size */ 248 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \ 249 ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN) 250 251 /* 252 * Hardware requires that TSO packets have an segment size of at least 64 253 * bytes. To avoid sending bad frames to the hardware, the driver forces the 254 * MSS for all TSO packets to have a segment size of at least 64 bytes. 255 * 256 * However, if the MTU is reduced below a certain size, then the resulting 257 * larger MSS can result in transmitting segmented frames with a packet size 258 * larger than the MTU. 259 * 260 * Avoid this by preventing the MTU from being lowered below this limit. 261 * Alternative solutions require changing the TCP stack to disable offloading 262 * the segmentation when the requested segment size goes below 64 bytes. 263 */ 264 #define ICE_MIN_MTU 112 265 266 /* 267 * The default number of queues reserved for a VF is 4, according to the 268 * AVF Base Mode specification. 269 */ 270 #define ICE_DEFAULT_VF_QUEUES 4 271 272 /* 273 * An invalid VSI number to indicate that mirroring should be disabled. 274 */ 275 #define ICE_INVALID_MIRROR_VSI ((u16)-1) 276 /* 277 * The maximum number of RX queues allowed per TC in a VSI. 278 */ 279 #define ICE_MAX_RXQS_PER_TC 256 280 281 /* 282 * There are three settings that can be updated independently or 283 * altogether: Link speed, FEC, and Flow Control. These macros allow 284 * the caller to specify which setting(s) to update. 285 */ 286 #define ICE_APPLY_LS BIT(0) 287 #define ICE_APPLY_FEC BIT(1) 288 #define ICE_APPLY_FC BIT(2) 289 #define ICE_APPLY_LS_FEC (ICE_APPLY_LS | ICE_APPLY_FEC) 290 #define ICE_APPLY_LS_FC (ICE_APPLY_LS | ICE_APPLY_FC) 291 #define ICE_APPLY_FEC_FC (ICE_APPLY_FEC | ICE_APPLY_FC) 292 #define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC) 293 294 /* 295 * Mask of valid flags that can be used as an input for the 296 * advertise_speed sysctl. 297 */ 298 #define ICE_SYSCTL_SPEEDS_VALID_RANGE 0xFFF 299 300 /** 301 * @enum ice_dyn_idx_t 302 * @brief Dynamic Control ITR indexes 303 * 304 * This enum matches hardware bits and is meant to be used by DYN_CTLN 305 * registers and QINT registers or more generally anywhere in the manual 306 * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any 307 * register but instead is a special value meaning "don't update" ITR0/1/2. 308 */ 309 enum ice_dyn_idx_t { 310 ICE_IDX_ITR0 = 0, 311 ICE_IDX_ITR1 = 1, 312 ICE_IDX_ITR2 = 2, 313 ICE_ITR_NONE = 3 /* ITR_NONE must not be used as an index */ 314 }; 315 316 /* By convenction ITR0 is used for RX, and ITR1 is used for TX */ 317 #define ICE_RX_ITR ICE_IDX_ITR0 318 #define ICE_TX_ITR ICE_IDX_ITR1 319 320 #define ICE_ITR_MAX 8160 321 322 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */ 323 #define ICE_DFLT_TX_ITR 50 324 #define ICE_DFLT_RX_ITR 50 325 326 /* RS FEC register values */ 327 #define ICE_RS_FEC_REG_SHIFT 2 328 #define ICE_RS_FEC_RECV_ID_SHIFT 4 329 #define ICE_RS_FEC_CORR_LOW_REG_PORT0 (0x02 << ICE_RS_FEC_REG_SHIFT) 330 #define ICE_RS_FEC_CORR_HIGH_REG_PORT0 (0x03 << ICE_RS_FEC_REG_SHIFT) 331 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT0 (0x04 << ICE_RS_FEC_REG_SHIFT) 332 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT0 (0x05 << ICE_RS_FEC_REG_SHIFT) 333 #define ICE_RS_FEC_CORR_LOW_REG_PORT1 (0x42 << ICE_RS_FEC_REG_SHIFT) 334 #define ICE_RS_FEC_CORR_HIGH_REG_PORT1 (0x43 << ICE_RS_FEC_REG_SHIFT) 335 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT1 (0x44 << ICE_RS_FEC_REG_SHIFT) 336 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT1 (0x45 << ICE_RS_FEC_REG_SHIFT) 337 #define ICE_RS_FEC_CORR_LOW_REG_PORT2 (0x4A << ICE_RS_FEC_REG_SHIFT) 338 #define ICE_RS_FEC_CORR_HIGH_REG_PORT2 (0x4B << ICE_RS_FEC_REG_SHIFT) 339 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT2 (0x4C << ICE_RS_FEC_REG_SHIFT) 340 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT2 (0x4D << ICE_RS_FEC_REG_SHIFT) 341 #define ICE_RS_FEC_CORR_LOW_REG_PORT3 (0x52 << ICE_RS_FEC_REG_SHIFT) 342 #define ICE_RS_FEC_CORR_HIGH_REG_PORT3 (0x53 << ICE_RS_FEC_REG_SHIFT) 343 #define ICE_RS_FEC_UNCORR_LOW_REG_PORT3 (0x54 << ICE_RS_FEC_REG_SHIFT) 344 #define ICE_RS_FEC_UNCORR_HIGH_REG_PORT3 (0x55 << ICE_RS_FEC_REG_SHIFT) 345 #define ICE_RS_FEC_RECEIVER_ID_PCS0 (0x33 << ICE_RS_FEC_RECV_ID_SHIFT) 346 #define ICE_RS_FEC_RECEIVER_ID_PCS1 (0x34 << ICE_RS_FEC_RECV_ID_SHIFT) 347 348 /** 349 * ice_itr_to_reg - Convert an ITR setting into its register equivalent 350 * @hw: The device HW structure 351 * @itr_setting: the ITR setting to convert 352 * 353 * Based on the hardware ITR granularity, convert an ITR setting into the 354 * correct value to prepare programming to the HW. 355 */ 356 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting) 357 { 358 return itr_setting / hw->itr_gran; 359 } 360 361 /** 362 * @enum ice_rx_dtype 363 * @brief DTYPE header split options 364 * 365 * This enum matches the Rx context bits to define whether header split is 366 * enabled or not. 367 */ 368 enum ice_rx_dtype { 369 ICE_RX_DTYPE_NO_SPLIT = 0, 370 ICE_RX_DTYPE_HEADER_SPLIT = 1, 371 ICE_RX_DTYPE_SPLIT_ALWAYS = 2, 372 }; 373 374 /* Strings used for displaying FEC mode 375 * 376 * Use ice_fec_str() to get these unless these need to be embedded in a 377 * string constant. 378 */ 379 #define ICE_FEC_STRING_AUTO "Auto" 380 #define ICE_FEC_STRING_RS "RS-FEC" 381 #define ICE_FEC_STRING_BASER "FC-FEC/BASE-R" 382 #define ICE_FEC_STRING_NONE "None" 383 #define ICE_FEC_STRING_DIS_AUTO "Auto (w/ No-FEC)" 384 385 /* Strings used for displaying Flow Control mode 386 * 387 * Use ice_fc_str() to get these unless these need to be embedded in a 388 * string constant. 389 */ 390 #define ICE_FC_STRING_FULL "Full" 391 #define ICE_FC_STRING_TX "Tx" 392 #define ICE_FC_STRING_RX "Rx" 393 #define ICE_FC_STRING_NONE "None" 394 395 /* 396 * The number of times the ice_handle_i2c_req function will retry reading 397 * I2C data via the Admin Queue before returning EBUSY. 398 */ 399 #define ICE_I2C_MAX_RETRIES 10 400 401 /* 402 * The Get Link Status AQ command and other link commands can return 403 * EAGAIN, indicating that the FW Link Management engine is busy. 404 * Define the number of times that the driver should retry sending these 405 * commands and the amount of time it should wait between those retries 406 * (in milliseconds) here. 407 */ 408 #define ICE_LINK_AQ_MAX_RETRIES 10 409 #define ICE_LINK_RETRY_DELAY 17 410 411 /* 412 * The Start LLDP Agent AQ command will fail if it's sent too soon after 413 * the LLDP agent is stopped. The period between the stop and start 414 * commands must currently be at least 2 seconds. 415 */ 416 #define ICE_START_LLDP_RETRY_WAIT (2 * hz) 417 418 /* 419 * Only certain clusters are valid for certain devices for the FW debug dump 420 * functionality, so define masks of those here. 421 */ 422 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK_E810 0x4001AF 423 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK_E830 0x1AF 424 425 struct ice_softc; 426 427 /** 428 * @enum ice_rx_cso_stat 429 * @brief software checksum offload statistics 430 * 431 * Enumeration of possible checksum offload statistics captured by software 432 * during the Rx path. 433 */ 434 enum ice_rx_cso_stat { 435 ICE_CSO_STAT_RX_IP4_ERR, 436 ICE_CSO_STAT_RX_IP6_ERR, 437 ICE_CSO_STAT_RX_L3_ERR, 438 ICE_CSO_STAT_RX_TCP_ERR, 439 ICE_CSO_STAT_RX_UDP_ERR, 440 ICE_CSO_STAT_RX_SCTP_ERR, 441 ICE_CSO_STAT_RX_L4_ERR, 442 ICE_CSO_STAT_RX_COUNT 443 }; 444 445 /** 446 * @enum ice_tx_cso_stat 447 * @brief software checksum offload statistics 448 * 449 * Enumeration of possible checksum offload statistics captured by software 450 * during the Tx path. 451 */ 452 enum ice_tx_cso_stat { 453 ICE_CSO_STAT_TX_TCP, 454 ICE_CSO_STAT_TX_UDP, 455 ICE_CSO_STAT_TX_SCTP, 456 ICE_CSO_STAT_TX_IP4, 457 ICE_CSO_STAT_TX_IP6, 458 ICE_CSO_STAT_TX_L3_ERR, 459 ICE_CSO_STAT_TX_L4_ERR, 460 ICE_CSO_STAT_TX_COUNT 461 }; 462 463 /** 464 * @struct tx_stats 465 * @brief software Tx statistics 466 * 467 * Contains software counted Tx statistics for a single queue 468 */ 469 struct tx_stats { 470 /* Soft Stats */ 471 u64 tx_bytes; 472 u64 tx_packets; 473 u64 mss_too_small; 474 u64 tso; 475 u64 cso[ICE_CSO_STAT_TX_COUNT]; 476 }; 477 478 /** 479 * @struct rx_stats 480 * @brief software Rx statistics 481 * 482 * Contains software counted Rx statistics for a single queue 483 */ 484 struct rx_stats { 485 /* Soft Stats */ 486 u64 rx_packets; 487 u64 rx_bytes; 488 u64 desc_errs; 489 u64 cso[ICE_CSO_STAT_RX_COUNT]; 490 }; 491 492 /** 493 * @struct ice_vsi_hw_stats 494 * @brief hardware statistics for a VSI 495 * 496 * Stores statistics that are generated by hardware for a VSI. 497 */ 498 struct ice_vsi_hw_stats { 499 struct ice_eth_stats prev; 500 struct ice_eth_stats cur; 501 bool offsets_loaded; 502 }; 503 504 /** 505 * @struct ice_pf_hw_stats 506 * @brief hardware statistics for a PF 507 * 508 * Stores statistics that are generated by hardware for each PF. 509 */ 510 struct ice_pf_hw_stats { 511 struct ice_hw_port_stats prev; 512 struct ice_hw_port_stats cur; 513 bool offsets_loaded; 514 }; 515 516 /** 517 * @struct ice_pf_sw_stats 518 * @brief software statistics for a PF 519 * 520 * Contains software generated statistics relevant to a PF. 521 */ 522 struct ice_pf_sw_stats { 523 /* # of reset events handled, by type */ 524 u32 corer_count; 525 u32 globr_count; 526 u32 empr_count; 527 u32 pfr_count; 528 529 /* # of detected MDD events for Tx and Rx */ 530 u32 tx_mdd_count; 531 u32 rx_mdd_count; 532 533 u64 rx_roc_error; /* port oversize packet stats, error_cnt \ 534 from GLV_REPC VSI register + RxOversize */ 535 }; 536 537 /** 538 * @struct ice_tc_info 539 * @brief Traffic class information for a VSI 540 * 541 * Stores traffic class information used in configuring 542 * a VSI. 543 */ 544 struct ice_tc_info { 545 u16 qoffset; /* Offset in VSI queue space */ 546 u16 qcount_tx; /* TX queues for this Traffic Class */ 547 u16 qcount_rx; /* RX queues */ 548 }; 549 550 /** 551 * @struct ice_vsi 552 * @brief VSI structure 553 * 554 * Contains data relevant to a single VSI 555 */ 556 struct ice_vsi { 557 /* back pointer to the softc */ 558 struct ice_softc *sc; 559 560 bool dynamic; /* if true, dynamically allocated */ 561 562 enum ice_vsi_type type; /* type of this VSI */ 563 u16 idx; /* software index to sc->all_vsi[] */ 564 565 u16 *tx_qmap; /* Tx VSI to PF queue mapping */ 566 u16 *rx_qmap; /* Rx VSI to PF queue mapping */ 567 568 enum ice_resmgr_alloc_type qmap_type; 569 570 struct ice_tx_queue *tx_queues; /* Tx queue array */ 571 struct ice_rx_queue *rx_queues; /* Rx queue array */ 572 573 int num_tx_queues; 574 int num_rx_queues; 575 int num_vectors; 576 577 int16_t rx_itr; 578 int16_t tx_itr; 579 580 /* RSS configuration */ 581 u16 rss_table_size; /* HW RSS table size */ 582 u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */ 583 584 int max_frame_size; 585 u16 mbuf_sz; 586 587 struct ice_aqc_vsi_props info; 588 589 /* DCB configuration */ 590 u8 num_tcs; /* Total number of enabled TCs */ 591 u16 tc_map; /* bitmap of enabled Traffic Classes */ 592 /* Information for each traffic class */ 593 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 594 595 /* context for per-VSI sysctls */ 596 struct sysctl_ctx_list ctx; 597 struct sysctl_oid *vsi_node; 598 599 /* context for per-txq sysctls */ 600 struct sysctl_ctx_list txqs_ctx; 601 struct sysctl_oid *txqs_node; 602 603 /* context for per-rxq sysctls */ 604 struct sysctl_ctx_list rxqs_ctx; 605 struct sysctl_oid *rxqs_node; 606 607 /* VSI-level stats */ 608 struct ice_vsi_hw_stats hw_stats; 609 610 /* VSI mirroring details */ 611 u16 mirror_src_vsi; 612 u16 rule_mir_ingress; 613 u16 rule_mir_egress; 614 615 #ifdef PCI_IOV 616 u8 vf_num; /* Index of owning VF, if applicable */ 617 #endif 618 }; 619 620 /** 621 * @struct ice_debug_dump_cmd 622 * @brief arguments/return value for debug dump ioctl 623 */ 624 struct ice_debug_dump_cmd { 625 u32 offset; /* offset to read/write from table, in bytes */ 626 u16 cluster_id; /* also used to get next cluster id */ 627 u16 table_id; 628 u16 data_size; /* size of data field, in bytes */ 629 u16 reserved1; 630 u32 reserved2; 631 u8 data[]; 632 }; 633 634 /** 635 * @struct ice_serdes_equalization 636 * @brief serdes equalization info 637 */ 638 struct ice_serdes_equalization { 639 int rx_equalization_pre1; 640 int rx_equalization_pre2; 641 int rx_equalization_post1; 642 int rx_equalization_bflf; 643 int rx_equalization_bfhf; 644 int rx_equalization_drate; 645 int tx_equalization_pre1; 646 int tx_equalization_pre2; 647 int tx_equalization_pre3; 648 int tx_equalization_atten; 649 int tx_equalization_post1; 650 }; 651 652 /** 653 * @struct ice_fec_stats_to_sysctl 654 * @brief FEC stats register value of port 655 */ 656 struct ice_fec_stats_to_sysctl { 657 u16 fec_corr_cnt_low; 658 u16 fec_corr_cnt_high; 659 u16 fec_uncorr_cnt_low; 660 u16 fec_uncorr_cnt_high; 661 }; 662 663 #define ICE_MAX_SERDES_LANE_COUNT 4 664 665 /** 666 * @struct ice_regdump_to_sysctl 667 * @brief PHY stats of port 668 */ 669 struct ice_regdump_to_sysctl { 670 /* A multilane port can have max 4 serdes */ 671 struct ice_serdes_equalization equalization[ICE_MAX_SERDES_LANE_COUNT]; 672 struct ice_fec_stats_to_sysctl stats; 673 }; 674 675 /** 676 * @struct ice_port_topology 677 * @brief Port topology from lport i.e. serdes mapping, pcsquad, macport, cage 678 */ 679 struct ice_port_topology { 680 u16 pcs_port; 681 u16 primary_serdes_lane; 682 u16 serdes_lane_count; 683 u16 pcs_quad_select; 684 }; 685 686 /** 687 * @enum ice_state 688 * @brief Driver state flags 689 * 690 * Used to indicate the status of various driver events. Intended to be 691 * modified only using atomic operations, so that we can use it even in places 692 * which aren't locked. 693 */ 694 enum ice_state { 695 ICE_STATE_CONTROLQ_EVENT_PENDING, 696 ICE_STATE_VFLR_PENDING, 697 ICE_STATE_MDD_PENDING, 698 ICE_STATE_RESET_OICR_RECV, 699 ICE_STATE_RESET_PFR_REQ, 700 ICE_STATE_PREPARED_FOR_RESET, 701 ICE_STATE_SUBIF_NEEDS_REINIT, 702 ICE_STATE_RESET_FAILED, 703 ICE_STATE_DRIVER_INITIALIZED, 704 ICE_STATE_NO_MEDIA, 705 ICE_STATE_RECOVERY_MODE, 706 ICE_STATE_ROLLBACK_MODE, 707 ICE_STATE_LINK_STATUS_REPORTED, 708 ICE_STATE_ATTACHING, 709 ICE_STATE_DETACHING, 710 ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING, 711 ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER, 712 ICE_STATE_MULTIPLE_TCS, 713 ICE_STATE_DO_FW_DEBUG_DUMP, 714 ICE_STATE_LINK_ACTIVE_ON_DOWN, 715 ICE_STATE_FIRST_INIT_LINK, 716 ICE_STATE_DO_CREATE_MIRR_INTFC, 717 ICE_STATE_DO_DESTROY_MIRR_INTFC, 718 ICE_STATE_PHY_FW_INIT_PENDING, 719 /* This entry must be last */ 720 ICE_STATE_LAST, 721 }; 722 723 /* Functions for setting and checking driver state. Note the functions take 724 * bit positions, not bitmasks. The atomic_testandset_32 and 725 * atomic_testandclear_32 operations require bit positions, while the 726 * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to 727 * programming error, so we provide wrapper functions to avoid this. 728 */ 729 730 /** 731 * ice_set_state - Set the specified state 732 * @s: the state bitmap 733 * @bit: the state to set 734 * 735 * Atomically update the state bitmap with the specified bit set. 736 */ 737 static inline void 738 ice_set_state(volatile u32 *s, enum ice_state bit) 739 { 740 /* atomic_set_32 expects a bitmask */ 741 atomic_set_32(s, BIT(bit)); 742 } 743 744 /** 745 * ice_clear_state - Clear the specified state 746 * @s: the state bitmap 747 * @bit: the state to clear 748 * 749 * Atomically update the state bitmap with the specified bit cleared. 750 */ 751 static inline void 752 ice_clear_state(volatile u32 *s, enum ice_state bit) 753 { 754 /* atomic_clear_32 expects a bitmask */ 755 atomic_clear_32(s, BIT(bit)); 756 } 757 758 /** 759 * ice_testandset_state - Test and set the specified state 760 * @s: the state bitmap 761 * @bit: the bit to test 762 * 763 * Atomically update the state bitmap, setting the specified bit. Returns the 764 * previous value of the bit. 765 */ 766 static inline u32 767 ice_testandset_state(volatile u32 *s, enum ice_state bit) 768 { 769 /* atomic_testandset_32 expects a bit position */ 770 return atomic_testandset_32(s, bit); 771 } 772 773 /** 774 * ice_testandclear_state - Test and clear the specified state 775 * @s: the state bitmap 776 * @bit: the bit to test 777 * 778 * Atomically update the state bitmap, clearing the specified bit. Returns the 779 * previous value of the bit. 780 */ 781 static inline u32 782 ice_testandclear_state(volatile u32 *s, enum ice_state bit) 783 { 784 /* atomic_testandclear_32 expects a bit position */ 785 return atomic_testandclear_32(s, bit); 786 } 787 788 /** 789 * ice_test_state - Test the specified state 790 * @s: the state bitmap 791 * @bit: the bit to test 792 * 793 * Return true if the state is set, false otherwise. Use this only if the flow 794 * does not need to update the state. If you must update the state as well, 795 * prefer ice_testandset_state or ice_testandclear_state. 796 */ 797 static inline u32 798 ice_test_state(volatile u32 *s, enum ice_state bit) 799 { 800 return (*s & BIT(bit)) ? true : false; 801 } 802 803 /** 804 * @struct ice_str_buf 805 * @brief static length buffer for string returning 806 * 807 * Structure containing a fixed size string buffer, used to implement 808 * numeric->string conversion functions that may want to return non-constant 809 * strings. 810 * 811 * This allows returning a fixed size string that is generated by a conversion 812 * function, and then copied to the used location without needing to use an 813 * explicit local variable passed by reference. 814 */ 815 struct ice_str_buf { 816 char str[ICE_STR_BUF_LEN]; 817 }; 818 819 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err); 820 struct ice_str_buf _ice_status_str(int status); 821 struct ice_str_buf _ice_err_str(int err); 822 struct ice_str_buf _ice_fltr_flag_str(u16 flag); 823 struct ice_str_buf _ice_log_sev_str(u8 log_level); 824 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event); 825 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event); 826 struct ice_str_buf _ice_mdd_rx_str(u8 event); 827 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status); 828 829 #define ice_aq_str(err) _ice_aq_str(err).str 830 #define ice_status_str(err) _ice_status_str(err).str 831 #define ice_err_str(err) _ice_err_str(err).str 832 #define ice_fltr_flag_str(flag) _ice_fltr_flag_str(flag).str 833 834 #define ice_mdd_tx_tclan_str(event) _ice_mdd_tx_tclan_str(event).str 835 #define ice_mdd_tx_pqm_str(event) _ice_mdd_tx_pqm_str(event).str 836 #define ice_mdd_rx_str(event) _ice_mdd_rx_str(event).str 837 838 #define ice_log_sev_str(log_level) _ice_log_sev_str(log_level).str 839 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str 840 841 /** 842 * ice_enable_intr - Enable interrupts for given vector 843 * @hw: the device private HW structure 844 * @vector: the interrupt index in PF space 845 * 846 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 847 */ 848 static inline void 849 ice_enable_intr(struct ice_hw *hw, int vector) 850 { 851 u32 dyn_ctl; 852 853 /* Use ITR_NONE so that ITR configuration is not changed. */ 854 dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 855 (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S); 856 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 857 } 858 859 /** 860 * ice_disable_intr - Disable interrupts for given vector 861 * @hw: the device private HW structure 862 * @vector: the interrupt index in PF space 863 * 864 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 865 */ 866 static inline void 867 ice_disable_intr(struct ice_hw *hw, int vector) 868 { 869 u32 dyn_ctl; 870 871 /* Use ITR_NONE so that ITR configuration is not changed. */ 872 dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S; 873 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 874 } 875 876 /** 877 * ice_is_tx_desc_done - determine if a Tx descriptor is done 878 * @txd: the Tx descriptor to check 879 * 880 * Returns true if hardware is done with a Tx descriptor and software is 881 * capable of re-using it. 882 */ 883 static inline bool 884 ice_is_tx_desc_done(struct ice_tx_desc *txd) 885 { 886 return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M) 887 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE); 888 } 889 890 /** 891 * ice_get_pf_id - Get the PF id from the hardware registers 892 * @hw: the ice hardware structure 893 * 894 * Reads the PF_FUNC_RID register and extracts the function number from it. 895 * Intended to be used in cases where hw->pf_id hasn't yet been assigned by 896 * ice_init_hw. 897 * 898 * @pre this function should be called only after PCI register access has been 899 * setup, and prior to ice_init_hw. After hardware has been initialized, the 900 * cached hw->pf_id value can be used. 901 */ 902 static inline u8 903 ice_get_pf_id(struct ice_hw *hw) 904 { 905 return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >> 906 PF_FUNC_RID_FUNCTION_NUMBER_S); 907 } 908 909 /* Details of how to re-initialize depend on the networking stack */ 910 void ice_request_stack_reinit(struct ice_softc *sc); 911 912 /* Details of how to check if the network stack is detaching us */ 913 bool ice_driver_is_detaching(struct ice_softc *sc); 914 915 /* Details of how to setup/teardown a mirror interface */ 916 /** 917 * @brief Create an interface for mirroring 918 */ 919 int ice_create_mirror_interface(struct ice_softc *sc); 920 /** 921 * @brief Destroy created mirroring interface 922 */ 923 void ice_destroy_mirror_interface(struct ice_softc *sc); 924 925 const char * ice_fw_module_str(enum ice_aqc_fw_logging_mod module); 926 void ice_add_fw_logging_tunables(struct ice_softc *sc, 927 struct sysctl_oid *parent); 928 void ice_handle_fw_log_event(struct ice_softc *sc, struct ice_aq_desc *desc, 929 void *buf); 930 931 int ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending); 932 int ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num); 933 void ice_free_bar(device_t dev, struct ice_bar_info *bar); 934 void ice_set_ctrlq_len(struct ice_hw *hw); 935 void ice_release_vsi(struct ice_vsi *vsi); 936 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type); 937 void ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues, 938 const int max_rx_queues); 939 void ice_free_vsi_qmaps(struct ice_vsi *vsi); 940 int ice_initialize_vsi(struct ice_vsi *vsi); 941 void ice_deinit_vsi(struct ice_vsi *vsi); 942 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi); 943 int ice_get_phy_type_low(uint64_t phy_type_low); 944 int ice_get_phy_type_high(uint64_t phy_type_high); 945 int ice_add_media_types(struct ice_softc *sc, struct ifmedia *media); 946 void ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx); 947 void ice_configure_all_rxq_interrupts(struct ice_vsi *vsi); 948 void ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx); 949 void ice_configure_all_txq_interrupts(struct ice_vsi *vsi); 950 void ice_flush_rxq_interrupts(struct ice_vsi *vsi); 951 void ice_flush_txq_interrupts(struct ice_vsi *vsi); 952 int ice_cfg_vsi_for_tx(struct ice_vsi *vsi); 953 int ice_cfg_vsi_for_rx(struct ice_vsi *vsi); 954 int ice_control_rx_queue(struct ice_vsi *vsi, u16 qidx, bool enable); 955 int ice_control_all_rx_queues(struct ice_vsi *vsi, bool enable); 956 int ice_cfg_pf_default_mac_filters(struct ice_softc *sc); 957 int ice_rm_pf_default_mac_filters(struct ice_softc *sc); 958 void ice_print_nvm_version(struct ice_softc *sc); 959 void ice_update_vsi_hw_stats(struct ice_vsi *vsi); 960 void ice_reset_vsi_stats(struct ice_vsi *vsi); 961 void ice_update_pf_stats(struct ice_softc *sc); 962 void ice_reset_pf_stats(struct ice_softc *sc); 963 void ice_add_device_sysctls(struct ice_softc *sc); 964 void ice_log_hmc_error(struct ice_hw *hw, device_t dev); 965 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx, 966 struct sysctl_oid *parent, 967 struct ice_eth_stats *stats); 968 void ice_add_vsi_sysctls(struct ice_vsi *vsi); 969 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx, 970 struct sysctl_oid *parent, 971 struct ice_softc *sc); 972 void ice_configure_misc_interrupts(struct ice_softc *sc); 973 int ice_sync_multicast_filters(struct ice_softc *sc); 974 int ice_add_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 975 u16 length); 976 int ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 977 int ice_remove_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 978 u16 length); 979 int ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 980 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent); 981 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi); 982 void ice_add_device_tunables(struct ice_softc *sc); 983 int ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 984 int ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 985 int ice_vsi_disable_tx(struct ice_vsi *vsi); 986 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi); 987 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi); 988 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi); 989 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi); 990 void ice_add_txq_sysctls(struct ice_tx_queue *txq); 991 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq); 992 int ice_config_rss(struct ice_vsi *vsi); 993 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc); 994 int ice_load_pkg_file(struct ice_softc *sc); 995 void ice_log_pkg_init(struct ice_softc *sc, enum ice_ddp_state pkg_status); 996 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter); 997 void ice_save_pci_info(struct ice_hw *hw, device_t dev); 998 int ice_replay_all_vsi_cfg(struct ice_softc *sc); 999 void ice_link_up_msg(struct ice_softc *sc); 1000 int ice_update_laa_mac(struct ice_softc *sc); 1001 void ice_get_and_print_bus_info(struct ice_softc *sc); 1002 const char *ice_fec_str(enum ice_fec_mode mode); 1003 const char *ice_fc_str(enum ice_fc_mode mode); 1004 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action); 1005 const char *ice_state_to_str(enum ice_state state); 1006 int ice_init_link_events(struct ice_softc *sc); 1007 void ice_configure_rx_itr(struct ice_vsi *vsi); 1008 void ice_configure_tx_itr(struct ice_vsi *vsi); 1009 void ice_setup_pf_vsi(struct ice_softc *sc); 1010 void ice_handle_mdd_event(struct ice_softc *sc); 1011 void ice_init_dcb_setup(struct ice_softc *sc); 1012 int ice_send_version(struct ice_softc *sc); 1013 int ice_cfg_pf_ethertype_filters(struct ice_softc *sc); 1014 void ice_init_link_configuration(struct ice_softc *sc); 1015 void ice_init_saved_phy_cfg(struct ice_softc *sc); 1016 int ice_apply_saved_phy_cfg(struct ice_softc *sc, u8 settings); 1017 void ice_set_link_management_mode(struct ice_softc *sc); 1018 int ice_module_event_handler(module_t mod, int what, void *arg); 1019 int ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 1020 int ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req); 1021 int ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length); 1022 int ice_alloc_intr_tracking(struct ice_softc *sc); 1023 void ice_free_intr_tracking(struct ice_softc *sc); 1024 void ice_set_default_local_lldp_mib(struct ice_softc *sc); 1025 void ice_set_link(struct ice_softc *sc, bool enabled); 1026 void ice_add_rx_lldp_filter(struct ice_softc *sc); 1027 void ice_init_health_events(struct ice_softc *sc); 1028 void ice_cfg_pba_num(struct ice_softc *sc); 1029 int ice_handle_debug_dump_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 1030 u8 ice_dcb_get_tc_map(const struct ice_dcbx_cfg *dcbcfg); 1031 void ice_do_dcb_reconfig(struct ice_softc *sc, bool pending_mib); 1032 int ice_setup_vsi_mirroring(struct ice_vsi *vsi); 1033 1034 #endif /* _ICE_LIB_H_ */ 1035