1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/spinlock.h>
19 #include <linux/workqueue.h>
20
21 #include "internals.h"
22
23 static DEFINE_IDR(i3c_bus_idr);
24 static DEFINE_MUTEX(i3c_core_lock);
25 static int __i3c_first_dynamic_bus_num;
26 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
27
28 /**
29 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
30 * @bus: I3C bus to take the lock on
31 *
32 * This function takes the bus lock so that no other operations can occur on
33 * the bus. This is needed for all kind of bus maintenance operation, like
34 * - enabling/disabling slave events
35 * - re-triggering DAA
36 * - changing the dynamic address of a device
37 * - relinquishing mastership
38 * - ...
39 *
40 * The reason for this kind of locking is that we don't want drivers and core
41 * logic to rely on I3C device information that could be changed behind their
42 * back.
43 */
i3c_bus_maintenance_lock(struct i3c_bus * bus)44 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
45 {
46 down_write(&bus->lock);
47 }
48
49 /**
50 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
51 * operation
52 * @bus: I3C bus to release the lock on
53 *
54 * Should be called when the bus maintenance operation is done. See
55 * i3c_bus_maintenance_lock() for more details on what these maintenance
56 * operations are.
57 */
i3c_bus_maintenance_unlock(struct i3c_bus * bus)58 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
59 {
60 up_write(&bus->lock);
61 }
62
63 /**
64 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
65 * @bus: I3C bus to take the lock on
66 *
67 * This function takes the bus lock for any operation that is not a maintenance
68 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
69 * maintenance operations). Basically all communications with I3C devices are
70 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
71 * state or I3C dynamic address).
72 *
73 * Note that this lock is not guaranteeing serialization of normal operations.
74 * In other words, transfer requests passed to the I3C master can be submitted
75 * in parallel and I3C master drivers have to use their own locking to make
76 * sure two different communications are not inter-mixed, or access to the
77 * output/input queue is not done while the engine is busy.
78 */
i3c_bus_normaluse_lock(struct i3c_bus * bus)79 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
80 {
81 down_read(&bus->lock);
82 }
83
84 /**
85 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
86 * @bus: I3C bus to release the lock on
87 *
88 * Should be called when a normal operation is done. See
89 * i3c_bus_normaluse_lock() for more details on what these normal operations
90 * are.
91 */
i3c_bus_normaluse_unlock(struct i3c_bus * bus)92 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
93 {
94 up_read(&bus->lock);
95 }
96
97 static struct i3c_master_controller *
i3c_bus_to_i3c_master(struct i3c_bus * i3cbus)98 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
99 {
100 return container_of(i3cbus, struct i3c_master_controller, bus);
101 }
102
dev_to_i3cmaster(struct device * dev)103 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
104 {
105 return container_of(dev, struct i3c_master_controller, dev);
106 }
107
108 static const struct device_type i3c_device_type;
109
dev_to_i3cbus(struct device * dev)110 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
111 {
112 struct i3c_master_controller *master;
113
114 if (dev->type == &i3c_device_type)
115 return dev_to_i3cdev(dev)->bus;
116
117 master = dev_to_i3cmaster(dev);
118
119 return &master->bus;
120 }
121
dev_to_i3cdesc(struct device * dev)122 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
123 {
124 struct i3c_master_controller *master;
125
126 if (dev->type == &i3c_device_type)
127 return dev_to_i3cdev(dev)->desc;
128
129 master = dev_to_i3cmaster(dev);
130
131 return master->this;
132 }
133
bcr_show(struct device * dev,struct device_attribute * da,char * buf)134 static ssize_t bcr_show(struct device *dev,
135 struct device_attribute *da,
136 char *buf)
137 {
138 struct i3c_bus *bus = dev_to_i3cbus(dev);
139 struct i3c_dev_desc *desc;
140 ssize_t ret;
141
142 i3c_bus_normaluse_lock(bus);
143 desc = dev_to_i3cdesc(dev);
144 ret = sprintf(buf, "%x\n", desc->info.bcr);
145 i3c_bus_normaluse_unlock(bus);
146
147 return ret;
148 }
149 static DEVICE_ATTR_RO(bcr);
150
dcr_show(struct device * dev,struct device_attribute * da,char * buf)151 static ssize_t dcr_show(struct device *dev,
152 struct device_attribute *da,
153 char *buf)
154 {
155 struct i3c_bus *bus = dev_to_i3cbus(dev);
156 struct i3c_dev_desc *desc;
157 ssize_t ret;
158
159 i3c_bus_normaluse_lock(bus);
160 desc = dev_to_i3cdesc(dev);
161 ret = sprintf(buf, "%x\n", desc->info.dcr);
162 i3c_bus_normaluse_unlock(bus);
163
164 return ret;
165 }
166 static DEVICE_ATTR_RO(dcr);
167
pid_show(struct device * dev,struct device_attribute * da,char * buf)168 static ssize_t pid_show(struct device *dev,
169 struct device_attribute *da,
170 char *buf)
171 {
172 struct i3c_bus *bus = dev_to_i3cbus(dev);
173 struct i3c_dev_desc *desc;
174 ssize_t ret;
175
176 i3c_bus_normaluse_lock(bus);
177 desc = dev_to_i3cdesc(dev);
178 ret = sprintf(buf, "%llx\n", desc->info.pid);
179 i3c_bus_normaluse_unlock(bus);
180
181 return ret;
182 }
183 static DEVICE_ATTR_RO(pid);
184
dynamic_address_show(struct device * dev,struct device_attribute * da,char * buf)185 static ssize_t dynamic_address_show(struct device *dev,
186 struct device_attribute *da,
187 char *buf)
188 {
189 struct i3c_bus *bus = dev_to_i3cbus(dev);
190 struct i3c_dev_desc *desc;
191 ssize_t ret;
192
193 i3c_bus_normaluse_lock(bus);
194 desc = dev_to_i3cdesc(dev);
195 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
196 i3c_bus_normaluse_unlock(bus);
197
198 return ret;
199 }
200 static DEVICE_ATTR_RO(dynamic_address);
201
202 static const char * const hdrcap_strings[] = {
203 "hdr-ddr", "hdr-tsp", "hdr-tsl",
204 };
205
hdrcap_show(struct device * dev,struct device_attribute * da,char * buf)206 static ssize_t hdrcap_show(struct device *dev,
207 struct device_attribute *da,
208 char *buf)
209 {
210 struct i3c_bus *bus = dev_to_i3cbus(dev);
211 struct i3c_dev_desc *desc;
212 ssize_t offset = 0, ret;
213 unsigned long caps;
214 int mode;
215
216 i3c_bus_normaluse_lock(bus);
217 desc = dev_to_i3cdesc(dev);
218 caps = desc->info.hdr_cap;
219 for_each_set_bit(mode, &caps, 8) {
220 if (mode >= ARRAY_SIZE(hdrcap_strings))
221 break;
222
223 if (!hdrcap_strings[mode])
224 continue;
225
226 ret = sprintf(buf + offset, offset ? " %s" : "%s",
227 hdrcap_strings[mode]);
228 if (ret < 0)
229 goto out;
230
231 offset += ret;
232 }
233
234 ret = sprintf(buf + offset, "\n");
235 if (ret < 0)
236 goto out;
237
238 ret = offset + ret;
239
240 out:
241 i3c_bus_normaluse_unlock(bus);
242
243 return ret;
244 }
245 static DEVICE_ATTR_RO(hdrcap);
246
modalias_show(struct device * dev,struct device_attribute * da,char * buf)247 static ssize_t modalias_show(struct device *dev,
248 struct device_attribute *da, char *buf)
249 {
250 struct i3c_device *i3c = dev_to_i3cdev(dev);
251 struct i3c_device_info devinfo;
252 u16 manuf, part, ext;
253
254 i3c_device_get_info(i3c, &devinfo);
255 manuf = I3C_PID_MANUF_ID(devinfo.pid);
256 part = I3C_PID_PART_ID(devinfo.pid);
257 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
258
259 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
261 manuf);
262
263 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
264 devinfo.dcr, manuf, part, ext);
265 }
266 static DEVICE_ATTR_RO(modalias);
267
268 static struct attribute *i3c_device_attrs[] = {
269 &dev_attr_bcr.attr,
270 &dev_attr_dcr.attr,
271 &dev_attr_pid.attr,
272 &dev_attr_dynamic_address.attr,
273 &dev_attr_hdrcap.attr,
274 &dev_attr_modalias.attr,
275 NULL,
276 };
277 ATTRIBUTE_GROUPS(i3c_device);
278
i3c_device_uevent(const struct device * dev,struct kobj_uevent_env * env)279 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
280 {
281 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
282 struct i3c_device_info devinfo;
283 u16 manuf, part, ext;
284
285 i3c_device_get_info(i3cdev, &devinfo);
286 manuf = I3C_PID_MANUF_ID(devinfo.pid);
287 part = I3C_PID_PART_ID(devinfo.pid);
288 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
289
290 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
291 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
292 devinfo.dcr, manuf);
293
294 return add_uevent_var(env,
295 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
296 devinfo.dcr, manuf, part, ext);
297 }
298
299 static const struct device_type i3c_device_type = {
300 .groups = i3c_device_groups,
301 .uevent = i3c_device_uevent,
302 };
303
i3c_device_match(struct device * dev,const struct device_driver * drv)304 static int i3c_device_match(struct device *dev, const struct device_driver *drv)
305 {
306 struct i3c_device *i3cdev;
307 const struct i3c_driver *i3cdrv;
308
309 if (dev->type != &i3c_device_type)
310 return 0;
311
312 i3cdev = dev_to_i3cdev(dev);
313 i3cdrv = drv_to_i3cdrv(drv);
314 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
315 return 1;
316
317 return 0;
318 }
319
i3c_device_probe(struct device * dev)320 static int i3c_device_probe(struct device *dev)
321 {
322 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
323 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
324
325 return driver->probe(i3cdev);
326 }
327
i3c_device_remove(struct device * dev)328 static void i3c_device_remove(struct device *dev)
329 {
330 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
331 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
332
333 if (driver->remove)
334 driver->remove(i3cdev);
335
336 i3c_device_free_ibi(i3cdev);
337 }
338
339 const struct bus_type i3c_bus_type = {
340 .name = "i3c",
341 .match = i3c_device_match,
342 .probe = i3c_device_probe,
343 .remove = i3c_device_remove,
344 };
345 EXPORT_SYMBOL_GPL(i3c_bus_type);
346
347 static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status(struct i3c_bus * bus,u16 addr)348 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
349 {
350 unsigned long status;
351 int bitpos = addr * 2;
352
353 if (addr > I2C_MAX_ADDR)
354 return I3C_ADDR_SLOT_RSVD;
355
356 status = bus->addrslots[bitpos / BITS_PER_LONG];
357 status >>= bitpos % BITS_PER_LONG;
358
359 return status & I3C_ADDR_SLOT_STATUS_MASK;
360 }
361
i3c_bus_set_addr_slot_status(struct i3c_bus * bus,u16 addr,enum i3c_addr_slot_status status)362 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
363 enum i3c_addr_slot_status status)
364 {
365 int bitpos = addr * 2;
366 unsigned long *ptr;
367
368 if (addr > I2C_MAX_ADDR)
369 return;
370
371 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
372 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
373 (bitpos % BITS_PER_LONG));
374 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
375 }
376
i3c_bus_dev_addr_is_avail(struct i3c_bus * bus,u8 addr)377 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
378 {
379 enum i3c_addr_slot_status status;
380
381 status = i3c_bus_get_addr_slot_status(bus, addr);
382
383 return status == I3C_ADDR_SLOT_FREE;
384 }
385
i3c_bus_get_free_addr(struct i3c_bus * bus,u8 start_addr)386 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
387 {
388 enum i3c_addr_slot_status status;
389 u8 addr;
390
391 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
392 status = i3c_bus_get_addr_slot_status(bus, addr);
393 if (status == I3C_ADDR_SLOT_FREE)
394 return addr;
395 }
396
397 return -ENOMEM;
398 }
399
i3c_bus_init_addrslots(struct i3c_bus * bus)400 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
401 {
402 int i;
403
404 /* Addresses 0 to 7 are reserved. */
405 for (i = 0; i < 8; i++)
406 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
407
408 /*
409 * Reserve broadcast address and all addresses that might collide
410 * with the broadcast address when facing a single bit error.
411 */
412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
413 I3C_ADDR_SLOT_RSVD);
414 for (i = 0; i < 7; i++)
415 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
416 I3C_ADDR_SLOT_RSVD);
417 }
418
i3c_bus_cleanup(struct i3c_bus * i3cbus)419 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
420 {
421 mutex_lock(&i3c_core_lock);
422 idr_remove(&i3c_bus_idr, i3cbus->id);
423 mutex_unlock(&i3c_core_lock);
424 }
425
i3c_bus_init(struct i3c_bus * i3cbus,struct device_node * np)426 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
427 {
428 int ret, start, end, id = -1;
429
430 init_rwsem(&i3cbus->lock);
431 INIT_LIST_HEAD(&i3cbus->devs.i2c);
432 INIT_LIST_HEAD(&i3cbus->devs.i3c);
433 i3c_bus_init_addrslots(i3cbus);
434 i3cbus->mode = I3C_BUS_MODE_PURE;
435
436 if (np)
437 id = of_alias_get_id(np, "i3c");
438
439 mutex_lock(&i3c_core_lock);
440 if (id >= 0) {
441 start = id;
442 end = start + 1;
443 } else {
444 start = __i3c_first_dynamic_bus_num;
445 end = 0;
446 }
447
448 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
449 mutex_unlock(&i3c_core_lock);
450
451 if (ret < 0)
452 return ret;
453
454 i3cbus->id = ret;
455
456 return 0;
457 }
458
i3c_for_each_bus_locked(int (* fn)(struct i3c_bus * bus,void * data),void * data)459 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
460 void *data)
461 {
462 struct i3c_bus *bus;
463 int id;
464
465 mutex_lock(&i3c_core_lock);
466 idr_for_each_entry(&i3c_bus_idr, bus, id)
467 fn(bus, data);
468 mutex_unlock(&i3c_core_lock);
469 }
470 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
471
i3c_register_notifier(struct notifier_block * nb)472 int i3c_register_notifier(struct notifier_block *nb)
473 {
474 return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
475 }
476 EXPORT_SYMBOL_GPL(i3c_register_notifier);
477
i3c_unregister_notifier(struct notifier_block * nb)478 int i3c_unregister_notifier(struct notifier_block *nb)
479 {
480 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
481 }
482 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
483
i3c_bus_notify(struct i3c_bus * bus,unsigned int action)484 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
485 {
486 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
487 }
488
489 static const char * const i3c_bus_mode_strings[] = {
490 [I3C_BUS_MODE_PURE] = "pure",
491 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
492 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
493 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
494 };
495
mode_show(struct device * dev,struct device_attribute * da,char * buf)496 static ssize_t mode_show(struct device *dev,
497 struct device_attribute *da,
498 char *buf)
499 {
500 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
501 ssize_t ret;
502
503 i3c_bus_normaluse_lock(i3cbus);
504 if (i3cbus->mode < 0 ||
505 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
506 !i3c_bus_mode_strings[i3cbus->mode])
507 ret = sprintf(buf, "unknown\n");
508 else
509 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
510 i3c_bus_normaluse_unlock(i3cbus);
511
512 return ret;
513 }
514 static DEVICE_ATTR_RO(mode);
515
current_master_show(struct device * dev,struct device_attribute * da,char * buf)516 static ssize_t current_master_show(struct device *dev,
517 struct device_attribute *da,
518 char *buf)
519 {
520 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
521 ssize_t ret;
522
523 i3c_bus_normaluse_lock(i3cbus);
524 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
525 i3cbus->cur_master->info.pid);
526 i3c_bus_normaluse_unlock(i3cbus);
527
528 return ret;
529 }
530 static DEVICE_ATTR_RO(current_master);
531
i3c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)532 static ssize_t i3c_scl_frequency_show(struct device *dev,
533 struct device_attribute *da,
534 char *buf)
535 {
536 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
537 ssize_t ret;
538
539 i3c_bus_normaluse_lock(i3cbus);
540 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
541 i3c_bus_normaluse_unlock(i3cbus);
542
543 return ret;
544 }
545 static DEVICE_ATTR_RO(i3c_scl_frequency);
546
i2c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)547 static ssize_t i2c_scl_frequency_show(struct device *dev,
548 struct device_attribute *da,
549 char *buf)
550 {
551 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
552 ssize_t ret;
553
554 i3c_bus_normaluse_lock(i3cbus);
555 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
556 i3c_bus_normaluse_unlock(i3cbus);
557
558 return ret;
559 }
560 static DEVICE_ATTR_RO(i2c_scl_frequency);
561
i3c_set_hotjoin(struct i3c_master_controller * master,bool enable)562 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
563 {
564 int ret;
565
566 if (!master || !master->ops)
567 return -EINVAL;
568
569 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
570 return -EINVAL;
571
572 i3c_bus_normaluse_lock(&master->bus);
573
574 if (enable)
575 ret = master->ops->enable_hotjoin(master);
576 else
577 ret = master->ops->disable_hotjoin(master);
578
579 master->hotjoin = enable;
580
581 i3c_bus_normaluse_unlock(&master->bus);
582
583 return ret;
584 }
585
hotjoin_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)586 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
587 const char *buf, size_t count)
588 {
589 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
590 int ret;
591 bool res;
592
593 if (!i3cbus->cur_master)
594 return -EINVAL;
595
596 if (kstrtobool(buf, &res))
597 return -EINVAL;
598
599 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
600 if (ret)
601 return ret;
602
603 return count;
604 }
605
606 /*
607 * i3c_master_enable_hotjoin - Enable hotjoin
608 * @master: I3C master object
609 *
610 * Return: a 0 in case of success, an negative error code otherwise.
611 */
i3c_master_enable_hotjoin(struct i3c_master_controller * master)612 int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
613 {
614 return i3c_set_hotjoin(master, true);
615 }
616 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
617
618 /*
619 * i3c_master_disable_hotjoin - Disable hotjoin
620 * @master: I3C master object
621 *
622 * Return: a 0 in case of success, an negative error code otherwise.
623 */
i3c_master_disable_hotjoin(struct i3c_master_controller * master)624 int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
625 {
626 return i3c_set_hotjoin(master, false);
627 }
628 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
629
hotjoin_show(struct device * dev,struct device_attribute * da,char * buf)630 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
631 {
632 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
633 ssize_t ret;
634
635 i3c_bus_normaluse_lock(i3cbus);
636 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
637 i3c_bus_normaluse_unlock(i3cbus);
638
639 return ret;
640 }
641
642 static DEVICE_ATTR_RW(hotjoin);
643
644 static struct attribute *i3c_masterdev_attrs[] = {
645 &dev_attr_mode.attr,
646 &dev_attr_current_master.attr,
647 &dev_attr_i3c_scl_frequency.attr,
648 &dev_attr_i2c_scl_frequency.attr,
649 &dev_attr_bcr.attr,
650 &dev_attr_dcr.attr,
651 &dev_attr_pid.attr,
652 &dev_attr_dynamic_address.attr,
653 &dev_attr_hdrcap.attr,
654 &dev_attr_hotjoin.attr,
655 NULL,
656 };
657 ATTRIBUTE_GROUPS(i3c_masterdev);
658
i3c_masterdev_release(struct device * dev)659 static void i3c_masterdev_release(struct device *dev)
660 {
661 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
662 struct i3c_bus *bus = dev_to_i3cbus(dev);
663
664 if (master->wq)
665 destroy_workqueue(master->wq);
666
667 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
668 i3c_bus_cleanup(bus);
669
670 of_node_put(dev->of_node);
671 }
672
673 static const struct device_type i3c_masterdev_type = {
674 .groups = i3c_masterdev_groups,
675 };
676
i3c_bus_set_mode(struct i3c_bus * i3cbus,enum i3c_bus_mode mode,unsigned long max_i2c_scl_rate)677 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
678 unsigned long max_i2c_scl_rate)
679 {
680 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
681
682 i3cbus->mode = mode;
683
684 switch (i3cbus->mode) {
685 case I3C_BUS_MODE_PURE:
686 if (!i3cbus->scl_rate.i3c)
687 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
688 break;
689 case I3C_BUS_MODE_MIXED_FAST:
690 case I3C_BUS_MODE_MIXED_LIMITED:
691 if (!i3cbus->scl_rate.i3c)
692 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
693 if (!i3cbus->scl_rate.i2c)
694 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
695 break;
696 case I3C_BUS_MODE_MIXED_SLOW:
697 if (!i3cbus->scl_rate.i2c)
698 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
699 if (!i3cbus->scl_rate.i3c ||
700 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
701 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
702 break;
703 default:
704 return -EINVAL;
705 }
706
707 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
708 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
709
710 /*
711 * I3C/I2C frequency may have been overridden, check that user-provided
712 * values are not exceeding max possible frequency.
713 */
714 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
715 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
716 return -EINVAL;
717
718 return 0;
719 }
720
721 static struct i3c_master_controller *
i2c_adapter_to_i3c_master(struct i2c_adapter * adap)722 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
723 {
724 return container_of(adap, struct i3c_master_controller, i2c);
725 }
726
727 static struct i2c_adapter *
i3c_master_to_i2c_adapter(struct i3c_master_controller * master)728 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
729 {
730 return &master->i2c;
731 }
732
i3c_master_free_i2c_dev(struct i2c_dev_desc * dev)733 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
734 {
735 kfree(dev);
736 }
737
738 static struct i2c_dev_desc *
i3c_master_alloc_i2c_dev(struct i3c_master_controller * master,u16 addr,u8 lvr)739 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
740 u16 addr, u8 lvr)
741 {
742 struct i2c_dev_desc *dev;
743
744 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
745 if (!dev)
746 return ERR_PTR(-ENOMEM);
747
748 dev->common.master = master;
749 dev->addr = addr;
750 dev->lvr = lvr;
751
752 return dev;
753 }
754
i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest * dest,u8 addr,u16 payloadlen)755 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
756 u16 payloadlen)
757 {
758 dest->addr = addr;
759 dest->payload.len = payloadlen;
760 if (payloadlen)
761 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
762 else
763 dest->payload.data = NULL;
764
765 return dest->payload.data;
766 }
767
i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest * dest)768 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
769 {
770 kfree(dest->payload.data);
771 }
772
i3c_ccc_cmd_init(struct i3c_ccc_cmd * cmd,bool rnw,u8 id,struct i3c_ccc_cmd_dest * dests,unsigned int ndests)773 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
774 struct i3c_ccc_cmd_dest *dests,
775 unsigned int ndests)
776 {
777 cmd->rnw = rnw ? 1 : 0;
778 cmd->id = id;
779 cmd->dests = dests;
780 cmd->ndests = ndests;
781 cmd->err = I3C_ERROR_UNKNOWN;
782 }
783
i3c_master_send_ccc_cmd_locked(struct i3c_master_controller * master,struct i3c_ccc_cmd * cmd)784 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
785 struct i3c_ccc_cmd *cmd)
786 {
787 int ret;
788
789 if (!cmd || !master)
790 return -EINVAL;
791
792 if (WARN_ON(master->init_done &&
793 !rwsem_is_locked(&master->bus.lock)))
794 return -EINVAL;
795
796 if (!master->ops->send_ccc_cmd)
797 return -ENOTSUPP;
798
799 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
800 return -EINVAL;
801
802 if (master->ops->supports_ccc_cmd &&
803 !master->ops->supports_ccc_cmd(master, cmd))
804 return -ENOTSUPP;
805
806 ret = master->ops->send_ccc_cmd(master, cmd);
807 if (ret) {
808 if (cmd->err != I3C_ERROR_UNKNOWN)
809 return cmd->err;
810
811 return ret;
812 }
813
814 return 0;
815 }
816
817 static struct i2c_dev_desc *
i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller * master,u16 addr)818 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
819 u16 addr)
820 {
821 struct i2c_dev_desc *dev;
822
823 i3c_bus_for_each_i2cdev(&master->bus, dev) {
824 if (dev->addr == addr)
825 return dev;
826 }
827
828 return NULL;
829 }
830
831 /**
832 * i3c_master_get_free_addr() - get a free address on the bus
833 * @master: I3C master object
834 * @start_addr: where to start searching
835 *
836 * This function must be called with the bus lock held in write mode.
837 *
838 * Return: the first free address starting at @start_addr (included) or -ENOMEM
839 * if there's no more address available.
840 */
i3c_master_get_free_addr(struct i3c_master_controller * master,u8 start_addr)841 int i3c_master_get_free_addr(struct i3c_master_controller *master,
842 u8 start_addr)
843 {
844 return i3c_bus_get_free_addr(&master->bus, start_addr);
845 }
846 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
847
i3c_device_release(struct device * dev)848 static void i3c_device_release(struct device *dev)
849 {
850 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
851
852 WARN_ON(i3cdev->desc);
853
854 of_node_put(i3cdev->dev.of_node);
855 kfree(i3cdev);
856 }
857
i3c_master_free_i3c_dev(struct i3c_dev_desc * dev)858 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
859 {
860 kfree(dev);
861 }
862
863 static struct i3c_dev_desc *
i3c_master_alloc_i3c_dev(struct i3c_master_controller * master,const struct i3c_device_info * info)864 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
865 const struct i3c_device_info *info)
866 {
867 struct i3c_dev_desc *dev;
868
869 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
870 if (!dev)
871 return ERR_PTR(-ENOMEM);
872
873 dev->common.master = master;
874 dev->info = *info;
875 mutex_init(&dev->ibi_lock);
876
877 return dev;
878 }
879
i3c_master_rstdaa_locked(struct i3c_master_controller * master,u8 addr)880 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
881 u8 addr)
882 {
883 enum i3c_addr_slot_status addrstat;
884 struct i3c_ccc_cmd_dest dest;
885 struct i3c_ccc_cmd cmd;
886 int ret;
887
888 if (!master)
889 return -EINVAL;
890
891 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
892 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
893 return -EINVAL;
894
895 i3c_ccc_cmd_dest_init(&dest, addr, 0);
896 i3c_ccc_cmd_init(&cmd, false,
897 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
898 &dest, 1);
899 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
900 i3c_ccc_cmd_dest_cleanup(&dest);
901
902 return ret;
903 }
904
905 /**
906 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
907 * procedure
908 * @master: master used to send frames on the bus
909 *
910 * Send a ENTDAA CCC command to start a DAA procedure.
911 *
912 * Note that this function only sends the ENTDAA CCC command, all the logic
913 * behind dynamic address assignment has to be handled in the I3C master
914 * driver.
915 *
916 * This function must be called with the bus lock held in write mode.
917 *
918 * Return: 0 in case of success, a positive I3C error code if the error is
919 * one of the official Mx error codes, and a negative error code otherwise.
920 */
i3c_master_entdaa_locked(struct i3c_master_controller * master)921 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
922 {
923 struct i3c_ccc_cmd_dest dest;
924 struct i3c_ccc_cmd cmd;
925 int ret;
926
927 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
928 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
929 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
930 i3c_ccc_cmd_dest_cleanup(&dest);
931
932 return ret;
933 }
934 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
935
i3c_master_enec_disec_locked(struct i3c_master_controller * master,u8 addr,bool enable,u8 evts)936 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
937 u8 addr, bool enable, u8 evts)
938 {
939 struct i3c_ccc_events *events;
940 struct i3c_ccc_cmd_dest dest;
941 struct i3c_ccc_cmd cmd;
942 int ret;
943
944 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
945 if (!events)
946 return -ENOMEM;
947
948 events->events = evts;
949 i3c_ccc_cmd_init(&cmd, false,
950 enable ?
951 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
952 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
953 &dest, 1);
954 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
955 i3c_ccc_cmd_dest_cleanup(&dest);
956
957 return ret;
958 }
959
960 /**
961 * i3c_master_disec_locked() - send a DISEC CCC command
962 * @master: master used to send frames on the bus
963 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
964 * @evts: events to disable
965 *
966 * Send a DISEC CCC command to disable some or all events coming from a
967 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
968 *
969 * This function must be called with the bus lock held in write mode.
970 *
971 * Return: 0 in case of success, a positive I3C error code if the error is
972 * one of the official Mx error codes, and a negative error code otherwise.
973 */
i3c_master_disec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)974 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
975 u8 evts)
976 {
977 return i3c_master_enec_disec_locked(master, addr, false, evts);
978 }
979 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
980
981 /**
982 * i3c_master_enec_locked() - send an ENEC CCC command
983 * @master: master used to send frames on the bus
984 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
985 * @evts: events to disable
986 *
987 * Sends an ENEC CCC command to enable some or all events coming from a
988 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
989 *
990 * This function must be called with the bus lock held in write mode.
991 *
992 * Return: 0 in case of success, a positive I3C error code if the error is
993 * one of the official Mx error codes, and a negative error code otherwise.
994 */
i3c_master_enec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)995 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
996 u8 evts)
997 {
998 return i3c_master_enec_disec_locked(master, addr, true, evts);
999 }
1000 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1001
1002 /**
1003 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1004 * @master: master used to send frames on the bus
1005 *
1006 * Send a DEFSLVS CCC command containing all the devices known to the @master.
1007 * This is useful when you have secondary masters on the bus to propagate
1008 * device information.
1009 *
1010 * This should be called after all I3C devices have been discovered (in other
1011 * words, after the DAA procedure has finished) and instantiated in
1012 * &i3c_master_controller_ops->bus_init().
1013 * It should also be called if a master ACKed an Hot-Join request and assigned
1014 * a dynamic address to the device joining the bus.
1015 *
1016 * This function must be called with the bus lock held in write mode.
1017 *
1018 * Return: 0 in case of success, a positive I3C error code if the error is
1019 * one of the official Mx error codes, and a negative error code otherwise.
1020 */
i3c_master_defslvs_locked(struct i3c_master_controller * master)1021 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1022 {
1023 struct i3c_ccc_defslvs *defslvs;
1024 struct i3c_ccc_dev_desc *desc;
1025 struct i3c_ccc_cmd_dest dest;
1026 struct i3c_dev_desc *i3cdev;
1027 struct i2c_dev_desc *i2cdev;
1028 struct i3c_ccc_cmd cmd;
1029 struct i3c_bus *bus;
1030 bool send = false;
1031 int ndevs = 0, ret;
1032
1033 if (!master)
1034 return -EINVAL;
1035
1036 bus = i3c_master_get_bus(master);
1037 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1038 ndevs++;
1039
1040 if (i3cdev == master->this)
1041 continue;
1042
1043 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1044 I3C_BCR_I3C_MASTER)
1045 send = true;
1046 }
1047
1048 /* No other master on the bus, skip DEFSLVS. */
1049 if (!send)
1050 return 0;
1051
1052 i3c_bus_for_each_i2cdev(bus, i2cdev)
1053 ndevs++;
1054
1055 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1056 struct_size(defslvs, slaves,
1057 ndevs - 1));
1058 if (!defslvs)
1059 return -ENOMEM;
1060
1061 defslvs->count = ndevs;
1062 defslvs->master.bcr = master->this->info.bcr;
1063 defslvs->master.dcr = master->this->info.dcr;
1064 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1065 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1066
1067 desc = defslvs->slaves;
1068 i3c_bus_for_each_i2cdev(bus, i2cdev) {
1069 desc->lvr = i2cdev->lvr;
1070 desc->static_addr = i2cdev->addr << 1;
1071 desc++;
1072 }
1073
1074 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1075 /* Skip the I3C dev representing this master. */
1076 if (i3cdev == master->this)
1077 continue;
1078
1079 desc->bcr = i3cdev->info.bcr;
1080 desc->dcr = i3cdev->info.dcr;
1081 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1082 desc->static_addr = i3cdev->info.static_addr << 1;
1083 desc++;
1084 }
1085
1086 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1087 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1088 i3c_ccc_cmd_dest_cleanup(&dest);
1089
1090 return ret;
1091 }
1092 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1093
i3c_master_setda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr,bool setdasa)1094 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1095 u8 oldaddr, u8 newaddr, bool setdasa)
1096 {
1097 struct i3c_ccc_cmd_dest dest;
1098 struct i3c_ccc_setda *setda;
1099 struct i3c_ccc_cmd cmd;
1100 int ret;
1101
1102 if (!oldaddr || !newaddr)
1103 return -EINVAL;
1104
1105 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1106 if (!setda)
1107 return -ENOMEM;
1108
1109 setda->addr = newaddr << 1;
1110 i3c_ccc_cmd_init(&cmd, false,
1111 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1112 &dest, 1);
1113 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1114 i3c_ccc_cmd_dest_cleanup(&dest);
1115
1116 return ret;
1117 }
1118
i3c_master_setdasa_locked(struct i3c_master_controller * master,u8 static_addr,u8 dyn_addr)1119 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1120 u8 static_addr, u8 dyn_addr)
1121 {
1122 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1123 }
1124
i3c_master_setnewda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr)1125 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1126 u8 oldaddr, u8 newaddr)
1127 {
1128 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1129 }
1130
i3c_master_getmrl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1131 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1132 struct i3c_device_info *info)
1133 {
1134 struct i3c_ccc_cmd_dest dest;
1135 struct i3c_ccc_mrl *mrl;
1136 struct i3c_ccc_cmd cmd;
1137 int ret;
1138
1139 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1140 if (!mrl)
1141 return -ENOMEM;
1142
1143 /*
1144 * When the device does not have IBI payload GETMRL only returns 2
1145 * bytes of data.
1146 */
1147 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1148 dest.payload.len -= 1;
1149
1150 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1151 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1152 if (ret)
1153 goto out;
1154
1155 switch (dest.payload.len) {
1156 case 3:
1157 info->max_ibi_len = mrl->ibi_len;
1158 fallthrough;
1159 case 2:
1160 info->max_read_len = be16_to_cpu(mrl->read_len);
1161 break;
1162 default:
1163 ret = -EIO;
1164 goto out;
1165 }
1166
1167 out:
1168 i3c_ccc_cmd_dest_cleanup(&dest);
1169
1170 return ret;
1171 }
1172
i3c_master_getmwl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1173 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1174 struct i3c_device_info *info)
1175 {
1176 struct i3c_ccc_cmd_dest dest;
1177 struct i3c_ccc_mwl *mwl;
1178 struct i3c_ccc_cmd cmd;
1179 int ret;
1180
1181 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1182 if (!mwl)
1183 return -ENOMEM;
1184
1185 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1186 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1187 if (ret)
1188 goto out;
1189
1190 if (dest.payload.len != sizeof(*mwl)) {
1191 ret = -EIO;
1192 goto out;
1193 }
1194
1195 info->max_write_len = be16_to_cpu(mwl->len);
1196
1197 out:
1198 i3c_ccc_cmd_dest_cleanup(&dest);
1199
1200 return ret;
1201 }
1202
i3c_master_getmxds_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1203 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1204 struct i3c_device_info *info)
1205 {
1206 struct i3c_ccc_getmxds *getmaxds;
1207 struct i3c_ccc_cmd_dest dest;
1208 struct i3c_ccc_cmd cmd;
1209 int ret;
1210
1211 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1212 sizeof(*getmaxds));
1213 if (!getmaxds)
1214 return -ENOMEM;
1215
1216 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1217 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1218 if (ret) {
1219 /*
1220 * Retry when the device does not support max read turnaround
1221 * while expecting shorter length from this CCC command.
1222 */
1223 dest.payload.len -= 3;
1224 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1225 if (ret)
1226 goto out;
1227 }
1228
1229 if (dest.payload.len != 2 && dest.payload.len != 5) {
1230 ret = -EIO;
1231 goto out;
1232 }
1233
1234 info->max_read_ds = getmaxds->maxrd;
1235 info->max_write_ds = getmaxds->maxwr;
1236 if (dest.payload.len == 5)
1237 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1238 ((u32)getmaxds->maxrdturn[1] << 8) |
1239 ((u32)getmaxds->maxrdturn[2] << 16);
1240
1241 out:
1242 i3c_ccc_cmd_dest_cleanup(&dest);
1243
1244 return ret;
1245 }
1246
i3c_master_gethdrcap_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1247 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1248 struct i3c_device_info *info)
1249 {
1250 struct i3c_ccc_gethdrcap *gethdrcap;
1251 struct i3c_ccc_cmd_dest dest;
1252 struct i3c_ccc_cmd cmd;
1253 int ret;
1254
1255 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1256 sizeof(*gethdrcap));
1257 if (!gethdrcap)
1258 return -ENOMEM;
1259
1260 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1261 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1262 if (ret)
1263 goto out;
1264
1265 if (dest.payload.len != 1) {
1266 ret = -EIO;
1267 goto out;
1268 }
1269
1270 info->hdr_cap = gethdrcap->modes;
1271
1272 out:
1273 i3c_ccc_cmd_dest_cleanup(&dest);
1274
1275 return ret;
1276 }
1277
i3c_master_getpid_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1278 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1279 struct i3c_device_info *info)
1280 {
1281 struct i3c_ccc_getpid *getpid;
1282 struct i3c_ccc_cmd_dest dest;
1283 struct i3c_ccc_cmd cmd;
1284 int ret, i;
1285
1286 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1287 if (!getpid)
1288 return -ENOMEM;
1289
1290 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1291 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1292 if (ret)
1293 goto out;
1294
1295 info->pid = 0;
1296 for (i = 0; i < sizeof(getpid->pid); i++) {
1297 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1298
1299 info->pid |= (u64)getpid->pid[i] << sft;
1300 }
1301
1302 out:
1303 i3c_ccc_cmd_dest_cleanup(&dest);
1304
1305 return ret;
1306 }
1307
i3c_master_getbcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1308 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1309 struct i3c_device_info *info)
1310 {
1311 struct i3c_ccc_getbcr *getbcr;
1312 struct i3c_ccc_cmd_dest dest;
1313 struct i3c_ccc_cmd cmd;
1314 int ret;
1315
1316 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1317 if (!getbcr)
1318 return -ENOMEM;
1319
1320 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1321 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1322 if (ret)
1323 goto out;
1324
1325 info->bcr = getbcr->bcr;
1326
1327 out:
1328 i3c_ccc_cmd_dest_cleanup(&dest);
1329
1330 return ret;
1331 }
1332
i3c_master_getdcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1333 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1334 struct i3c_device_info *info)
1335 {
1336 struct i3c_ccc_getdcr *getdcr;
1337 struct i3c_ccc_cmd_dest dest;
1338 struct i3c_ccc_cmd cmd;
1339 int ret;
1340
1341 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1342 if (!getdcr)
1343 return -ENOMEM;
1344
1345 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1346 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1347 if (ret)
1348 goto out;
1349
1350 info->dcr = getdcr->dcr;
1351
1352 out:
1353 i3c_ccc_cmd_dest_cleanup(&dest);
1354
1355 return ret;
1356 }
1357
i3c_master_retrieve_dev_info(struct i3c_dev_desc * dev)1358 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1359 {
1360 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1361 enum i3c_addr_slot_status slot_status;
1362 int ret;
1363
1364 if (!dev->info.dyn_addr)
1365 return -EINVAL;
1366
1367 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1368 dev->info.dyn_addr);
1369 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1370 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1371 return -EINVAL;
1372
1373 ret = i3c_master_getpid_locked(master, &dev->info);
1374 if (ret)
1375 return ret;
1376
1377 ret = i3c_master_getbcr_locked(master, &dev->info);
1378 if (ret)
1379 return ret;
1380
1381 ret = i3c_master_getdcr_locked(master, &dev->info);
1382 if (ret)
1383 return ret;
1384
1385 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1386 ret = i3c_master_getmxds_locked(master, &dev->info);
1387 if (ret)
1388 return ret;
1389 }
1390
1391 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1392 dev->info.max_ibi_len = 1;
1393
1394 i3c_master_getmrl_locked(master, &dev->info);
1395 i3c_master_getmwl_locked(master, &dev->info);
1396
1397 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1398 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1399 if (ret)
1400 return ret;
1401 }
1402
1403 return 0;
1404 }
1405
i3c_master_put_i3c_addrs(struct i3c_dev_desc * dev)1406 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1407 {
1408 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1409
1410 if (dev->info.static_addr)
1411 i3c_bus_set_addr_slot_status(&master->bus,
1412 dev->info.static_addr,
1413 I3C_ADDR_SLOT_FREE);
1414
1415 if (dev->info.dyn_addr)
1416 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1417 I3C_ADDR_SLOT_FREE);
1418
1419 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1420 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1421 I3C_ADDR_SLOT_FREE);
1422 }
1423
i3c_master_get_i3c_addrs(struct i3c_dev_desc * dev)1424 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1425 {
1426 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1427 enum i3c_addr_slot_status status;
1428
1429 if (!dev->info.static_addr && !dev->info.dyn_addr)
1430 return 0;
1431
1432 if (dev->info.static_addr) {
1433 status = i3c_bus_get_addr_slot_status(&master->bus,
1434 dev->info.static_addr);
1435 /* Since static address and assigned dynamic address can be
1436 * equal, allow this case to pass.
1437 */
1438 if (status != I3C_ADDR_SLOT_FREE &&
1439 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1440 return -EBUSY;
1441
1442 i3c_bus_set_addr_slot_status(&master->bus,
1443 dev->info.static_addr,
1444 I3C_ADDR_SLOT_I3C_DEV);
1445 }
1446
1447 /*
1448 * ->init_dyn_addr should have been reserved before that, so, if we're
1449 * trying to apply a pre-reserved dynamic address, we should not try
1450 * to reserve the address slot a second time.
1451 */
1452 if (dev->info.dyn_addr &&
1453 (!dev->boardinfo ||
1454 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1455 status = i3c_bus_get_addr_slot_status(&master->bus,
1456 dev->info.dyn_addr);
1457 if (status != I3C_ADDR_SLOT_FREE)
1458 goto err_release_static_addr;
1459
1460 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1461 I3C_ADDR_SLOT_I3C_DEV);
1462 }
1463
1464 return 0;
1465
1466 err_release_static_addr:
1467 if (dev->info.static_addr)
1468 i3c_bus_set_addr_slot_status(&master->bus,
1469 dev->info.static_addr,
1470 I3C_ADDR_SLOT_FREE);
1471
1472 return -EBUSY;
1473 }
1474
i3c_master_attach_i3c_dev(struct i3c_master_controller * master,struct i3c_dev_desc * dev)1475 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1476 struct i3c_dev_desc *dev)
1477 {
1478 int ret;
1479
1480 /*
1481 * We don't attach devices to the controller until they are
1482 * addressable on the bus.
1483 */
1484 if (!dev->info.static_addr && !dev->info.dyn_addr)
1485 return 0;
1486
1487 ret = i3c_master_get_i3c_addrs(dev);
1488 if (ret)
1489 return ret;
1490
1491 /* Do not attach the master device itself. */
1492 if (master->this != dev && master->ops->attach_i3c_dev) {
1493 ret = master->ops->attach_i3c_dev(dev);
1494 if (ret) {
1495 i3c_master_put_i3c_addrs(dev);
1496 return ret;
1497 }
1498 }
1499
1500 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1501
1502 return 0;
1503 }
1504
i3c_master_reattach_i3c_dev(struct i3c_dev_desc * dev,u8 old_dyn_addr)1505 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1506 u8 old_dyn_addr)
1507 {
1508 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1509 enum i3c_addr_slot_status status;
1510 int ret;
1511
1512 if (dev->info.dyn_addr != old_dyn_addr &&
1513 (!dev->boardinfo ||
1514 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1515 status = i3c_bus_get_addr_slot_status(&master->bus,
1516 dev->info.dyn_addr);
1517 if (status != I3C_ADDR_SLOT_FREE)
1518 return -EBUSY;
1519 i3c_bus_set_addr_slot_status(&master->bus,
1520 dev->info.dyn_addr,
1521 I3C_ADDR_SLOT_I3C_DEV);
1522 if (old_dyn_addr)
1523 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1524 I3C_ADDR_SLOT_FREE);
1525 }
1526
1527 if (master->ops->reattach_i3c_dev) {
1528 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1529 if (ret) {
1530 i3c_master_put_i3c_addrs(dev);
1531 return ret;
1532 }
1533 }
1534
1535 return 0;
1536 }
1537
i3c_master_detach_i3c_dev(struct i3c_dev_desc * dev)1538 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1539 {
1540 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1541
1542 /* Do not detach the master device itself. */
1543 if (master->this != dev && master->ops->detach_i3c_dev)
1544 master->ops->detach_i3c_dev(dev);
1545
1546 i3c_master_put_i3c_addrs(dev);
1547 list_del(&dev->common.node);
1548 }
1549
i3c_master_attach_i2c_dev(struct i3c_master_controller * master,struct i2c_dev_desc * dev)1550 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1551 struct i2c_dev_desc *dev)
1552 {
1553 int ret;
1554
1555 if (master->ops->attach_i2c_dev) {
1556 ret = master->ops->attach_i2c_dev(dev);
1557 if (ret)
1558 return ret;
1559 }
1560
1561 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1562
1563 return 0;
1564 }
1565
i3c_master_detach_i2c_dev(struct i2c_dev_desc * dev)1566 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1567 {
1568 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1569
1570 list_del(&dev->common.node);
1571
1572 if (master->ops->detach_i2c_dev)
1573 master->ops->detach_i2c_dev(dev);
1574 }
1575
i3c_master_early_i3c_dev_add(struct i3c_master_controller * master,struct i3c_dev_boardinfo * boardinfo)1576 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1577 struct i3c_dev_boardinfo *boardinfo)
1578 {
1579 struct i3c_device_info info = {
1580 .static_addr = boardinfo->static_addr,
1581 .pid = boardinfo->pid,
1582 };
1583 struct i3c_dev_desc *i3cdev;
1584 int ret;
1585
1586 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1587 if (IS_ERR(i3cdev))
1588 return -ENOMEM;
1589
1590 i3cdev->boardinfo = boardinfo;
1591
1592 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1593 if (ret)
1594 goto err_free_dev;
1595
1596 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1597 i3cdev->boardinfo->init_dyn_addr);
1598 if (ret)
1599 goto err_detach_dev;
1600
1601 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1602 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1603 if (ret)
1604 goto err_rstdaa;
1605
1606 ret = i3c_master_retrieve_dev_info(i3cdev);
1607 if (ret)
1608 goto err_rstdaa;
1609
1610 return 0;
1611
1612 err_rstdaa:
1613 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1614 err_detach_dev:
1615 i3c_master_detach_i3c_dev(i3cdev);
1616 err_free_dev:
1617 i3c_master_free_i3c_dev(i3cdev);
1618
1619 return ret;
1620 }
1621
1622 static void
i3c_master_register_new_i3c_devs(struct i3c_master_controller * master)1623 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1624 {
1625 struct i3c_dev_desc *desc;
1626 int ret;
1627
1628 if (!master->init_done)
1629 return;
1630
1631 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1632 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1633 continue;
1634
1635 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1636 if (!desc->dev)
1637 continue;
1638
1639 desc->dev->bus = &master->bus;
1640 desc->dev->desc = desc;
1641 desc->dev->dev.parent = &master->dev;
1642 desc->dev->dev.type = &i3c_device_type;
1643 desc->dev->dev.bus = &i3c_bus_type;
1644 desc->dev->dev.release = i3c_device_release;
1645 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1646 desc->info.pid);
1647
1648 if (desc->boardinfo)
1649 desc->dev->dev.of_node = desc->boardinfo->of_node;
1650
1651 ret = device_register(&desc->dev->dev);
1652 if (ret) {
1653 dev_err(&master->dev,
1654 "Failed to add I3C device (err = %d)\n", ret);
1655 put_device(&desc->dev->dev);
1656 }
1657 }
1658 }
1659
1660 /**
1661 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1662 * @master: master doing the DAA
1663 *
1664 * This function is instantiating an I3C device object and adding it to the
1665 * I3C device list. All device information are automatically retrieved using
1666 * standard CCC commands.
1667 *
1668 * The I3C device object is returned in case the master wants to attach
1669 * private data to it using i3c_dev_set_master_data().
1670 *
1671 * This function must be called with the bus lock held in write mode.
1672 *
1673 * Return: a 0 in case of success, an negative error code otherwise.
1674 */
i3c_master_do_daa(struct i3c_master_controller * master)1675 int i3c_master_do_daa(struct i3c_master_controller *master)
1676 {
1677 int ret;
1678
1679 i3c_bus_maintenance_lock(&master->bus);
1680 ret = master->ops->do_daa(master);
1681 i3c_bus_maintenance_unlock(&master->bus);
1682
1683 if (ret)
1684 return ret;
1685
1686 i3c_bus_normaluse_lock(&master->bus);
1687 i3c_master_register_new_i3c_devs(master);
1688 i3c_bus_normaluse_unlock(&master->bus);
1689
1690 return 0;
1691 }
1692 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1693
1694 /**
1695 * i3c_master_set_info() - set master device information
1696 * @master: master used to send frames on the bus
1697 * @info: I3C device information
1698 *
1699 * Set master device info. This should be called from
1700 * &i3c_master_controller_ops->bus_init().
1701 *
1702 * Not all &i3c_device_info fields are meaningful for a master device.
1703 * Here is a list of fields that should be properly filled:
1704 *
1705 * - &i3c_device_info->dyn_addr
1706 * - &i3c_device_info->bcr
1707 * - &i3c_device_info->dcr
1708 * - &i3c_device_info->pid
1709 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1710 * &i3c_device_info->bcr
1711 *
1712 * This function must be called with the bus lock held in maintenance mode.
1713 *
1714 * Return: 0 if @info contains valid information (not every piece of
1715 * information can be checked, but we can at least make sure @info->dyn_addr
1716 * and @info->bcr are correct), -EINVAL otherwise.
1717 */
i3c_master_set_info(struct i3c_master_controller * master,const struct i3c_device_info * info)1718 int i3c_master_set_info(struct i3c_master_controller *master,
1719 const struct i3c_device_info *info)
1720 {
1721 struct i3c_dev_desc *i3cdev;
1722 int ret;
1723
1724 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1725 return -EINVAL;
1726
1727 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1728 master->secondary)
1729 return -EINVAL;
1730
1731 if (master->this)
1732 return -EINVAL;
1733
1734 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1735 if (IS_ERR(i3cdev))
1736 return PTR_ERR(i3cdev);
1737
1738 master->this = i3cdev;
1739 master->bus.cur_master = master->this;
1740
1741 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1742 if (ret)
1743 goto err_free_dev;
1744
1745 return 0;
1746
1747 err_free_dev:
1748 i3c_master_free_i3c_dev(i3cdev);
1749
1750 return ret;
1751 }
1752 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1753
i3c_master_detach_free_devs(struct i3c_master_controller * master)1754 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1755 {
1756 struct i3c_dev_desc *i3cdev, *i3ctmp;
1757 struct i2c_dev_desc *i2cdev, *i2ctmp;
1758
1759 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1760 common.node) {
1761 i3c_master_detach_i3c_dev(i3cdev);
1762
1763 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1764 i3c_bus_set_addr_slot_status(&master->bus,
1765 i3cdev->boardinfo->init_dyn_addr,
1766 I3C_ADDR_SLOT_FREE);
1767
1768 i3c_master_free_i3c_dev(i3cdev);
1769 }
1770
1771 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1772 common.node) {
1773 i3c_master_detach_i2c_dev(i2cdev);
1774 i3c_bus_set_addr_slot_status(&master->bus,
1775 i2cdev->addr,
1776 I3C_ADDR_SLOT_FREE);
1777 i3c_master_free_i2c_dev(i2cdev);
1778 }
1779 }
1780
1781 /**
1782 * i3c_master_bus_init() - initialize an I3C bus
1783 * @master: main master initializing the bus
1784 *
1785 * This function is following all initialisation steps described in the I3C
1786 * specification:
1787 *
1788 * 1. Attach I2C devs to the master so that the master can fill its internal
1789 * device table appropriately
1790 *
1791 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1792 * the master controller. That's usually where the bus mode is selected
1793 * (pure bus or mixed fast/slow bus)
1794 *
1795 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1796 * particularly important when the bus was previously configured by someone
1797 * else (for example the bootloader)
1798 *
1799 * 4. Disable all slave events.
1800 *
1801 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1802 * also have static_addr, try to pre-assign dynamic addresses requested by
1803 * the FW with SETDASA and attach corresponding statically defined I3C
1804 * devices to the master.
1805 *
1806 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1807 * remaining I3C devices
1808 *
1809 * Once this is done, all I3C and I2C devices should be usable.
1810 *
1811 * Return: a 0 in case of success, an negative error code otherwise.
1812 */
i3c_master_bus_init(struct i3c_master_controller * master)1813 static int i3c_master_bus_init(struct i3c_master_controller *master)
1814 {
1815 enum i3c_addr_slot_status status;
1816 struct i2c_dev_boardinfo *i2cboardinfo;
1817 struct i3c_dev_boardinfo *i3cboardinfo;
1818 struct i2c_dev_desc *i2cdev;
1819 int ret;
1820
1821 /*
1822 * First attach all devices with static definitions provided by the
1823 * FW.
1824 */
1825 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1826 status = i3c_bus_get_addr_slot_status(&master->bus,
1827 i2cboardinfo->base.addr);
1828 if (status != I3C_ADDR_SLOT_FREE) {
1829 ret = -EBUSY;
1830 goto err_detach_devs;
1831 }
1832
1833 i3c_bus_set_addr_slot_status(&master->bus,
1834 i2cboardinfo->base.addr,
1835 I3C_ADDR_SLOT_I2C_DEV);
1836
1837 i2cdev = i3c_master_alloc_i2c_dev(master,
1838 i2cboardinfo->base.addr,
1839 i2cboardinfo->lvr);
1840 if (IS_ERR(i2cdev)) {
1841 ret = PTR_ERR(i2cdev);
1842 goto err_detach_devs;
1843 }
1844
1845 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1846 if (ret) {
1847 i3c_master_free_i2c_dev(i2cdev);
1848 goto err_detach_devs;
1849 }
1850 }
1851
1852 /*
1853 * Now execute the controller specific ->bus_init() routine, which
1854 * might configure its internal logic to match the bus limitations.
1855 */
1856 ret = master->ops->bus_init(master);
1857 if (ret)
1858 goto err_detach_devs;
1859
1860 /*
1861 * The master device should have been instantiated in ->bus_init(),
1862 * complain if this was not the case.
1863 */
1864 if (!master->this) {
1865 dev_err(&master->dev,
1866 "master_set_info() was not called in ->bus_init()\n");
1867 ret = -EINVAL;
1868 goto err_bus_cleanup;
1869 }
1870
1871 if (master->ops->set_speed) {
1872 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
1873 if (ret)
1874 goto err_bus_cleanup;
1875 }
1876
1877 /*
1878 * Reset all dynamic address that may have been assigned before
1879 * (assigned by the bootloader for example).
1880 */
1881 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1882 if (ret && ret != I3C_ERROR_M2)
1883 goto err_bus_cleanup;
1884
1885 if (master->ops->set_speed) {
1886 master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
1887 if (ret)
1888 goto err_bus_cleanup;
1889 }
1890
1891 /* Disable all slave events before starting DAA. */
1892 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1893 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1894 I3C_CCC_EVENT_HJ);
1895 if (ret && ret != I3C_ERROR_M2)
1896 goto err_bus_cleanup;
1897
1898 /*
1899 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1900 * address and retrieve device information if needed.
1901 * In case pre-assign dynamic address fails, setting dynamic address to
1902 * the requested init_dyn_addr is retried after DAA is done in
1903 * i3c_master_add_i3c_dev_locked().
1904 */
1905 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1906
1907 /*
1908 * We don't reserve a dynamic address for devices that
1909 * don't explicitly request one.
1910 */
1911 if (!i3cboardinfo->init_dyn_addr)
1912 continue;
1913
1914 ret = i3c_bus_get_addr_slot_status(&master->bus,
1915 i3cboardinfo->init_dyn_addr);
1916 if (ret != I3C_ADDR_SLOT_FREE) {
1917 ret = -EBUSY;
1918 goto err_rstdaa;
1919 }
1920
1921 i3c_bus_set_addr_slot_status(&master->bus,
1922 i3cboardinfo->init_dyn_addr,
1923 I3C_ADDR_SLOT_I3C_DEV);
1924
1925 /*
1926 * Only try to create/attach devices that have a static
1927 * address. Other devices will be created/attached when
1928 * DAA happens, and the requested dynamic address will
1929 * be set using SETNEWDA once those devices become
1930 * addressable.
1931 */
1932
1933 if (i3cboardinfo->static_addr)
1934 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1935 }
1936
1937 ret = i3c_master_do_daa(master);
1938 if (ret)
1939 goto err_rstdaa;
1940
1941 return 0;
1942
1943 err_rstdaa:
1944 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1945
1946 err_bus_cleanup:
1947 if (master->ops->bus_cleanup)
1948 master->ops->bus_cleanup(master);
1949
1950 err_detach_devs:
1951 i3c_master_detach_free_devs(master);
1952
1953 return ret;
1954 }
1955
i3c_master_bus_cleanup(struct i3c_master_controller * master)1956 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1957 {
1958 if (master->ops->bus_cleanup)
1959 master->ops->bus_cleanup(master);
1960
1961 i3c_master_detach_free_devs(master);
1962 }
1963
i3c_master_attach_boardinfo(struct i3c_dev_desc * i3cdev)1964 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1965 {
1966 struct i3c_master_controller *master = i3cdev->common.master;
1967 struct i3c_dev_boardinfo *i3cboardinfo;
1968
1969 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1970 if (i3cdev->info.pid != i3cboardinfo->pid)
1971 continue;
1972
1973 i3cdev->boardinfo = i3cboardinfo;
1974 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1975 return;
1976 }
1977 }
1978
1979 static struct i3c_dev_desc *
i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc * refdev)1980 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1981 {
1982 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1983 struct i3c_dev_desc *i3cdev;
1984
1985 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1986 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1987 return i3cdev;
1988 }
1989
1990 return NULL;
1991 }
1992
1993 /**
1994 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1995 * @master: master used to send frames on the bus
1996 * @addr: I3C slave dynamic address assigned to the device
1997 *
1998 * This function is instantiating an I3C device object and adding it to the
1999 * I3C device list. All device information are automatically retrieved using
2000 * standard CCC commands.
2001 *
2002 * The I3C device object is returned in case the master wants to attach
2003 * private data to it using i3c_dev_set_master_data().
2004 *
2005 * This function must be called with the bus lock held in write mode.
2006 *
2007 * Return: a 0 in case of success, an negative error code otherwise.
2008 */
i3c_master_add_i3c_dev_locked(struct i3c_master_controller * master,u8 addr)2009 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
2010 u8 addr)
2011 {
2012 struct i3c_device_info info = { .dyn_addr = addr };
2013 struct i3c_dev_desc *newdev, *olddev;
2014 u8 old_dyn_addr = addr, expected_dyn_addr;
2015 struct i3c_ibi_setup ibireq = { };
2016 bool enable_ibi = false;
2017 int ret;
2018
2019 if (!master)
2020 return -EINVAL;
2021
2022 newdev = i3c_master_alloc_i3c_dev(master, &info);
2023 if (IS_ERR(newdev))
2024 return PTR_ERR(newdev);
2025
2026 ret = i3c_master_attach_i3c_dev(master, newdev);
2027 if (ret)
2028 goto err_free_dev;
2029
2030 ret = i3c_master_retrieve_dev_info(newdev);
2031 if (ret)
2032 goto err_detach_dev;
2033
2034 i3c_master_attach_boardinfo(newdev);
2035
2036 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2037 if (olddev) {
2038 newdev->dev = olddev->dev;
2039 if (newdev->dev)
2040 newdev->dev->desc = newdev;
2041
2042 /*
2043 * We need to restore the IBI state too, so let's save the
2044 * IBI information and try to restore them after olddev has
2045 * been detached+released and its IBI has been stopped and
2046 * the associated resources have been freed.
2047 */
2048 mutex_lock(&olddev->ibi_lock);
2049 if (olddev->ibi) {
2050 ibireq.handler = olddev->ibi->handler;
2051 ibireq.max_payload_len = olddev->ibi->max_payload_len;
2052 ibireq.num_slots = olddev->ibi->num_slots;
2053
2054 if (olddev->ibi->enabled) {
2055 enable_ibi = true;
2056 i3c_dev_disable_ibi_locked(olddev);
2057 }
2058
2059 i3c_dev_free_ibi_locked(olddev);
2060 }
2061 mutex_unlock(&olddev->ibi_lock);
2062
2063 old_dyn_addr = olddev->info.dyn_addr;
2064
2065 i3c_master_detach_i3c_dev(olddev);
2066 i3c_master_free_i3c_dev(olddev);
2067 }
2068
2069 /*
2070 * Depending on our previous state, the expected dynamic address might
2071 * differ:
2072 * - if the device already had a dynamic address assigned, let's try to
2073 * re-apply this one
2074 * - if the device did not have a dynamic address and the firmware
2075 * requested a specific address, pick this one
2076 * - in any other case, keep the address automatically assigned by the
2077 * master
2078 */
2079 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2080 expected_dyn_addr = old_dyn_addr;
2081 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2082 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2083 else
2084 expected_dyn_addr = newdev->info.dyn_addr;
2085
2086 if (newdev->info.dyn_addr != expected_dyn_addr) {
2087 /*
2088 * Try to apply the expected dynamic address. If it fails, keep
2089 * the address assigned by the master.
2090 */
2091 ret = i3c_master_setnewda_locked(master,
2092 newdev->info.dyn_addr,
2093 expected_dyn_addr);
2094 if (!ret) {
2095 old_dyn_addr = newdev->info.dyn_addr;
2096 newdev->info.dyn_addr = expected_dyn_addr;
2097 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
2098 } else {
2099 dev_err(&master->dev,
2100 "Failed to assign reserved/old address to device %d%llx",
2101 master->bus.id, newdev->info.pid);
2102 }
2103 }
2104
2105 /*
2106 * Now is time to try to restore the IBI setup. If we're lucky,
2107 * everything works as before, otherwise, all we can do is complain.
2108 * FIXME: maybe we should add callback to inform the driver that it
2109 * should request the IBI again instead of trying to hide that from
2110 * him.
2111 */
2112 if (ibireq.handler) {
2113 mutex_lock(&newdev->ibi_lock);
2114 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2115 if (ret) {
2116 dev_err(&master->dev,
2117 "Failed to request IBI on device %d-%llx",
2118 master->bus.id, newdev->info.pid);
2119 } else if (enable_ibi) {
2120 ret = i3c_dev_enable_ibi_locked(newdev);
2121 if (ret)
2122 dev_err(&master->dev,
2123 "Failed to re-enable IBI on device %d-%llx",
2124 master->bus.id, newdev->info.pid);
2125 }
2126 mutex_unlock(&newdev->ibi_lock);
2127 }
2128
2129 return 0;
2130
2131 err_detach_dev:
2132 if (newdev->dev && newdev->dev->desc)
2133 newdev->dev->desc = NULL;
2134
2135 i3c_master_detach_i3c_dev(newdev);
2136
2137 err_free_dev:
2138 i3c_master_free_i3c_dev(newdev);
2139
2140 return ret;
2141 }
2142 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2143
2144 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2145
2146 static int
of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2147 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2148 struct device_node *node, u32 *reg)
2149 {
2150 struct i2c_dev_boardinfo *boardinfo;
2151 struct device *dev = &master->dev;
2152 int ret;
2153
2154 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2155 if (!boardinfo)
2156 return -ENOMEM;
2157
2158 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2159 if (ret)
2160 return ret;
2161
2162 /*
2163 * The I3C Specification does not clearly say I2C devices with 10-bit
2164 * address are supported. These devices can't be passed properly through
2165 * DEFSLVS command.
2166 */
2167 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2168 dev_err(dev, "I2C device with 10 bit address not supported.");
2169 return -ENOTSUPP;
2170 }
2171
2172 /* LVR is encoded in reg[2]. */
2173 boardinfo->lvr = reg[2];
2174
2175 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2176 of_node_get(node);
2177
2178 return 0;
2179 }
2180
2181 static int
of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2182 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2183 struct device_node *node, u32 *reg)
2184 {
2185 struct i3c_dev_boardinfo *boardinfo;
2186 struct device *dev = &master->dev;
2187 enum i3c_addr_slot_status addrstatus;
2188 u32 init_dyn_addr = 0;
2189
2190 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2191 if (!boardinfo)
2192 return -ENOMEM;
2193
2194 if (reg[0]) {
2195 if (reg[0] > I3C_MAX_ADDR)
2196 return -EINVAL;
2197
2198 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2199 reg[0]);
2200 if (addrstatus != I3C_ADDR_SLOT_FREE)
2201 return -EINVAL;
2202 }
2203
2204 boardinfo->static_addr = reg[0];
2205
2206 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2207 if (init_dyn_addr > I3C_MAX_ADDR)
2208 return -EINVAL;
2209
2210 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2211 init_dyn_addr);
2212 if (addrstatus != I3C_ADDR_SLOT_FREE)
2213 return -EINVAL;
2214 }
2215
2216 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2217
2218 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2219 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2220 return -EINVAL;
2221
2222 boardinfo->init_dyn_addr = init_dyn_addr;
2223 boardinfo->of_node = of_node_get(node);
2224 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2225
2226 return 0;
2227 }
2228
of_i3c_master_add_dev(struct i3c_master_controller * master,struct device_node * node)2229 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2230 struct device_node *node)
2231 {
2232 u32 reg[3];
2233 int ret;
2234
2235 if (!master || !node)
2236 return -EINVAL;
2237
2238 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2239 if (ret)
2240 return ret;
2241
2242 /*
2243 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2244 * dealing with an I2C device.
2245 */
2246 if (!reg[1])
2247 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2248 else
2249 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2250
2251 return ret;
2252 }
2253
of_populate_i3c_bus(struct i3c_master_controller * master)2254 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2255 {
2256 struct device *dev = &master->dev;
2257 struct device_node *i3cbus_np = dev->of_node;
2258 struct device_node *node;
2259 int ret;
2260 u32 val;
2261
2262 if (!i3cbus_np)
2263 return 0;
2264
2265 for_each_available_child_of_node(i3cbus_np, node) {
2266 ret = of_i3c_master_add_dev(master, node);
2267 if (ret) {
2268 of_node_put(node);
2269 return ret;
2270 }
2271 }
2272
2273 /*
2274 * The user might want to limit I2C and I3C speed in case some devices
2275 * on the bus are not supporting typical rates, or if the bus topology
2276 * prevents it from using max possible rate.
2277 */
2278 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2279 master->bus.scl_rate.i2c = val;
2280
2281 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2282 master->bus.scl_rate.i3c = val;
2283
2284 return 0;
2285 }
2286
i3c_master_i2c_adapter_xfer(struct i2c_adapter * adap,struct i2c_msg * xfers,int nxfers)2287 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2288 struct i2c_msg *xfers, int nxfers)
2289 {
2290 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2291 struct i2c_dev_desc *dev;
2292 int i, ret;
2293 u16 addr;
2294
2295 if (!xfers || !master || nxfers <= 0)
2296 return -EINVAL;
2297
2298 if (!master->ops->i2c_xfers)
2299 return -ENOTSUPP;
2300
2301 /* Doing transfers to different devices is not supported. */
2302 addr = xfers[0].addr;
2303 for (i = 1; i < nxfers; i++) {
2304 if (addr != xfers[i].addr)
2305 return -ENOTSUPP;
2306 }
2307
2308 i3c_bus_normaluse_lock(&master->bus);
2309 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2310 if (!dev)
2311 ret = -ENOENT;
2312 else
2313 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2314 i3c_bus_normaluse_unlock(&master->bus);
2315
2316 return ret ? ret : nxfers;
2317 }
2318
i3c_master_i2c_funcs(struct i2c_adapter * adapter)2319 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2320 {
2321 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2322 }
2323
i3c_master_i2c_get_lvr(struct i2c_client * client)2324 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2325 {
2326 /* Fall back to no spike filters and FM bus mode. */
2327 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2328
2329 if (client->dev.of_node) {
2330 u32 reg[3];
2331
2332 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2333 reg, ARRAY_SIZE(reg)))
2334 lvr = reg[2];
2335 }
2336
2337 return lvr;
2338 }
2339
i3c_master_i2c_attach(struct i2c_adapter * adap,struct i2c_client * client)2340 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2341 {
2342 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2343 enum i3c_addr_slot_status status;
2344 struct i2c_dev_desc *i2cdev;
2345 int ret;
2346
2347 /* Already added by board info? */
2348 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2349 return 0;
2350
2351 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2352 if (status != I3C_ADDR_SLOT_FREE)
2353 return -EBUSY;
2354
2355 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2356 I3C_ADDR_SLOT_I2C_DEV);
2357
2358 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2359 i3c_master_i2c_get_lvr(client));
2360 if (IS_ERR(i2cdev)) {
2361 ret = PTR_ERR(i2cdev);
2362 goto out_clear_status;
2363 }
2364
2365 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2366 if (ret)
2367 goto out_free_dev;
2368
2369 return 0;
2370
2371 out_free_dev:
2372 i3c_master_free_i2c_dev(i2cdev);
2373 out_clear_status:
2374 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2375 I3C_ADDR_SLOT_FREE);
2376
2377 return ret;
2378 }
2379
i3c_master_i2c_detach(struct i2c_adapter * adap,struct i2c_client * client)2380 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2381 {
2382 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2383 struct i2c_dev_desc *dev;
2384
2385 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2386 if (!dev)
2387 return -ENODEV;
2388
2389 i3c_master_detach_i2c_dev(dev);
2390 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2391 I3C_ADDR_SLOT_FREE);
2392 i3c_master_free_i2c_dev(dev);
2393
2394 return 0;
2395 }
2396
2397 static const struct i2c_algorithm i3c_master_i2c_algo = {
2398 .master_xfer = i3c_master_i2c_adapter_xfer,
2399 .functionality = i3c_master_i2c_funcs,
2400 };
2401
i3c_i2c_notifier_call(struct notifier_block * nb,unsigned long action,void * data)2402 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2403 void *data)
2404 {
2405 struct i2c_adapter *adap;
2406 struct i2c_client *client;
2407 struct device *dev = data;
2408 struct i3c_master_controller *master;
2409 int ret;
2410
2411 if (dev->type != &i2c_client_type)
2412 return 0;
2413
2414 client = to_i2c_client(dev);
2415 adap = client->adapter;
2416
2417 if (adap->algo != &i3c_master_i2c_algo)
2418 return 0;
2419
2420 master = i2c_adapter_to_i3c_master(adap);
2421
2422 i3c_bus_maintenance_lock(&master->bus);
2423 switch (action) {
2424 case BUS_NOTIFY_ADD_DEVICE:
2425 ret = i3c_master_i2c_attach(adap, client);
2426 break;
2427 case BUS_NOTIFY_DEL_DEVICE:
2428 ret = i3c_master_i2c_detach(adap, client);
2429 break;
2430 }
2431 i3c_bus_maintenance_unlock(&master->bus);
2432
2433 return ret;
2434 }
2435
2436 static struct notifier_block i2cdev_notifier = {
2437 .notifier_call = i3c_i2c_notifier_call,
2438 };
2439
i3c_master_i2c_adapter_init(struct i3c_master_controller * master)2440 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2441 {
2442 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2443 struct i2c_dev_desc *i2cdev;
2444 struct i2c_dev_boardinfo *i2cboardinfo;
2445 int ret;
2446
2447 adap->dev.parent = master->dev.parent;
2448 adap->owner = master->dev.parent->driver->owner;
2449 adap->algo = &i3c_master_i2c_algo;
2450 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2451
2452 /* FIXME: Should we allow i3c masters to override these values? */
2453 adap->timeout = 1000;
2454 adap->retries = 3;
2455
2456 ret = i2c_add_adapter(adap);
2457 if (ret)
2458 return ret;
2459
2460 /*
2461 * We silently ignore failures here. The bus should keep working
2462 * correctly even if one or more i2c devices are not registered.
2463 */
2464 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2465 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2466 i2cboardinfo->base.addr);
2467 if (WARN_ON(!i2cdev))
2468 continue;
2469 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2470 }
2471
2472 return 0;
2473 }
2474
i3c_master_i2c_adapter_cleanup(struct i3c_master_controller * master)2475 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2476 {
2477 struct i2c_dev_desc *i2cdev;
2478
2479 i2c_del_adapter(&master->i2c);
2480
2481 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2482 i2cdev->dev = NULL;
2483 }
2484
i3c_master_unregister_i3c_devs(struct i3c_master_controller * master)2485 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2486 {
2487 struct i3c_dev_desc *i3cdev;
2488
2489 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2490 if (!i3cdev->dev)
2491 continue;
2492
2493 i3cdev->dev->desc = NULL;
2494 if (device_is_registered(&i3cdev->dev->dev))
2495 device_unregister(&i3cdev->dev->dev);
2496 else
2497 put_device(&i3cdev->dev->dev);
2498 i3cdev->dev = NULL;
2499 }
2500 }
2501
2502 /**
2503 * i3c_master_queue_ibi() - Queue an IBI
2504 * @dev: the device this IBI is coming from
2505 * @slot: the IBI slot used to store the payload
2506 *
2507 * Queue an IBI to the controller workqueue. The IBI handler attached to
2508 * the dev will be called from a workqueue context.
2509 */
i3c_master_queue_ibi(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2510 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2511 {
2512 atomic_inc(&dev->ibi->pending_ibis);
2513 queue_work(dev->ibi->wq, &slot->work);
2514 }
2515 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2516
i3c_master_handle_ibi(struct work_struct * work)2517 static void i3c_master_handle_ibi(struct work_struct *work)
2518 {
2519 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2520 work);
2521 struct i3c_dev_desc *dev = slot->dev;
2522 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2523 struct i3c_ibi_payload payload;
2524
2525 payload.data = slot->data;
2526 payload.len = slot->len;
2527
2528 if (dev->dev)
2529 dev->ibi->handler(dev->dev, &payload);
2530
2531 master->ops->recycle_ibi_slot(dev, slot);
2532 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2533 complete(&dev->ibi->all_ibis_handled);
2534 }
2535
i3c_master_init_ibi_slot(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2536 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2537 struct i3c_ibi_slot *slot)
2538 {
2539 slot->dev = dev;
2540 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2541 }
2542
2543 struct i3c_generic_ibi_slot {
2544 struct list_head node;
2545 struct i3c_ibi_slot base;
2546 };
2547
2548 struct i3c_generic_ibi_pool {
2549 spinlock_t lock;
2550 unsigned int num_slots;
2551 struct i3c_generic_ibi_slot *slots;
2552 void *payload_buf;
2553 struct list_head free_slots;
2554 struct list_head pending;
2555 };
2556
2557 /**
2558 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2559 * @pool: the IBI pool to free
2560 *
2561 * Free all IBI slots allated by a generic IBI pool.
2562 */
i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool * pool)2563 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2564 {
2565 struct i3c_generic_ibi_slot *slot;
2566 unsigned int nslots = 0;
2567
2568 while (!list_empty(&pool->free_slots)) {
2569 slot = list_first_entry(&pool->free_slots,
2570 struct i3c_generic_ibi_slot, node);
2571 list_del(&slot->node);
2572 nslots++;
2573 }
2574
2575 /*
2576 * If the number of freed slots is not equal to the number of allocated
2577 * slots we have a leak somewhere.
2578 */
2579 WARN_ON(nslots != pool->num_slots);
2580
2581 kfree(pool->payload_buf);
2582 kfree(pool->slots);
2583 kfree(pool);
2584 }
2585 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2586
2587 /**
2588 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2589 * @dev: the device this pool will be used for
2590 * @req: IBI setup request describing what the device driver expects
2591 *
2592 * Create a generic IBI pool based on the information provided in @req.
2593 *
2594 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2595 */
2596 struct i3c_generic_ibi_pool *
i3c_generic_ibi_alloc_pool(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2597 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2598 const struct i3c_ibi_setup *req)
2599 {
2600 struct i3c_generic_ibi_pool *pool;
2601 struct i3c_generic_ibi_slot *slot;
2602 unsigned int i;
2603 int ret;
2604
2605 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2606 if (!pool)
2607 return ERR_PTR(-ENOMEM);
2608
2609 spin_lock_init(&pool->lock);
2610 INIT_LIST_HEAD(&pool->free_slots);
2611 INIT_LIST_HEAD(&pool->pending);
2612
2613 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2614 if (!pool->slots) {
2615 ret = -ENOMEM;
2616 goto err_free_pool;
2617 }
2618
2619 if (req->max_payload_len) {
2620 pool->payload_buf = kcalloc(req->num_slots,
2621 req->max_payload_len, GFP_KERNEL);
2622 if (!pool->payload_buf) {
2623 ret = -ENOMEM;
2624 goto err_free_pool;
2625 }
2626 }
2627
2628 for (i = 0; i < req->num_slots; i++) {
2629 slot = &pool->slots[i];
2630 i3c_master_init_ibi_slot(dev, &slot->base);
2631
2632 if (req->max_payload_len)
2633 slot->base.data = pool->payload_buf +
2634 (i * req->max_payload_len);
2635
2636 list_add_tail(&slot->node, &pool->free_slots);
2637 pool->num_slots++;
2638 }
2639
2640 return pool;
2641
2642 err_free_pool:
2643 i3c_generic_ibi_free_pool(pool);
2644 return ERR_PTR(ret);
2645 }
2646 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2647
2648 /**
2649 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2650 * @pool: the pool to query an IBI slot on
2651 *
2652 * Search for a free slot in a generic IBI pool.
2653 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2654 * when it's no longer needed.
2655 *
2656 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2657 */
2658 struct i3c_ibi_slot *
i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool * pool)2659 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2660 {
2661 struct i3c_generic_ibi_slot *slot;
2662 unsigned long flags;
2663
2664 spin_lock_irqsave(&pool->lock, flags);
2665 slot = list_first_entry_or_null(&pool->free_slots,
2666 struct i3c_generic_ibi_slot, node);
2667 if (slot)
2668 list_del(&slot->node);
2669 spin_unlock_irqrestore(&pool->lock, flags);
2670
2671 return slot ? &slot->base : NULL;
2672 }
2673 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2674
2675 /**
2676 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2677 * @pool: the pool to return the IBI slot to
2678 * @s: IBI slot to recycle
2679 *
2680 * Add an IBI slot back to its generic IBI pool. Should be called from the
2681 * master driver struct_master_controller_ops->recycle_ibi() method.
2682 */
i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool * pool,struct i3c_ibi_slot * s)2683 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2684 struct i3c_ibi_slot *s)
2685 {
2686 struct i3c_generic_ibi_slot *slot;
2687 unsigned long flags;
2688
2689 if (!s)
2690 return;
2691
2692 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2693 spin_lock_irqsave(&pool->lock, flags);
2694 list_add_tail(&slot->node, &pool->free_slots);
2695 spin_unlock_irqrestore(&pool->lock, flags);
2696 }
2697 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2698
i3c_master_check_ops(const struct i3c_master_controller_ops * ops)2699 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2700 {
2701 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2702 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2703 return -EINVAL;
2704
2705 if (ops->request_ibi &&
2706 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2707 !ops->recycle_ibi_slot))
2708 return -EINVAL;
2709
2710 return 0;
2711 }
2712
2713 /**
2714 * i3c_master_register() - register an I3C master
2715 * @master: master used to send frames on the bus
2716 * @parent: the parent device (the one that provides this I3C master
2717 * controller)
2718 * @ops: the master controller operations
2719 * @secondary: true if you are registering a secondary master. Will return
2720 * -ENOTSUPP if set to true since secondary masters are not yet
2721 * supported
2722 *
2723 * This function takes care of everything for you:
2724 *
2725 * - creates and initializes the I3C bus
2726 * - populates the bus with static I2C devs if @parent->of_node is not
2727 * NULL
2728 * - registers all I3C devices added by the controller during bus
2729 * initialization
2730 * - registers the I2C adapter and all I2C devices
2731 *
2732 * Return: 0 in case of success, a negative error code otherwise.
2733 */
i3c_master_register(struct i3c_master_controller * master,struct device * parent,const struct i3c_master_controller_ops * ops,bool secondary)2734 int i3c_master_register(struct i3c_master_controller *master,
2735 struct device *parent,
2736 const struct i3c_master_controller_ops *ops,
2737 bool secondary)
2738 {
2739 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2740 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2741 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2742 struct i2c_dev_boardinfo *i2cbi;
2743 int ret;
2744
2745 /* We do not support secondary masters yet. */
2746 if (secondary)
2747 return -ENOTSUPP;
2748
2749 ret = i3c_master_check_ops(ops);
2750 if (ret)
2751 return ret;
2752
2753 master->dev.parent = parent;
2754 master->dev.of_node = of_node_get(parent->of_node);
2755 master->dev.bus = &i3c_bus_type;
2756 master->dev.type = &i3c_masterdev_type;
2757 master->dev.release = i3c_masterdev_release;
2758 master->ops = ops;
2759 master->secondary = secondary;
2760 INIT_LIST_HEAD(&master->boardinfo.i2c);
2761 INIT_LIST_HEAD(&master->boardinfo.i3c);
2762
2763 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2764 if (ret)
2765 return ret;
2766
2767 device_initialize(&master->dev);
2768 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2769
2770 master->dev.dma_mask = parent->dma_mask;
2771 master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2772 master->dev.dma_parms = parent->dma_parms;
2773
2774 ret = of_populate_i3c_bus(master);
2775 if (ret)
2776 goto err_put_dev;
2777
2778 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2779 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2780 case I3C_LVR_I2C_INDEX(0):
2781 if (mode < I3C_BUS_MODE_MIXED_FAST)
2782 mode = I3C_BUS_MODE_MIXED_FAST;
2783 break;
2784 case I3C_LVR_I2C_INDEX(1):
2785 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2786 mode = I3C_BUS_MODE_MIXED_LIMITED;
2787 break;
2788 case I3C_LVR_I2C_INDEX(2):
2789 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2790 mode = I3C_BUS_MODE_MIXED_SLOW;
2791 break;
2792 default:
2793 ret = -EINVAL;
2794 goto err_put_dev;
2795 }
2796
2797 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2798 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2799 }
2800
2801 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2802 if (ret)
2803 goto err_put_dev;
2804
2805 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2806 if (!master->wq) {
2807 ret = -ENOMEM;
2808 goto err_put_dev;
2809 }
2810
2811 ret = i3c_master_bus_init(master);
2812 if (ret)
2813 goto err_put_dev;
2814
2815 ret = device_add(&master->dev);
2816 if (ret)
2817 goto err_cleanup_bus;
2818
2819 /*
2820 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2821 * through the I2C subsystem.
2822 */
2823 ret = i3c_master_i2c_adapter_init(master);
2824 if (ret)
2825 goto err_del_dev;
2826
2827 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2828
2829 pm_runtime_no_callbacks(&master->dev);
2830 pm_suspend_ignore_children(&master->dev, true);
2831 pm_runtime_enable(&master->dev);
2832
2833 /*
2834 * We're done initializing the bus and the controller, we can now
2835 * register I3C devices discovered during the initial DAA.
2836 */
2837 master->init_done = true;
2838 i3c_bus_normaluse_lock(&master->bus);
2839 i3c_master_register_new_i3c_devs(master);
2840 i3c_bus_normaluse_unlock(&master->bus);
2841
2842 return 0;
2843
2844 err_del_dev:
2845 device_del(&master->dev);
2846
2847 err_cleanup_bus:
2848 i3c_master_bus_cleanup(master);
2849
2850 err_put_dev:
2851 put_device(&master->dev);
2852
2853 return ret;
2854 }
2855 EXPORT_SYMBOL_GPL(i3c_master_register);
2856
2857 /**
2858 * i3c_master_unregister() - unregister an I3C master
2859 * @master: master used to send frames on the bus
2860 *
2861 * Basically undo everything done in i3c_master_register().
2862 */
i3c_master_unregister(struct i3c_master_controller * master)2863 void i3c_master_unregister(struct i3c_master_controller *master)
2864 {
2865 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2866
2867 i3c_master_i2c_adapter_cleanup(master);
2868 i3c_master_unregister_i3c_devs(master);
2869 i3c_master_bus_cleanup(master);
2870 pm_runtime_disable(&master->dev);
2871 device_unregister(&master->dev);
2872 }
2873 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2874
i3c_dev_setdasa_locked(struct i3c_dev_desc * dev)2875 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2876 {
2877 struct i3c_master_controller *master;
2878
2879 if (!dev)
2880 return -ENOENT;
2881
2882 master = i3c_dev_get_master(dev);
2883 if (!master)
2884 return -EINVAL;
2885
2886 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2887 !dev->boardinfo->static_addr)
2888 return -EINVAL;
2889
2890 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2891 dev->boardinfo->init_dyn_addr);
2892 }
2893
i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc * dev,struct i3c_priv_xfer * xfers,int nxfers)2894 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2895 struct i3c_priv_xfer *xfers,
2896 int nxfers)
2897 {
2898 struct i3c_master_controller *master;
2899
2900 if (!dev)
2901 return -ENOENT;
2902
2903 master = i3c_dev_get_master(dev);
2904 if (!master || !xfers)
2905 return -EINVAL;
2906
2907 if (!master->ops->priv_xfers)
2908 return -ENOTSUPP;
2909
2910 return master->ops->priv_xfers(dev, xfers, nxfers);
2911 }
2912
i3c_dev_disable_ibi_locked(struct i3c_dev_desc * dev)2913 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2914 {
2915 struct i3c_master_controller *master;
2916 int ret;
2917
2918 if (!dev->ibi)
2919 return -EINVAL;
2920
2921 master = i3c_dev_get_master(dev);
2922 ret = master->ops->disable_ibi(dev);
2923 if (ret)
2924 return ret;
2925
2926 reinit_completion(&dev->ibi->all_ibis_handled);
2927 if (atomic_read(&dev->ibi->pending_ibis))
2928 wait_for_completion(&dev->ibi->all_ibis_handled);
2929
2930 dev->ibi->enabled = false;
2931
2932 return 0;
2933 }
2934
i3c_dev_enable_ibi_locked(struct i3c_dev_desc * dev)2935 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2936 {
2937 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2938 int ret;
2939
2940 if (!dev->ibi)
2941 return -EINVAL;
2942
2943 ret = master->ops->enable_ibi(dev);
2944 if (!ret)
2945 dev->ibi->enabled = true;
2946
2947 return ret;
2948 }
2949
i3c_dev_request_ibi_locked(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2950 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2951 const struct i3c_ibi_setup *req)
2952 {
2953 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2954 struct i3c_device_ibi_info *ibi;
2955 int ret;
2956
2957 if (!master->ops->request_ibi)
2958 return -ENOTSUPP;
2959
2960 if (dev->ibi)
2961 return -EBUSY;
2962
2963 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2964 if (!ibi)
2965 return -ENOMEM;
2966
2967 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
2968 if (!ibi->wq) {
2969 kfree(ibi);
2970 return -ENOMEM;
2971 }
2972
2973 atomic_set(&ibi->pending_ibis, 0);
2974 init_completion(&ibi->all_ibis_handled);
2975 ibi->handler = req->handler;
2976 ibi->max_payload_len = req->max_payload_len;
2977 ibi->num_slots = req->num_slots;
2978
2979 dev->ibi = ibi;
2980 ret = master->ops->request_ibi(dev, req);
2981 if (ret) {
2982 kfree(ibi);
2983 dev->ibi = NULL;
2984 }
2985
2986 return ret;
2987 }
2988
i3c_dev_free_ibi_locked(struct i3c_dev_desc * dev)2989 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2990 {
2991 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2992
2993 if (!dev->ibi)
2994 return;
2995
2996 if (WARN_ON(dev->ibi->enabled))
2997 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2998
2999 master->ops->free_ibi(dev);
3000
3001 if (dev->ibi->wq) {
3002 destroy_workqueue(dev->ibi->wq);
3003 dev->ibi->wq = NULL;
3004 }
3005
3006 kfree(dev->ibi);
3007 dev->ibi = NULL;
3008 }
3009
i3c_init(void)3010 static int __init i3c_init(void)
3011 {
3012 int res;
3013
3014 res = of_alias_get_highest_id("i3c");
3015 if (res >= 0) {
3016 mutex_lock(&i3c_core_lock);
3017 __i3c_first_dynamic_bus_num = res + 1;
3018 mutex_unlock(&i3c_core_lock);
3019 }
3020
3021 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
3022 if (res)
3023 return res;
3024
3025 res = bus_register(&i3c_bus_type);
3026 if (res)
3027 goto out_unreg_notifier;
3028
3029 return 0;
3030
3031 out_unreg_notifier:
3032 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3033
3034 return res;
3035 }
3036 subsys_initcall(i3c_init);
3037
i3c_exit(void)3038 static void __exit i3c_exit(void)
3039 {
3040 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3041 idr_destroy(&i3c_bus_idr);
3042 bus_unregister(&i3c_bus_type);
3043 }
3044 module_exit(i3c_exit);
3045
3046 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
3047 MODULE_DESCRIPTION("I3C core");
3048 MODULE_LICENSE("GPL v2");
3049