1 /* SPDX-License-Identifier: ISC */
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 */
7
8 #ifndef _CORE_H_
9 #define _CORE_H_
10
11 #include <linux/completion.h>
12 #include <linux/if_ether.h>
13 #include <linux/types.h>
14 #include <linux/pci.h>
15 #include <linux/uuid.h>
16 #include <linux/time.h>
17
18 #include "htt.h"
19 #include "htc.h"
20 #include "hw.h"
21 #include "targaddrs.h"
22 #include "wmi.h"
23 #include "../ath.h"
24 #include "../regd.h"
25 #include "../dfs_pattern_detector.h"
26 #include "spectral.h"
27 #include "thermal.h"
28 #include "wow.h"
29 #include "swap.h"
30
31 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
32 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
33 #define WO(_f) ((_f##_OFFSET) >> 2)
34
35 #define ATH10K_SCAN_ID 0
36 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */
37 #define WMI_READY_TIMEOUT (5 * HZ)
38 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
39 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
40 #define ATH10K_NUM_CHANS 41
41 #define ATH10K_MAX_5G_CHAN 173
42
43 #if defined(CONFIG_FWLOG)
44 #define ATH10K_FWLOG_MODULE_ID_MAX_10_2_4 28
45 #define ATH10K_FWLOG_MODULE_ID_MAX_10_4 35
46 #endif
47
48 /* Antenna noise floor */
49 #define ATH10K_DEFAULT_NOISE_FLOOR -95
50
51 #define ATH10K_INVALID_RSSI 128
52
53 #define ATH10K_MAX_NUM_MGMT_PENDING 128
54
55 /* number of failed packets (20 packets with 16 sw reties each) */
56 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
57
58 /*
59 * Use insanely high numbers to make sure that the firmware implementation
60 * won't start, we have the same functionality already in hostapd. Unit
61 * is seconds.
62 */
63 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
64 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
65 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
66
67 /* SMBIOS type containing Board Data File Name Extension */
68 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
69
70 /* SMBIOS type structure length (excluding strings-set) */
71 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
72
73 /* Offset pointing to Board Data File Name Extension */
74 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
75
76 /* Board Data File Name Extension string length.
77 * String format: BDF_<Customer ID>_<Extension>\0
78 */
79 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
80
81 /* The magic used by QCA spec */
82 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
83
84 /* Default Airtime weight multiplier (Tuned for multiclient performance) */
85 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 4
86
87 #define ATH10K_MAX_RETRY_COUNT 30
88
89 #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \
90 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
91 #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\
92 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
93
94 struct ath10k;
95
ath10k_bus_str(enum ath10k_bus bus)96 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
97 {
98 switch (bus) {
99 case ATH10K_BUS_PCI:
100 return "pci";
101 case ATH10K_BUS_AHB:
102 return "ahb";
103 case ATH10K_BUS_SDIO:
104 return "sdio";
105 case ATH10K_BUS_USB:
106 return "usb";
107 case ATH10K_BUS_SNOC:
108 return "snoc";
109 }
110
111 return "unknown";
112 }
113
114 enum ath10k_skb_flags {
115 ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
116 ATH10K_SKB_F_DTIM_ZERO = BIT(1),
117 ATH10K_SKB_F_DELIVER_CAB = BIT(2),
118 ATH10K_SKB_F_MGMT = BIT(3),
119 ATH10K_SKB_F_QOS = BIT(4),
120 ATH10K_SKB_F_RAW_TX = BIT(5),
121 ATH10K_SKB_F_NOACK_TID = BIT(6),
122 };
123
124 struct ath10k_skb_cb {
125 dma_addr_t paddr;
126 u8 flags;
127 u8 eid;
128 u16 msdu_id;
129 u16 airtime_est;
130 struct ieee80211_vif *vif;
131 struct ieee80211_txq *txq;
132 u32 ucast_cipher;
133 } __packed;
134
135 struct ath10k_skb_rxcb {
136 dma_addr_t paddr;
137 struct hlist_node hlist;
138 u8 eid;
139 };
140
ATH10K_SKB_CB(struct sk_buff * skb)141 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
142 {
143 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
144 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
145 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
146 }
147
ATH10K_SKB_RXCB(struct sk_buff * skb)148 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
149 {
150 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
151 return (struct ath10k_skb_rxcb *)skb->cb;
152 }
153
154 #define ATH10K_RXCB_SKB(rxcb) \
155 container_of((void *)rxcb, struct sk_buff, cb)
156
host_interest_item_address(u32 item_offset)157 static inline u32 host_interest_item_address(u32 item_offset)
158 {
159 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
160 }
161
162 enum ath10k_phy_mode {
163 ATH10K_PHY_MODE_LEGACY = 0,
164 ATH10K_PHY_MODE_HT = 1,
165 ATH10K_PHY_MODE_VHT = 2,
166 };
167
168 /* Data rate 100KBPS based on IE Index */
169 struct ath10k_index_ht_data_rate_type {
170 u8 beacon_rate_index;
171 u16 supported_rate[4];
172 };
173
174 /* Data rate 100KBPS based on IE Index */
175 struct ath10k_index_vht_data_rate_type {
176 u8 beacon_rate_index;
177 u16 supported_VHT80_rate[2];
178 u16 supported_VHT40_rate[2];
179 u16 supported_VHT20_rate[2];
180 };
181
182 struct ath10k_bmi {
183 bool done_sent;
184 };
185
186 struct ath10k_mem_chunk {
187 void *vaddr;
188 dma_addr_t paddr;
189 u32 len;
190 u32 req_id;
191 };
192
193 struct ath10k_wmi {
194 enum ath10k_htc_ep_id eid;
195 struct completion service_ready;
196 struct completion unified_ready;
197 struct completion barrier;
198 struct completion radar_confirm;
199 wait_queue_head_t tx_credits_wq;
200 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
201 struct wmi_cmd_map *cmd;
202 struct wmi_vdev_param_map *vdev_param;
203 struct wmi_pdev_param_map *pdev_param;
204 struct wmi_peer_param_map *peer_param;
205 const struct wmi_ops *ops;
206 const struct wmi_peer_flags_map *peer_flags;
207
208 u32 mgmt_max_num_pending_tx;
209
210 /* Protected by data_lock */
211 struct idr mgmt_pending_tx;
212
213 u32 num_mem_chunks;
214 u32 rx_decap_mode;
215 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
216 };
217
218 struct ath10k_fw_stats_peer {
219 struct list_head list;
220
221 u8 peer_macaddr[ETH_ALEN];
222 u32 peer_rssi;
223 u32 peer_tx_rate;
224 u32 peer_rx_rate; /* 10x only */
225 u64 rx_duration;
226 };
227
228 struct ath10k_fw_extd_stats_peer {
229 struct list_head list;
230
231 u8 peer_macaddr[ETH_ALEN];
232 u64 rx_duration;
233 };
234
235 struct ath10k_fw_stats_vdev {
236 struct list_head list;
237
238 u32 vdev_id;
239 u32 beacon_snr;
240 u32 data_snr;
241 u32 num_tx_frames[4];
242 u32 num_rx_frames;
243 u32 num_tx_frames_retries[4];
244 u32 num_tx_frames_failures[4];
245 u32 num_rts_fail;
246 u32 num_rts_success;
247 u32 num_rx_err;
248 u32 num_rx_discard;
249 u32 num_tx_not_acked;
250 u32 tx_rate_history[10];
251 u32 beacon_rssi_history[10];
252 };
253
254 struct ath10k_fw_stats_vdev_extd {
255 struct list_head list;
256
257 u32 vdev_id;
258 u32 ppdu_aggr_cnt;
259 u32 ppdu_noack;
260 u32 mpdu_queued;
261 u32 ppdu_nonaggr_cnt;
262 u32 mpdu_sw_requeued;
263 u32 mpdu_suc_retry;
264 u32 mpdu_suc_multitry;
265 u32 mpdu_fail_retry;
266 u32 tx_ftm_suc;
267 u32 tx_ftm_suc_retry;
268 u32 tx_ftm_fail;
269 u32 rx_ftmr_cnt;
270 u32 rx_ftmr_dup_cnt;
271 u32 rx_iftmr_cnt;
272 u32 rx_iftmr_dup_cnt;
273 };
274
275 struct ath10k_fw_stats_pdev {
276 struct list_head list;
277
278 /* PDEV stats */
279 s32 ch_noise_floor;
280 u32 tx_frame_count; /* Cycles spent transmitting frames */
281 u32 rx_frame_count; /* Cycles spent receiving frames */
282 u32 rx_clear_count; /* Total channel busy time, evidently */
283 u32 cycle_count; /* Total on-channel time */
284 u32 phy_err_count;
285 u32 chan_tx_power;
286 u32 ack_rx_bad;
287 u32 rts_bad;
288 u32 rts_good;
289 u32 fcs_bad;
290 u32 no_beacons;
291 u32 mib_int_count;
292
293 /* PDEV TX stats */
294 s32 comp_queued;
295 s32 comp_delivered;
296 s32 msdu_enqued;
297 s32 mpdu_enqued;
298 s32 wmm_drop;
299 s32 local_enqued;
300 s32 local_freed;
301 s32 hw_queued;
302 s32 hw_reaped;
303 s32 underrun;
304 u32 hw_paused;
305 s32 tx_abort;
306 s32 mpdus_requeued;
307 u32 tx_ko;
308 u32 data_rc;
309 u32 self_triggers;
310 u32 sw_retry_failure;
311 u32 illgl_rate_phy_err;
312 u32 pdev_cont_xretry;
313 u32 pdev_tx_timeout;
314 u32 pdev_resets;
315 u32 phy_underrun;
316 u32 txop_ovf;
317 u32 seq_posted;
318 u32 seq_failed_queueing;
319 u32 seq_completed;
320 u32 seq_restarted;
321 u32 mu_seq_posted;
322 u32 mpdus_sw_flush;
323 u32 mpdus_hw_filter;
324 u32 mpdus_truncated;
325 u32 mpdus_ack_failed;
326 u32 mpdus_expired;
327
328 /* PDEV RX stats */
329 s32 mid_ppdu_route_change;
330 s32 status_rcvd;
331 s32 r0_frags;
332 s32 r1_frags;
333 s32 r2_frags;
334 s32 r3_frags;
335 s32 htt_msdus;
336 s32 htt_mpdus;
337 s32 loc_msdus;
338 s32 loc_mpdus;
339 s32 oversize_amsdu;
340 s32 phy_errs;
341 s32 phy_err_drop;
342 s32 mpdu_errs;
343 s32 rx_ovfl_errs;
344 };
345
346 struct ath10k_fw_stats {
347 bool extended;
348 struct list_head pdevs;
349 struct list_head vdevs;
350 struct list_head peers;
351 struct list_head peers_extd;
352 };
353
354 #define ATH10K_TPC_TABLE_TYPE_FLAG 1
355 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
356
357 struct ath10k_tpc_table {
358 u32 pream_idx[WMI_TPC_RATE_MAX];
359 u8 rate_code[WMI_TPC_RATE_MAX];
360 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
361 };
362
363 struct ath10k_tpc_stats {
364 u32 reg_domain;
365 u32 chan_freq;
366 u32 phy_mode;
367 u32 twice_antenna_reduction;
368 u32 twice_max_rd_power;
369 s32 twice_antenna_gain;
370 u32 power_limit;
371 u32 num_tx_chain;
372 u32 ctl;
373 u32 rate_max;
374 u8 flag[WMI_TPC_FLAG];
375 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
376 };
377
378 struct ath10k_tpc_table_final {
379 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
380 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
381 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
382 };
383
384 struct ath10k_tpc_stats_final {
385 u32 reg_domain;
386 u32 chan_freq;
387 u32 phy_mode;
388 u32 twice_antenna_reduction;
389 u32 twice_max_rd_power;
390 s32 twice_antenna_gain;
391 u32 power_limit;
392 u32 num_tx_chain;
393 u32 ctl;
394 u32 rate_max;
395 u8 flag[WMI_TPC_FLAG];
396 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
397 };
398
399 struct ath10k_dfs_stats {
400 u32 phy_errors;
401 u32 pulses_total;
402 u32 pulses_detected;
403 u32 pulses_discarded;
404 u32 radar_detected;
405 };
406
407 enum ath10k_radar_confirmation_state {
408 ATH10K_RADAR_CONFIRMATION_IDLE = 0,
409 ATH10K_RADAR_CONFIRMATION_INPROGRESS,
410 ATH10K_RADAR_CONFIRMATION_STOPPED,
411 };
412
413 struct ath10k_radar_found_info {
414 u32 pri_min;
415 u32 pri_max;
416 u32 width_min;
417 u32 width_max;
418 u32 sidx_min;
419 u32 sidx_max;
420 };
421
422 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
423
424 struct ath10k_peer {
425 struct list_head list;
426 struct ieee80211_vif *vif;
427 struct ieee80211_sta *sta;
428
429 bool removed;
430 int vdev_id;
431 u8 addr[ETH_ALEN];
432 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
433
434 /* protected by ar->data_lock */
435 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
436 union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
437 bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS];
438 union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
439 u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS];
440 struct {
441 enum htt_security_types sec_type;
442 int pn_len;
443 } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX];
444 };
445
446 struct ath10k_txq {
447 struct list_head list;
448 unsigned long num_fw_queued;
449 unsigned long num_push_allowed;
450 };
451
452 enum ath10k_pkt_rx_err {
453 ATH10K_PKT_RX_ERR_FCS,
454 ATH10K_PKT_RX_ERR_TKIP,
455 ATH10K_PKT_RX_ERR_CRYPT,
456 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
457 ATH10K_PKT_RX_ERR_MAX,
458 };
459
460 enum ath10k_ampdu_subfrm_num {
461 ATH10K_AMPDU_SUBFRM_NUM_10,
462 ATH10K_AMPDU_SUBFRM_NUM_20,
463 ATH10K_AMPDU_SUBFRM_NUM_30,
464 ATH10K_AMPDU_SUBFRM_NUM_40,
465 ATH10K_AMPDU_SUBFRM_NUM_50,
466 ATH10K_AMPDU_SUBFRM_NUM_60,
467 ATH10K_AMPDU_SUBFRM_NUM_MORE,
468 ATH10K_AMPDU_SUBFRM_NUM_MAX,
469 };
470
471 enum ath10k_amsdu_subfrm_num {
472 ATH10K_AMSDU_SUBFRM_NUM_1,
473 ATH10K_AMSDU_SUBFRM_NUM_2,
474 ATH10K_AMSDU_SUBFRM_NUM_3,
475 ATH10K_AMSDU_SUBFRM_NUM_4,
476 ATH10K_AMSDU_SUBFRM_NUM_MORE,
477 ATH10K_AMSDU_SUBFRM_NUM_MAX,
478 };
479
480 struct ath10k_sta_tid_stats {
481 unsigned long rx_pkt_from_fw;
482 unsigned long rx_pkt_unchained;
483 unsigned long rx_pkt_drop_chained;
484 unsigned long rx_pkt_drop_filter;
485 unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
486 unsigned long rx_pkt_queued_for_mac;
487 unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
488 unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
489 };
490
491 enum ath10k_counter_type {
492 ATH10K_COUNTER_TYPE_BYTES,
493 ATH10K_COUNTER_TYPE_PKTS,
494 ATH10K_COUNTER_TYPE_MAX,
495 };
496
497 enum ath10k_stats_type {
498 ATH10K_STATS_TYPE_SUCC,
499 ATH10K_STATS_TYPE_FAIL,
500 ATH10K_STATS_TYPE_RETRY,
501 ATH10K_STATS_TYPE_AMPDU,
502 ATH10K_STATS_TYPE_MAX,
503 };
504
505 struct ath10k_htt_data_stats {
506 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM];
507 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM];
508 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM];
509 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM];
510 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM];
511 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM];
512 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM];
513 };
514
515 struct ath10k_htt_tx_stats {
516 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX];
517 u64 tx_duration;
518 u64 ba_fails;
519 u64 ack_fails;
520 };
521
522 #define ATH10K_TID_MAX 8
523
524 struct ath10k_sta {
525 struct ath10k_vif *arvif;
526
527 /* the following are protected by ar->data_lock */
528 u32 changed; /* IEEE80211_RC_* */
529 u32 bw;
530 u32 nss;
531 u32 smps;
532 u16 peer_id;
533 struct rate_info txrate;
534 struct ieee80211_tx_info tx_info;
535 u32 tx_retries;
536 u32 tx_failed;
537 u32 last_tx_bitrate;
538
539 u32 rx_rate_code;
540 u32 rx_bitrate_kbps;
541 u32 tx_rate_code;
542 u32 tx_bitrate_kbps;
543 struct work_struct update_wk;
544 u64 rx_duration;
545 struct ath10k_htt_tx_stats *tx_stats;
546 u32 ucast_cipher;
547
548 #ifdef CONFIG_MAC80211_DEBUGFS
549 /* protected by conf_mutex */
550 bool aggr_mode;
551
552 /* Protected with ar->data_lock */
553 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
554 #endif
555 /* Protected with ar->data_lock */
556 u32 peer_ps_state;
557 struct work_struct tid_config_wk;
558 int noack[ATH10K_TID_MAX];
559 int retry_long[ATH10K_TID_MAX];
560 int ampdu[ATH10K_TID_MAX];
561 u8 rate_ctrl[ATH10K_TID_MAX];
562 u32 rate_code[ATH10K_TID_MAX];
563 int rtscts[ATH10K_TID_MAX];
564 };
565
566 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
567 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
568
569 enum ath10k_beacon_state {
570 ATH10K_BEACON_SCHEDULED = 0,
571 ATH10K_BEACON_SENDING,
572 ATH10K_BEACON_SENT,
573 };
574
575 struct ath10k_vif {
576 struct list_head list;
577
578 u32 vdev_id;
579 u16 peer_id;
580 enum wmi_vdev_type vdev_type;
581 enum wmi_vdev_subtype vdev_subtype;
582 u32 beacon_interval;
583 u32 dtim_period;
584 struct sk_buff *beacon;
585 /* protected by data_lock */
586 enum ath10k_beacon_state beacon_state;
587 void *beacon_buf;
588 dma_addr_t beacon_paddr;
589 unsigned long tx_paused; /* arbitrary values defined by target */
590
591 struct ath10k *ar;
592 struct ieee80211_vif *vif;
593
594 bool is_started;
595 bool is_up;
596 bool spectral_enabled;
597 bool ps;
598 u32 aid;
599 u8 bssid[ETH_ALEN];
600
601 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
602 s8 def_wep_key_idx;
603
604 u16 tx_seq_no;
605
606 union {
607 struct {
608 u32 uapsd;
609 } sta;
610 struct {
611 /* 512 stations */
612 u8 tim_bitmap[64];
613 u8 tim_len;
614 u32 ssid_len;
615 u8 ssid[IEEE80211_MAX_SSID_LEN];
616 bool hidden_ssid;
617 /* P2P_IE with NoA attribute for P2P_GO case */
618 u32 noa_len;
619 u8 *noa_data;
620 } ap;
621 } u;
622
623 bool use_cts_prot;
624 bool nohwcrypt;
625 int num_legacy_stations;
626 int txpower;
627 bool ftm_responder;
628 struct wmi_wmm_params_all_arg wmm_params;
629 struct work_struct ap_csa_work;
630 struct delayed_work connection_loss_work;
631 struct cfg80211_bitrate_mask bitrate_mask;
632
633 /* For setting VHT peer fixed rate, protected by conf_mutex */
634 int vht_num_rates;
635 u8 vht_pfr;
636 u32 tid_conf_changed[ATH10K_TID_MAX];
637 int noack[ATH10K_TID_MAX];
638 int retry_long[ATH10K_TID_MAX];
639 int ampdu[ATH10K_TID_MAX];
640 u8 rate_ctrl[ATH10K_TID_MAX];
641 u32 rate_code[ATH10K_TID_MAX];
642 int rtscts[ATH10K_TID_MAX];
643 u32 tids_rst;
644 };
645
646 struct ath10k_vif_iter {
647 u32 vdev_id;
648 struct ath10k_vif *arvif;
649 };
650
651 /* Copy Engine register dump, protected by ce-lock */
652 struct ath10k_ce_crash_data {
653 __le32 base_addr;
654 __le32 src_wr_idx;
655 __le32 src_r_idx;
656 __le32 dst_wr_idx;
657 __le32 dst_r_idx;
658 };
659
660 struct ath10k_ce_crash_hdr {
661 __le32 ce_count;
662 __le32 reserved[3]; /* for future use */
663 struct ath10k_ce_crash_data entries[];
664 };
665
666 #define MAX_MEM_DUMP_TYPE 5
667
668 /* used for crash-dump storage, protected by data-lock */
669 struct ath10k_fw_crash_data {
670 guid_t guid;
671 struct timespec64 timestamp;
672 __le32 registers[REG_DUMP_COUNT_QCA988X];
673 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
674
675 u8 *ramdump_buf;
676 size_t ramdump_buf_len;
677 };
678
679 struct ath10k_debug {
680 struct dentry *debugfs_phy;
681
682 struct ath10k_fw_stats fw_stats;
683 struct completion fw_stats_complete;
684 bool fw_stats_done;
685
686 unsigned long htt_stats_mask;
687 unsigned long reset_htt_stats;
688 struct delayed_work htt_stats_dwork;
689 struct ath10k_dfs_stats dfs_stats;
690 struct ath_dfs_pool_stats dfs_pool_stats;
691
692 /* used for tpc-dump storage, protected by data-lock */
693 struct ath10k_tpc_stats *tpc_stats;
694 struct ath10k_tpc_stats_final *tpc_stats_final;
695
696 struct completion tpc_complete;
697
698 /* protected by conf_mutex */
699 u64 fw_dbglog_mask;
700 u32 fw_dbglog_level;
701 u32 reg_addr;
702 u32 nf_cal_period;
703 void *cal_data;
704 u32 enable_extd_tx_stats;
705 u8 fw_dbglog_mode;
706 };
707
708 enum ath10k_state {
709 ATH10K_STATE_OFF = 0,
710 ATH10K_STATE_ON,
711
712 /* When doing firmware recovery the device is first powered down.
713 * mac80211 is supposed to call in to start() hook later on. It is
714 * however possible that driver unloading and firmware crash overlap.
715 * mac80211 can wait on conf_mutex in stop() while the device is
716 * stopped in ath10k_core_restart() work holding conf_mutex. The state
717 * RESTARTED means that the device is up and mac80211 has started hw
718 * reconfiguration. Once mac80211 is done with the reconfiguration we
719 * set the state to STATE_ON in reconfig_complete().
720 */
721 ATH10K_STATE_RESTARTING,
722 ATH10K_STATE_RESTARTED,
723
724 /* The device has crashed while restarting hw. This state is like ON
725 * but commands are blocked in HTC and -ECOMM response is given. This
726 * prevents completion timeouts and makes the driver more responsive to
727 * userspace commands. This is also prevents recursive recovery.
728 */
729 ATH10K_STATE_WEDGED,
730
731 /* factory tests */
732 ATH10K_STATE_UTF,
733 };
734
735 enum ath10k_firmware_mode {
736 /* the default mode, standard 802.11 functionality */
737 ATH10K_FIRMWARE_MODE_NORMAL,
738
739 /* factory tests etc */
740 ATH10K_FIRMWARE_MODE_UTF,
741 };
742
743 enum ath10k_fw_features {
744 /* wmi_mgmt_rx_hdr contains extra RSSI information */
745 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
746
747 /* Firmware from 10X branch. Deprecated, don't use in new code. */
748 ATH10K_FW_FEATURE_WMI_10X = 1,
749
750 /* firmware support tx frame management over WMI, otherwise it's HTT */
751 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
752
753 /* Firmware does not support P2P */
754 ATH10K_FW_FEATURE_NO_P2P = 3,
755
756 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
757 * bit is required to be set as well. Deprecated, don't use in new
758 * code.
759 */
760 ATH10K_FW_FEATURE_WMI_10_2 = 4,
761
762 /* Some firmware revisions lack proper multi-interface client powersave
763 * implementation. Enabling PS could result in connection drops,
764 * traffic stalls, etc.
765 */
766 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
767
768 /* Some firmware revisions have an incomplete WoWLAN implementation
769 * despite WMI service bit being advertised. This feature flag is used
770 * to distinguish whether WoWLAN is really supported or not.
771 */
772 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
773
774 /* Don't trust error code from otp.bin */
775 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
776
777 /* Some firmware revisions pad 4th hw address to 4 byte boundary making
778 * it 8 bytes long in Native Wifi Rx decap.
779 */
780 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
781
782 /* Firmware supports bypassing PLL setting on init. */
783 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
784
785 /* Raw mode support. If supported, FW supports receiving and trasmitting
786 * frames in raw mode.
787 */
788 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
789
790 /* Firmware Supports Adaptive CCA*/
791 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
792
793 /* Firmware supports management frame protection */
794 ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
795
796 /* Firmware supports pull-push model where host shares it's software
797 * queue state with firmware and firmware generates fetch requests
798 * telling host which queues to dequeue tx from.
799 *
800 * Primary function of this is improved MU-MIMO performance with
801 * multiple clients.
802 */
803 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
804
805 /* Firmware supports BT-Coex without reloading firmware via pdev param.
806 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
807 * extended resource config should be enabled always. This firmware IE
808 * is used to configure WMI_COEX_GPIO_SUPPORT.
809 */
810 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
811
812 /* Unused flag and proven to be not working, enable this if you want
813 * to experiment sending NULL func data frames in HTT TX
814 */
815 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
816
817 /* Firmware allow other BSS mesh broadcast/multicast frames without
818 * creating monitor interface. Appropriate rxfilters are programmed for
819 * mesh vdev by firmware itself. This feature flags will be used for
820 * not creating monitor vdev while configuring mesh node.
821 */
822 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
823
824 /* Firmware does not support power save in station mode. */
825 ATH10K_FW_FEATURE_NO_PS = 17,
826
827 /* Firmware allows management tx by reference instead of by value. */
828 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
829
830 /* Firmware load is done externally, not by bmi */
831 ATH10K_FW_FEATURE_NON_BMI = 19,
832
833 /* Firmware sends only one chan_info event per channel */
834 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20,
835
836 /* Firmware allows setting peer fixed rate */
837 ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21,
838
839 /* Firmware support IRAM recovery */
840 ATH10K_FW_FEATURE_IRAM_RECOVERY = 22,
841
842 /* keep last */
843 ATH10K_FW_FEATURE_COUNT,
844 };
845
846 enum ath10k_dev_flags {
847 /* Indicates that ath10k device is during CAC phase of DFS */
848 ATH10K_CAC_RUNNING,
849 ATH10K_FLAG_CORE_REGISTERED,
850
851 /* Device has crashed and needs to restart. This indicates any pending
852 * waiters should immediately cancel instead of waiting for a time out.
853 */
854 ATH10K_FLAG_CRASH_FLUSH,
855
856 /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
857 * Raw mode supports both hardware and software crypto. Native WiFi only
858 * supports hardware crypto.
859 */
860 ATH10K_FLAG_RAW_MODE,
861
862 /* Disable HW crypto engine */
863 ATH10K_FLAG_HW_CRYPTO_DISABLED,
864
865 /* Bluetooth coexistence enabled */
866 ATH10K_FLAG_BTCOEX,
867
868 /* Per Station statistics service */
869 ATH10K_FLAG_PEER_STATS,
870
871 /* Indicates that ath10k device is during recovery process and not complete */
872 ATH10K_FLAG_RESTARTING,
873
874 /* protected by conf_mutex */
875 ATH10K_FLAG_NAPI_ENABLED,
876 };
877
878 enum ath10k_cal_mode {
879 ATH10K_CAL_MODE_FILE,
880 ATH10K_CAL_MODE_OTP,
881 ATH10K_CAL_MODE_DT,
882 ATH10K_CAL_MODE_NVMEM,
883 ATH10K_PRE_CAL_MODE_FILE,
884 ATH10K_PRE_CAL_MODE_DT,
885 ATH10K_PRE_CAL_MODE_NVMEM,
886 ATH10K_CAL_MODE_EEPROM,
887 };
888
889 enum ath10k_crypt_mode {
890 /* Only use hardware crypto engine */
891 ATH10K_CRYPT_MODE_HW,
892 /* Only use software crypto engine */
893 ATH10K_CRYPT_MODE_SW,
894 };
895
ath10k_cal_mode_str(enum ath10k_cal_mode mode)896 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
897 {
898 switch (mode) {
899 case ATH10K_CAL_MODE_FILE:
900 return "file";
901 case ATH10K_CAL_MODE_OTP:
902 return "otp";
903 case ATH10K_CAL_MODE_DT:
904 return "dt";
905 case ATH10K_CAL_MODE_NVMEM:
906 return "nvmem";
907 case ATH10K_PRE_CAL_MODE_FILE:
908 return "pre-cal-file";
909 case ATH10K_PRE_CAL_MODE_DT:
910 return "pre-cal-dt";
911 case ATH10K_PRE_CAL_MODE_NVMEM:
912 return "pre-cal-nvmem";
913 case ATH10K_CAL_MODE_EEPROM:
914 return "eeprom";
915 }
916
917 return "unknown";
918 }
919
920 enum ath10k_scan_state {
921 ATH10K_SCAN_IDLE,
922 ATH10K_SCAN_STARTING,
923 ATH10K_SCAN_RUNNING,
924 ATH10K_SCAN_ABORTING,
925 };
926
ath10k_scan_state_str(enum ath10k_scan_state state)927 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
928 {
929 switch (state) {
930 case ATH10K_SCAN_IDLE:
931 return "idle";
932 case ATH10K_SCAN_STARTING:
933 return "starting";
934 case ATH10K_SCAN_RUNNING:
935 return "running";
936 case ATH10K_SCAN_ABORTING:
937 return "aborting";
938 }
939
940 return "unknown";
941 }
942
943 enum ath10k_tx_pause_reason {
944 ATH10K_TX_PAUSE_Q_FULL,
945 ATH10K_TX_PAUSE_MAX,
946 };
947
948 struct ath10k_fw_file {
949 const struct firmware *firmware;
950
951 char fw_version[ETHTOOL_FWVERS_LEN];
952
953 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
954
955 enum ath10k_fw_wmi_op_version wmi_op_version;
956 enum ath10k_fw_htt_op_version htt_op_version;
957
958 const void *firmware_data;
959 size_t firmware_len;
960
961 const void *otp_data;
962 size_t otp_len;
963
964 const void *codeswap_data;
965 size_t codeswap_len;
966
967 /* The original idea of struct ath10k_fw_file was that it only
968 * contains struct firmware and pointers to various parts (actual
969 * firmware binary, otp, metadata etc) of the file. This seg_info
970 * is actually created separate but as this is used similarly as
971 * the other firmware components it's more convenient to have it
972 * here.
973 */
974 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
975 };
976
977 struct ath10k_fw_components {
978 const struct firmware *board;
979 const void *board_data;
980 size_t board_len;
981 const struct firmware *ext_board;
982 const void *ext_board_data;
983 size_t ext_board_len;
984
985 struct ath10k_fw_file fw_file;
986 };
987
988 struct ath10k_per_peer_tx_stats {
989 u32 succ_bytes;
990 u32 retry_bytes;
991 u32 failed_bytes;
992 u8 ratecode;
993 u8 flags;
994 u16 peer_id;
995 u16 succ_pkts;
996 u16 retry_pkts;
997 u16 failed_pkts;
998 u16 duration;
999 u32 reserved1;
1000 u32 reserved2;
1001 };
1002
1003 enum ath10k_dev_type {
1004 ATH10K_DEV_TYPE_LL,
1005 ATH10K_DEV_TYPE_HL,
1006 };
1007
1008 struct ath10k_bus_params {
1009 u32 chip_id;
1010 enum ath10k_dev_type dev_type;
1011 bool link_can_suspend;
1012 bool hl_msdu_ids;
1013 };
1014
1015 struct ath10k {
1016 struct ath_common ath_common;
1017 struct ieee80211_hw *hw;
1018 struct ieee80211_ops *ops;
1019 struct device *dev;
1020 struct msa_region {
1021 dma_addr_t paddr;
1022 u32 mem_size;
1023 void *vaddr;
1024 } msa;
1025 u8 mac_addr[ETH_ALEN];
1026
1027 enum ath10k_hw_rev hw_rev;
1028 u16 dev_id;
1029 u32 chip_id;
1030 u32 target_version;
1031 u8 fw_version_major;
1032 u32 fw_version_minor;
1033 u16 fw_version_release;
1034 u16 fw_version_build;
1035 u32 fw_stats_req_mask;
1036 u32 phy_capability;
1037 u32 hw_min_tx_power;
1038 u32 hw_max_tx_power;
1039 u32 hw_eeprom_rd;
1040 u32 ht_cap_info;
1041 u32 vht_cap_info;
1042 u32 vht_supp_mcs;
1043 u32 num_rf_chains;
1044 u32 max_spatial_stream;
1045 #if defined(CONFIG_FWLOG)
1046 u32 fwlog_max_moduleid;
1047 #endif
1048 /* protected by conf_mutex */
1049 u32 low_2ghz_chan;
1050 u32 high_2ghz_chan;
1051 u32 low_5ghz_chan;
1052 u32 high_5ghz_chan;
1053 bool ani_enabled;
1054 u32 sys_cap_info;
1055
1056 /* protected by data_lock */
1057 bool hw_rfkill_on;
1058
1059 /* protected by conf_mutex */
1060 u8 ps_state_enable;
1061
1062 bool nlo_enabled;
1063 bool p2p;
1064
1065 struct {
1066 enum ath10k_bus bus;
1067 const struct ath10k_hif_ops *ops;
1068 } hif;
1069
1070 struct completion target_suspend;
1071 struct completion driver_recovery;
1072
1073 const struct ath10k_hw_regs *regs;
1074 const struct ath10k_hw_ce_regs *hw_ce_regs;
1075 const struct ath10k_hw_values *hw_values;
1076 struct ath10k_bmi bmi;
1077 struct ath10k_wmi wmi;
1078 struct ath10k_htc htc;
1079 struct ath10k_htt htt;
1080
1081 struct ath10k_hw_params hw_params;
1082
1083 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
1084 struct ath10k_fw_components normal_mode_fw;
1085
1086 /* READ-ONLY images of the running firmware, which can be either
1087 * normal or UTF. Do not modify, release etc!
1088 */
1089 const struct ath10k_fw_components *running_fw;
1090
1091 const struct firmware *pre_cal_file;
1092 const struct firmware *cal_file;
1093
1094 struct {
1095 u32 vendor;
1096 u32 device;
1097 u32 subsystem_vendor;
1098 u32 subsystem_device;
1099
1100 bool bmi_ids_valid;
1101 bool qmi_ids_valid;
1102 u32 qmi_board_id;
1103 u32 qmi_chip_id;
1104 u8 bmi_board_id;
1105 u8 bmi_eboard_id;
1106 u8 bmi_chip_id;
1107 bool ext_bid_supported;
1108
1109 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
1110 } id;
1111
1112 int fw_api;
1113 int bd_api;
1114 enum ath10k_cal_mode cal_mode;
1115
1116 struct {
1117 struct completion started;
1118 struct completion completed;
1119 struct completion on_channel;
1120 struct delayed_work timeout;
1121 enum ath10k_scan_state state;
1122 bool is_roc;
1123 int vdev_id;
1124 int roc_freq;
1125 bool roc_notify;
1126 } scan;
1127
1128 struct {
1129 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
1130 } mac;
1131
1132 /* should never be NULL; needed for regular htt rx */
1133 struct ieee80211_channel *rx_channel;
1134
1135 /* valid during scan; needed for mgmt rx during scan */
1136 struct ieee80211_channel *scan_channel;
1137
1138 /* current operating channel definition */
1139 struct cfg80211_chan_def chandef;
1140
1141 /* currently configured operating channel in firmware */
1142 struct ieee80211_channel *tgt_oper_chan;
1143
1144 unsigned long long free_vdev_map;
1145 struct ath10k_vif *monitor_arvif;
1146 bool monitor;
1147 int monitor_vdev_id;
1148 bool monitor_started;
1149 unsigned int filter_flags;
1150 unsigned long dev_flags;
1151 bool dfs_block_radar_events;
1152
1153 /* protected by conf_mutex */
1154 bool radar_enabled;
1155 int num_started_vdevs;
1156
1157 /* Protected by conf-mutex */
1158 u8 cfg_tx_chainmask;
1159 u8 cfg_rx_chainmask;
1160
1161 struct completion install_key_done;
1162
1163 int last_wmi_vdev_start_status;
1164 struct completion vdev_setup_done;
1165 struct completion vdev_delete_done;
1166 struct completion peer_stats_info_complete;
1167
1168 struct workqueue_struct *workqueue;
1169 /* Auxiliary workqueue */
1170 struct workqueue_struct *workqueue_aux;
1171 struct workqueue_struct *workqueue_tx_complete;
1172 /* prevents concurrent FW reconfiguration */
1173 struct mutex conf_mutex;
1174
1175 /* protects coredump data */
1176 struct mutex dump_mutex;
1177
1178 /* protects shared structure data */
1179 spinlock_t data_lock;
1180
1181 /* serialize wake_tx_queue calls per ac */
1182 spinlock_t queue_lock[IEEE80211_NUM_ACS];
1183
1184 struct list_head arvifs;
1185 struct list_head peers;
1186 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
1187 wait_queue_head_t peer_mapping_wq;
1188
1189 /* protected by conf_mutex */
1190 int num_peers;
1191 int num_stations;
1192
1193 int max_num_peers;
1194 int max_num_stations;
1195 int max_num_vdevs;
1196 int max_num_tdls_vdevs;
1197 int num_active_peers;
1198 int num_tids;
1199
1200 struct work_struct svc_rdy_work;
1201 struct sk_buff *svc_rdy_skb;
1202
1203 struct work_struct offchan_tx_work;
1204 struct sk_buff_head offchan_tx_queue;
1205 struct completion offchan_tx_completed;
1206 struct sk_buff *offchan_tx_skb;
1207
1208 struct work_struct wmi_mgmt_tx_work;
1209 struct sk_buff_head wmi_mgmt_tx_queue;
1210
1211 enum ath10k_state state;
1212
1213 struct work_struct register_work;
1214 struct work_struct restart_work;
1215 struct work_struct bundle_tx_work;
1216 struct work_struct tx_complete_work;
1217
1218 /* cycle count is reported twice for each visited channel during scan.
1219 * access protected by data_lock
1220 */
1221 u32 survey_last_rx_clear_count;
1222 u32 survey_last_cycle_count;
1223 struct survey_info survey[ATH10K_NUM_CHANS];
1224
1225 /* Channel info events are expected to come in pairs without and with
1226 * COMPLETE flag set respectively for each channel visit during scan.
1227 *
1228 * However there are deviations from this rule. This flag is used to
1229 * avoid reporting garbage data.
1230 */
1231 bool ch_info_can_report_survey;
1232 struct completion bss_survey_done;
1233
1234 struct dfs_pattern_detector *dfs_detector;
1235
1236 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
1237
1238 #ifdef CONFIG_ATH10K_DEBUGFS
1239 struct ath10k_debug debug;
1240 struct {
1241 /* relay(fs) channel for spectral scan */
1242 struct rchan *rfs_chan_spec_scan;
1243
1244 /* spectral_mode and spec_config are protected by conf_mutex */
1245 enum ath10k_spectral_mode mode;
1246 struct ath10k_spec_scan config;
1247 } spectral;
1248 #endif
1249
1250 u32 pktlog_filter;
1251
1252 #ifdef CONFIG_DEV_COREDUMP
1253 struct {
1254 struct ath10k_fw_crash_data *fw_crash_data;
1255 } coredump;
1256 #endif
1257
1258 struct {
1259 /* protected by conf_mutex */
1260 struct ath10k_fw_components utf_mode_fw;
1261
1262 /* protected by data_lock */
1263 bool utf_monitor;
1264 } testmode;
1265
1266 struct {
1267 /* protected by data_lock */
1268 u32 rx_crc_err_drop;
1269 u32 fw_crash_counter;
1270 u32 fw_warm_reset_counter;
1271 u32 fw_cold_reset_counter;
1272 } stats;
1273
1274 struct ath10k_thermal thermal;
1275 struct ath10k_wow wow;
1276 struct ath10k_per_peer_tx_stats peer_tx_stats;
1277
1278 #if defined(CONFIG_FWLOG)
1279 struct work_struct fwlog_tx_work;
1280 struct sk_buff_head fwlog_tx_queue;
1281 #endif
1282
1283 /* NAPI */
1284 struct net_device napi_dev;
1285 struct napi_struct napi;
1286
1287 struct work_struct set_coverage_class_work;
1288 /* protected by conf_mutex */
1289 struct {
1290 /* writing also protected by data_lock */
1291 s16 coverage_class;
1292
1293 u32 reg_phyclk;
1294 u32 reg_slottime_conf;
1295 u32 reg_slottime_orig;
1296 u32 reg_ack_cts_timeout_conf;
1297 u32 reg_ack_cts_timeout_orig;
1298 } fw_coverage;
1299
1300 u32 ampdu_reference;
1301
1302 const u8 *wmi_key_cipher;
1303 void *ce_priv;
1304
1305 u32 sta_tid_stats_mask;
1306
1307 /* protected by data_lock */
1308 enum ath10k_radar_confirmation_state radar_conf_state;
1309 struct ath10k_radar_found_info last_radar_info;
1310 struct work_struct radar_confirmation_work;
1311 struct ath10k_bus_params bus_param;
1312 struct completion peer_delete_done;
1313
1314 bool coex_support;
1315 int coex_gpio_pin;
1316
1317 s32 tx_power_2g_limit;
1318 s32 tx_power_5g_limit;
1319
1320 /* must be last */
1321 u8 drv_priv[] __aligned(sizeof(void *));
1322 };
1323
ath10k_peer_stats_enabled(struct ath10k * ar)1324 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
1325 {
1326 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
1327 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
1328 return true;
1329
1330 return false;
1331 }
1332
1333 extern unsigned int ath10k_frame_mode;
1334 extern unsigned long ath10k_coredump_mask;
1335
1336 void ath10k_core_napi_sync_disable(struct ath10k *ar);
1337 void ath10k_core_napi_enable(struct ath10k *ar);
1338 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1339 enum ath10k_bus bus,
1340 enum ath10k_hw_rev hw_rev,
1341 const struct ath10k_hif_ops *hif_ops);
1342 void ath10k_core_destroy(struct ath10k *ar);
1343 void ath10k_core_get_fw_features_str(struct ath10k *ar,
1344 char *buf,
1345 size_t max_len);
1346 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1347 struct ath10k_fw_file *fw_file);
1348
1349 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1350 const struct ath10k_fw_components *fw_components);
1351 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
1352 void ath10k_core_stop(struct ath10k *ar);
1353 void ath10k_core_start_recovery(struct ath10k *ar);
1354 int ath10k_core_register(struct ath10k *ar,
1355 const struct ath10k_bus_params *bus_params);
1356 void ath10k_core_unregister(struct ath10k *ar);
1357 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type);
1358 int ath10k_core_check_dt(struct ath10k *ar);
1359 void ath10k_core_free_board_files(struct ath10k *ar);
1360
1361 #endif /* _CORE_H_ */
1362