Searched defs:hw_cap (Results 1 – 8 of 8) sorted by relevance
15 #define GET_EFUSE_HW_CAP_HCI(hw_cap) \ argument17 #define GET_EFUSE_HW_CAP_BW(hw_cap) \ argument19 #define GET_EFUSE_HW_CAP_NSS(hw_cap) \ argument21 #define GET_EFUSE_HW_CAP_ANT_NUM(hw_cap) \ argument23 #define GET_EFUSE_HW_CAP_PTCL(hw_cap) \ argument
384 struct hw_cap { struct386 u8 nix_tx_aggr_lvl; /* Tx link's traffic aggregation level */387 u16 nix_txsch_per_cgx_lmac; /* Max Q's transmitting to CGX LMAC */388 u16 nix_txsch_per_lbk_lmac; /* Max Q's transmitting to LBK LMAC */389 u16 nix_txsch_per_sdp_lmac; /* Max Q's transmitting to SDP LMAC */390 bool nix_fixed_txschq_mapping; /* Schq mapping fixed or flexible */391 bool nix_shaping; /* Is shaping and coloring supported */392 bool nix_shaper_toggle_wait; /* Shaping toggle needs poll/wait */393 bool nix_tx_link_bp; /* Can link backpressure TL queues ? */394 bool nix_rx_multicast; /* Rx packet replication support */[all …]
231 u32 hw_cap = readl(ioaddr + DMA_HW_FEATURE); in dwmac1000_get_hw_feature() local
388 u32 hw_cap = readl(ioaddr + GMAC_HW_FEATURE0); in dwmac4_get_hw_feature() local
391 u32 hw_cap; in dwxgmac2_get_hw_feature() local
100 u32 hw_cap; member
484 struct sxgbe_hw_features hw_cap; member
5739 u32 hw_cap; in gaudi2_is_hmmu_enabled() local6051 u32 offset, mmu_base, stlb_base, hw_cap; in gaudi2_dcore_hmmu_init() local