1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2024 Oxide Computer Company 14 */ 15 16 #ifndef _LIBJEDEC_HEX2SPD_H 17 #define _LIBJEDEC_HEX2SPD_H 18 19 /* 20 * Common definitions for the hex2spd test. 21 */ 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 #include <libnvpair.h> 28 #include <stdint.h> 29 #include <stdbool.h> 30 31 /* 32 * This is an arbitrary value to give us an upper bound on the number of array 33 * entries that we'll support. Currently the largest array we have is 15 entries 34 * which is the DDR3 LRDIMM personality bytes. 35 */ 36 #define HEX2SPD_ARR_MAX 16 37 38 /* 39 * Represents an individual check against a particular nvlist_t payload. The 40 * data type is the nvlist_t type of the key. The corresponding value will be 41 * used. 42 */ 43 typedef struct { 44 const char *hs_key; 45 data_type_t hs_type; 46 union { 47 uint32_t hs_u32; 48 uint64_t hs_u64; 49 const char *hs_str; 50 bool hs_bool; 51 struct { 52 uint32_t ha_nval; 53 uint8_t ha_vals[HEX2SPD_ARR_MAX]; 54 } hs_u8a; 55 struct { 56 uint32_t ha_nval; 57 uint32_t ha_vals[HEX2SPD_ARR_MAX]; 58 } hs_u32a; 59 struct { 60 uint32_t ha_nval; 61 uint64_t ha_vals[HEX2SPD_ARR_MAX]; 62 } hs_u64a; 63 struct { 64 uint32_t ha_nval; 65 boolean_t ha_vals[HEX2SPD_ARR_MAX]; 66 } hs_ba; 67 } hs_val; 68 } hex2spd_spd_t; 69 70 /* 71 * Represents a set of tests to run against a specific SPD file. The last of the 72 * checks should have a key of NULL to indicate the end of the run. 73 */ 74 typedef struct { 75 const char *ht_file; 76 hex2spd_spd_t ht_checks[]; 77 } hex2spd_test_t; 78 79 extern const hex2spd_test_t samsung_ddr3_rdimm; 80 extern const hex2spd_test_t micron_ddr3_lrdimm; 81 82 extern const hex2spd_test_t micron_ddr4_rdimm; 83 extern const hex2spd_test_t samsung_ddr4_lrdimm; 84 extern const hex2spd_test_t advantech_ddr4_sodimm; 85 extern const hex2spd_test_t advantech_ddr4_udimm; 86 87 extern const hex2spd_test_t micron_ddr5_rdimm; 88 extern const hex2spd_test_t advantech_ddr5_rdimm; 89 90 extern const hex2spd_test_t nanya_lp3; 91 extern const hex2spd_test_t micron_lp4; 92 extern const hex2spd_test_t micron_lp5; 93 extern const hex2spd_test_t fake_lp5_camm2; 94 95 #ifdef __cplusplus 96 } 97 #endif 98 99 #endif /* _LIBJEDEC_HEX2SPD_H */ 100