1 /*
2 * Copyright 2018 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 #include "head.h"
23 #include "atom.h"
24 #include "core.h"
25
26 #include <nvif/pushc37b.h>
27
28 #include <nvhw/class/clc57d.h>
29
30 static int
headc57d_display_id(struct nv50_head * head,u32 display_id)31 headc57d_display_id(struct nv50_head *head, u32 display_id)
32 {
33 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;
34 int ret;
35
36 if ((ret = PUSH_WAIT(push, 2)))
37 return ret;
38
39 PUSH_NVSQ(push, NVC57D, 0x2020 + (head->base.index * 0x400), display_id);
40 return 0;
41 }
42
43 static int
headc57d_or(struct nv50_head * head,struct nv50_head_atom * asyh)44 headc57d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
45 {
46 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;
47 const int i = head->base.index;
48 u8 depth;
49 int ret;
50
51 /*XXX: This is a dirty hack until OR depth handling is
52 * improved later for deep colour etc.
53 */
54 switch (asyh->or.depth) {
55 case 6: depth = 5; break;
56 case 5: depth = 4; break;
57 case 2: depth = 1; break;
58 case 0: depth = 4; break;
59 default:
60 depth = asyh->or.depth;
61 WARN_ON(1);
62 break;
63 }
64
65 if ((ret = PUSH_WAIT(push, 2)))
66 return ret;
67
68 PUSH_MTHD(push, NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i),
69 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |
70 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |
71 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |
72 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) |
73 NVDEF(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, COLOR_SPACE_OVERRIDE, DISABLE) |
74 NVDEF(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, EXT_PACKET_WIN, NONE));
75 return 0;
76 }
77
78 static int
headc57d_procamp(struct nv50_head * head,struct nv50_head_atom * asyh)79 headc57d_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
80 {
81 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;
82 const int i = head->base.index;
83 int ret;
84
85 if ((ret = PUSH_WAIT(push, 2)))
86 return ret;
87
88 //TODO:
89 PUSH_MTHD(push, NVC57D, HEAD_SET_PROCAMP(i),
90 NVDEF(NVC57D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) |
91 NVDEF(NVC57D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) |
92 NVDEF(NVC57D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA));
93 return 0;
94 }
95
96 static int
headc57d_olut_clr(struct nv50_head * head)97 headc57d_olut_clr(struct nv50_head *head)
98 {
99 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;
100 const int i = head->base.index;
101 int ret;
102
103 if ((ret = PUSH_WAIT(push, 2)))
104 return ret;
105
106 PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_OLUT(i), 0x00000000);
107 return 0;
108 }
109
110 static int
headc57d_olut_set(struct nv50_head * head,struct nv50_head_atom * asyh)111 headc57d_olut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
112 {
113 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;
114 const int i = head->base.index;
115 int ret;
116
117 if ((ret = PUSH_WAIT(push, 5)))
118 return ret;
119
120 PUSH_MTHD(push, NVC57D, HEAD_SET_OLUT_CONTROL(i),
121 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, INTERPOLATE, asyh->olut.output_mode) |
122 NVDEF(NVC57D, HEAD_SET_OLUT_CONTROL, MIRROR, DISABLE) |
123 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, MODE, asyh->olut.mode) |
124 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size),
125
126 HEAD_SET_OLUT_FP_NORM_SCALE(i), 0xffffffff,
127 HEAD_SET_CONTEXT_DMA_OLUT(i), asyh->olut.handle,
128 HEAD_SET_OFFSET_OLUT(i), asyh->olut.offset >> 8);
129 return 0;
130 }
131
132 static void
headc57d_olut_load_8(struct drm_color_lut * in,int size,void __iomem * mem)133 headc57d_olut_load_8(struct drm_color_lut *in, int size, void __iomem *mem)
134 {
135 memset_io(mem, 0x00, 0x20); /* VSS header. */
136 mem += 0x20;
137
138 while (size--) {
139 u16 r = drm_color_lut_extract(in-> red + 0, 16);
140 u16 g = drm_color_lut_extract(in->green + 0, 16);
141 u16 b = drm_color_lut_extract(in-> blue + 0, 16);
142 u16 ri = 0, gi = 0, bi = 0, i;
143
144 if (in++, size) {
145 ri = (drm_color_lut_extract(in-> red, 16) - r) / 4;
146 gi = (drm_color_lut_extract(in->green, 16) - g) / 4;
147 bi = (drm_color_lut_extract(in-> blue, 16) - b) / 4;
148 }
149
150 for (i = 0; i < 4; i++, mem += 8) {
151 writew(r + ri * i, mem + 0);
152 writew(g + gi * i, mem + 2);
153 writew(b + bi * i, mem + 4);
154 }
155 }
156
157 /* INTERPOLATE modes require a "next" entry to interpolate with,
158 * so we replicate the last entry to deal with this for now.
159 */
160 writew(readw(mem - 8), mem + 0);
161 writew(readw(mem - 6), mem + 2);
162 writew(readw(mem - 4), mem + 4);
163 }
164
165 static void
headc57d_olut_load(struct drm_color_lut * in,int size,void __iomem * mem)166 headc57d_olut_load(struct drm_color_lut *in, int size, void __iomem *mem)
167 {
168 memset_io(mem, 0x00, 0x20); /* VSS header. */
169 mem += 0x20;
170
171 for (; size--; in++, mem += 0x08) {
172 writew(drm_color_lut_extract(in-> red, 16), mem + 0);
173 writew(drm_color_lut_extract(in->green, 16), mem + 2);
174 writew(drm_color_lut_extract(in-> blue, 16), mem + 4);
175 }
176
177 /* INTERPOLATE modes require a "next" entry to interpolate with,
178 * so we replicate the last entry to deal with this for now.
179 */
180 writew(readw(mem - 8), mem + 0);
181 writew(readw(mem - 6), mem + 2);
182 writew(readw(mem - 4), mem + 4);
183 }
184
185 static bool
headc57d_olut(struct nv50_head * head,struct nv50_head_atom * asyh,int size)186 headc57d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
187 {
188 if (size != 0 && size != 256 && size != 1024)
189 return false;
190
191 asyh->olut.mode = NVC57D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10;
192 asyh->olut.size = 4 /* VSS header. */ + 1024 + 1 /* Entries. */;
193 asyh->olut.output_mode = NVC57D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE;
194 if (size == 256)
195 asyh->olut.load = headc57d_olut_load_8;
196 else
197 asyh->olut.load = headc57d_olut_load;
198 return true;
199 }
200
201 static int
headc57d_mode(struct nv50_head * head,struct nv50_head_atom * asyh)202 headc57d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
203 {
204 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;
205 struct nv50_head_mode *m = &asyh->mode;
206 const int i = head->base.index;
207 int ret;
208
209 if ((ret = PUSH_WAIT(push, 15)))
210 return ret;
211
212 PUSH_MTHD(push, NVC57D, HEAD_SET_RASTER_SIZE(i),
213 NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |
214 NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),
215
216 HEAD_SET_RASTER_SYNC_END(i),
217 NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |
218 NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),
219
220 HEAD_SET_RASTER_BLANK_END(i),
221 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |
222 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),
223
224 HEAD_SET_RASTER_BLANK_START(i),
225 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |
226 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks));
227
228 //XXX:
229 PUSH_NVSQ(push, NVC57D, 0x2074 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s);
230 PUSH_NVSQ(push, NVC57D, 0x2008 + (i * 0x400), m->interlace);
231
232 PUSH_MTHD(push, NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY(i),
233 NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));
234
235 PUSH_MTHD(push, NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(i),
236 NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));
237
238 /*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */
239 PUSH_MTHD(push, NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS(i),
240 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, CURSOR, USAGE_W256_H256) |
241 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, OLUT_ALLOWED, TRUE) |
242 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, OUTPUT_SCALER_TAPS, TAPS_2) |
243 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, UPSCALING_ALLOWED, TRUE));
244 return 0;
245 }
246
247 const struct nv50_head_func
248 headc57d = {
249 .view = headc37d_view,
250 .mode = headc57d_mode,
251 .olut = headc57d_olut,
252 .ilut_check = head907d_ilut_check,
253 .olut_identity = true,
254 .olut_size = 1024,
255 .olut_set = headc57d_olut_set,
256 .olut_clr = headc57d_olut_clr,
257 .curs_layout = head917d_curs_layout,
258 .curs_format = headc37d_curs_format,
259 .curs_set = headc37d_curs_set,
260 .curs_clr = headc37d_curs_clr,
261 .dither = headc37d_dither,
262 .procamp = headc57d_procamp,
263 .or = headc57d_or,
264 /* TODO: flexible window mappings */
265 .static_wndw_map = headc37d_static_wndw_map,
266 .display_id = headc57d_display_id,
267 };
268