1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
5 * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
6 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org>
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 /*
32 * Intel High Definition Audio (CODEC) driver for FreeBSD.
33 */
34
35 #ifdef HAVE_KERNEL_OPTION_HEADERS
36 #include "opt_snd.h"
37 #endif
38
39 #include <dev/sound/pcm/sound.h>
40
41 #include <sys/ctype.h>
42
43 #include <dev/sound/pci/hda/hda_reg.h>
44 #include <dev/sound/pci/hda/hdac.h>
45
46 struct hdacc_fg {
47 device_t dev;
48 nid_t nid;
49 uint8_t type;
50 uint32_t subsystem_id;
51 };
52
53 struct hdacc_softc {
54 device_t dev;
55 struct mtx *lock;
56 nid_t cad;
57 device_t streams[2][16];
58 device_t tags[64];
59 int fgcnt;
60 struct hdacc_fg *fgs;
61 };
62
63 #define hdacc_lock(codec) snd_mtxlock((codec)->lock)
64 #define hdacc_unlock(codec) snd_mtxunlock((codec)->lock)
65 #define hdacc_lockassert(codec) snd_mtxassert((codec)->lock)
66
67 MALLOC_DEFINE(M_HDACC, "hdacc", "HDA CODEC");
68
69 /* CODECs */
70 static const struct {
71 uint32_t id;
72 uint16_t revid;
73 const char *name;
74 } hdacc_codecs[] = {
75 { HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" },
76 { HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" },
77 { HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" },
78 { HDA_CODEC_ALC215, 0, "Realtek ALC215" },
79 { HDA_CODEC_ALC221, 0, "Realtek ALC221" },
80 { HDA_CODEC_ALC222, 0, "Realtek ALC222" },
81 { HDA_CODEC_ALC225, 0, "Realtek ALC225" },
82 { HDA_CODEC_ALC230, 0, "Realtek ALC230" },
83 { HDA_CODEC_ALC231, 0, "Realtek ALC231" },
84 { HDA_CODEC_ALC233, 0, "Realtek ALC233" },
85 { HDA_CODEC_ALC234, 0, "Realtek ALC234" },
86 { HDA_CODEC_ALC235, 0, "Realtek ALC235" },
87 { HDA_CODEC_ALC236, 0, "Realtek ALC236" },
88 { HDA_CODEC_ALC245, 0, "Realtek ALC245" },
89 { HDA_CODEC_ALC255, 0, "Realtek ALC255" },
90 { HDA_CODEC_ALC256, 0, "Realtek ALC256" },
91 { HDA_CODEC_ALC257, 0, "Realtek ALC257" },
92 { HDA_CODEC_ALC260, 0, "Realtek ALC260" },
93 { HDA_CODEC_ALC262, 0, "Realtek ALC262" },
94 { HDA_CODEC_ALC267, 0, "Realtek ALC267" },
95 { HDA_CODEC_ALC268, 0, "Realtek ALC268" },
96 { HDA_CODEC_ALC269, 0, "Realtek ALC269" },
97 { HDA_CODEC_ALC270, 0, "Realtek ALC270" },
98 { HDA_CODEC_ALC272, 0, "Realtek ALC272" },
99 { HDA_CODEC_ALC273, 0, "Realtek ALC273" },
100 { HDA_CODEC_ALC274, 0, "Realtek ALC274" },
101 { HDA_CODEC_ALC275, 0, "Realtek ALC275" },
102 { HDA_CODEC_ALC276, 0, "Realtek ALC276" },
103 { HDA_CODEC_ALC292, 0, "Realtek ALC292" },
104 { HDA_CODEC_ALC295, 0, "Realtek ALC295" },
105 { HDA_CODEC_ALC280, 0, "Realtek ALC280" },
106 { HDA_CODEC_ALC282, 0, "Realtek ALC282" },
107 { HDA_CODEC_ALC283, 0, "Realtek ALC283" },
108 { HDA_CODEC_ALC284, 0, "Realtek ALC284" },
109 { HDA_CODEC_ALC285, 0, "Realtek ALC285" },
110 { HDA_CODEC_ALC286, 0, "Realtek ALC286" },
111 { HDA_CODEC_ALC288, 0, "Realtek ALC288" },
112 { HDA_CODEC_ALC289, 0, "Realtek ALC289" },
113 { HDA_CODEC_ALC290, 0, "Realtek ALC290" },
114 { HDA_CODEC_ALC292, 0, "Realtek ALC292" },
115 { HDA_CODEC_ALC293, 0, "Realtek ALC293" },
116 { HDA_CODEC_ALC294, 0, "Realtek ALC294" },
117 { HDA_CODEC_ALC295, 0, "Realtek ALC295" },
118 { HDA_CODEC_ALC298, 0, "Realtek ALC298" },
119 { HDA_CODEC_ALC299, 0, "Realtek ALC299" },
120 { HDA_CODEC_ALC300, 0, "Realtek ALC300" },
121 { HDA_CODEC_ALC623, 0, "Realtek ALC623" },
122 { HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" },
123 { HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" },
124 { HDA_CODEC_ALC662, 0x0101, "Realtek ALC662 rev1" },
125 { HDA_CODEC_ALC662, 0x0300, "Realtek ALC662 rev3" },
126 { HDA_CODEC_ALC662, 0, "Realtek ALC662" },
127 { HDA_CODEC_ALC663, 0, "Realtek ALC663" },
128 { HDA_CODEC_ALC665, 0, "Realtek ALC665" },
129 { HDA_CODEC_ALC670, 0, "Realtek ALC670" },
130 { HDA_CODEC_ALC671, 0, "Realtek ALC671" },
131 { HDA_CODEC_ALC680, 0, "Realtek ALC680" },
132 { HDA_CODEC_ALC700, 0, "Realtek ALC700" },
133 { HDA_CODEC_ALC701, 0, "Realtek ALC701" },
134 { HDA_CODEC_ALC703, 0, "Realtek ALC703" },
135 { HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" },
136 { HDA_CODEC_ALC861, 0, "Realtek ALC861" },
137 { HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" },
138 { HDA_CODEC_ALC880, 0, "Realtek ALC880" },
139 { HDA_CODEC_ALC882, 0, "Realtek ALC882" },
140 { HDA_CODEC_ALC883, 0, "Realtek ALC883" },
141 { HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" },
142 { HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" },
143 { HDA_CODEC_ALC885, 0, "Realtek ALC885" },
144 { HDA_CODEC_ALC887, 0, "Realtek ALC887" },
145 { HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" },
146 { HDA_CODEC_ALC888, 0, "Realtek ALC888" },
147 { HDA_CODEC_ALC889, 0, "Realtek ALC889" },
148 { HDA_CODEC_ALC892, 0, "Realtek ALC892" },
149 { HDA_CODEC_ALC897, 0, "Realtek ALC897" },
150 { HDA_CODEC_ALC899, 0, "Realtek ALC899" },
151 { HDA_CODEC_ALC1150, 0, "Realtek ALC1150" },
152 { HDA_CODEC_ALCS1200A, 0, "Realtek ALCS1200A" },
153 { HDA_CODEC_ALC1220_1, 0, "Realtek ALC1220" },
154 { HDA_CODEC_ALC1220, 0, "Realtek ALC1220" },
155 { HDA_CODEC_AD1882, 0, "Analog Devices AD1882" },
156 { HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" },
157 { HDA_CODEC_AD1883, 0, "Analog Devices AD1883" },
158 { HDA_CODEC_AD1884, 0, "Analog Devices AD1884" },
159 { HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" },
160 { HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" },
161 { HDA_CODEC_AD1983, 0, "Analog Devices AD1983" },
162 { HDA_CODEC_AD1984, 0, "Analog Devices AD1984" },
163 { HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" },
164 { HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" },
165 { HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" },
166 { HDA_CODEC_AD1987, 0, "Analog Devices AD1987" },
167 { HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" },
168 { HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" },
169 { HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" },
170 { HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" },
171 { HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" },
172 { HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" },
173 { HDA_CODEC_CA0132, 0, "Creative CA0132" },
174 { HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" },
175 { HDA_CODEC_CMI9880, 0, "CMedia CMI9880" },
176 { HDA_CODEC_CMI98802, 0, "CMedia CMI9880" },
177 { HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" },
178 { HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" },
179 { HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" },
180 { HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" },
181 { HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" },
182 { HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" },
183 { HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" },
184 { HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" },
185 { HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" },
186 { HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" },
187 { HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" },
188 { HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" },
189 { HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" },
190 { HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" },
191 { HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" },
192 { HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" },
193 { HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" },
194 { HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" },
195 { HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" },
196 { HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" },
197 { HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" },
198 { HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" },
199 { HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" },
200 { HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" },
201 { HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" },
202 { HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" },
203 { HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" },
204 { HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" },
205 { HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" },
206 { HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" },
207 { HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" },
208 { HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" },
209 { HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" },
210 { HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" },
211 { HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" },
212 { HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" },
213 { HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" },
214 { HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" },
215 { HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" },
216 { HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" },
217 { HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" },
218 { HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" },
219 { HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" },
220 { HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" },
221 { HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" },
222 { HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" },
223 { HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" },
224 { HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" },
225 { HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" },
226 { HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" },
227 { HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" },
228 { HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" },
229 { HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" },
230 { HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" },
231 { HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" },
232 { HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" },
233 { HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" },
234 { HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" },
235 { HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" },
236 { HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" },
237 { HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" },
238 { HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" },
239 { HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" },
240 { HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" },
241 { HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" },
242 { HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" },
243 { HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" },
244 { HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" },
245 { HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" },
246 { HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" },
247 { HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" },
248 { HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" },
249 { HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" },
250 { HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" },
251 { HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" },
252 { HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" },
253 { HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" },
254 { HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" },
255 { HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" },
256 { HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" },
257 { HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" },
258 { HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" },
259 { HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" },
260 { HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" },
261 { HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" },
262 { HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" },
263 { HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" },
264 { HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" },
265 { HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" },
266 { HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" },
267 { HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" },
268 { HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" },
269 { HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" },
270 { HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" },
271 { HDA_CODEC_IDT92HD95B, 0, "Tempo 92HD95B" },
272 { HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" },
273 { HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" },
274 { HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" },
275 { HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" },
276 { HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" },
277 { HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" },
278 { HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" },
279 { HDA_CODEC_CX20584, 0, "Conexant CX20584" },
280 { HDA_CODEC_CX20585, 0, "Conexant CX20585" },
281 { HDA_CODEC_CX20588, 0, "Conexant CX20588" },
282 { HDA_CODEC_CX20590, 0, "Conexant CX20590" },
283 { HDA_CODEC_CX20631, 0, "Conexant CX20631" },
284 { HDA_CODEC_CX20632, 0, "Conexant CX20632" },
285 { HDA_CODEC_CX20641, 0, "Conexant CX20641" },
286 { HDA_CODEC_CX20642, 0, "Conexant CX20642" },
287 { HDA_CODEC_CX20651, 0, "Conexant CX20651" },
288 { HDA_CODEC_CX20652, 0, "Conexant CX20652" },
289 { HDA_CODEC_CX20664, 0, "Conexant CX20664" },
290 { HDA_CODEC_CX20665, 0, "Conexant CX20665" },
291 { HDA_CODEC_CX21722, 0, "Conexant CX21722" },
292 { HDA_CODEC_CX20722, 0, "Conexant CX20722" },
293 { HDA_CODEC_CX21724, 0, "Conexant CX21724" },
294 { HDA_CODEC_CX20724, 0, "Conexant CX20724" },
295 { HDA_CODEC_CX20751, 0, "Conexant CX20751/2" },
296 { HDA_CODEC_CX20751_2, 0, "Conexant CX20751/2" },
297 { HDA_CODEC_CX20753, 0, "Conexant CX20753/4" },
298 { HDA_CODEC_CX20755, 0, "Conexant CX20755" },
299 { HDA_CODEC_CX20756, 0, "Conexant CX20756" },
300 { HDA_CODEC_CX20757, 0, "Conexant CX20757" },
301 { HDA_CODEC_CX20952, 0, "Conexant CX20952" },
302 { HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" },
303 { HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" },
304 { HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" },
305 { HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" },
306 { HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" },
307 { HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" },
308 { HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" },
309 { HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" },
310 { HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" },
311 { HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" },
312 { HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" },
313 { HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" },
314 { HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" },
315 { HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" },
316 { HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" },
317 { HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" },
318 { HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" },
319 { HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" },
320 { HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" },
321 { HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" },
322 { HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" },
323 { HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" },
324 { HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" },
325 { HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" },
326 { HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" },
327 { HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" },
328 { HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" },
329 { HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" },
330 { HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" },
331 { HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" },
332 { HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" },
333 { HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" },
334 { HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" },
335 { HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" },
336 { HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" },
337 { HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" },
338 { HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" },
339 { HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" },
340 { HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" },
341 { HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" },
342 { HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" },
343 { HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" },
344 { HDA_CODEC_VT1812, 0, "VIA VT1812" },
345 { HDA_CODEC_VT1818S, 0, "VIA VT1818S" },
346 { HDA_CODEC_VT1828S, 0, "VIA VT1828S" },
347 { HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" },
348 { HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" },
349 { HDA_CODEC_VT2020, 0, "VIA VT2020" },
350 { HDA_CODEC_ATIRS600_1, 0, "ATI RS600" },
351 { HDA_CODEC_ATIRS600_2, 0, "ATI RS600" },
352 { HDA_CODEC_ATIRS690, 0, "ATI RS690/780" },
353 { HDA_CODEC_ATIR6XX, 0, "ATI R6xx" },
354 { HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" },
355 { HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" },
356 { HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" },
357 { HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" },
358 { HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" },
359 { HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" },
360 { HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" },
361 { HDA_CODEC_NVIDIAGM204, 0, "NVIDIA GM204" },
362 { HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" },
363 { HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" },
364 { HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" },
365 { HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" },
366 { HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" },
367 { HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" },
368 { HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" },
369 { HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" },
370 { HDA_CODEC_NVIDIATEGRA30, 0, "NVIDIA Tegra30" },
371 { HDA_CODEC_NVIDIATEGRA114, 0, "NVIDIA Tegra114" },
372 { HDA_CODEC_NVIDIATEGRA124, 0, "NVIDIA Tegra124" },
373 { HDA_CODEC_NVIDIATEGRA210, 0, "NVIDIA Tegra210" },
374 { HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" },
375 { HDA_CODEC_INTELBL, 0, "Intel Bearlake" },
376 { HDA_CODEC_INTELCA, 0, "Intel Cantiga" },
377 { HDA_CODEC_INTELEL, 0, "Intel Eaglelake" },
378 { HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" },
379 { HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" },
380 { HDA_CODEC_INTELPPT, 0, "Intel Panther Point" },
381 { HDA_CODEC_INTELHSW, 0, "Intel Haswell" },
382 { HDA_CODEC_INTELBDW, 0, "Intel Broadwell" },
383 { HDA_CODEC_INTELSKLK, 0, "Intel Skylake" },
384 { HDA_CODEC_INTELKBLK, 0, "Intel Kaby Lake" },
385 { HDA_CODEC_INTELJLK, 0, "Intel Jasper Lake" },
386 { HDA_CODEC_INTELELLK, 0, "Intel Elkhart Lake" },
387 { HDA_CODEC_INTELCT, 0, "Intel Cedar Trail" },
388 { HDA_CODEC_INTELVV2, 0, "Intel Valleyview2" },
389 { HDA_CODEC_INTELBR, 0, "Intel Braswell" },
390 { HDA_CODEC_INTELCL, 0, "Intel Crestline" },
391 { HDA_CODEC_INTELBXTN, 0, "Intel Broxton" },
392 { HDA_CODEC_INTELCNLK, 0, "Intel Cannon Lake" },
393 { HDA_CODEC_INTELGMLK, 0, "Intel Gemini Lake" },
394 { HDA_CODEC_INTELGMLK1, 0, "Intel Gemini Lake" },
395 { HDA_CODEC_INTELICLK, 0, "Intel Ice Lake" },
396 { HDA_CODEC_INTELTGLK, 0, "Intel Tiger Lake" },
397 { HDA_CODEC_INTELTGLKH, 0, "Intel Tiger Lake-H" },
398 { HDA_CODEC_INTELALLK, 0, "Intel Alder Lake" },
399 { HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" },
400 { HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" },
401 { HDA_CODEC_VMWARE, 0, "VMware" },
402 /* Unknown CODECs */
403 { HDA_CODEC_ADXXXX, 0, "Analog Devices" },
404 { HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" },
405 { HDA_CODEC_ALCXXXX, 0, "Realtek" },
406 { HDA_CODEC_ATIXXXX, 0, "ATI" },
407 { HDA_CODEC_CAXXXX, 0, "Creative" },
408 { HDA_CODEC_CMIXXXX, 0, "CMedia" },
409 { HDA_CODEC_CMIXXXX2, 0, "CMedia" },
410 { HDA_CODEC_CSXXXX, 0, "Cirrus Logic" },
411 { HDA_CODEC_CXXXXX, 0, "Conexant" },
412 { HDA_CODEC_CHXXXX, 0, "Chrontel" },
413 { HDA_CODEC_IDTXXXX, 0, "IDT" },
414 { HDA_CODEC_INTELXXXX, 0, "Intel" },
415 { HDA_CODEC_MOTOXXXX, 0, "Motorola" },
416 { HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" },
417 { HDA_CODEC_SIIXXXX, 0, "Silicon Image" },
418 { HDA_CODEC_STACXXXX, 0, "Sigmatel" },
419 { HDA_CODEC_VMWAREXXXX, 0, "VMware" },
420 { HDA_CODEC_VTXXXX, 0, "VIA" },
421 };
422
423 static int
hdacc_suspend(device_t dev)424 hdacc_suspend(device_t dev)
425 {
426
427 HDA_BOOTHVERBOSE(
428 device_printf(dev, "Suspend...\n");
429 );
430 bus_generic_suspend(dev);
431 HDA_BOOTHVERBOSE(
432 device_printf(dev, "Suspend done\n");
433 );
434 return (0);
435 }
436
437 static int
hdacc_resume(device_t dev)438 hdacc_resume(device_t dev)
439 {
440
441 HDA_BOOTHVERBOSE(
442 device_printf(dev, "Resume...\n");
443 );
444 bus_generic_resume(dev);
445 HDA_BOOTHVERBOSE(
446 device_printf(dev, "Resume done\n");
447 );
448 return (0);
449 }
450
451 static int
hdacc_probe(device_t dev)452 hdacc_probe(device_t dev)
453 {
454 uint32_t id, revid;
455 char buf[128];
456 int i;
457
458 id = ((uint32_t)hda_get_vendor_id(dev) << 16) + hda_get_device_id(dev);
459 revid = ((uint32_t)hda_get_revision_id(dev) << 8) +
460 hda_get_stepping_id(dev);
461
462 for (i = 0; i < nitems(hdacc_codecs); i++) {
463 if (!HDA_DEV_MATCH(hdacc_codecs[i].id, id))
464 continue;
465 if (hdacc_codecs[i].revid != 0 &&
466 hdacc_codecs[i].revid != revid)
467 continue;
468 break;
469 }
470 if (i < nitems(hdacc_codecs)) {
471 if ((hdacc_codecs[i].id & 0xffff) != 0xffff)
472 strlcpy(buf, hdacc_codecs[i].name, sizeof(buf));
473 else
474 snprintf(buf, sizeof(buf), "%s (0x%04x)",
475 hdacc_codecs[i].name, hda_get_device_id(dev));
476 } else
477 snprintf(buf, sizeof(buf), "Generic (0x%04x)", id);
478 device_set_descf(dev, "%s HDA CODEC", buf);
479 return (BUS_PROBE_DEFAULT);
480 }
481
482 static int
hdacc_attach(device_t dev)483 hdacc_attach(device_t dev)
484 {
485 struct hdacc_softc *codec = device_get_softc(dev);
486 device_t child;
487 int cad = (intptr_t)device_get_ivars(dev);
488 uint32_t subnode;
489 int startnode;
490 int endnode;
491 int i, n;
492
493 codec->lock = HDAC_GET_MTX(device_get_parent(dev), dev);
494 codec->dev = dev;
495 codec->cad = cad;
496
497 hdacc_lock(codec);
498 subnode = hda_command(dev,
499 HDA_CMD_GET_PARAMETER(0, 0x0, HDA_PARAM_SUB_NODE_COUNT));
500 hdacc_unlock(codec);
501 if (subnode == HDA_INVALID)
502 return (EIO);
503 codec->fgcnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
504 startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
505 endnode = startnode + codec->fgcnt;
506
507 HDA_BOOTHVERBOSE(
508 device_printf(dev,
509 "Root Node at nid=0: %d subnodes %d-%d\n",
510 HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode),
511 startnode, endnode - 1);
512 );
513
514 codec->fgs = malloc(sizeof(struct hdacc_fg) * codec->fgcnt,
515 M_HDACC, M_ZERO | M_WAITOK);
516 for (i = startnode, n = 0; i < endnode; i++, n++) {
517 codec->fgs[n].nid = i;
518 hdacc_lock(codec);
519 codec->fgs[n].type =
520 HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hda_command(dev,
521 HDA_CMD_GET_PARAMETER(0, i, HDA_PARAM_FCT_GRP_TYPE)));
522 codec->fgs[n].subsystem_id = hda_command(dev,
523 HDA_CMD_GET_SUBSYSTEM_ID(0, i));
524 hdacc_unlock(codec);
525 codec->fgs[n].dev = child = device_add_child(dev, NULL, DEVICE_UNIT_ANY);
526 if (child == NULL) {
527 device_printf(dev, "Failed to add function device\n");
528 continue;
529 }
530 device_set_ivars(child, &codec->fgs[n]);
531 }
532
533 bus_generic_attach(dev);
534
535 return (0);
536 }
537
538 static int
hdacc_detach(device_t dev)539 hdacc_detach(device_t dev)
540 {
541 struct hdacc_softc *codec = device_get_softc(dev);
542 int error;
543
544 if ((error = device_delete_children(dev)) != 0)
545 return (error);
546 free(codec->fgs, M_HDACC);
547 return (0);
548 }
549
550 static int
hdacc_child_location(device_t dev,device_t child,struct sbuf * sb)551 hdacc_child_location(device_t dev, device_t child, struct sbuf *sb)
552 {
553 struct hdacc_fg *fg = device_get_ivars(child);
554
555 sbuf_printf(sb, "nid=%d", fg->nid);
556 return (0);
557 }
558
559 static int
hdacc_child_pnpinfo_method(device_t dev,device_t child,struct sbuf * sb)560 hdacc_child_pnpinfo_method(device_t dev, device_t child, struct sbuf *sb)
561 {
562 struct hdacc_fg *fg = device_get_ivars(child);
563
564 sbuf_printf(sb, "type=0x%02x subsystem=0x%08x",
565 fg->type, fg->subsystem_id);
566 return (0);
567 }
568
569 static int
hdacc_print_child(device_t dev,device_t child)570 hdacc_print_child(device_t dev, device_t child)
571 {
572 struct hdacc_fg *fg = device_get_ivars(child);
573 int retval;
574
575 retval = bus_print_child_header(dev, child);
576 retval += printf(" at nid %d", fg->nid);
577 retval += bus_print_child_footer(dev, child);
578
579 return (retval);
580 }
581
582 static void
hdacc_probe_nomatch(device_t dev,device_t child)583 hdacc_probe_nomatch(device_t dev, device_t child)
584 {
585 struct hdacc_softc *codec = device_get_softc(dev);
586 struct hdacc_fg *fg = device_get_ivars(child);
587
588 device_printf(child, "<%s %s Function Group> at nid %d on %s "
589 "(no driver attached)\n",
590 device_get_desc(dev),
591 fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ? "Audio" :
592 (fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM ? "Modem" :
593 "Unknown"), fg->nid, device_get_nameunit(dev));
594 HDA_BOOTVERBOSE(
595 device_printf(dev, "Subsystem ID: 0x%08x\n",
596 hda_get_subsystem_id(dev));
597 );
598 HDA_BOOTHVERBOSE(
599 device_printf(dev, "Power down FG nid=%d to the D3 state...\n",
600 fg->nid);
601 );
602 hdacc_lock(codec);
603 hda_command(dev, HDA_CMD_SET_POWER_STATE(0,
604 fg->nid, HDA_CMD_POWER_STATE_D3));
605 hdacc_unlock(codec);
606 }
607
608 static int
hdacc_read_ivar(device_t dev,device_t child,int which,uintptr_t * result)609 hdacc_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
610 {
611 struct hdacc_fg *fg = device_get_ivars(child);
612
613 switch (which) {
614 case HDA_IVAR_NODE_ID:
615 *result = fg->nid;
616 break;
617 case HDA_IVAR_NODE_TYPE:
618 *result = fg->type;
619 break;
620 case HDA_IVAR_SUBSYSTEM_ID:
621 *result = fg->subsystem_id;
622 break;
623 default:
624 return(BUS_READ_IVAR(device_get_parent(dev), dev,
625 which, result));
626 }
627 return (0);
628 }
629
630 static struct mtx *
hdacc_get_mtx(device_t dev,device_t child)631 hdacc_get_mtx(device_t dev, device_t child)
632 {
633 struct hdacc_softc *codec = device_get_softc(dev);
634
635 return (codec->lock);
636 }
637
638 static uint32_t
hdacc_codec_command(device_t dev,device_t child,uint32_t verb)639 hdacc_codec_command(device_t dev, device_t child, uint32_t verb)
640 {
641
642 return (HDAC_CODEC_COMMAND(device_get_parent(dev), dev, verb));
643 }
644
645 static int
hdacc_stream_alloc(device_t dev,device_t child,int dir,int format,int stripe,uint32_t ** dmapos)646 hdacc_stream_alloc(device_t dev, device_t child, int dir, int format,
647 int stripe, uint32_t **dmapos)
648 {
649 struct hdacc_softc *codec = device_get_softc(dev);
650 int stream;
651
652 stream = HDAC_STREAM_ALLOC(device_get_parent(dev), dev,
653 dir, format, stripe, dmapos);
654 if (stream > 0)
655 codec->streams[dir][stream] = child;
656 return (stream);
657 }
658
659 static void
hdacc_stream_free(device_t dev,device_t child,int dir,int stream)660 hdacc_stream_free(device_t dev, device_t child, int dir, int stream)
661 {
662 struct hdacc_softc *codec = device_get_softc(dev);
663
664 codec->streams[dir][stream] = NULL;
665 HDAC_STREAM_FREE(device_get_parent(dev), dev, dir, stream);
666 }
667
668 static int
hdacc_stream_start(device_t dev,device_t child,int dir,int stream,bus_addr_t buf,int blksz,int blkcnt)669 hdacc_stream_start(device_t dev, device_t child, int dir, int stream,
670 bus_addr_t buf, int blksz, int blkcnt)
671 {
672
673 return (HDAC_STREAM_START(device_get_parent(dev), dev,
674 dir, stream, buf, blksz, blkcnt));
675 }
676
677 static void
hdacc_stream_stop(device_t dev,device_t child,int dir,int stream)678 hdacc_stream_stop(device_t dev, device_t child, int dir, int stream)
679 {
680
681 HDAC_STREAM_STOP(device_get_parent(dev), dev, dir, stream);
682 }
683
684 static void
hdacc_stream_reset(device_t dev,device_t child,int dir,int stream)685 hdacc_stream_reset(device_t dev, device_t child, int dir, int stream)
686 {
687
688 HDAC_STREAM_RESET(device_get_parent(dev), dev, dir, stream);
689 }
690
691 static uint32_t
hdacc_stream_getptr(device_t dev,device_t child,int dir,int stream)692 hdacc_stream_getptr(device_t dev, device_t child, int dir, int stream)
693 {
694
695 return (HDAC_STREAM_GETPTR(device_get_parent(dev), dev, dir, stream));
696 }
697
698 static void
hdacc_stream_intr(device_t dev,int dir,int stream)699 hdacc_stream_intr(device_t dev, int dir, int stream)
700 {
701 struct hdacc_softc *codec = device_get_softc(dev);
702 device_t child;
703
704 if ((child = codec->streams[dir][stream]) != NULL)
705 HDAC_STREAM_INTR(child, dir, stream);
706 }
707
708 static int
hdacc_unsol_alloc(device_t dev,device_t child,int wanted)709 hdacc_unsol_alloc(device_t dev, device_t child, int wanted)
710 {
711 struct hdacc_softc *codec = device_get_softc(dev);
712 int tag;
713
714 wanted &= 0x3f;
715 tag = wanted;
716 do {
717 if (codec->tags[tag] == NULL) {
718 codec->tags[tag] = child;
719 HDAC_UNSOL_ALLOC(device_get_parent(dev), dev, tag);
720 return (tag);
721 }
722 tag++;
723 tag &= 0x3f;
724 } while (tag != wanted);
725 return (-1);
726 }
727
728 static void
hdacc_unsol_free(device_t dev,device_t child,int tag)729 hdacc_unsol_free(device_t dev, device_t child, int tag)
730 {
731 struct hdacc_softc *codec = device_get_softc(dev);
732
733 KASSERT(tag >= 0 && tag <= 0x3f, ("Wrong tag value %d\n", tag));
734 codec->tags[tag] = NULL;
735 HDAC_UNSOL_FREE(device_get_parent(dev), dev, tag);
736 }
737
738 static void
hdacc_unsol_intr(device_t dev,uint32_t resp)739 hdacc_unsol_intr(device_t dev, uint32_t resp)
740 {
741 struct hdacc_softc *codec = device_get_softc(dev);
742 device_t child;
743 int tag;
744
745 tag = resp >> 26;
746 if ((child = codec->tags[tag]) != NULL)
747 HDAC_UNSOL_INTR(child, resp);
748 else
749 device_printf(codec->dev, "Unexpected unsolicited "
750 "response with tag %d: %08x\n", tag, resp);
751 }
752
753 static void
hdacc_pindump(device_t dev)754 hdacc_pindump(device_t dev)
755 {
756 device_t *devlist;
757 int devcount, i;
758
759 if (device_get_children(dev, &devlist, &devcount) != 0)
760 return;
761 for (i = 0; i < devcount; i++)
762 HDAC_PINDUMP(devlist[i]);
763 free(devlist, M_TEMP);
764 }
765
766 static device_method_t hdacc_methods[] = {
767 /* device interface */
768 DEVMETHOD(device_probe, hdacc_probe),
769 DEVMETHOD(device_attach, hdacc_attach),
770 DEVMETHOD(device_detach, hdacc_detach),
771 DEVMETHOD(device_suspend, hdacc_suspend),
772 DEVMETHOD(device_resume, hdacc_resume),
773 /* Bus interface */
774 DEVMETHOD(bus_child_location, hdacc_child_location),
775 DEVMETHOD(bus_child_pnpinfo, hdacc_child_pnpinfo_method),
776 DEVMETHOD(bus_print_child, hdacc_print_child),
777 DEVMETHOD(bus_probe_nomatch, hdacc_probe_nomatch),
778 DEVMETHOD(bus_read_ivar, hdacc_read_ivar),
779 DEVMETHOD(hdac_get_mtx, hdacc_get_mtx),
780 DEVMETHOD(hdac_codec_command, hdacc_codec_command),
781 DEVMETHOD(hdac_stream_alloc, hdacc_stream_alloc),
782 DEVMETHOD(hdac_stream_free, hdacc_stream_free),
783 DEVMETHOD(hdac_stream_start, hdacc_stream_start),
784 DEVMETHOD(hdac_stream_stop, hdacc_stream_stop),
785 DEVMETHOD(hdac_stream_reset, hdacc_stream_reset),
786 DEVMETHOD(hdac_stream_getptr, hdacc_stream_getptr),
787 DEVMETHOD(hdac_stream_intr, hdacc_stream_intr),
788 DEVMETHOD(hdac_unsol_alloc, hdacc_unsol_alloc),
789 DEVMETHOD(hdac_unsol_free, hdacc_unsol_free),
790 DEVMETHOD(hdac_unsol_intr, hdacc_unsol_intr),
791 DEVMETHOD(hdac_pindump, hdacc_pindump),
792 DEVMETHOD_END
793 };
794
795 static driver_t hdacc_driver = {
796 "hdacc",
797 hdacc_methods,
798 sizeof(struct hdacc_softc),
799 };
800
801 DRIVER_MODULE(snd_hda, hdac, hdacc_driver, NULL, NULL);
802