| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | adreno_gpu.h | 287 static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu) in adreno_patchid()
297 static inline bool adreno_is_revn(const struct adreno_gpu *gpu, uint32_t revn) in adreno_is_revn()
304 static inline bool adreno_has_gmu_wrapper(const struct adreno_gpu *gpu) in adreno_has_gmu_wrapper()
309 static inline bool adreno_is_a2xx(const struct adreno_gpu *gpu) in adreno_is_a2xx()
316 static inline bool adreno_is_a20x(const struct adreno_gpu *gpu) in adreno_is_a20x()
323 static inline bool adreno_is_a225(const struct adreno_gpu *gpu) in adreno_is_a225()
328 static inline bool adreno_is_a305(const struct adreno_gpu *gpu) in adreno_is_a305()
333 static inline bool adreno_is_a305b(const struct adreno_gpu *gpu) in adreno_is_a305b()
338 static inline bool adreno_is_a306(const struct adreno_gpu *gpu) in adreno_is_a306()
344 static inline bool adreno_is_a306a(const struct adreno_gpu *gpu) in adreno_is_a306a()
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| H A D | a4xx_gpu.c | 25 static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a4xx_submit()
76 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
156 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
183 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
350 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
371 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
385 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
402 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
551 static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu) in a4xx_gpu_state_get()
565 static void a4xx_dump(struct msm_gpu *gpu) in a4xx_dump()
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| H A D | a5xx_gpu.c | 21 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
33 void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in a5xx_flush()
66 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit_in_rb()
127 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit()
446 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
477 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
519 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
582 static int a5xx_ucode_load(struct msm_gpu *gpu) in a5xx_ucode_load()
644 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
664 static int a5xx_zap_shader_init(struct msm_gpu *gpu) in a5xx_zap_shader_init()
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| H A D | a6xx_gpu.c | 32 static bool fence_status_check(struct msm_gpu *gpu, u32 offset, u32 value, u32 status, u32 mask) in fence_status_check()
53 struct msm_gpu *gpu = &adreno_gpu->base; in fenced_write() local
110 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
128 static bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
147 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
160 void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
328 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a6xx_submit()
452 static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a7xx_submit()
625 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
707 static void a6xx_set_cp_protect(struct msm_gpu *gpu) in a6xx_set_cp_protect()
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| H A D | a8xx_gpu.c | 19 static void a8xx_aperture_slice_set(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice) in a8xx_aperture_slice_set()
35 static void a8xx_aperture_acquire(struct msm_gpu *gpu, enum adreno_pipe pipe, unsigned long *flags) in a8xx_aperture_acquire()
45 static void a8xx_aperture_release(struct msm_gpu *gpu, unsigned long flags) in a8xx_aperture_release()
53 static void a8xx_aperture_clear(struct msm_gpu *gpu) in a8xx_aperture_clear()
61 static void a8xx_write_pipe(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 offset, u32 data) in a8xx_write_pipe()
70 static u32 a8xx_read_pipe_slice(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice, u32 offset) in a8xx_read_pipe_slice()
85 void a8xx_gpu_get_slice_info(struct msm_gpu *gpu) in a8xx_gpu_get_slice_info()
120 static inline bool _a8xx_check_idle(struct msm_gpu *gpu) in _a8xx_check_idle()
138 static bool a8xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a8xx_idle()
158 void a8xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a8xx_flush()
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| H A D | a3xx_gpu.c | 31 static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a3xx_submit()
85 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
112 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
366 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
387 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
401 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
419 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
474 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
481 static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu) in a3xx_gpu_state_get()
495 static u64 a3xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) in a3xx_gpu_busy()
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| H A D | a2xx_gpu.c | 13 static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a2xx_submit()
54 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init()
111 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init()
269 static void a2xx_recover(struct msm_gpu *gpu) in a2xx_recover()
290 static void a2xx_destroy(struct msm_gpu *gpu) in a2xx_destroy()
302 static bool a2xx_idle(struct msm_gpu *gpu) in a2xx_idle()
320 static irqreturn_t a2xx_irq(struct msm_gpu *gpu) in a2xx_irq()
451 static void a2xx_dump(struct msm_gpu *gpu) in a2xx_dump()
458 static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu) in a2xx_gpu_state_get()
473 a2xx_create_vm(struct msm_gpu *gpu, struct platform_device *pdev) in a2xx_create_vm()
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| H A D | a5xx_preempt.c | 25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state()
40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
84 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer() local
95 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
175 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
217 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
250 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring() local
292 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
304 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
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| H A D | a6xx_gpu_state.c | 131 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
144 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
174 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read()
208 static int cx_debugbus_read(struct msm_gpu *gpu, void __iomem *cxdbg, u32 block, u32 offset, in cx_debugbus_read()
236 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read()
260 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu, in a6xx_get_vbif_debugbus_block()
314 static void a6xx_get_debugbus_block(struct msm_gpu *gpu, in a6xx_get_debugbus_block()
332 static void a6xx_get_cx_debugbus_block(struct msm_gpu *gpu, in a6xx_get_cx_debugbus_block()
351 static void a6xx_get_debugbus_blocks(struct msm_gpu *gpu, in a6xx_get_debugbus_blocks()
398 static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu, in a7xx_get_debugbus_blocks()
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| H A D | a6xx_preempt.c | 29 static inline void set_preempt_state(struct a6xx_gpu *gpu, in set_preempt_state()
63 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
92 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_preempt_timer() local
143 static void a6xx_preempt_keepalive_vote(struct msm_gpu *gpu, bool on) in a6xx_preempt_keepalive_vote()
154 void a6xx_preempt_irq(struct msm_gpu *gpu) in a6xx_preempt_irq()
205 void a6xx_preempt_hw_init(struct msm_gpu *gpu) in a6xx_preempt_hw_init()
241 void a6xx_preempt_trigger(struct msm_gpu *gpu) in a6xx_preempt_trigger()
358 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring() local
421 void a6xx_preempt_fini(struct msm_gpu *gpu) in a6xx_preempt_fini()
431 void a6xx_preempt_init(struct msm_gpu *gpu) in a6xx_preempt_init()
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| H A D | adreno_device.c | 72 struct msm_gpu *gpu = NULL; in adreno_load_gpu() local
216 struct msm_gpu *gpu; in adreno_bind() local
258 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_unbind() local
309 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_resume() local
316 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_suspend() local
328 static void suspend_scheduler(struct msm_gpu *gpu) in suspend_scheduler()
350 static void resume_scheduler(struct msm_gpu *gpu) in resume_scheduler()
363 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_suspend() local
390 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_resume() local
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| H A D | a2xx_gpummu.c | 16 struct msm_gpu *gpu; member
94 struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu) in a2xx_gpummu_new()
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| /linux/drivers/gpu/drm/etnaviv/ |
| H A D | etnaviv_gpu.c | 43 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value) in etnaviv_gpu_get_param()
179 static int etnaviv_gpu_reset_deassert(struct etnaviv_gpu *gpu) in etnaviv_gpu_reset_deassert()
202 static inline bool etnaviv_is_model_rev(struct etnaviv_gpu *gpu, u32 model, u32 revision) in etnaviv_is_model_rev()
211 static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) in etnaviv_hw_specs()
361 static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) in etnaviv_hw_identify()
502 static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock) in etnaviv_gpu_load_clock()
509 static void etnaviv_gpu_update_clock(struct etnaviv_gpu *gpu) in etnaviv_gpu_update_clock()
535 static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) in etnaviv_hw_reset()
636 static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu) in etnaviv_gpu_enable_mlcg()
696 void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch) in etnaviv_gpu_start_fe()
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| H A D | etnaviv_drv.c | 86 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_open() local
113 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_postclose() local
151 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_mmu_show()
181 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_buffer_dump()
202 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_ring_show()
228 struct etnaviv_gpu *gpu; in show_each_gpu() local
272 struct etnaviv_gpu *gpu; in etnaviv_ioctl_get_param() local
365 struct etnaviv_gpu *gpu; in etnaviv_ioctl_wait_fence() local
415 struct etnaviv_gpu *gpu; in etnaviv_ioctl_gem_wait() local
447 struct etnaviv_gpu *gpu; in etnaviv_ioctl_pm_query_dom() local
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| H A D | etnaviv_sched.c | 38 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_sched_timedout_job() local
109 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_sched_push_job() local
141 int etnaviv_sched_init(struct etnaviv_gpu *gpu) in etnaviv_sched_init()
156 void etnaviv_sched_fini(struct etnaviv_gpu *gpu) in etnaviv_sched_fini()
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| H A D | etnaviv_gpu.h | 170 static inline void gpu_write(struct etnaviv_gpu *gpu, u32 reg, u32 data) in gpu_write()
175 static inline u32 gpu_read(struct etnaviv_gpu *gpu, u32 reg) in gpu_read()
187 static inline u32 gpu_fix_power_address(struct etnaviv_gpu *gpu, u32 reg) in gpu_fix_power_address()
197 static inline void gpu_write_power(struct etnaviv_gpu *gpu, u32 reg, u32 data) in gpu_write_power()
202 static inline u32 gpu_read_power(struct etnaviv_gpu *gpu, u32 reg) in gpu_read_power()
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| H A D | etnaviv_iommu_v2.c | 165 static void etnaviv_iommuv2_restore_nonsec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_nonsec()
189 static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_sec()
244 static void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore()
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| H A D | etnaviv_dump.c | 82 struct etnaviv_gpu *gpu) in etnaviv_core_dump_registers()
120 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_core_dump() local
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| H A D | etnaviv_cmd_parser.c | 16 struct etnaviv_gpu *gpu; member
148 bool etnaviv_cmd_validate_one(struct etnaviv_gpu *gpu, u32 *stream, in etnaviv_cmd_validate_one()
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| H A D | etnaviv_mmu.c | 391 void etnaviv_iommu_restore(struct etnaviv_gpu *gpu, in etnaviv_iommu_restore()
476 int etnaviv_iommu_global_init(struct etnaviv_gpu *gpu) in etnaviv_iommu_global_init()
537 void etnaviv_iommu_global_fini(struct etnaviv_gpu *gpu) in etnaviv_iommu_global_fini()
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| /linux/drivers/gpu/drm/msm/ |
| H A D | msm_gpu.c | 25 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
49 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
58 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
70 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
88 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
93 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
99 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume()
125 int msm_gpu_pm_suspend(struct msm_gpu *gpu) in msm_gpu_pm_suspend()
151 void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_context *ctx, in msm_gpu_show_fdinfo()
159 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init()
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| H A D | msm_gpu.h | 291 adreno_smmu_has_prr(struct msm_gpu *gpu) in adreno_smmu_has_prr()
309 static inline bool msm_gpu_active(struct msm_gpu *gpu) in msm_gpu_active()
490 static inline int msm_gpu_convert_priority(struct msm_gpu *gpu, int prio, in msm_gpu_convert_priority()
595 static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data) in gpu_write()
601 static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg) in gpu_read()
607 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or) in gpu_rmw()
613 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 reg) in gpu_read64()
639 static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val) in gpu_write64()
721 static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu) in msm_gpu_crashstate_get()
737 static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu) in msm_gpu_crashstate_put()
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| H A D | msm_ringbuffer.c | 18 struct msm_gpu *gpu = submit->gpu; in msm_job_run() local
65 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new()
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| H A D | msm_debugfs.c | 37 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show() local
57 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release() local
72 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open() local
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| H A D | msm_perf.c | 61 struct msm_gpu *gpu = priv->gpu; in refill_buf() local
155 struct msm_gpu *gpu = priv->gpu; in perf_open() local
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