1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #ifndef _XE_BO_TYPES_H_ 7 #define _XE_BO_TYPES_H_ 8 9 #include <linux/iosys-map.h> 10 11 #include <drm/drm_gpusvm.h> 12 #include <drm/drm_pagemap.h> 13 #include <drm/ttm/ttm_bo.h> 14 #include <drm/ttm/ttm_device.h> 15 #include <drm/ttm/ttm_placement.h> 16 17 #include "xe_device_types.h" 18 #include "xe_ggtt_types.h" 19 20 struct xe_device; 21 struct xe_mem_pool_node; 22 struct xe_vm; 23 24 #define XE_BO_MAX_PLACEMENTS 3 25 26 /* TODO: To be selected with VM_MADVISE */ 27 #define XE_BO_PRIORITY_NORMAL 1 28 29 /** 30 * struct xe_bo - Xe buffer object 31 */ 32 struct xe_bo { 33 /** @ttm: TTM base buffer object */ 34 struct ttm_buffer_object ttm; 35 /** @backup_obj: The backup object when pinned and suspended (vram only) */ 36 struct xe_bo *backup_obj; 37 /** @parent_obj: Ref to parent bo if this a backup_obj */ 38 struct xe_bo *parent_obj; 39 /** @flags: flags for this buffer object */ 40 u32 flags; 41 /** @vm: VM this BO is attached to, for extobj this will be NULL */ 42 struct xe_vm *vm; 43 /** @tile: Tile this BO is attached to (kernel BO only) */ 44 struct xe_tile *tile; 45 /** @placements: valid placements for this BO */ 46 struct ttm_place placements[XE_BO_MAX_PLACEMENTS]; 47 /** @placement: current placement for this BO */ 48 struct ttm_placement placement; 49 /** @ggtt_node: Array of GGTT nodes if this BO is mapped in the GGTTs */ 50 struct xe_ggtt_node *ggtt_node[XE_MAX_TILES_PER_DEVICE]; 51 /** @vmap: iosys map of this buffer */ 52 struct iosys_map vmap; 53 /** @kmap: TTM bo kmap object for internal use only. Keep off. */ 54 struct ttm_bo_kmap_obj kmap; 55 /** @pinned_link: link to present / evicted list of pinned BO */ 56 struct list_head pinned_link; 57 #ifdef CONFIG_PROC_FS 58 /** 59 * @client: @xe_drm_client which created the bo 60 */ 61 struct xe_drm_client *client; 62 /** 63 * @client_link: Link into @xe_drm_client.objects_list 64 */ 65 struct list_head client_link; 66 #endif 67 /** @attr: User controlled attributes for bo */ 68 struct { 69 /** 70 * @atomic_access: type of atomic access bo needs 71 * protected by bo dma-resv lock 72 */ 73 u32 atomic_access; 74 } attr; 75 /** 76 * @pxp_key_instance: PXP key instance this BO was created against. A 77 * 0 in this variable indicates that the BO does not use PXP encryption. 78 */ 79 u32 pxp_key_instance; 80 81 /** @freed: List node for delayed put. */ 82 struct llist_node freed; 83 /** @update_index: Update index if PT BO */ 84 int update_index; 85 /** @created: Whether the bo has passed initial creation */ 86 bool created; 87 88 /** @ccs_cleared: true means that CCS region of BO is already cleared */ 89 bool ccs_cleared; 90 91 /** @bb_ccs: BB instructions of CCS read/write. Valid only for VF */ 92 struct xe_mem_pool_node *bb_ccs[XE_SRIOV_VF_CCS_CTX_COUNT]; 93 94 /** 95 * @cpu_caching: CPU caching mode. Currently only used for userspace 96 * objects. Exceptions are system memory on DGFX, which is always 97 * WB. 98 */ 99 u16 cpu_caching; 100 101 /** @devmem_allocation: SVM device memory allocation */ 102 struct drm_pagemap_devmem devmem_allocation; 103 104 /** @vram_userfault_link: Link into @mem_access.vram_userfault.list */ 105 struct list_head vram_userfault_link; 106 107 /** 108 * @min_align: minimum alignment needed for this BO if different 109 * from default 110 */ 111 u64 min_align; 112 113 /** 114 * @madv_purgeable: user space advise on BO purgeability, protected 115 * by BO's dma-resv lock. 116 */ 117 u32 madv_purgeable; 118 }; 119 120 #endif 121