1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2005 Peter Wemm
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/elf.h>
31 #include <sys/exec.h>
32 #include <sys/fcntl.h>
33 #include <sys/imgact.h>
34 #include <sys/kernel.h>
35 #include <sys/lock.h>
36 #include <sys/malloc.h>
37 #include <sys/mutex.h>
38 #include <sys/mman.h>
39 #include <sys/namei.h>
40 #include <sys/proc.h>
41 #include <sys/procfs.h>
42 #include <sys/reg.h>
43 #include <sys/resourcevar.h>
44 #include <sys/systm.h>
45 #include <sys/signalvar.h>
46 #include <sys/stat.h>
47 #include <sys/sx.h>
48 #include <sys/syscall.h>
49 #include <sys/sysctl.h>
50 #include <sys/sysent.h>
51 #include <sys/vnode.h>
52
53 #include <vm/vm.h>
54 #include <vm/vm_kern.h>
55 #include <vm/vm_param.h>
56 #include <vm/pmap.h>
57 #include <vm/vm_map.h>
58 #include <vm/vm_object.h>
59 #include <vm/vm_extern.h>
60
61 #include <compat/freebsd32/freebsd32_util.h>
62 #include <compat/freebsd32/freebsd32_proto.h>
63 #include <machine/fpu.h>
64 #include <machine/psl.h>
65 #include <machine/segments.h>
66 #include <machine/specialreg.h>
67 #include <machine/frame.h>
68 #include <machine/md_var.h>
69 #include <machine/pcb.h>
70 #include <machine/cpufunc.h>
71
72 int
fill_regs32(struct thread * td,struct reg32 * regs)73 fill_regs32(struct thread *td, struct reg32 *regs)
74 {
75 struct trapframe *tp;
76
77 tp = td->td_frame;
78 if (tp->tf_flags & TF_HASSEGS) {
79 regs->r_gs = tp->tf_gs;
80 regs->r_fs = tp->tf_fs;
81 regs->r_es = tp->tf_es;
82 regs->r_ds = tp->tf_ds;
83 } else {
84 regs->r_gs = _ugssel;
85 regs->r_fs = _ufssel;
86 regs->r_es = _udatasel;
87 regs->r_ds = _udatasel;
88 }
89 regs->r_edi = tp->tf_rdi;
90 regs->r_esi = tp->tf_rsi;
91 regs->r_ebp = tp->tf_rbp;
92 regs->r_ebx = tp->tf_rbx;
93 regs->r_edx = tp->tf_rdx;
94 regs->r_ecx = tp->tf_rcx;
95 regs->r_eax = tp->tf_rax;
96 regs->r_eip = tp->tf_rip;
97 regs->r_cs = tp->tf_cs;
98 regs->r_eflags = tp->tf_rflags;
99 regs->r_esp = tp->tf_rsp;
100 regs->r_ss = tp->tf_ss;
101 regs->r_err = 0;
102 regs->r_trapno = 0;
103 return (0);
104 }
105
106 int
set_regs32(struct thread * td,struct reg32 * regs)107 set_regs32(struct thread *td, struct reg32 *regs)
108 {
109 struct trapframe *tp;
110
111 tp = td->td_frame;
112 if (!EFL_SECURE(regs->r_eflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
113 return (EINVAL);
114 tp->tf_gs = regs->r_gs;
115 tp->tf_fs = regs->r_fs;
116 tp->tf_es = regs->r_es;
117 tp->tf_ds = regs->r_ds;
118 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
119 tp->tf_flags = TF_HASSEGS;
120 tp->tf_rdi = regs->r_edi;
121 tp->tf_rsi = regs->r_esi;
122 tp->tf_rbp = regs->r_ebp;
123 tp->tf_rbx = regs->r_ebx;
124 tp->tf_rdx = regs->r_edx;
125 tp->tf_rcx = regs->r_ecx;
126 tp->tf_rax = regs->r_eax;
127 tp->tf_rip = regs->r_eip;
128 tp->tf_cs = regs->r_cs;
129 tp->tf_rflags = regs->r_eflags;
130 tp->tf_rsp = regs->r_esp;
131 tp->tf_ss = regs->r_ss;
132 return (0);
133 }
134
135 int
fill_fpregs32(struct thread * td,struct fpreg32 * regs)136 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
137 {
138 struct savefpu *sv_fpu;
139 struct save87 *sv_87;
140 struct env87 *penv_87;
141 struct envxmm *penv_xmm;
142 struct fpacc87 *fx_reg;
143 int i, st;
144 uint64_t mantissa;
145 uint16_t tw, exp;
146 uint8_t ab_tw;
147
148 bzero(regs, sizeof(*regs));
149 sv_87 = (struct save87 *)regs;
150 penv_87 = &sv_87->sv_env;
151 fpugetregs(td);
152 sv_fpu = get_pcb_user_save_td(td);
153 penv_xmm = &sv_fpu->sv_env;
154
155 /* FPU control/status */
156 penv_87->en_cw = penv_xmm->en_cw;
157 penv_87->en_sw = penv_xmm->en_sw;
158
159 /*
160 * XXX for en_fip/fcs/foo/fos, check if the fxsave format
161 * uses the old-style layout for 32 bit user apps. If so,
162 * read the ip and operand segment registers from there.
163 * For now, use the process's %cs/%ds.
164 */
165 penv_87->en_fip = penv_xmm->en_rip;
166 penv_87->en_fcs = td->td_frame->tf_cs;
167 penv_87->en_opcode = penv_xmm->en_opcode;
168 penv_87->en_foo = penv_xmm->en_rdp;
169 /* Entry into the kernel always sets TF_HASSEGS */
170 penv_87->en_fos = td->td_frame->tf_ds;
171
172 /*
173 * FPU registers and tags.
174 * For ST(i), i = fpu_reg - top; we start with fpu_reg=7.
175 */
176 st = 7 - ((penv_xmm->en_sw >> 11) & 7);
177 ab_tw = penv_xmm->en_tw;
178 tw = 0;
179 for (i = 0x80; i != 0; i >>= 1) {
180 sv_87->sv_ac[st] = sv_fpu->sv_fp[st].fp_acc;
181 tw <<= 2;
182 if ((ab_tw & i) != 0) {
183 /* Non-empty - we need to check ST(i) */
184 fx_reg = &sv_fpu->sv_fp[st].fp_acc;
185 /* The first 64 bits contain the mantissa. */
186 mantissa = *((uint64_t *)fx_reg->fp_bytes);
187 /*
188 * The final 16 bits contain the sign bit and the exponent.
189 * Mask the sign bit since it is of no consequence to these
190 * tests.
191 */
192 exp = *((uint16_t *)&fx_reg->fp_bytes[8]) & 0x7fff;
193 if (exp == 0) {
194 if (mantissa == 0)
195 tw |= 1; /* Zero */
196 else
197 tw |= 2; /* Denormal */
198 } else if (exp == 0x7fff)
199 tw |= 2; /* Infinity or NaN */
200 } else
201 tw |= 3; /* Empty */
202 st = (st - 1) & 7;
203 }
204 penv_87->en_tw = tw;
205
206 return (0);
207 }
208
209 int
set_fpregs32(struct thread * td,struct fpreg32 * regs)210 set_fpregs32(struct thread *td, struct fpreg32 *regs)
211 {
212 struct save87 *sv_87 = (struct save87 *)regs;
213 struct env87 *penv_87 = &sv_87->sv_env;
214 struct savefpu *sv_fpu = get_pcb_user_save_td(td);
215 struct envxmm *penv_xmm = &sv_fpu->sv_env;
216 int i;
217
218 /* FPU control/status */
219 penv_xmm->en_cw = penv_87->en_cw;
220 penv_xmm->en_sw = penv_87->en_sw;
221 penv_xmm->en_rip = penv_87->en_fip;
222 /* penv_87->en_fcs and en_fos ignored, see above */
223 penv_xmm->en_opcode = penv_87->en_opcode;
224 penv_xmm->en_rdp = penv_87->en_foo;
225
226 /* FPU registers and tags */
227 penv_xmm->en_tw = 0;
228 for (i = 0; i < 8; ++i) {
229 sv_fpu->sv_fp[i].fp_acc = sv_87->sv_ac[i];
230 if ((penv_87->en_tw & (3 << i * 2)) != (3 << i * 2))
231 penv_xmm->en_tw |= 1 << i;
232 }
233
234 for (i = 8; i < 16; ++i)
235 bzero(&sv_fpu->sv_fp[i].fp_acc, sizeof(sv_fpu->sv_fp[i].fp_acc));
236 fpuuserinited(td);
237
238 return (0);
239 }
240
241 int
fill_dbregs32(struct thread * td,struct dbreg32 * regs)242 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
243 {
244 struct dbreg dr;
245 int err, i;
246
247 err = fill_dbregs(td, &dr);
248 for (i = 0; i < 8; i++)
249 regs->dr[i] = dr.dr[i];
250 return (err);
251 }
252
253 int
set_dbregs32(struct thread * td,struct dbreg32 * regs)254 set_dbregs32(struct thread *td, struct dbreg32 *regs)
255 {
256 struct dbreg dr;
257 int i;
258
259 for (i = 0; i < 8; i++)
260 dr.dr[i] = regs->dr[i];
261 for (i = 8; i < 16; i++)
262 dr.dr[i] = 0;
263 return (set_dbregs(td, &dr));
264 }
265
266 static bool
get_i386_segbases(struct regset * rs,struct thread * td,void * buf,size_t * sizep)267 get_i386_segbases(struct regset *rs, struct thread *td, void *buf,
268 size_t *sizep)
269 {
270 struct segbasereg32 *reg;
271 struct pcb *pcb;
272
273 if (buf != NULL) {
274 KASSERT(*sizep == sizeof(*reg), ("%s: invalid size", __func__));
275 reg = buf;
276
277 pcb = td->td_pcb;
278 if (td == curthread)
279 update_pcb_bases(pcb);
280 reg->r_fsbase = pcb->pcb_fsbase;
281 reg->r_gsbase = pcb->pcb_gsbase;
282 }
283 *sizep = sizeof(*reg);
284 return (true);
285 }
286
287 static bool
set_i386_segbases(struct regset * rs,struct thread * td,void * buf,size_t size)288 set_i386_segbases(struct regset *rs, struct thread *td, void *buf,
289 size_t size)
290 {
291 struct segbasereg32 *reg;
292 struct pcb *pcb;
293
294 KASSERT(size == sizeof(*reg), ("%s: invalid size", __func__));
295 reg = buf;
296
297 pcb = td->td_pcb;
298 set_pcb_flags(pcb, PCB_FULL_IRET);
299 pcb->pcb_fsbase = reg->r_fsbase;
300 td->td_frame->tf_fs = _ufssel;
301 pcb->pcb_gsbase = reg->r_gsbase;
302 td->td_frame->tf_gs = _ugssel;
303
304 return (true);
305 }
306
307 static struct regset regset_i386_segbases = {
308 .note = NT_X86_SEGBASES,
309 .size = sizeof(struct segbasereg),
310 .get = get_i386_segbases,
311 .set = set_i386_segbases,
312 };
313 ELF32_REGSET(regset_i386_segbases);
314