1 //===--- Sparc.cpp - Tools Implementations ----------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "Sparc.h"
10 #include "clang/Driver/Driver.h"
11 #include "clang/Driver/Options.h"
12 #include "llvm/ADT/StringSwitch.h"
13 #include "llvm/Option/ArgList.h"
14 #include "llvm/TargetParser/Host.h"
15
16 using namespace clang::driver;
17 using namespace clang::driver::tools;
18 using namespace clang;
19 using namespace llvm::opt;
20
getSparcAsmModeForCPU(StringRef Name,const llvm::Triple & Triple)21 const char *sparc::getSparcAsmModeForCPU(StringRef Name,
22 const llvm::Triple &Triple) {
23 if (Triple.getArch() == llvm::Triple::sparcv9) {
24 const char *DefV9CPU;
25
26 if (Triple.isOSSolaris())
27 DefV9CPU = "-Av9b";
28 else if (Triple.isOSLinux() || Triple.isOSFreeBSD() || Triple.isOSOpenBSD())
29 DefV9CPU = "-Av9a";
30 else
31 DefV9CPU = "-Av9";
32
33 return llvm::StringSwitch<const char *>(Name)
34 .Case("niagara", "-Av9b")
35 .Case("niagara2", "-Av9b")
36 .Case("niagara3", "-Av9d")
37 .Case("niagara4", "-Av9d")
38 .Default(DefV9CPU);
39 } else {
40 const char *DefV8CPU;
41
42 if (Triple.isOSSolaris())
43 DefV8CPU = "-Av8plus";
44 else
45 DefV8CPU = "-Av8";
46
47 return llvm::StringSwitch<const char *>(Name)
48 .Case("v8", "-Av8")
49 .Case("supersparc", "-Av8")
50 .Case("sparclite", "-Asparclite")
51 .Case("f934", "-Asparclite")
52 .Case("hypersparc", "-Av8")
53 .Case("sparclite86x", "-Asparclite")
54 .Case("sparclet", "-Asparclet")
55 .Case("tsc701", "-Asparclet")
56 .Case("v9", "-Av8plus")
57 .Case("ultrasparc", "-Av8plus")
58 .Case("ultrasparc3", "-Av8plus")
59 .Case("niagara", "-Av8plusb")
60 .Case("niagara2", "-Av8plusb")
61 .Case("niagara3", "-Av8plusd")
62 .Case("niagara4", "-Av8plusd")
63 .Case("ma2100", "-Aleon")
64 .Case("ma2150", "-Aleon")
65 .Case("ma2155", "-Aleon")
66 .Case("ma2450", "-Aleon")
67 .Case("ma2455", "-Aleon")
68 .Case("ma2x5x", "-Aleon")
69 .Case("ma2080", "-Aleon")
70 .Case("ma2085", "-Aleon")
71 .Case("ma2480", "-Aleon")
72 .Case("ma2485", "-Aleon")
73 .Case("ma2x8x", "-Aleon")
74 .Case("leon2", "-Av8")
75 .Case("at697e", "-Av8")
76 .Case("at697f", "-Av8")
77 .Case("leon3", "-Aleon")
78 .Case("ut699", "-Av8")
79 .Case("gr712rc", "-Aleon")
80 .Case("leon4", "-Aleon")
81 .Case("gr740", "-Aleon")
82 .Default(DefV8CPU);
83 }
84 }
85
getSparcFloatABI(const Driver & D,const ArgList & Args)86 sparc::FloatABI sparc::getSparcFloatABI(const Driver &D,
87 const ArgList &Args) {
88 sparc::FloatABI ABI = sparc::FloatABI::Invalid;
89 if (Arg *A = Args.getLastArg(options::OPT_msoft_float, options::OPT_mno_fpu,
90 options::OPT_mhard_float, options::OPT_mfpu,
91 options::OPT_mfloat_abi_EQ)) {
92 if (A->getOption().matches(options::OPT_msoft_float) ||
93 A->getOption().matches(options::OPT_mno_fpu))
94 ABI = sparc::FloatABI::Soft;
95 else if (A->getOption().matches(options::OPT_mhard_float) ||
96 A->getOption().matches(options::OPT_mfpu))
97 ABI = sparc::FloatABI::Hard;
98 else {
99 ABI = llvm::StringSwitch<sparc::FloatABI>(A->getValue())
100 .Case("soft", sparc::FloatABI::Soft)
101 .Case("hard", sparc::FloatABI::Hard)
102 .Default(sparc::FloatABI::Invalid);
103 if (ABI == sparc::FloatABI::Invalid &&
104 !StringRef(A->getValue()).empty()) {
105 D.Diag(clang::diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
106 ABI = sparc::FloatABI::Hard;
107 }
108 }
109 }
110
111 // If unspecified, choose the default based on the platform.
112 // Only the hard-float ABI on Sparc is standardized, and it is the
113 // default. GCC also supports a nonstandard soft-float ABI mode, also
114 // implemented in LLVM. However as this is not standard we set the default
115 // to be hard-float.
116 if (ABI == sparc::FloatABI::Invalid) {
117 ABI = sparc::FloatABI::Hard;
118 }
119
120 return ABI;
121 }
122
getSparcTargetCPU(const Driver & D,const ArgList & Args,const llvm::Triple & Triple)123 std::string sparc::getSparcTargetCPU(const Driver &D, const ArgList &Args,
124 const llvm::Triple &Triple) {
125 if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ)) {
126 StringRef CPUName = A->getValue();
127 if (CPUName == "native") {
128 std::string CPU = std::string(llvm::sys::getHostCPUName());
129 if (!CPU.empty() && CPU != "generic")
130 return CPU;
131 return "";
132 }
133 return std::string(CPUName);
134 }
135
136 if (Triple.getArch() == llvm::Triple::sparc &&
137 (Triple.isOSSolaris() || Triple.isOSLinux()))
138 return "v9";
139 return "";
140 }
141
getSparcTargetFeatures(const Driver & D,const llvm::Triple & Triple,const ArgList & Args,std::vector<StringRef> & Features)142 void sparc::getSparcTargetFeatures(const Driver &D, const llvm::Triple &Triple,
143 const ArgList &Args,
144 std::vector<StringRef> &Features) {
145 sparc::FloatABI FloatABI = sparc::getSparcFloatABI(D, Args);
146 if (FloatABI == sparc::FloatABI::Soft)
147 Features.push_back("+soft-float");
148
149 if (Arg *A = Args.getLastArg(options::OPT_mfsmuld, options::OPT_mno_fsmuld)) {
150 if (A->getOption().matches(options::OPT_mfsmuld))
151 Features.push_back("+fsmuld");
152 else
153 Features.push_back("-fsmuld");
154 }
155
156 if (Arg *A = Args.getLastArg(options::OPT_mpopc, options::OPT_mno_popc)) {
157 if (A->getOption().matches(options::OPT_mpopc))
158 Features.push_back("+popc");
159 else
160 Features.push_back("-popc");
161 }
162
163 // Those OSes default to enabling VIS on 64-bit SPARC.
164 // See also the corresponding code for external assemblers in
165 // sparc::getSparcAsmModeForCPU().
166 bool IsSparcV9ATarget =
167 (Triple.getArch() == llvm::Triple::sparcv9) &&
168 (Triple.isOSLinux() || Triple.isOSFreeBSD() || Triple.isOSOpenBSD());
169 bool IsSparcV9BTarget = Triple.isOSSolaris();
170 bool IsSparcV8PlusTarget =
171 Triple.getArch() == llvm::Triple::sparc && Triple.isOSSolaris();
172 if (Arg *A = Args.getLastArg(options::OPT_mvis, options::OPT_mno_vis)) {
173 if (A->getOption().matches(options::OPT_mvis))
174 Features.push_back("+vis");
175 else
176 Features.push_back("-vis");
177 } else if (IsSparcV9ATarget) {
178 Features.push_back("+vis");
179 }
180
181 if (Arg *A = Args.getLastArg(options::OPT_mvis2, options::OPT_mno_vis2)) {
182 if (A->getOption().matches(options::OPT_mvis2))
183 Features.push_back("+vis2");
184 else
185 Features.push_back("-vis2");
186 } else if (IsSparcV9BTarget) {
187 Features.push_back("+vis2");
188 }
189
190 if (Arg *A = Args.getLastArg(options::OPT_mvis3, options::OPT_mno_vis3)) {
191 if (A->getOption().matches(options::OPT_mvis3))
192 Features.push_back("+vis3");
193 else
194 Features.push_back("-vis3");
195 }
196
197 if (Arg *A = Args.getLastArg(options::OPT_mhard_quad_float,
198 options::OPT_msoft_quad_float)) {
199 if (A->getOption().matches(options::OPT_mhard_quad_float))
200 Features.push_back("+hard-quad-float");
201 else
202 Features.push_back("-hard-quad-float");
203 }
204
205 if (Arg *A = Args.getLastArg(options::OPT_mv8plus, options::OPT_mno_v8plus)) {
206 if (A->getOption().matches(options::OPT_mv8plus))
207 Features.push_back("+v8plus");
208 } else if (IsSparcV8PlusTarget) {
209 Features.push_back("+v8plus");
210 }
211
212 if (Args.hasArg(options::OPT_ffixed_g1))
213 Features.push_back("+reserve-g1");
214
215 if (Args.hasArg(options::OPT_ffixed_g2))
216 Features.push_back("+reserve-g2");
217
218 if (Args.hasArg(options::OPT_ffixed_g3))
219 Features.push_back("+reserve-g3");
220
221 if (Args.hasArg(options::OPT_ffixed_g4))
222 Features.push_back("+reserve-g4");
223
224 if (Args.hasArg(options::OPT_ffixed_g5))
225 Features.push_back("+reserve-g5");
226
227 if (Args.hasArg(options::OPT_ffixed_g6))
228 Features.push_back("+reserve-g6");
229
230 if (Args.hasArg(options::OPT_ffixed_g7))
231 Features.push_back("+reserve-g7");
232
233 if (Args.hasArg(options::OPT_ffixed_o0))
234 Features.push_back("+reserve-o0");
235
236 if (Args.hasArg(options::OPT_ffixed_o1))
237 Features.push_back("+reserve-o1");
238
239 if (Args.hasArg(options::OPT_ffixed_o2))
240 Features.push_back("+reserve-o2");
241
242 if (Args.hasArg(options::OPT_ffixed_o3))
243 Features.push_back("+reserve-o3");
244
245 if (Args.hasArg(options::OPT_ffixed_o4))
246 Features.push_back("+reserve-o4");
247
248 if (Args.hasArg(options::OPT_ffixed_o5))
249 Features.push_back("+reserve-o5");
250
251 if (Args.hasArg(options::OPT_ffixed_l0))
252 Features.push_back("+reserve-l0");
253
254 if (Args.hasArg(options::OPT_ffixed_l1))
255 Features.push_back("+reserve-l1");
256
257 if (Args.hasArg(options::OPT_ffixed_l2))
258 Features.push_back("+reserve-l2");
259
260 if (Args.hasArg(options::OPT_ffixed_l3))
261 Features.push_back("+reserve-l3");
262
263 if (Args.hasArg(options::OPT_ffixed_l4))
264 Features.push_back("+reserve-l4");
265
266 if (Args.hasArg(options::OPT_ffixed_l5))
267 Features.push_back("+reserve-l5");
268
269 if (Args.hasArg(options::OPT_ffixed_l6))
270 Features.push_back("+reserve-l6");
271
272 if (Args.hasArg(options::OPT_ffixed_l7))
273 Features.push_back("+reserve-l7");
274
275 if (Args.hasArg(options::OPT_ffixed_i0))
276 Features.push_back("+reserve-i0");
277
278 if (Args.hasArg(options::OPT_ffixed_i1))
279 Features.push_back("+reserve-i1");
280
281 if (Args.hasArg(options::OPT_ffixed_i2))
282 Features.push_back("+reserve-i2");
283
284 if (Args.hasArg(options::OPT_ffixed_i3))
285 Features.push_back("+reserve-i3");
286
287 if (Args.hasArg(options::OPT_ffixed_i4))
288 Features.push_back("+reserve-i4");
289
290 if (Args.hasArg(options::OPT_ffixed_i5))
291 Features.push_back("+reserve-i5");
292
293 if (Args.hasArg(options::OPT_mfix_gr712rc)) {
294 Features.push_back("+fix-tn0009");
295 Features.push_back("+fix-tn0011");
296 Features.push_back("+fix-tn0012");
297 Features.push_back("+fix-tn0013");
298 }
299
300 if (Args.hasArg(options::OPT_mfix_ut700)) {
301 Features.push_back("+fix-tn0009");
302 Features.push_back("+fix-tn0010");
303 Features.push_back("+fix-tn0013");
304 }
305 }
306